bfin_uart.c 40 KB

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  1. /*
  2. * Blackfin On-Chip Serial Driver
  3. *
  4. * Copyright 2006-2010 Analog Devices Inc.
  5. *
  6. * Enter bugs at http://blackfin.uclinux.org/
  7. *
  8. * Licensed under the GPL-2 or later.
  9. */
  10. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  11. #define SUPPORT_SYSRQ
  12. #endif
  13. #define DRIVER_NAME "bfin-uart"
  14. #define pr_fmt(fmt) DRIVER_NAME ": " fmt
  15. #include <linux/module.h>
  16. #include <linux/ioport.h>
  17. #include <linux/gfp.h>
  18. #include <linux/io.h>
  19. #include <linux/init.h>
  20. #include <linux/console.h>
  21. #include <linux/sysrq.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/tty.h>
  24. #include <linux/tty_flip.h>
  25. #include <linux/serial_core.h>
  26. #include <linux/gpio.h>
  27. #include <linux/irq.h>
  28. #include <linux/kgdb.h>
  29. #include <linux/slab.h>
  30. #include <linux/dma-mapping.h>
  31. #include <asm/portmux.h>
  32. #include <asm/cacheflush.h>
  33. #include <asm/dma.h>
  34. #define port_membase(uart) (((struct bfin_serial_port *)(uart))->port.membase)
  35. #define get_lsr_cache(uart) (((struct bfin_serial_port *)(uart))->lsr)
  36. #define put_lsr_cache(uart, v) (((struct bfin_serial_port *)(uart))->lsr = (v))
  37. #include <asm/bfin_serial.h>
  38. #ifdef CONFIG_SERIAL_BFIN_MODULE
  39. # undef CONFIG_EARLY_PRINTK
  40. #endif
  41. #ifdef CONFIG_SERIAL_BFIN_MODULE
  42. # undef CONFIG_EARLY_PRINTK
  43. #endif
  44. /* UART name and device definitions */
  45. #define BFIN_SERIAL_DEV_NAME "ttyBF"
  46. #define BFIN_SERIAL_MAJOR 204
  47. #define BFIN_SERIAL_MINOR 64
  48. static struct bfin_serial_port *bfin_serial_ports[BFIN_UART_NR_PORTS];
  49. #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  50. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  51. # ifndef CONFIG_SERIAL_BFIN_PIO
  52. # error KGDB only support UART in PIO mode.
  53. # endif
  54. static int kgdboc_port_line;
  55. static int kgdboc_break_enabled;
  56. #endif
  57. /*
  58. * Setup for console. Argument comes from the menuconfig
  59. */
  60. #define DMA_RX_XCOUNT 512
  61. #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
  62. #define DMA_RX_FLUSH_JIFFIES (HZ / 50)
  63. #ifdef CONFIG_SERIAL_BFIN_DMA
  64. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
  65. #else
  66. static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
  67. #endif
  68. static void bfin_serial_reset_irda(struct uart_port *port);
  69. #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
  70. defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
  71. static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  72. {
  73. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  74. if (uart->cts_pin < 0)
  75. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  76. /* CTS PIN is negative assertive. */
  77. if (UART_GET_CTS(uart))
  78. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  79. else
  80. return TIOCM_DSR | TIOCM_CAR;
  81. }
  82. static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  83. {
  84. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  85. if (uart->rts_pin < 0)
  86. return;
  87. /* RTS PIN is negative assertive. */
  88. if (mctrl & TIOCM_RTS)
  89. UART_ENABLE_RTS(uart);
  90. else
  91. UART_DISABLE_RTS(uart);
  92. }
  93. /*
  94. * Handle any change of modem status signal.
  95. */
  96. static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id)
  97. {
  98. struct bfin_serial_port *uart = dev_id;
  99. unsigned int status;
  100. status = bfin_serial_get_mctrl(&uart->port);
  101. uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
  102. #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
  103. uart->scts = 1;
  104. UART_CLEAR_SCTS(uart);
  105. UART_CLEAR_IER(uart, EDSSI);
  106. #endif
  107. return IRQ_HANDLED;
  108. }
  109. #else
  110. static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  111. {
  112. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  113. }
  114. static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  115. {
  116. }
  117. #endif
  118. /*
  119. * interrupts are disabled on entry
  120. */
  121. static void bfin_serial_stop_tx(struct uart_port *port)
  122. {
  123. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  124. #ifdef CONFIG_SERIAL_BFIN_DMA
  125. struct circ_buf *xmit = &uart->port.state->xmit;
  126. #endif
  127. while (!(UART_GET_LSR(uart) & TEMT))
  128. cpu_relax();
  129. #ifdef CONFIG_SERIAL_BFIN_DMA
  130. disable_dma(uart->tx_dma_channel);
  131. xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
  132. uart->port.icount.tx += uart->tx_count;
  133. uart->tx_count = 0;
  134. uart->tx_done = 1;
  135. #else
  136. #ifdef CONFIG_BF54x
  137. /* Clear TFI bit */
  138. UART_PUT_LSR(uart, TFI);
  139. #endif
  140. UART_CLEAR_IER(uart, ETBEI);
  141. #endif
  142. }
  143. /*
  144. * port is locked and interrupts are disabled
  145. */
  146. static void bfin_serial_start_tx(struct uart_port *port)
  147. {
  148. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  149. struct tty_struct *tty = uart->port.state->port.tty;
  150. #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
  151. if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) {
  152. uart->scts = 0;
  153. uart_handle_cts_change(&uart->port, uart->scts);
  154. }
  155. #endif
  156. /*
  157. * To avoid losting RX interrupt, we reset IR function
  158. * before sending data.
  159. */
  160. if (tty->termios->c_line == N_IRDA)
  161. bfin_serial_reset_irda(port);
  162. #ifdef CONFIG_SERIAL_BFIN_DMA
  163. if (uart->tx_done)
  164. bfin_serial_dma_tx_chars(uart);
  165. #else
  166. UART_SET_IER(uart, ETBEI);
  167. bfin_serial_tx_chars(uart);
  168. #endif
  169. }
  170. /*
  171. * Interrupts are enabled
  172. */
  173. static void bfin_serial_stop_rx(struct uart_port *port)
  174. {
  175. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  176. UART_CLEAR_IER(uart, ERBFI);
  177. }
  178. /*
  179. * Set the modem control timer to fire immediately.
  180. */
  181. static void bfin_serial_enable_ms(struct uart_port *port)
  182. {
  183. }
  184. #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
  185. # define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold)
  186. # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
  187. #else
  188. # define UART_GET_ANOMALY_THRESHOLD(uart) 0
  189. # define UART_SET_ANOMALY_THRESHOLD(uart, v)
  190. #endif
  191. #ifdef CONFIG_SERIAL_BFIN_PIO
  192. static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
  193. {
  194. struct tty_struct *tty = NULL;
  195. unsigned int status, ch, flg;
  196. static struct timeval anomaly_start = { .tv_sec = 0 };
  197. status = UART_GET_LSR(uart);
  198. UART_CLEAR_LSR(uart);
  199. ch = UART_GET_CHAR(uart);
  200. uart->port.icount.rx++;
  201. #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  202. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  203. if (kgdb_connected && kgdboc_port_line == uart->port.line
  204. && kgdboc_break_enabled)
  205. if (ch == 0x3) {/* Ctrl + C */
  206. kgdb_breakpoint();
  207. return;
  208. }
  209. if (!uart->port.state || !uart->port.state->port.tty)
  210. return;
  211. #endif
  212. tty = uart->port.state->port.tty;
  213. if (ANOMALY_05000363) {
  214. /* The BF533 (and BF561) family of processors have a nice anomaly
  215. * where they continuously generate characters for a "single" break.
  216. * We have to basically ignore this flood until the "next" valid
  217. * character comes across. Due to the nature of the flood, it is
  218. * not possible to reliably catch bytes that are sent too quickly
  219. * after this break. So application code talking to the Blackfin
  220. * which sends a break signal must allow at least 1.5 character
  221. * times after the end of the break for things to stabilize. This
  222. * timeout was picked as it must absolutely be larger than 1
  223. * character time +/- some percent. So 1.5 sounds good. All other
  224. * Blackfin families operate properly. Woo.
  225. */
  226. if (anomaly_start.tv_sec) {
  227. struct timeval curr;
  228. suseconds_t usecs;
  229. if ((~ch & (~ch + 1)) & 0xff)
  230. goto known_good_char;
  231. do_gettimeofday(&curr);
  232. if (curr.tv_sec - anomaly_start.tv_sec > 1)
  233. goto known_good_char;
  234. usecs = 0;
  235. if (curr.tv_sec != anomaly_start.tv_sec)
  236. usecs += USEC_PER_SEC;
  237. usecs += curr.tv_usec - anomaly_start.tv_usec;
  238. if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
  239. goto known_good_char;
  240. if (ch)
  241. anomaly_start.tv_sec = 0;
  242. else
  243. anomaly_start = curr;
  244. return;
  245. known_good_char:
  246. status &= ~BI;
  247. anomaly_start.tv_sec = 0;
  248. }
  249. }
  250. if (status & BI) {
  251. if (ANOMALY_05000363)
  252. if (bfin_revid() < 5)
  253. do_gettimeofday(&anomaly_start);
  254. uart->port.icount.brk++;
  255. if (uart_handle_break(&uart->port))
  256. goto ignore_char;
  257. status &= ~(PE | FE);
  258. }
  259. if (status & PE)
  260. uart->port.icount.parity++;
  261. if (status & OE)
  262. uart->port.icount.overrun++;
  263. if (status & FE)
  264. uart->port.icount.frame++;
  265. status &= uart->port.read_status_mask;
  266. if (status & BI)
  267. flg = TTY_BREAK;
  268. else if (status & PE)
  269. flg = TTY_PARITY;
  270. else if (status & FE)
  271. flg = TTY_FRAME;
  272. else
  273. flg = TTY_NORMAL;
  274. if (uart_handle_sysrq_char(&uart->port, ch))
  275. goto ignore_char;
  276. uart_insert_char(&uart->port, status, OE, ch, flg);
  277. ignore_char:
  278. tty_flip_buffer_push(tty);
  279. }
  280. static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
  281. {
  282. struct circ_buf *xmit = &uart->port.state->xmit;
  283. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  284. #ifdef CONFIG_BF54x
  285. /* Clear TFI bit */
  286. UART_PUT_LSR(uart, TFI);
  287. #endif
  288. /* Anomaly notes:
  289. * 05000215 - we always clear ETBEI within last UART TX
  290. * interrupt to end a string. It is always set
  291. * when start a new tx.
  292. */
  293. UART_CLEAR_IER(uart, ETBEI);
  294. return;
  295. }
  296. if (uart->port.x_char) {
  297. UART_PUT_CHAR(uart, uart->port.x_char);
  298. uart->port.icount.tx++;
  299. uart->port.x_char = 0;
  300. }
  301. while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
  302. UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
  303. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  304. uart->port.icount.tx++;
  305. }
  306. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  307. uart_write_wakeup(&uart->port);
  308. }
  309. static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
  310. {
  311. struct bfin_serial_port *uart = dev_id;
  312. while (UART_GET_LSR(uart) & DR)
  313. bfin_serial_rx_chars(uart);
  314. return IRQ_HANDLED;
  315. }
  316. static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
  317. {
  318. struct bfin_serial_port *uart = dev_id;
  319. #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
  320. if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) {
  321. uart->scts = 0;
  322. uart_handle_cts_change(&uart->port, uart->scts);
  323. }
  324. #endif
  325. spin_lock(&uart->port.lock);
  326. if (UART_GET_LSR(uart) & THRE)
  327. bfin_serial_tx_chars(uart);
  328. spin_unlock(&uart->port.lock);
  329. return IRQ_HANDLED;
  330. }
  331. #endif
  332. #ifdef CONFIG_SERIAL_BFIN_DMA
  333. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
  334. {
  335. struct circ_buf *xmit = &uart->port.state->xmit;
  336. uart->tx_done = 0;
  337. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  338. uart->tx_count = 0;
  339. uart->tx_done = 1;
  340. return;
  341. }
  342. if (uart->port.x_char) {
  343. UART_PUT_CHAR(uart, uart->port.x_char);
  344. uart->port.icount.tx++;
  345. uart->port.x_char = 0;
  346. }
  347. uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
  348. if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
  349. uart->tx_count = UART_XMIT_SIZE - xmit->tail;
  350. blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
  351. (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
  352. set_dma_config(uart->tx_dma_channel,
  353. set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
  354. INTR_ON_BUF,
  355. DIMENSION_LINEAR,
  356. DATA_SIZE_8,
  357. DMA_SYNC_RESTART));
  358. set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
  359. set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
  360. set_dma_x_modify(uart->tx_dma_channel, 1);
  361. SSYNC();
  362. enable_dma(uart->tx_dma_channel);
  363. UART_SET_IER(uart, ETBEI);
  364. }
  365. static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
  366. {
  367. struct tty_struct *tty = uart->port.state->port.tty;
  368. int i, flg, status;
  369. status = UART_GET_LSR(uart);
  370. UART_CLEAR_LSR(uart);
  371. uart->port.icount.rx +=
  372. CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
  373. UART_XMIT_SIZE);
  374. if (status & BI) {
  375. uart->port.icount.brk++;
  376. if (uart_handle_break(&uart->port))
  377. goto dma_ignore_char;
  378. status &= ~(PE | FE);
  379. }
  380. if (status & PE)
  381. uart->port.icount.parity++;
  382. if (status & OE)
  383. uart->port.icount.overrun++;
  384. if (status & FE)
  385. uart->port.icount.frame++;
  386. status &= uart->port.read_status_mask;
  387. if (status & BI)
  388. flg = TTY_BREAK;
  389. else if (status & PE)
  390. flg = TTY_PARITY;
  391. else if (status & FE)
  392. flg = TTY_FRAME;
  393. else
  394. flg = TTY_NORMAL;
  395. for (i = uart->rx_dma_buf.tail; ; i++) {
  396. if (i >= UART_XMIT_SIZE)
  397. i = 0;
  398. if (i == uart->rx_dma_buf.head)
  399. break;
  400. if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
  401. uart_insert_char(&uart->port, status, OE,
  402. uart->rx_dma_buf.buf[i], flg);
  403. }
  404. dma_ignore_char:
  405. tty_flip_buffer_push(tty);
  406. }
  407. void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
  408. {
  409. int x_pos, pos;
  410. dma_disable_irq_nosync(uart->rx_dma_channel);
  411. spin_lock_bh(&uart->rx_lock);
  412. /* 2D DMA RX buffer ring is used. Because curr_y_count and
  413. * curr_x_count can't be read as an atomic operation,
  414. * curr_y_count should be read before curr_x_count. When
  415. * curr_x_count is read, curr_y_count may already indicate
  416. * next buffer line. But, the position calculated here is
  417. * still indicate the old line. The wrong position data may
  418. * be smaller than current buffer tail, which cause garbages
  419. * are received if it is not prohibit.
  420. */
  421. uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
  422. x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
  423. uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
  424. if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
  425. uart->rx_dma_nrows = 0;
  426. x_pos = DMA_RX_XCOUNT - x_pos;
  427. if (x_pos == DMA_RX_XCOUNT)
  428. x_pos = 0;
  429. pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
  430. /* Ignore receiving data if new position is in the same line of
  431. * current buffer tail and small.
  432. */
  433. if (pos > uart->rx_dma_buf.tail ||
  434. uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
  435. uart->rx_dma_buf.head = pos;
  436. bfin_serial_dma_rx_chars(uart);
  437. uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
  438. }
  439. spin_unlock_bh(&uart->rx_lock);
  440. dma_enable_irq(uart->rx_dma_channel);
  441. mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
  442. }
  443. static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
  444. {
  445. struct bfin_serial_port *uart = dev_id;
  446. struct circ_buf *xmit = &uart->port.state->xmit;
  447. #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
  448. if (uart->scts && !(bfin_serial_get_mctrl(&uart->port)&TIOCM_CTS)) {
  449. uart->scts = 0;
  450. uart_handle_cts_change(&uart->port, uart->scts);
  451. }
  452. #endif
  453. spin_lock(&uart->port.lock);
  454. if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
  455. disable_dma(uart->tx_dma_channel);
  456. clear_dma_irqstat(uart->tx_dma_channel);
  457. /* Anomaly notes:
  458. * 05000215 - we always clear ETBEI within last UART TX
  459. * interrupt to end a string. It is always set
  460. * when start a new tx.
  461. */
  462. UART_CLEAR_IER(uart, ETBEI);
  463. xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
  464. uart->port.icount.tx += uart->tx_count;
  465. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  466. uart_write_wakeup(&uart->port);
  467. bfin_serial_dma_tx_chars(uart);
  468. }
  469. spin_unlock(&uart->port.lock);
  470. return IRQ_HANDLED;
  471. }
  472. static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
  473. {
  474. struct bfin_serial_port *uart = dev_id;
  475. unsigned short irqstat;
  476. int x_pos, pos;
  477. spin_lock(&uart->rx_lock);
  478. irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
  479. clear_dma_irqstat(uart->rx_dma_channel);
  480. uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
  481. x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
  482. uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
  483. if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
  484. uart->rx_dma_nrows = 0;
  485. pos = uart->rx_dma_nrows * DMA_RX_XCOUNT;
  486. if (pos > uart->rx_dma_buf.tail ||
  487. uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
  488. uart->rx_dma_buf.head = pos;
  489. bfin_serial_dma_rx_chars(uart);
  490. uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
  491. }
  492. spin_unlock(&uart->rx_lock);
  493. return IRQ_HANDLED;
  494. }
  495. #endif
  496. /*
  497. * Return TIOCSER_TEMT when transmitter is not busy.
  498. */
  499. static unsigned int bfin_serial_tx_empty(struct uart_port *port)
  500. {
  501. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  502. unsigned short lsr;
  503. lsr = UART_GET_LSR(uart);
  504. if (lsr & TEMT)
  505. return TIOCSER_TEMT;
  506. else
  507. return 0;
  508. }
  509. static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
  510. {
  511. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  512. u16 lcr = UART_GET_LCR(uart);
  513. if (break_state)
  514. lcr |= SB;
  515. else
  516. lcr &= ~SB;
  517. UART_PUT_LCR(uart, lcr);
  518. SSYNC();
  519. }
  520. static int bfin_serial_startup(struct uart_port *port)
  521. {
  522. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  523. #ifdef CONFIG_SERIAL_BFIN_DMA
  524. dma_addr_t dma_handle;
  525. if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
  526. printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
  527. return -EBUSY;
  528. }
  529. if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
  530. printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
  531. free_dma(uart->rx_dma_channel);
  532. return -EBUSY;
  533. }
  534. set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
  535. set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
  536. uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
  537. uart->rx_dma_buf.head = 0;
  538. uart->rx_dma_buf.tail = 0;
  539. uart->rx_dma_nrows = 0;
  540. set_dma_config(uart->rx_dma_channel,
  541. set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
  542. INTR_ON_ROW, DIMENSION_2D,
  543. DATA_SIZE_8,
  544. DMA_SYNC_RESTART));
  545. set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
  546. set_dma_x_modify(uart->rx_dma_channel, 1);
  547. set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
  548. set_dma_y_modify(uart->rx_dma_channel, 1);
  549. set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
  550. enable_dma(uart->rx_dma_channel);
  551. uart->rx_dma_timer.data = (unsigned long)(uart);
  552. uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
  553. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  554. add_timer(&(uart->rx_dma_timer));
  555. #else
  556. # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  557. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  558. if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
  559. kgdboc_break_enabled = 0;
  560. else {
  561. # endif
  562. if (request_irq(uart->rx_irq, bfin_serial_rx_int, 0,
  563. "BFIN_UART_RX", uart)) {
  564. printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
  565. return -EBUSY;
  566. }
  567. if (request_irq
  568. (uart->tx_irq, bfin_serial_tx_int, 0,
  569. "BFIN_UART_TX", uart)) {
  570. printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
  571. free_irq(uart->rx_irq, uart);
  572. return -EBUSY;
  573. }
  574. # ifdef CONFIG_BF54x
  575. {
  576. /*
  577. * UART2 and UART3 on BF548 share interrupt PINs and DMA
  578. * controllers with SPORT2 and SPORT3. UART rx and tx
  579. * interrupts are generated in PIO mode only when configure
  580. * their peripheral mapping registers properly, which means
  581. * request corresponding DMA channels in PIO mode as well.
  582. */
  583. unsigned uart_dma_ch_rx, uart_dma_ch_tx;
  584. switch (uart->rx_irq) {
  585. case IRQ_UART3_RX:
  586. uart_dma_ch_rx = CH_UART3_RX;
  587. uart_dma_ch_tx = CH_UART3_TX;
  588. break;
  589. case IRQ_UART2_RX:
  590. uart_dma_ch_rx = CH_UART2_RX;
  591. uart_dma_ch_tx = CH_UART2_TX;
  592. break;
  593. default:
  594. uart_dma_ch_rx = uart_dma_ch_tx = 0;
  595. break;
  596. };
  597. if (uart_dma_ch_rx &&
  598. request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
  599. printk(KERN_NOTICE"Fail to attach UART interrupt\n");
  600. free_irq(uart->rx_irq, uart);
  601. free_irq(uart->tx_irq, uart);
  602. return -EBUSY;
  603. }
  604. if (uart_dma_ch_tx &&
  605. request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
  606. printk(KERN_NOTICE "Fail to attach UART interrupt\n");
  607. free_dma(uart_dma_ch_rx);
  608. free_irq(uart->rx_irq, uart);
  609. free_irq(uart->tx_irq, uart);
  610. return -EBUSY;
  611. }
  612. }
  613. # endif
  614. # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  615. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  616. }
  617. # endif
  618. #endif
  619. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  620. if (uart->cts_pin >= 0) {
  621. if (request_irq(gpio_to_irq(uart->cts_pin),
  622. bfin_serial_mctrl_cts_int,
  623. IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
  624. 0, "BFIN_UART_CTS", uart)) {
  625. uart->cts_pin = -1;
  626. pr_info("Unable to attach BlackFin UART CTS interrupt. So, disable it.\n");
  627. }
  628. }
  629. if (uart->rts_pin >= 0)
  630. gpio_direction_output(uart->rts_pin, 0);
  631. #endif
  632. #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
  633. if (uart->cts_pin >= 0 && request_irq(uart->status_irq,
  634. bfin_serial_mctrl_cts_int,
  635. 0, "BFIN_UART_MODEM_STATUS", uart)) {
  636. uart->cts_pin = -1;
  637. pr_info("Unable to attach BlackFin UART Modem Status interrupt.\n");
  638. }
  639. /* CTS RTS PINs are negative assertive. */
  640. UART_PUT_MCR(uart, ACTS);
  641. UART_SET_IER(uart, EDSSI);
  642. #endif
  643. UART_SET_IER(uart, ERBFI);
  644. return 0;
  645. }
  646. static void bfin_serial_shutdown(struct uart_port *port)
  647. {
  648. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  649. #ifdef CONFIG_SERIAL_BFIN_DMA
  650. disable_dma(uart->tx_dma_channel);
  651. free_dma(uart->tx_dma_channel);
  652. disable_dma(uart->rx_dma_channel);
  653. free_dma(uart->rx_dma_channel);
  654. del_timer(&(uart->rx_dma_timer));
  655. dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
  656. #else
  657. #ifdef CONFIG_BF54x
  658. switch (uart->port.irq) {
  659. case IRQ_UART3_RX:
  660. free_dma(CH_UART3_RX);
  661. free_dma(CH_UART3_TX);
  662. break;
  663. case IRQ_UART2_RX:
  664. free_dma(CH_UART2_RX);
  665. free_dma(CH_UART2_TX);
  666. break;
  667. default:
  668. break;
  669. };
  670. #endif
  671. free_irq(uart->rx_irq, uart);
  672. free_irq(uart->tx_irq, uart);
  673. #endif
  674. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  675. if (uart->cts_pin >= 0)
  676. free_irq(gpio_to_irq(uart->cts_pin), uart);
  677. #endif
  678. #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
  679. if (uart->cts_pin >= 0)
  680. free_irq(uart->status_irq, uart);
  681. #endif
  682. }
  683. static void
  684. bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
  685. struct ktermios *old)
  686. {
  687. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  688. unsigned long flags;
  689. unsigned int baud, quot;
  690. unsigned short val, ier, lcr = 0;
  691. switch (termios->c_cflag & CSIZE) {
  692. case CS8:
  693. lcr = WLS(8);
  694. break;
  695. case CS7:
  696. lcr = WLS(7);
  697. break;
  698. case CS6:
  699. lcr = WLS(6);
  700. break;
  701. case CS5:
  702. lcr = WLS(5);
  703. break;
  704. default:
  705. printk(KERN_ERR "%s: word lengh not supported\n",
  706. __func__);
  707. }
  708. /* Anomaly notes:
  709. * 05000231 - STOP bit is always set to 1 whatever the user is set.
  710. */
  711. if (termios->c_cflag & CSTOPB) {
  712. if (ANOMALY_05000231)
  713. printk(KERN_WARNING "STOP bits other than 1 is not "
  714. "supported in case of anomaly 05000231.\n");
  715. else
  716. lcr |= STB;
  717. }
  718. if (termios->c_cflag & PARENB)
  719. lcr |= PEN;
  720. if (!(termios->c_cflag & PARODD))
  721. lcr |= EPS;
  722. if (termios->c_cflag & CMSPAR)
  723. lcr |= STP;
  724. spin_lock_irqsave(&uart->port.lock, flags);
  725. port->read_status_mask = OE;
  726. if (termios->c_iflag & INPCK)
  727. port->read_status_mask |= (FE | PE);
  728. if (termios->c_iflag & (BRKINT | PARMRK))
  729. port->read_status_mask |= BI;
  730. /*
  731. * Characters to ignore
  732. */
  733. port->ignore_status_mask = 0;
  734. if (termios->c_iflag & IGNPAR)
  735. port->ignore_status_mask |= FE | PE;
  736. if (termios->c_iflag & IGNBRK) {
  737. port->ignore_status_mask |= BI;
  738. /*
  739. * If we're ignoring parity and break indicators,
  740. * ignore overruns too (for real raw support).
  741. */
  742. if (termios->c_iflag & IGNPAR)
  743. port->ignore_status_mask |= OE;
  744. }
  745. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  746. quot = uart_get_divisor(port, baud);
  747. /* If discipline is not IRDA, apply ANOMALY_05000230 */
  748. if (termios->c_line != N_IRDA)
  749. quot -= ANOMALY_05000230;
  750. UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
  751. /* Disable UART */
  752. ier = UART_GET_IER(uart);
  753. UART_DISABLE_INTS(uart);
  754. /* Set DLAB in LCR to Access DLL and DLH */
  755. UART_SET_DLAB(uart);
  756. UART_PUT_DLL(uart, quot & 0xFF);
  757. UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
  758. SSYNC();
  759. /* Clear DLAB in LCR to Access THR RBR IER */
  760. UART_CLEAR_DLAB(uart);
  761. UART_PUT_LCR(uart, lcr);
  762. /* Enable UART */
  763. UART_ENABLE_INTS(uart, ier);
  764. val = UART_GET_GCTL(uart);
  765. val |= UCEN;
  766. UART_PUT_GCTL(uart, val);
  767. /* Port speed changed, update the per-port timeout. */
  768. uart_update_timeout(port, termios->c_cflag, baud);
  769. spin_unlock_irqrestore(&uart->port.lock, flags);
  770. }
  771. static const char *bfin_serial_type(struct uart_port *port)
  772. {
  773. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  774. return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
  775. }
  776. /*
  777. * Release the memory region(s) being used by 'port'.
  778. */
  779. static void bfin_serial_release_port(struct uart_port *port)
  780. {
  781. }
  782. /*
  783. * Request the memory region(s) being used by 'port'.
  784. */
  785. static int bfin_serial_request_port(struct uart_port *port)
  786. {
  787. return 0;
  788. }
  789. /*
  790. * Configure/autoconfigure the port.
  791. */
  792. static void bfin_serial_config_port(struct uart_port *port, int flags)
  793. {
  794. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  795. if (flags & UART_CONFIG_TYPE &&
  796. bfin_serial_request_port(&uart->port) == 0)
  797. uart->port.type = PORT_BFIN;
  798. }
  799. /*
  800. * Verify the new serial_struct (for TIOCSSERIAL).
  801. * The only change we allow are to the flags and type, and
  802. * even then only between PORT_BFIN and PORT_UNKNOWN
  803. */
  804. static int
  805. bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
  806. {
  807. return 0;
  808. }
  809. /*
  810. * Enable the IrDA function if tty->ldisc.num is N_IRDA.
  811. * In other cases, disable IrDA function.
  812. */
  813. static void bfin_serial_set_ldisc(struct uart_port *port, int ld)
  814. {
  815. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  816. unsigned short val;
  817. switch (ld) {
  818. case N_IRDA:
  819. val = UART_GET_GCTL(uart);
  820. val |= (IREN | RPOLC);
  821. UART_PUT_GCTL(uart, val);
  822. break;
  823. default:
  824. val = UART_GET_GCTL(uart);
  825. val &= ~(IREN | RPOLC);
  826. UART_PUT_GCTL(uart, val);
  827. }
  828. }
  829. static void bfin_serial_reset_irda(struct uart_port *port)
  830. {
  831. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  832. unsigned short val;
  833. val = UART_GET_GCTL(uart);
  834. val &= ~(IREN | RPOLC);
  835. UART_PUT_GCTL(uart, val);
  836. SSYNC();
  837. val |= (IREN | RPOLC);
  838. UART_PUT_GCTL(uart, val);
  839. SSYNC();
  840. }
  841. #ifdef CONFIG_CONSOLE_POLL
  842. /* Anomaly notes:
  843. * 05000099 - Because we only use THRE in poll_put and DR in poll_get,
  844. * losing other bits of UART_LSR is not a problem here.
  845. */
  846. static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
  847. {
  848. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  849. while (!(UART_GET_LSR(uart) & THRE))
  850. cpu_relax();
  851. UART_CLEAR_DLAB(uart);
  852. UART_PUT_CHAR(uart, (unsigned char)chr);
  853. }
  854. static int bfin_serial_poll_get_char(struct uart_port *port)
  855. {
  856. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  857. unsigned char chr;
  858. while (!(UART_GET_LSR(uart) & DR))
  859. cpu_relax();
  860. UART_CLEAR_DLAB(uart);
  861. chr = UART_GET_CHAR(uart);
  862. return chr;
  863. }
  864. #endif
  865. #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  866. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  867. static void bfin_kgdboc_port_shutdown(struct uart_port *port)
  868. {
  869. if (kgdboc_break_enabled) {
  870. kgdboc_break_enabled = 0;
  871. bfin_serial_shutdown(port);
  872. }
  873. }
  874. static int bfin_kgdboc_port_startup(struct uart_port *port)
  875. {
  876. kgdboc_port_line = port->line;
  877. kgdboc_break_enabled = !bfin_serial_startup(port);
  878. return 0;
  879. }
  880. #endif
  881. static struct uart_ops bfin_serial_pops = {
  882. .tx_empty = bfin_serial_tx_empty,
  883. .set_mctrl = bfin_serial_set_mctrl,
  884. .get_mctrl = bfin_serial_get_mctrl,
  885. .stop_tx = bfin_serial_stop_tx,
  886. .start_tx = bfin_serial_start_tx,
  887. .stop_rx = bfin_serial_stop_rx,
  888. .enable_ms = bfin_serial_enable_ms,
  889. .break_ctl = bfin_serial_break_ctl,
  890. .startup = bfin_serial_startup,
  891. .shutdown = bfin_serial_shutdown,
  892. .set_termios = bfin_serial_set_termios,
  893. .set_ldisc = bfin_serial_set_ldisc,
  894. .type = bfin_serial_type,
  895. .release_port = bfin_serial_release_port,
  896. .request_port = bfin_serial_request_port,
  897. .config_port = bfin_serial_config_port,
  898. .verify_port = bfin_serial_verify_port,
  899. #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  900. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  901. .kgdboc_port_startup = bfin_kgdboc_port_startup,
  902. .kgdboc_port_shutdown = bfin_kgdboc_port_shutdown,
  903. #endif
  904. #ifdef CONFIG_CONSOLE_POLL
  905. .poll_put_char = bfin_serial_poll_put_char,
  906. .poll_get_char = bfin_serial_poll_get_char,
  907. #endif
  908. };
  909. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  910. /*
  911. * If the port was already initialised (eg, by a boot loader),
  912. * try to determine the current setup.
  913. */
  914. static void __init
  915. bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
  916. int *parity, int *bits)
  917. {
  918. unsigned short status;
  919. status = UART_GET_IER(uart) & (ERBFI | ETBEI);
  920. if (status == (ERBFI | ETBEI)) {
  921. /* ok, the port was enabled */
  922. u16 lcr, dlh, dll;
  923. lcr = UART_GET_LCR(uart);
  924. *parity = 'n';
  925. if (lcr & PEN) {
  926. if (lcr & EPS)
  927. *parity = 'e';
  928. else
  929. *parity = 'o';
  930. }
  931. switch (lcr & 0x03) {
  932. case 0:
  933. *bits = 5;
  934. break;
  935. case 1:
  936. *bits = 6;
  937. break;
  938. case 2:
  939. *bits = 7;
  940. break;
  941. case 3:
  942. *bits = 8;
  943. break;
  944. }
  945. /* Set DLAB in LCR to Access DLL and DLH */
  946. UART_SET_DLAB(uart);
  947. dll = UART_GET_DLL(uart);
  948. dlh = UART_GET_DLH(uart);
  949. /* Clear DLAB in LCR to Access THR RBR IER */
  950. UART_CLEAR_DLAB(uart);
  951. *baud = get_sclk() / (16*(dll | dlh << 8));
  952. }
  953. pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
  954. }
  955. static struct uart_driver bfin_serial_reg;
  956. static void bfin_serial_console_putchar(struct uart_port *port, int ch)
  957. {
  958. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  959. while (!(UART_GET_LSR(uart) & THRE))
  960. barrier();
  961. UART_PUT_CHAR(uart, ch);
  962. }
  963. #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
  964. defined (CONFIG_EARLY_PRINTK) */
  965. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  966. #define CLASS_BFIN_CONSOLE "bfin-console"
  967. /*
  968. * Interrupts are disabled on entering
  969. */
  970. static void
  971. bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
  972. {
  973. struct bfin_serial_port *uart = bfin_serial_ports[co->index];
  974. unsigned long flags;
  975. spin_lock_irqsave(&uart->port.lock, flags);
  976. uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
  977. spin_unlock_irqrestore(&uart->port.lock, flags);
  978. }
  979. static int __init
  980. bfin_serial_console_setup(struct console *co, char *options)
  981. {
  982. struct bfin_serial_port *uart;
  983. int baud = 57600;
  984. int bits = 8;
  985. int parity = 'n';
  986. # if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
  987. defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
  988. int flow = 'r';
  989. # else
  990. int flow = 'n';
  991. # endif
  992. /*
  993. * Check whether an invalid uart number has been specified, and
  994. * if so, search for the first available port that does have
  995. * console support.
  996. */
  997. if (co->index < 0 || co->index >= BFIN_UART_NR_PORTS)
  998. return -ENODEV;
  999. uart = bfin_serial_ports[co->index];
  1000. if (!uart)
  1001. return -ENODEV;
  1002. if (options)
  1003. uart_parse_options(options, &baud, &parity, &bits, &flow);
  1004. else
  1005. bfin_serial_console_get_options(uart, &baud, &parity, &bits);
  1006. return uart_set_options(&uart->port, co, baud, parity, bits, flow);
  1007. }
  1008. static struct console bfin_serial_console = {
  1009. .name = BFIN_SERIAL_DEV_NAME,
  1010. .write = bfin_serial_console_write,
  1011. .device = uart_console_device,
  1012. .setup = bfin_serial_console_setup,
  1013. .flags = CON_PRINTBUFFER,
  1014. .index = -1,
  1015. .data = &bfin_serial_reg,
  1016. };
  1017. #define BFIN_SERIAL_CONSOLE (&bfin_serial_console)
  1018. #else
  1019. #define BFIN_SERIAL_CONSOLE NULL
  1020. #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
  1021. #ifdef CONFIG_EARLY_PRINTK
  1022. static struct bfin_serial_port bfin_earlyprintk_port;
  1023. #define CLASS_BFIN_EARLYPRINTK "bfin-earlyprintk"
  1024. /*
  1025. * Interrupts are disabled on entering
  1026. */
  1027. static void
  1028. bfin_earlyprintk_console_write(struct console *co, const char *s, unsigned int count)
  1029. {
  1030. unsigned long flags;
  1031. if (bfin_earlyprintk_port.port.line != co->index)
  1032. return;
  1033. spin_lock_irqsave(&bfin_earlyprintk_port.port.lock, flags);
  1034. uart_console_write(&bfin_earlyprintk_port.port, s, count,
  1035. bfin_serial_console_putchar);
  1036. spin_unlock_irqrestore(&bfin_earlyprintk_port.port.lock, flags);
  1037. }
  1038. /*
  1039. * This should have a .setup or .early_setup in it, but then things get called
  1040. * without the command line options, and the baud rate gets messed up - so
  1041. * don't let the common infrastructure play with things. (see calls to setup
  1042. * & earlysetup in ./kernel/printk.c:register_console()
  1043. */
  1044. static struct __initdata console bfin_early_serial_console = {
  1045. .name = "early_BFuart",
  1046. .write = bfin_earlyprintk_console_write,
  1047. .device = uart_console_device,
  1048. .flags = CON_PRINTBUFFER,
  1049. .index = -1,
  1050. .data = &bfin_serial_reg,
  1051. };
  1052. #endif
  1053. static struct uart_driver bfin_serial_reg = {
  1054. .owner = THIS_MODULE,
  1055. .driver_name = DRIVER_NAME,
  1056. .dev_name = BFIN_SERIAL_DEV_NAME,
  1057. .major = BFIN_SERIAL_MAJOR,
  1058. .minor = BFIN_SERIAL_MINOR,
  1059. .nr = BFIN_UART_NR_PORTS,
  1060. .cons = BFIN_SERIAL_CONSOLE,
  1061. };
  1062. static int bfin_serial_suspend(struct platform_device *pdev, pm_message_t state)
  1063. {
  1064. struct bfin_serial_port *uart = platform_get_drvdata(pdev);
  1065. return uart_suspend_port(&bfin_serial_reg, &uart->port);
  1066. }
  1067. static int bfin_serial_resume(struct platform_device *pdev)
  1068. {
  1069. struct bfin_serial_port *uart = platform_get_drvdata(pdev);
  1070. return uart_resume_port(&bfin_serial_reg, &uart->port);
  1071. }
  1072. static int bfin_serial_probe(struct platform_device *pdev)
  1073. {
  1074. struct resource *res;
  1075. struct bfin_serial_port *uart = NULL;
  1076. int ret = 0;
  1077. if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
  1078. dev_err(&pdev->dev, "Wrong bfin uart platform device id.\n");
  1079. return -ENOENT;
  1080. }
  1081. if (bfin_serial_ports[pdev->id] == NULL) {
  1082. uart = kzalloc(sizeof(*uart), GFP_KERNEL);
  1083. if (!uart) {
  1084. dev_err(&pdev->dev,
  1085. "fail to malloc bfin_serial_port\n");
  1086. return -ENOMEM;
  1087. }
  1088. bfin_serial_ports[pdev->id] = uart;
  1089. #ifdef CONFIG_EARLY_PRINTK
  1090. if (!(bfin_earlyprintk_port.port.membase
  1091. && bfin_earlyprintk_port.port.line == pdev->id)) {
  1092. /*
  1093. * If the peripheral PINs of current port is allocated
  1094. * in earlyprintk probe stage, don't do it again.
  1095. */
  1096. #endif
  1097. ret = peripheral_request_list(
  1098. (unsigned short *)pdev->dev.platform_data, DRIVER_NAME);
  1099. if (ret) {
  1100. dev_err(&pdev->dev,
  1101. "fail to request bfin serial peripherals\n");
  1102. goto out_error_free_mem;
  1103. }
  1104. #ifdef CONFIG_EARLY_PRINTK
  1105. }
  1106. #endif
  1107. spin_lock_init(&uart->port.lock);
  1108. uart->port.uartclk = get_sclk();
  1109. uart->port.fifosize = BFIN_UART_TX_FIFO_SIZE;
  1110. uart->port.ops = &bfin_serial_pops;
  1111. uart->port.line = pdev->id;
  1112. uart->port.iotype = UPIO_MEM;
  1113. uart->port.flags = UPF_BOOT_AUTOCONF;
  1114. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1115. if (res == NULL) {
  1116. dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
  1117. ret = -ENOENT;
  1118. goto out_error_free_peripherals;
  1119. }
  1120. uart->port.membase = ioremap(res->start, resource_size(res));
  1121. if (!uart->port.membase) {
  1122. dev_err(&pdev->dev, "Cannot map uart IO\n");
  1123. ret = -ENXIO;
  1124. goto out_error_free_peripherals;
  1125. }
  1126. uart->port.mapbase = res->start;
  1127. uart->tx_irq = platform_get_irq(pdev, 0);
  1128. if (uart->tx_irq < 0) {
  1129. dev_err(&pdev->dev, "No uart TX IRQ specified\n");
  1130. ret = -ENOENT;
  1131. goto out_error_unmap;
  1132. }
  1133. uart->rx_irq = platform_get_irq(pdev, 1);
  1134. if (uart->rx_irq < 0) {
  1135. dev_err(&pdev->dev, "No uart RX IRQ specified\n");
  1136. ret = -ENOENT;
  1137. goto out_error_unmap;
  1138. }
  1139. uart->port.irq = uart->rx_irq;
  1140. uart->status_irq = platform_get_irq(pdev, 2);
  1141. if (uart->status_irq < 0) {
  1142. dev_err(&pdev->dev, "No uart status IRQ specified\n");
  1143. ret = -ENOENT;
  1144. goto out_error_unmap;
  1145. }
  1146. #ifdef CONFIG_SERIAL_BFIN_DMA
  1147. spin_lock_init(&uart->rx_lock);
  1148. uart->tx_done = 1;
  1149. uart->tx_count = 0;
  1150. res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
  1151. if (res == NULL) {
  1152. dev_err(&pdev->dev, "No uart TX DMA channel specified\n");
  1153. ret = -ENOENT;
  1154. goto out_error_unmap;
  1155. }
  1156. uart->tx_dma_channel = res->start;
  1157. res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
  1158. if (res == NULL) {
  1159. dev_err(&pdev->dev, "No uart RX DMA channel specified\n");
  1160. ret = -ENOENT;
  1161. goto out_error_unmap;
  1162. }
  1163. uart->rx_dma_channel = res->start;
  1164. init_timer(&(uart->rx_dma_timer));
  1165. #endif
  1166. #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
  1167. defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
  1168. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  1169. if (res == NULL)
  1170. uart->cts_pin = -1;
  1171. else
  1172. uart->cts_pin = res->start;
  1173. res = platform_get_resource(pdev, IORESOURCE_IO, 1);
  1174. if (res == NULL)
  1175. uart->rts_pin = -1;
  1176. else
  1177. uart->rts_pin = res->start;
  1178. # if defined(CONFIG_SERIAL_BFIN_CTSRTS)
  1179. if (uart->rts_pin >= 0)
  1180. gpio_request(uart->rts_pin, DRIVER_NAME);
  1181. # endif
  1182. #endif
  1183. }
  1184. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  1185. if (!is_early_platform_device(pdev)) {
  1186. #endif
  1187. uart = bfin_serial_ports[pdev->id];
  1188. uart->port.dev = &pdev->dev;
  1189. dev_set_drvdata(&pdev->dev, uart);
  1190. ret = uart_add_one_port(&bfin_serial_reg, &uart->port);
  1191. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  1192. }
  1193. #endif
  1194. if (!ret)
  1195. return 0;
  1196. if (uart) {
  1197. out_error_unmap:
  1198. iounmap(uart->port.membase);
  1199. out_error_free_peripherals:
  1200. peripheral_free_list(
  1201. (unsigned short *)pdev->dev.platform_data);
  1202. out_error_free_mem:
  1203. kfree(uart);
  1204. bfin_serial_ports[pdev->id] = NULL;
  1205. }
  1206. return ret;
  1207. }
  1208. static int __devexit bfin_serial_remove(struct platform_device *pdev)
  1209. {
  1210. struct bfin_serial_port *uart = platform_get_drvdata(pdev);
  1211. dev_set_drvdata(&pdev->dev, NULL);
  1212. if (uart) {
  1213. uart_remove_one_port(&bfin_serial_reg, &uart->port);
  1214. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  1215. if (uart->rts_pin >= 0)
  1216. gpio_free(uart->rts_pin);
  1217. #endif
  1218. iounmap(uart->port.membase);
  1219. peripheral_free_list(
  1220. (unsigned short *)pdev->dev.platform_data);
  1221. kfree(uart);
  1222. bfin_serial_ports[pdev->id] = NULL;
  1223. }
  1224. return 0;
  1225. }
  1226. static struct platform_driver bfin_serial_driver = {
  1227. .probe = bfin_serial_probe,
  1228. .remove = __devexit_p(bfin_serial_remove),
  1229. .suspend = bfin_serial_suspend,
  1230. .resume = bfin_serial_resume,
  1231. .driver = {
  1232. .name = DRIVER_NAME,
  1233. .owner = THIS_MODULE,
  1234. },
  1235. };
  1236. #if defined(CONFIG_SERIAL_BFIN_CONSOLE)
  1237. static __initdata struct early_platform_driver early_bfin_serial_driver = {
  1238. .class_str = CLASS_BFIN_CONSOLE,
  1239. .pdrv = &bfin_serial_driver,
  1240. .requested_id = EARLY_PLATFORM_ID_UNSET,
  1241. };
  1242. static int __init bfin_serial_rs_console_init(void)
  1243. {
  1244. early_platform_driver_register(&early_bfin_serial_driver, DRIVER_NAME);
  1245. early_platform_driver_probe(CLASS_BFIN_CONSOLE, BFIN_UART_NR_PORTS, 0);
  1246. register_console(&bfin_serial_console);
  1247. return 0;
  1248. }
  1249. console_initcall(bfin_serial_rs_console_init);
  1250. #endif
  1251. #ifdef CONFIG_EARLY_PRINTK
  1252. /*
  1253. * Memory can't be allocated dynamically during earlyprink init stage.
  1254. * So, do individual probe for earlyprink with a static uart port variable.
  1255. */
  1256. static int bfin_earlyprintk_probe(struct platform_device *pdev)
  1257. {
  1258. struct resource *res;
  1259. int ret;
  1260. if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
  1261. dev_err(&pdev->dev, "Wrong earlyprintk platform device id.\n");
  1262. return -ENOENT;
  1263. }
  1264. ret = peripheral_request_list(
  1265. (unsigned short *)pdev->dev.platform_data, DRIVER_NAME);
  1266. if (ret) {
  1267. dev_err(&pdev->dev,
  1268. "fail to request bfin serial peripherals\n");
  1269. return ret;
  1270. }
  1271. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1272. if (res == NULL) {
  1273. dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
  1274. ret = -ENOENT;
  1275. goto out_error_free_peripherals;
  1276. }
  1277. bfin_earlyprintk_port.port.membase = ioremap(res->start,
  1278. resource_size(res));
  1279. if (!bfin_earlyprintk_port.port.membase) {
  1280. dev_err(&pdev->dev, "Cannot map uart IO\n");
  1281. ret = -ENXIO;
  1282. goto out_error_free_peripherals;
  1283. }
  1284. bfin_earlyprintk_port.port.mapbase = res->start;
  1285. bfin_earlyprintk_port.port.line = pdev->id;
  1286. bfin_earlyprintk_port.port.uartclk = get_sclk();
  1287. bfin_earlyprintk_port.port.fifosize = BFIN_UART_TX_FIFO_SIZE;
  1288. spin_lock_init(&bfin_earlyprintk_port.port.lock);
  1289. return 0;
  1290. out_error_free_peripherals:
  1291. peripheral_free_list(
  1292. (unsigned short *)pdev->dev.platform_data);
  1293. return ret;
  1294. }
  1295. static struct platform_driver bfin_earlyprintk_driver = {
  1296. .probe = bfin_earlyprintk_probe,
  1297. .driver = {
  1298. .name = DRIVER_NAME,
  1299. .owner = THIS_MODULE,
  1300. },
  1301. };
  1302. static __initdata struct early_platform_driver early_bfin_earlyprintk_driver = {
  1303. .class_str = CLASS_BFIN_EARLYPRINTK,
  1304. .pdrv = &bfin_earlyprintk_driver,
  1305. .requested_id = EARLY_PLATFORM_ID_UNSET,
  1306. };
  1307. struct console __init *bfin_earlyserial_init(unsigned int port,
  1308. unsigned int cflag)
  1309. {
  1310. struct ktermios t;
  1311. char port_name[20];
  1312. if (port < 0 || port >= BFIN_UART_NR_PORTS)
  1313. return NULL;
  1314. /*
  1315. * Only probe resource of the given port in earlyprintk boot arg.
  1316. * The expected port id should be indicated in port name string.
  1317. */
  1318. snprintf(port_name, 20, DRIVER_NAME ".%d", port);
  1319. early_platform_driver_register(&early_bfin_earlyprintk_driver,
  1320. port_name);
  1321. early_platform_driver_probe(CLASS_BFIN_EARLYPRINTK, 1, 0);
  1322. if (!bfin_earlyprintk_port.port.membase)
  1323. return NULL;
  1324. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  1325. /*
  1326. * If we are using early serial, don't let the normal console rewind
  1327. * log buffer, since that causes things to be printed multiple times
  1328. */
  1329. bfin_serial_console.flags &= ~CON_PRINTBUFFER;
  1330. #endif
  1331. bfin_early_serial_console.index = port;
  1332. t.c_cflag = cflag;
  1333. t.c_iflag = 0;
  1334. t.c_oflag = 0;
  1335. t.c_lflag = ICANON;
  1336. t.c_line = port;
  1337. bfin_serial_set_termios(&bfin_earlyprintk_port.port, &t, &t);
  1338. return &bfin_early_serial_console;
  1339. }
  1340. #endif /* CONFIG_EARLY_PRINTK */
  1341. static int __init bfin_serial_init(void)
  1342. {
  1343. int ret;
  1344. pr_info("Blackfin serial driver\n");
  1345. ret = uart_register_driver(&bfin_serial_reg);
  1346. if (ret) {
  1347. pr_err("failed to register %s:%d\n",
  1348. bfin_serial_reg.driver_name, ret);
  1349. }
  1350. ret = platform_driver_register(&bfin_serial_driver);
  1351. if (ret) {
  1352. pr_err("fail to register bfin uart\n");
  1353. uart_unregister_driver(&bfin_serial_reg);
  1354. }
  1355. return ret;
  1356. }
  1357. static void __exit bfin_serial_exit(void)
  1358. {
  1359. platform_driver_unregister(&bfin_serial_driver);
  1360. uart_unregister_driver(&bfin_serial_reg);
  1361. }
  1362. module_init(bfin_serial_init);
  1363. module_exit(bfin_serial_exit);
  1364. MODULE_AUTHOR("Sonic Zhang, Aubrey Li");
  1365. MODULE_DESCRIPTION("Blackfin generic serial port driver");
  1366. MODULE_LICENSE("GPL");
  1367. MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
  1368. MODULE_ALIAS("platform:bfin-uart");