mpt2sas_base.c 129 KB

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  1. /*
  2. * This is the Fusion MPT base driver providing common API layer interface
  3. * for access to MPT (Message Passing Technology) firmware.
  4. *
  5. * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
  6. * Copyright (C) 2007-2010 LSI Corporation
  7. * (mailto:DL-MPTFusionLinux@lsi.com)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * NO WARRANTY
  20. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. * solely responsible for determining the appropriateness of using and
  25. * distributing the Program and assumes all risks associated with its
  26. * exercise of rights under this Agreement, including but not limited to
  27. * the risks and costs of program errors, damage to or loss of data,
  28. * programs or equipment, and unavailability or interruption of operations.
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. * You should have received a copy of the GNU General Public License
  38. * along with this program; if not, write to the Free Software
  39. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  40. * USA.
  41. */
  42. #include <linux/kernel.h>
  43. #include <linux/module.h>
  44. #include <linux/errno.h>
  45. #include <linux/init.h>
  46. #include <linux/slab.h>
  47. #include <linux/types.h>
  48. #include <linux/pci.h>
  49. #include <linux/kdev_t.h>
  50. #include <linux/blkdev.h>
  51. #include <linux/delay.h>
  52. #include <linux/interrupt.h>
  53. #include <linux/dma-mapping.h>
  54. #include <linux/sort.h>
  55. #include <linux/io.h>
  56. #include <linux/time.h>
  57. #include <linux/aer.h>
  58. #include "mpt2sas_base.h"
  59. static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
  60. #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  61. static int max_queue_depth = -1;
  62. module_param(max_queue_depth, int, 0);
  63. MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  64. static int max_sgl_entries = -1;
  65. module_param(max_sgl_entries, int, 0);
  66. MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  67. static int msix_disable = -1;
  68. module_param(msix_disable, int, 0);
  69. MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  70. static int missing_delay[2] = {-1, -1};
  71. module_param_array(missing_delay, int, NULL, 0);
  72. MODULE_PARM_DESC(missing_delay, " device missing delay , io missing delay");
  73. static int mpt2sas_fwfault_debug;
  74. MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
  75. "and halt firmware - (default=0)");
  76. static int disable_discovery = -1;
  77. module_param(disable_discovery, int, 0);
  78. MODULE_PARM_DESC(disable_discovery, " disable discovery ");
  79. /* diag_buffer_enable is bitwise
  80. * bit 0 set = TRACE
  81. * bit 1 set = SNAPSHOT
  82. * bit 2 set = EXTENDED
  83. *
  84. * Either bit can be set, or both
  85. */
  86. static int diag_buffer_enable;
  87. module_param(diag_buffer_enable, int, 0);
  88. MODULE_PARM_DESC(diag_buffer_enable, " post diag buffers "
  89. "(TRACE=1/SNAPSHOT=2/EXTENDED=4/default=0)");
  90. /**
  91. * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
  92. *
  93. */
  94. static int
  95. _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
  96. {
  97. int ret = param_set_int(val, kp);
  98. struct MPT2SAS_ADAPTER *ioc;
  99. if (ret)
  100. return ret;
  101. printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
  102. list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
  103. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  104. return 0;
  105. }
  106. module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
  107. param_get_int, &mpt2sas_fwfault_debug, 0644);
  108. /**
  109. * _base_fault_reset_work - workq handling ioc fault conditions
  110. * @work: input argument, used to derive ioc
  111. * Context: sleep.
  112. *
  113. * Return nothing.
  114. */
  115. static void
  116. _base_fault_reset_work(struct work_struct *work)
  117. {
  118. struct MPT2SAS_ADAPTER *ioc =
  119. container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
  120. unsigned long flags;
  121. u32 doorbell;
  122. int rc;
  123. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  124. if (ioc->shost_recovery)
  125. goto rearm_timer;
  126. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  127. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  128. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  129. rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  130. FORCE_BIG_HAMMER);
  131. printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
  132. __func__, (rc == 0) ? "success" : "failed");
  133. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  134. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  135. mpt2sas_base_fault_info(ioc, doorbell &
  136. MPI2_DOORBELL_DATA_MASK);
  137. }
  138. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  139. rearm_timer:
  140. if (ioc->fault_reset_work_q)
  141. queue_delayed_work(ioc->fault_reset_work_q,
  142. &ioc->fault_reset_work,
  143. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  144. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  145. }
  146. /**
  147. * mpt2sas_base_start_watchdog - start the fault_reset_work_q
  148. * @ioc: per adapter object
  149. * Context: sleep.
  150. *
  151. * Return nothing.
  152. */
  153. void
  154. mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
  155. {
  156. unsigned long flags;
  157. if (ioc->fault_reset_work_q)
  158. return;
  159. /* initialize fault polling */
  160. INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
  161. snprintf(ioc->fault_reset_work_q_name,
  162. sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
  163. ioc->fault_reset_work_q =
  164. create_singlethread_workqueue(ioc->fault_reset_work_q_name);
  165. if (!ioc->fault_reset_work_q) {
  166. printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
  167. ioc->name, __func__, __LINE__);
  168. return;
  169. }
  170. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  171. if (ioc->fault_reset_work_q)
  172. queue_delayed_work(ioc->fault_reset_work_q,
  173. &ioc->fault_reset_work,
  174. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  175. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  176. }
  177. /**
  178. * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
  179. * @ioc: per adapter object
  180. * Context: sleep.
  181. *
  182. * Return nothing.
  183. */
  184. void
  185. mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
  186. {
  187. unsigned long flags;
  188. struct workqueue_struct *wq;
  189. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  190. wq = ioc->fault_reset_work_q;
  191. ioc->fault_reset_work_q = NULL;
  192. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  193. if (wq) {
  194. if (!cancel_delayed_work(&ioc->fault_reset_work))
  195. flush_workqueue(wq);
  196. destroy_workqueue(wq);
  197. }
  198. }
  199. /**
  200. * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
  201. * @ioc: per adapter object
  202. * @fault_code: fault code
  203. *
  204. * Return nothing.
  205. */
  206. void
  207. mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
  208. {
  209. printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
  210. ioc->name, fault_code);
  211. }
  212. /**
  213. * mpt2sas_halt_firmware - halt's mpt controller firmware
  214. * @ioc: per adapter object
  215. *
  216. * For debugging timeout related issues. Writing 0xCOFFEE00
  217. * to the doorbell register will halt controller firmware. With
  218. * the purpose to stop both driver and firmware, the enduser can
  219. * obtain a ring buffer from controller UART.
  220. */
  221. void
  222. mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
  223. {
  224. u32 doorbell;
  225. if (!ioc->fwfault_debug)
  226. return;
  227. dump_stack();
  228. doorbell = readl(&ioc->chip->Doorbell);
  229. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  230. mpt2sas_base_fault_info(ioc , doorbell);
  231. else {
  232. writel(0xC0FFEE00, &ioc->chip->Doorbell);
  233. printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
  234. "timeout\n", ioc->name);
  235. }
  236. panic("panic in %s\n", __func__);
  237. }
  238. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  239. /**
  240. * _base_sas_ioc_info - verbose translation of the ioc status
  241. * @ioc: per adapter object
  242. * @mpi_reply: reply mf payload returned from firmware
  243. * @request_hdr: request mf
  244. *
  245. * Return nothing.
  246. */
  247. static void
  248. _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
  249. MPI2RequestHeader_t *request_hdr)
  250. {
  251. u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
  252. MPI2_IOCSTATUS_MASK;
  253. char *desc = NULL;
  254. u16 frame_sz;
  255. char *func_str = NULL;
  256. /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
  257. if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
  258. request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
  259. request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
  260. return;
  261. if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
  262. return;
  263. switch (ioc_status) {
  264. /****************************************************************************
  265. * Common IOCStatus values for all replies
  266. ****************************************************************************/
  267. case MPI2_IOCSTATUS_INVALID_FUNCTION:
  268. desc = "invalid function";
  269. break;
  270. case MPI2_IOCSTATUS_BUSY:
  271. desc = "busy";
  272. break;
  273. case MPI2_IOCSTATUS_INVALID_SGL:
  274. desc = "invalid sgl";
  275. break;
  276. case MPI2_IOCSTATUS_INTERNAL_ERROR:
  277. desc = "internal error";
  278. break;
  279. case MPI2_IOCSTATUS_INVALID_VPID:
  280. desc = "invalid vpid";
  281. break;
  282. case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
  283. desc = "insufficient resources";
  284. break;
  285. case MPI2_IOCSTATUS_INVALID_FIELD:
  286. desc = "invalid field";
  287. break;
  288. case MPI2_IOCSTATUS_INVALID_STATE:
  289. desc = "invalid state";
  290. break;
  291. case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
  292. desc = "op state not supported";
  293. break;
  294. /****************************************************************************
  295. * Config IOCStatus values
  296. ****************************************************************************/
  297. case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
  298. desc = "config invalid action";
  299. break;
  300. case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
  301. desc = "config invalid type";
  302. break;
  303. case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
  304. desc = "config invalid page";
  305. break;
  306. case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
  307. desc = "config invalid data";
  308. break;
  309. case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
  310. desc = "config no defaults";
  311. break;
  312. case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
  313. desc = "config cant commit";
  314. break;
  315. /****************************************************************************
  316. * SCSI IO Reply
  317. ****************************************************************************/
  318. case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
  319. case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
  320. case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
  321. case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
  322. case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
  323. case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
  324. case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
  325. case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
  326. case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
  327. case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
  328. case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
  329. case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
  330. break;
  331. /****************************************************************************
  332. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  333. ****************************************************************************/
  334. case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
  335. desc = "eedp guard error";
  336. break;
  337. case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
  338. desc = "eedp ref tag error";
  339. break;
  340. case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
  341. desc = "eedp app tag error";
  342. break;
  343. /****************************************************************************
  344. * SCSI Target values
  345. ****************************************************************************/
  346. case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
  347. desc = "target invalid io index";
  348. break;
  349. case MPI2_IOCSTATUS_TARGET_ABORTED:
  350. desc = "target aborted";
  351. break;
  352. case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
  353. desc = "target no conn retryable";
  354. break;
  355. case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
  356. desc = "target no connection";
  357. break;
  358. case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
  359. desc = "target xfer count mismatch";
  360. break;
  361. case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
  362. desc = "target data offset error";
  363. break;
  364. case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
  365. desc = "target too much write data";
  366. break;
  367. case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
  368. desc = "target iu too short";
  369. break;
  370. case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
  371. desc = "target ack nak timeout";
  372. break;
  373. case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
  374. desc = "target nak received";
  375. break;
  376. /****************************************************************************
  377. * Serial Attached SCSI values
  378. ****************************************************************************/
  379. case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
  380. desc = "smp request failed";
  381. break;
  382. case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
  383. desc = "smp data overrun";
  384. break;
  385. /****************************************************************************
  386. * Diagnostic Buffer Post / Diagnostic Release values
  387. ****************************************************************************/
  388. case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
  389. desc = "diagnostic released";
  390. break;
  391. default:
  392. break;
  393. }
  394. if (!desc)
  395. return;
  396. switch (request_hdr->Function) {
  397. case MPI2_FUNCTION_CONFIG:
  398. frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
  399. func_str = "config_page";
  400. break;
  401. case MPI2_FUNCTION_SCSI_TASK_MGMT:
  402. frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
  403. func_str = "task_mgmt";
  404. break;
  405. case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
  406. frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
  407. func_str = "sas_iounit_ctl";
  408. break;
  409. case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
  410. frame_sz = sizeof(Mpi2SepRequest_t);
  411. func_str = "enclosure";
  412. break;
  413. case MPI2_FUNCTION_IOC_INIT:
  414. frame_sz = sizeof(Mpi2IOCInitRequest_t);
  415. func_str = "ioc_init";
  416. break;
  417. case MPI2_FUNCTION_PORT_ENABLE:
  418. frame_sz = sizeof(Mpi2PortEnableRequest_t);
  419. func_str = "port_enable";
  420. break;
  421. case MPI2_FUNCTION_SMP_PASSTHROUGH:
  422. frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
  423. func_str = "smp_passthru";
  424. break;
  425. default:
  426. frame_sz = 32;
  427. func_str = "unknown";
  428. break;
  429. }
  430. printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
  431. " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
  432. _debug_dump_mf(request_hdr, frame_sz/4);
  433. }
  434. /**
  435. * _base_display_event_data - verbose translation of firmware asyn events
  436. * @ioc: per adapter object
  437. * @mpi_reply: reply mf payload returned from firmware
  438. *
  439. * Return nothing.
  440. */
  441. static void
  442. _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
  443. Mpi2EventNotificationReply_t *mpi_reply)
  444. {
  445. char *desc = NULL;
  446. u16 event;
  447. if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
  448. return;
  449. event = le16_to_cpu(mpi_reply->Event);
  450. switch (event) {
  451. case MPI2_EVENT_LOG_DATA:
  452. desc = "Log Data";
  453. break;
  454. case MPI2_EVENT_STATE_CHANGE:
  455. desc = "Status Change";
  456. break;
  457. case MPI2_EVENT_HARD_RESET_RECEIVED:
  458. desc = "Hard Reset Received";
  459. break;
  460. case MPI2_EVENT_EVENT_CHANGE:
  461. desc = "Event Change";
  462. break;
  463. case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
  464. desc = "Device Status Change";
  465. break;
  466. case MPI2_EVENT_IR_OPERATION_STATUS:
  467. if (!ioc->hide_ir_msg)
  468. desc = "IR Operation Status";
  469. break;
  470. case MPI2_EVENT_SAS_DISCOVERY:
  471. {
  472. Mpi2EventDataSasDiscovery_t *event_data =
  473. (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
  474. printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
  475. (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
  476. "start" : "stop");
  477. if (event_data->DiscoveryStatus)
  478. printk("discovery_status(0x%08x)",
  479. le32_to_cpu(event_data->DiscoveryStatus));
  480. printk("\n");
  481. return;
  482. }
  483. case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
  484. desc = "SAS Broadcast Primitive";
  485. break;
  486. case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  487. desc = "SAS Init Device Status Change";
  488. break;
  489. case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
  490. desc = "SAS Init Table Overflow";
  491. break;
  492. case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
  493. desc = "SAS Topology Change List";
  494. break;
  495. case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
  496. desc = "SAS Enclosure Device Status Change";
  497. break;
  498. case MPI2_EVENT_IR_VOLUME:
  499. if (!ioc->hide_ir_msg)
  500. desc = "IR Volume";
  501. break;
  502. case MPI2_EVENT_IR_PHYSICAL_DISK:
  503. if (!ioc->hide_ir_msg)
  504. desc = "IR Physical Disk";
  505. break;
  506. case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
  507. if (!ioc->hide_ir_msg)
  508. desc = "IR Configuration Change List";
  509. break;
  510. case MPI2_EVENT_LOG_ENTRY_ADDED:
  511. if (!ioc->hide_ir_msg)
  512. desc = "Log Entry Added";
  513. break;
  514. }
  515. if (!desc)
  516. return;
  517. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
  518. }
  519. #endif
  520. /**
  521. * _base_sas_log_info - verbose translation of firmware log info
  522. * @ioc: per adapter object
  523. * @log_info: log info
  524. *
  525. * Return nothing.
  526. */
  527. static void
  528. _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
  529. {
  530. union loginfo_type {
  531. u32 loginfo;
  532. struct {
  533. u32 subcode:16;
  534. u32 code:8;
  535. u32 originator:4;
  536. u32 bus_type:4;
  537. } dw;
  538. };
  539. union loginfo_type sas_loginfo;
  540. char *originator_str = NULL;
  541. sas_loginfo.loginfo = log_info;
  542. if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
  543. return;
  544. /* each nexus loss loginfo */
  545. if (log_info == 0x31170000)
  546. return;
  547. /* eat the loginfos associated with task aborts */
  548. if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
  549. 0x31140000 || log_info == 0x31130000))
  550. return;
  551. switch (sas_loginfo.dw.originator) {
  552. case 0:
  553. originator_str = "IOP";
  554. break;
  555. case 1:
  556. originator_str = "PL";
  557. break;
  558. case 2:
  559. if (!ioc->hide_ir_msg)
  560. originator_str = "IR";
  561. else
  562. originator_str = "WarpDrive";
  563. break;
  564. }
  565. printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
  566. "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
  567. originator_str, sas_loginfo.dw.code,
  568. sas_loginfo.dw.subcode);
  569. }
  570. /**
  571. * _base_display_reply_info -
  572. * @ioc: per adapter object
  573. * @smid: system request message index
  574. * @msix_index: MSIX table index supplied by the OS
  575. * @reply: reply message frame(lower 32bit addr)
  576. *
  577. * Return nothing.
  578. */
  579. static void
  580. _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  581. u32 reply)
  582. {
  583. MPI2DefaultReply_t *mpi_reply;
  584. u16 ioc_status;
  585. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  586. ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
  587. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  588. if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
  589. (ioc->logging_level & MPT_DEBUG_REPLY)) {
  590. _base_sas_ioc_info(ioc , mpi_reply,
  591. mpt2sas_base_get_msg_frame(ioc, smid));
  592. }
  593. #endif
  594. if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
  595. _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
  596. }
  597. /**
  598. * mpt2sas_base_done - base internal command completion routine
  599. * @ioc: per adapter object
  600. * @smid: system request message index
  601. * @msix_index: MSIX table index supplied by the OS
  602. * @reply: reply message frame(lower 32bit addr)
  603. *
  604. * Return 1 meaning mf should be freed from _base_interrupt
  605. * 0 means the mf is freed from this function.
  606. */
  607. u8
  608. mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  609. u32 reply)
  610. {
  611. MPI2DefaultReply_t *mpi_reply;
  612. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  613. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  614. return 1;
  615. if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
  616. return 1;
  617. ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
  618. if (mpi_reply) {
  619. ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
  620. memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
  621. }
  622. ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
  623. complete(&ioc->base_cmds.done);
  624. return 1;
  625. }
  626. /**
  627. * _base_async_event - main callback handler for firmware asyn events
  628. * @ioc: per adapter object
  629. * @msix_index: MSIX table index supplied by the OS
  630. * @reply: reply message frame(lower 32bit addr)
  631. *
  632. * Return 1 meaning mf should be freed from _base_interrupt
  633. * 0 means the mf is freed from this function.
  634. */
  635. static u8
  636. _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
  637. {
  638. Mpi2EventNotificationReply_t *mpi_reply;
  639. Mpi2EventAckRequest_t *ack_request;
  640. u16 smid;
  641. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  642. if (!mpi_reply)
  643. return 1;
  644. if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
  645. return 1;
  646. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  647. _base_display_event_data(ioc, mpi_reply);
  648. #endif
  649. if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
  650. goto out;
  651. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  652. if (!smid) {
  653. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  654. ioc->name, __func__);
  655. goto out;
  656. }
  657. ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
  658. memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
  659. ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
  660. ack_request->Event = mpi_reply->Event;
  661. ack_request->EventContext = mpi_reply->EventContext;
  662. ack_request->VF_ID = 0; /* TODO */
  663. ack_request->VP_ID = 0;
  664. mpt2sas_base_put_smid_default(ioc, smid);
  665. out:
  666. /* scsih callback handler */
  667. mpt2sas_scsih_event_callback(ioc, msix_index, reply);
  668. /* ctl callback handler */
  669. mpt2sas_ctl_event_callback(ioc, msix_index, reply);
  670. return 1;
  671. }
  672. /**
  673. * _base_get_cb_idx - obtain the callback index
  674. * @ioc: per adapter object
  675. * @smid: system request message index
  676. *
  677. * Return callback index.
  678. */
  679. static u8
  680. _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  681. {
  682. int i;
  683. u8 cb_idx;
  684. if (smid < ioc->hi_priority_smid) {
  685. i = smid - 1;
  686. cb_idx = ioc->scsi_lookup[i].cb_idx;
  687. } else if (smid < ioc->internal_smid) {
  688. i = smid - ioc->hi_priority_smid;
  689. cb_idx = ioc->hpr_lookup[i].cb_idx;
  690. } else if (smid <= ioc->hba_queue_depth) {
  691. i = smid - ioc->internal_smid;
  692. cb_idx = ioc->internal_lookup[i].cb_idx;
  693. } else
  694. cb_idx = 0xFF;
  695. return cb_idx;
  696. }
  697. /**
  698. * _base_mask_interrupts - disable interrupts
  699. * @ioc: per adapter object
  700. *
  701. * Disabling ResetIRQ, Reply and Doorbell Interrupts
  702. *
  703. * Return nothing.
  704. */
  705. static void
  706. _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  707. {
  708. u32 him_register;
  709. ioc->mask_interrupts = 1;
  710. him_register = readl(&ioc->chip->HostInterruptMask);
  711. him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
  712. writel(him_register, &ioc->chip->HostInterruptMask);
  713. readl(&ioc->chip->HostInterruptMask);
  714. }
  715. /**
  716. * _base_unmask_interrupts - enable interrupts
  717. * @ioc: per adapter object
  718. *
  719. * Enabling only Reply Interrupts
  720. *
  721. * Return nothing.
  722. */
  723. static void
  724. _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  725. {
  726. u32 him_register;
  727. him_register = readl(&ioc->chip->HostInterruptMask);
  728. him_register &= ~MPI2_HIM_RIM;
  729. writel(him_register, &ioc->chip->HostInterruptMask);
  730. ioc->mask_interrupts = 0;
  731. }
  732. union reply_descriptor {
  733. u64 word;
  734. struct {
  735. u32 low;
  736. u32 high;
  737. } u;
  738. };
  739. /**
  740. * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
  741. * @irq: irq number (not used)
  742. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  743. * @r: pt_regs pointer (not used)
  744. *
  745. * Return IRQ_HANDLE if processed, else IRQ_NONE.
  746. */
  747. static irqreturn_t
  748. _base_interrupt(int irq, void *bus_id)
  749. {
  750. struct adapter_reply_queue *reply_q = bus_id;
  751. union reply_descriptor rd;
  752. u32 completed_cmds;
  753. u8 request_desript_type;
  754. u16 smid;
  755. u8 cb_idx;
  756. u32 reply;
  757. u8 msix_index = reply_q->msix_index;
  758. struct MPT2SAS_ADAPTER *ioc = reply_q->ioc;
  759. Mpi2ReplyDescriptorsUnion_t *rpf;
  760. u8 rc;
  761. if (ioc->mask_interrupts)
  762. return IRQ_NONE;
  763. if (!atomic_add_unless(&reply_q->busy, 1, 1))
  764. return IRQ_NONE;
  765. rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index];
  766. request_desript_type = rpf->Default.ReplyFlags
  767. & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  768. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) {
  769. atomic_dec(&reply_q->busy);
  770. return IRQ_NONE;
  771. }
  772. completed_cmds = 0;
  773. cb_idx = 0xFF;
  774. do {
  775. rd.word = le64_to_cpu(rpf->Words);
  776. if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
  777. goto out;
  778. reply = 0;
  779. smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
  780. if (request_desript_type ==
  781. MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
  782. reply = le32_to_cpu
  783. (rpf->AddressReply.ReplyFrameAddress);
  784. if (reply > ioc->reply_dma_max_address ||
  785. reply < ioc->reply_dma_min_address)
  786. reply = 0;
  787. } else if (request_desript_type ==
  788. MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
  789. goto next;
  790. else if (request_desript_type ==
  791. MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
  792. goto next;
  793. if (smid)
  794. cb_idx = _base_get_cb_idx(ioc, smid);
  795. if (smid && cb_idx != 0xFF) {
  796. rc = mpt_callbacks[cb_idx](ioc, smid, msix_index,
  797. reply);
  798. if (reply)
  799. _base_display_reply_info(ioc, smid, msix_index,
  800. reply);
  801. if (rc)
  802. mpt2sas_base_free_smid(ioc, smid);
  803. }
  804. if (!smid)
  805. _base_async_event(ioc, msix_index, reply);
  806. /* reply free queue handling */
  807. if (reply) {
  808. ioc->reply_free_host_index =
  809. (ioc->reply_free_host_index ==
  810. (ioc->reply_free_queue_depth - 1)) ?
  811. 0 : ioc->reply_free_host_index + 1;
  812. ioc->reply_free[ioc->reply_free_host_index] =
  813. cpu_to_le32(reply);
  814. wmb();
  815. writel(ioc->reply_free_host_index,
  816. &ioc->chip->ReplyFreeHostIndex);
  817. }
  818. next:
  819. rpf->Words = cpu_to_le64(ULLONG_MAX);
  820. reply_q->reply_post_host_index =
  821. (reply_q->reply_post_host_index ==
  822. (ioc->reply_post_queue_depth - 1)) ? 0 :
  823. reply_q->reply_post_host_index + 1;
  824. request_desript_type =
  825. reply_q->reply_post_free[reply_q->reply_post_host_index].
  826. Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  827. completed_cmds++;
  828. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  829. goto out;
  830. if (!reply_q->reply_post_host_index)
  831. rpf = reply_q->reply_post_free;
  832. else
  833. rpf++;
  834. } while (1);
  835. out:
  836. if (!completed_cmds) {
  837. atomic_dec(&reply_q->busy);
  838. return IRQ_NONE;
  839. }
  840. wmb();
  841. if (ioc->is_warpdrive) {
  842. writel(reply_q->reply_post_host_index,
  843. ioc->reply_post_host_index[msix_index]);
  844. atomic_dec(&reply_q->busy);
  845. return IRQ_HANDLED;
  846. }
  847. writel(reply_q->reply_post_host_index | (msix_index <<
  848. MPI2_RPHI_MSIX_INDEX_SHIFT), &ioc->chip->ReplyPostHostIndex);
  849. atomic_dec(&reply_q->busy);
  850. return IRQ_HANDLED;
  851. }
  852. /**
  853. * _base_is_controller_msix_enabled - is controller support muli-reply queues
  854. * @ioc: per adapter object
  855. *
  856. */
  857. static inline int
  858. _base_is_controller_msix_enabled(struct MPT2SAS_ADAPTER *ioc)
  859. {
  860. return (ioc->facts.IOCCapabilities &
  861. MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable;
  862. }
  863. /**
  864. * mpt2sas_base_flush_reply_queues - flushing the MSIX reply queues
  865. * @ioc: per adapter object
  866. * Context: ISR conext
  867. *
  868. * Called when a Task Management request has completed. We want
  869. * to flush the other reply queues so all the outstanding IO has been
  870. * completed back to OS before we process the TM completetion.
  871. *
  872. * Return nothing.
  873. */
  874. void
  875. mpt2sas_base_flush_reply_queues(struct MPT2SAS_ADAPTER *ioc)
  876. {
  877. struct adapter_reply_queue *reply_q;
  878. /* If MSIX capability is turned off
  879. * then multi-queues are not enabled
  880. */
  881. if (!_base_is_controller_msix_enabled(ioc))
  882. return;
  883. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  884. if (ioc->shost_recovery)
  885. return;
  886. /* TMs are on msix_index == 0 */
  887. if (reply_q->msix_index == 0)
  888. continue;
  889. _base_interrupt(reply_q->vector, (void *)reply_q);
  890. }
  891. }
  892. /**
  893. * mpt2sas_base_release_callback_handler - clear interrupt callback handler
  894. * @cb_idx: callback index
  895. *
  896. * Return nothing.
  897. */
  898. void
  899. mpt2sas_base_release_callback_handler(u8 cb_idx)
  900. {
  901. mpt_callbacks[cb_idx] = NULL;
  902. }
  903. /**
  904. * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
  905. * @cb_func: callback function
  906. *
  907. * Returns cb_func.
  908. */
  909. u8
  910. mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
  911. {
  912. u8 cb_idx;
  913. for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
  914. if (mpt_callbacks[cb_idx] == NULL)
  915. break;
  916. mpt_callbacks[cb_idx] = cb_func;
  917. return cb_idx;
  918. }
  919. /**
  920. * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
  921. *
  922. * Return nothing.
  923. */
  924. void
  925. mpt2sas_base_initialize_callback_handler(void)
  926. {
  927. u8 cb_idx;
  928. for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
  929. mpt2sas_base_release_callback_handler(cb_idx);
  930. }
  931. /**
  932. * mpt2sas_base_build_zero_len_sge - build zero length sg entry
  933. * @ioc: per adapter object
  934. * @paddr: virtual address for SGE
  935. *
  936. * Create a zero length scatter gather entry to insure the IOCs hardware has
  937. * something to use if the target device goes brain dead and tries
  938. * to send data even when none is asked for.
  939. *
  940. * Return nothing.
  941. */
  942. void
  943. mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
  944. {
  945. u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
  946. MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
  947. MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
  948. MPI2_SGE_FLAGS_SHIFT);
  949. ioc->base_add_sg_single(paddr, flags_length, -1);
  950. }
  951. /**
  952. * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
  953. * @paddr: virtual address for SGE
  954. * @flags_length: SGE flags and data transfer length
  955. * @dma_addr: Physical address
  956. *
  957. * Return nothing.
  958. */
  959. static void
  960. _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  961. {
  962. Mpi2SGESimple32_t *sgel = paddr;
  963. flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
  964. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  965. sgel->FlagsLength = cpu_to_le32(flags_length);
  966. sgel->Address = cpu_to_le32(dma_addr);
  967. }
  968. /**
  969. * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
  970. * @paddr: virtual address for SGE
  971. * @flags_length: SGE flags and data transfer length
  972. * @dma_addr: Physical address
  973. *
  974. * Return nothing.
  975. */
  976. static void
  977. _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  978. {
  979. Mpi2SGESimple64_t *sgel = paddr;
  980. flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
  981. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  982. sgel->FlagsLength = cpu_to_le32(flags_length);
  983. sgel->Address = cpu_to_le64(dma_addr);
  984. }
  985. #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
  986. /**
  987. * _base_config_dma_addressing - set dma addressing
  988. * @ioc: per adapter object
  989. * @pdev: PCI device struct
  990. *
  991. * Returns 0 for success, non-zero for failure.
  992. */
  993. static int
  994. _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
  995. {
  996. struct sysinfo s;
  997. char *desc = NULL;
  998. if (sizeof(dma_addr_t) > 4) {
  999. const uint64_t required_mask =
  1000. dma_get_required_mask(&pdev->dev);
  1001. if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
  1002. DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
  1003. DMA_BIT_MASK(64))) {
  1004. ioc->base_add_sg_single = &_base_add_sg_single_64;
  1005. ioc->sge_size = sizeof(Mpi2SGESimple64_t);
  1006. desc = "64";
  1007. goto out;
  1008. }
  1009. }
  1010. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
  1011. && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
  1012. ioc->base_add_sg_single = &_base_add_sg_single_32;
  1013. ioc->sge_size = sizeof(Mpi2SGESimple32_t);
  1014. desc = "32";
  1015. } else
  1016. return -ENODEV;
  1017. out:
  1018. si_meminfo(&s);
  1019. printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
  1020. "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
  1021. return 0;
  1022. }
  1023. /**
  1024. * _base_check_enable_msix - checks MSIX capabable.
  1025. * @ioc: per adapter object
  1026. *
  1027. * Check to see if card is capable of MSIX, and set number
  1028. * of available msix vectors
  1029. */
  1030. static int
  1031. _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1032. {
  1033. int base;
  1034. u16 message_control;
  1035. base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
  1036. if (!base) {
  1037. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
  1038. "supported\n", ioc->name));
  1039. return -EINVAL;
  1040. }
  1041. /* get msix vector count */
  1042. /* NUMA_IO not supported for older controllers */
  1043. if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 ||
  1044. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 ||
  1045. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 ||
  1046. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 ||
  1047. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 ||
  1048. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 ||
  1049. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2)
  1050. ioc->msix_vector_count = 1;
  1051. else {
  1052. pci_read_config_word(ioc->pdev, base + 2, &message_control);
  1053. ioc->msix_vector_count = (message_control & 0x3FF) + 1;
  1054. }
  1055. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
  1056. "vector_count(%d)\n", ioc->name, ioc->msix_vector_count));
  1057. return 0;
  1058. }
  1059. /**
  1060. * _base_free_irq - free irq
  1061. * @ioc: per adapter object
  1062. *
  1063. * Freeing respective reply_queue from the list.
  1064. */
  1065. static void
  1066. _base_free_irq(struct MPT2SAS_ADAPTER *ioc)
  1067. {
  1068. struct adapter_reply_queue *reply_q, *next;
  1069. if (list_empty(&ioc->reply_queue_list))
  1070. return;
  1071. list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) {
  1072. list_del(&reply_q->list);
  1073. synchronize_irq(reply_q->vector);
  1074. free_irq(reply_q->vector, reply_q);
  1075. kfree(reply_q);
  1076. }
  1077. }
  1078. /**
  1079. * _base_request_irq - request irq
  1080. * @ioc: per adapter object
  1081. * @index: msix index into vector table
  1082. * @vector: irq vector
  1083. *
  1084. * Inserting respective reply_queue into the list.
  1085. */
  1086. static int
  1087. _base_request_irq(struct MPT2SAS_ADAPTER *ioc, u8 index, u32 vector)
  1088. {
  1089. struct adapter_reply_queue *reply_q;
  1090. int r;
  1091. reply_q = kzalloc(sizeof(struct adapter_reply_queue), GFP_KERNEL);
  1092. if (!reply_q) {
  1093. printk(MPT2SAS_ERR_FMT "unable to allocate memory %d!\n",
  1094. ioc->name, (int)sizeof(struct adapter_reply_queue));
  1095. return -ENOMEM;
  1096. }
  1097. reply_q->ioc = ioc;
  1098. reply_q->msix_index = index;
  1099. reply_q->vector = vector;
  1100. atomic_set(&reply_q->busy, 0);
  1101. if (ioc->msix_enable)
  1102. snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d",
  1103. MPT2SAS_DRIVER_NAME, ioc->id, index);
  1104. else
  1105. snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d",
  1106. MPT2SAS_DRIVER_NAME, ioc->id);
  1107. r = request_irq(vector, _base_interrupt, IRQF_SHARED, reply_q->name,
  1108. reply_q);
  1109. if (r) {
  1110. printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
  1111. reply_q->name, vector);
  1112. kfree(reply_q);
  1113. return -EBUSY;
  1114. }
  1115. INIT_LIST_HEAD(&reply_q->list);
  1116. list_add_tail(&reply_q->list, &ioc->reply_queue_list);
  1117. return 0;
  1118. }
  1119. /**
  1120. * _base_assign_reply_queues - assigning msix index for each cpu
  1121. * @ioc: per adapter object
  1122. *
  1123. * The enduser would need to set the affinity via /proc/irq/#/smp_affinity
  1124. *
  1125. * It would nice if we could call irq_set_affinity, however it is not
  1126. * an exported symbol
  1127. */
  1128. static void
  1129. _base_assign_reply_queues(struct MPT2SAS_ADAPTER *ioc)
  1130. {
  1131. struct adapter_reply_queue *reply_q;
  1132. int cpu_id;
  1133. int cpu_grouping, loop, grouping, grouping_mod;
  1134. if (!_base_is_controller_msix_enabled(ioc))
  1135. return;
  1136. memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz);
  1137. /* when there are more cpus than available msix vectors,
  1138. * then group cpus togeather on same irq
  1139. */
  1140. if (ioc->cpu_count > ioc->msix_vector_count) {
  1141. grouping = ioc->cpu_count / ioc->msix_vector_count;
  1142. grouping_mod = ioc->cpu_count % ioc->msix_vector_count;
  1143. if (grouping < 2 || (grouping == 2 && !grouping_mod))
  1144. cpu_grouping = 2;
  1145. else if (grouping < 4 || (grouping == 4 && !grouping_mod))
  1146. cpu_grouping = 4;
  1147. else if (grouping < 8 || (grouping == 8 && !grouping_mod))
  1148. cpu_grouping = 8;
  1149. else
  1150. cpu_grouping = 16;
  1151. } else
  1152. cpu_grouping = 0;
  1153. loop = 0;
  1154. reply_q = list_entry(ioc->reply_queue_list.next,
  1155. struct adapter_reply_queue, list);
  1156. for_each_online_cpu(cpu_id) {
  1157. if (!cpu_grouping) {
  1158. ioc->cpu_msix_table[cpu_id] = reply_q->msix_index;
  1159. reply_q = list_entry(reply_q->list.next,
  1160. struct adapter_reply_queue, list);
  1161. } else {
  1162. if (loop < cpu_grouping) {
  1163. ioc->cpu_msix_table[cpu_id] =
  1164. reply_q->msix_index;
  1165. loop++;
  1166. } else {
  1167. reply_q = list_entry(reply_q->list.next,
  1168. struct adapter_reply_queue, list);
  1169. ioc->cpu_msix_table[cpu_id] =
  1170. reply_q->msix_index;
  1171. loop = 1;
  1172. }
  1173. }
  1174. }
  1175. }
  1176. /**
  1177. * _base_disable_msix - disables msix
  1178. * @ioc: per adapter object
  1179. *
  1180. */
  1181. static void
  1182. _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
  1183. {
  1184. if (ioc->msix_enable) {
  1185. pci_disable_msix(ioc->pdev);
  1186. ioc->msix_enable = 0;
  1187. }
  1188. }
  1189. /**
  1190. * _base_enable_msix - enables msix, failback to io_apic
  1191. * @ioc: per adapter object
  1192. *
  1193. */
  1194. static int
  1195. _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1196. {
  1197. struct msix_entry *entries, *a;
  1198. int r;
  1199. int i;
  1200. u8 try_msix = 0;
  1201. INIT_LIST_HEAD(&ioc->reply_queue_list);
  1202. if (msix_disable == -1 || msix_disable == 0)
  1203. try_msix = 1;
  1204. if (!try_msix)
  1205. goto try_ioapic;
  1206. if (_base_check_enable_msix(ioc) != 0)
  1207. goto try_ioapic;
  1208. ioc->reply_queue_count = min_t(u8, ioc->cpu_count,
  1209. ioc->msix_vector_count);
  1210. entries = kcalloc(ioc->reply_queue_count, sizeof(struct msix_entry),
  1211. GFP_KERNEL);
  1212. if (!entries) {
  1213. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "kcalloc "
  1214. "failed @ at %s:%d/%s() !!!\n", ioc->name, __FILE__,
  1215. __LINE__, __func__));
  1216. goto try_ioapic;
  1217. }
  1218. for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++)
  1219. a->entry = i;
  1220. r = pci_enable_msix(ioc->pdev, entries, ioc->reply_queue_count);
  1221. if (r) {
  1222. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
  1223. "failed (r=%d) !!!\n", ioc->name, r));
  1224. kfree(entries);
  1225. goto try_ioapic;
  1226. }
  1227. ioc->msix_enable = 1;
  1228. for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) {
  1229. r = _base_request_irq(ioc, i, a->vector);
  1230. if (r) {
  1231. _base_free_irq(ioc);
  1232. _base_disable_msix(ioc);
  1233. kfree(entries);
  1234. goto try_ioapic;
  1235. }
  1236. }
  1237. kfree(entries);
  1238. return 0;
  1239. /* failback to io_apic interrupt routing */
  1240. try_ioapic:
  1241. r = _base_request_irq(ioc, 0, ioc->pdev->irq);
  1242. return r;
  1243. }
  1244. /**
  1245. * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
  1246. * @ioc: per adapter object
  1247. *
  1248. * Returns 0 for success, non-zero for failure.
  1249. */
  1250. int
  1251. mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
  1252. {
  1253. struct pci_dev *pdev = ioc->pdev;
  1254. u32 memap_sz;
  1255. u32 pio_sz;
  1256. int i, r = 0;
  1257. u64 pio_chip = 0;
  1258. u64 chip_phys = 0;
  1259. struct adapter_reply_queue *reply_q;
  1260. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
  1261. ioc->name, __func__));
  1262. ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1263. if (pci_enable_device_mem(pdev)) {
  1264. printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
  1265. "failed\n", ioc->name);
  1266. return -ENODEV;
  1267. }
  1268. if (pci_request_selected_regions(pdev, ioc->bars,
  1269. MPT2SAS_DRIVER_NAME)) {
  1270. printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
  1271. "failed\n", ioc->name);
  1272. r = -ENODEV;
  1273. goto out_fail;
  1274. }
  1275. /* AER (Advanced Error Reporting) hooks */
  1276. pci_enable_pcie_error_reporting(pdev);
  1277. pci_set_master(pdev);
  1278. if (_base_config_dma_addressing(ioc, pdev) != 0) {
  1279. printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
  1280. ioc->name, pci_name(pdev));
  1281. r = -ENODEV;
  1282. goto out_fail;
  1283. }
  1284. for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
  1285. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  1286. if (pio_sz)
  1287. continue;
  1288. pio_chip = (u64)pci_resource_start(pdev, i);
  1289. pio_sz = pci_resource_len(pdev, i);
  1290. } else {
  1291. if (memap_sz)
  1292. continue;
  1293. /* verify memory resource is valid before using */
  1294. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  1295. ioc->chip_phys = pci_resource_start(pdev, i);
  1296. chip_phys = (u64)ioc->chip_phys;
  1297. memap_sz = pci_resource_len(pdev, i);
  1298. ioc->chip = ioremap(ioc->chip_phys, memap_sz);
  1299. if (ioc->chip == NULL) {
  1300. printk(MPT2SAS_ERR_FMT "unable to map "
  1301. "adapter memory!\n", ioc->name);
  1302. r = -EINVAL;
  1303. goto out_fail;
  1304. }
  1305. }
  1306. }
  1307. }
  1308. _base_mask_interrupts(ioc);
  1309. r = _base_enable_msix(ioc);
  1310. if (r)
  1311. goto out_fail;
  1312. list_for_each_entry(reply_q, &ioc->reply_queue_list, list)
  1313. printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
  1314. reply_q->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
  1315. "IO-APIC enabled"), reply_q->vector);
  1316. printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
  1317. ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
  1318. printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
  1319. ioc->name, (unsigned long long)pio_chip, pio_sz);
  1320. /* Save PCI configuration state for recovery from PCI AER/EEH errors */
  1321. pci_save_state(pdev);
  1322. return 0;
  1323. out_fail:
  1324. if (ioc->chip_phys)
  1325. iounmap(ioc->chip);
  1326. ioc->chip_phys = 0;
  1327. pci_release_selected_regions(ioc->pdev, ioc->bars);
  1328. pci_disable_pcie_error_reporting(pdev);
  1329. pci_disable_device(pdev);
  1330. return r;
  1331. }
  1332. /**
  1333. * mpt2sas_base_get_msg_frame - obtain request mf pointer
  1334. * @ioc: per adapter object
  1335. * @smid: system request message index(smid zero is invalid)
  1336. *
  1337. * Returns virt pointer to message frame.
  1338. */
  1339. void *
  1340. mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1341. {
  1342. return (void *)(ioc->request + (smid * ioc->request_sz));
  1343. }
  1344. /**
  1345. * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
  1346. * @ioc: per adapter object
  1347. * @smid: system request message index
  1348. *
  1349. * Returns virt pointer to sense buffer.
  1350. */
  1351. void *
  1352. mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1353. {
  1354. return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1355. }
  1356. /**
  1357. * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
  1358. * @ioc: per adapter object
  1359. * @smid: system request message index
  1360. *
  1361. * Returns phys pointer to the low 32bit address of the sense buffer.
  1362. */
  1363. __le32
  1364. mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1365. {
  1366. return cpu_to_le32(ioc->sense_dma +
  1367. ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1368. }
  1369. /**
  1370. * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
  1371. * @ioc: per adapter object
  1372. * @phys_addr: lower 32 physical addr of the reply
  1373. *
  1374. * Converts 32bit lower physical addr into a virt address.
  1375. */
  1376. void *
  1377. mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
  1378. {
  1379. if (!phys_addr)
  1380. return NULL;
  1381. return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
  1382. }
  1383. /**
  1384. * mpt2sas_base_get_smid - obtain a free smid from internal queue
  1385. * @ioc: per adapter object
  1386. * @cb_idx: callback index
  1387. *
  1388. * Returns smid (zero is invalid)
  1389. */
  1390. u16
  1391. mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1392. {
  1393. unsigned long flags;
  1394. struct request_tracker *request;
  1395. u16 smid;
  1396. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1397. if (list_empty(&ioc->internal_free_list)) {
  1398. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1399. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1400. ioc->name, __func__);
  1401. return 0;
  1402. }
  1403. request = list_entry(ioc->internal_free_list.next,
  1404. struct request_tracker, tracker_list);
  1405. request->cb_idx = cb_idx;
  1406. smid = request->smid;
  1407. list_del(&request->tracker_list);
  1408. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1409. return smid;
  1410. }
  1411. /**
  1412. * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
  1413. * @ioc: per adapter object
  1414. * @cb_idx: callback index
  1415. * @scmd: pointer to scsi command object
  1416. *
  1417. * Returns smid (zero is invalid)
  1418. */
  1419. u16
  1420. mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
  1421. struct scsi_cmnd *scmd)
  1422. {
  1423. unsigned long flags;
  1424. struct scsiio_tracker *request;
  1425. u16 smid;
  1426. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1427. if (list_empty(&ioc->free_list)) {
  1428. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1429. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1430. ioc->name, __func__);
  1431. return 0;
  1432. }
  1433. request = list_entry(ioc->free_list.next,
  1434. struct scsiio_tracker, tracker_list);
  1435. request->scmd = scmd;
  1436. request->cb_idx = cb_idx;
  1437. smid = request->smid;
  1438. list_del(&request->tracker_list);
  1439. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1440. return smid;
  1441. }
  1442. /**
  1443. * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
  1444. * @ioc: per adapter object
  1445. * @cb_idx: callback index
  1446. *
  1447. * Returns smid (zero is invalid)
  1448. */
  1449. u16
  1450. mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1451. {
  1452. unsigned long flags;
  1453. struct request_tracker *request;
  1454. u16 smid;
  1455. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1456. if (list_empty(&ioc->hpr_free_list)) {
  1457. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1458. return 0;
  1459. }
  1460. request = list_entry(ioc->hpr_free_list.next,
  1461. struct request_tracker, tracker_list);
  1462. request->cb_idx = cb_idx;
  1463. smid = request->smid;
  1464. list_del(&request->tracker_list);
  1465. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1466. return smid;
  1467. }
  1468. /**
  1469. * mpt2sas_base_free_smid - put smid back on free_list
  1470. * @ioc: per adapter object
  1471. * @smid: system request message index
  1472. *
  1473. * Return nothing.
  1474. */
  1475. void
  1476. mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1477. {
  1478. unsigned long flags;
  1479. int i;
  1480. struct chain_tracker *chain_req, *next;
  1481. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1482. if (smid < ioc->hi_priority_smid) {
  1483. /* scsiio queue */
  1484. i = smid - 1;
  1485. if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
  1486. list_for_each_entry_safe(chain_req, next,
  1487. &ioc->scsi_lookup[i].chain_list, tracker_list) {
  1488. list_del_init(&chain_req->tracker_list);
  1489. list_add_tail(&chain_req->tracker_list,
  1490. &ioc->free_chain_list);
  1491. }
  1492. }
  1493. ioc->scsi_lookup[i].cb_idx = 0xFF;
  1494. ioc->scsi_lookup[i].scmd = NULL;
  1495. ioc->scsi_lookup[i].direct_io = 0;
  1496. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  1497. &ioc->free_list);
  1498. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1499. /*
  1500. * See _wait_for_commands_to_complete() call with regards
  1501. * to this code.
  1502. */
  1503. if (ioc->shost_recovery && ioc->pending_io_count) {
  1504. if (ioc->pending_io_count == 1)
  1505. wake_up(&ioc->reset_wq);
  1506. ioc->pending_io_count--;
  1507. }
  1508. return;
  1509. } else if (smid < ioc->internal_smid) {
  1510. /* hi-priority */
  1511. i = smid - ioc->hi_priority_smid;
  1512. ioc->hpr_lookup[i].cb_idx = 0xFF;
  1513. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  1514. &ioc->hpr_free_list);
  1515. } else if (smid <= ioc->hba_queue_depth) {
  1516. /* internal queue */
  1517. i = smid - ioc->internal_smid;
  1518. ioc->internal_lookup[i].cb_idx = 0xFF;
  1519. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  1520. &ioc->internal_free_list);
  1521. }
  1522. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1523. }
  1524. /**
  1525. * _base_writeq - 64 bit write to MMIO
  1526. * @ioc: per adapter object
  1527. * @b: data payload
  1528. * @addr: address in MMIO space
  1529. * @writeq_lock: spin lock
  1530. *
  1531. * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
  1532. * care of 32 bit environment where its not quarenteed to send the entire word
  1533. * in one transfer.
  1534. */
  1535. #ifndef writeq
  1536. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1537. spinlock_t *writeq_lock)
  1538. {
  1539. unsigned long flags;
  1540. __u64 data_out = cpu_to_le64(b);
  1541. spin_lock_irqsave(writeq_lock, flags);
  1542. writel((u32)(data_out), addr);
  1543. writel((u32)(data_out >> 32), (addr + 4));
  1544. spin_unlock_irqrestore(writeq_lock, flags);
  1545. }
  1546. #else
  1547. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1548. spinlock_t *writeq_lock)
  1549. {
  1550. writeq(cpu_to_le64(b), addr);
  1551. }
  1552. #endif
  1553. static inline u8
  1554. _base_get_msix_index(struct MPT2SAS_ADAPTER *ioc)
  1555. {
  1556. return ioc->cpu_msix_table[smp_processor_id()];
  1557. }
  1558. /**
  1559. * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
  1560. * @ioc: per adapter object
  1561. * @smid: system request message index
  1562. * @handle: device handle
  1563. *
  1564. * Return nothing.
  1565. */
  1566. void
  1567. mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
  1568. {
  1569. Mpi2RequestDescriptorUnion_t descriptor;
  1570. u64 *request = (u64 *)&descriptor;
  1571. descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
  1572. descriptor.SCSIIO.MSIxIndex = _base_get_msix_index(ioc);
  1573. descriptor.SCSIIO.SMID = cpu_to_le16(smid);
  1574. descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
  1575. descriptor.SCSIIO.LMID = 0;
  1576. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1577. &ioc->scsi_lookup_lock);
  1578. }
  1579. /**
  1580. * mpt2sas_base_put_smid_hi_priority - send Task Management request to firmware
  1581. * @ioc: per adapter object
  1582. * @smid: system request message index
  1583. *
  1584. * Return nothing.
  1585. */
  1586. void
  1587. mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1588. {
  1589. Mpi2RequestDescriptorUnion_t descriptor;
  1590. u64 *request = (u64 *)&descriptor;
  1591. descriptor.HighPriority.RequestFlags =
  1592. MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
  1593. descriptor.HighPriority.MSIxIndex = 0;
  1594. descriptor.HighPriority.SMID = cpu_to_le16(smid);
  1595. descriptor.HighPriority.LMID = 0;
  1596. descriptor.HighPriority.Reserved1 = 0;
  1597. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1598. &ioc->scsi_lookup_lock);
  1599. }
  1600. /**
  1601. * mpt2sas_base_put_smid_default - Default, primarily used for config pages
  1602. * @ioc: per adapter object
  1603. * @smid: system request message index
  1604. *
  1605. * Return nothing.
  1606. */
  1607. void
  1608. mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1609. {
  1610. Mpi2RequestDescriptorUnion_t descriptor;
  1611. u64 *request = (u64 *)&descriptor;
  1612. descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
  1613. descriptor.Default.MSIxIndex = _base_get_msix_index(ioc);
  1614. descriptor.Default.SMID = cpu_to_le16(smid);
  1615. descriptor.Default.LMID = 0;
  1616. descriptor.Default.DescriptorTypeDependent = 0;
  1617. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1618. &ioc->scsi_lookup_lock);
  1619. }
  1620. /**
  1621. * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
  1622. * @ioc: per adapter object
  1623. * @smid: system request message index
  1624. * @io_index: value used to track the IO
  1625. *
  1626. * Return nothing.
  1627. */
  1628. void
  1629. mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1630. u16 io_index)
  1631. {
  1632. Mpi2RequestDescriptorUnion_t descriptor;
  1633. u64 *request = (u64 *)&descriptor;
  1634. descriptor.SCSITarget.RequestFlags =
  1635. MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
  1636. descriptor.SCSITarget.MSIxIndex = _base_get_msix_index(ioc);
  1637. descriptor.SCSITarget.SMID = cpu_to_le16(smid);
  1638. descriptor.SCSITarget.LMID = 0;
  1639. descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
  1640. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1641. &ioc->scsi_lookup_lock);
  1642. }
  1643. /**
  1644. * _base_display_dell_branding - Disply branding string
  1645. * @ioc: per adapter object
  1646. *
  1647. * Return nothing.
  1648. */
  1649. static void
  1650. _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
  1651. {
  1652. char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
  1653. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
  1654. return;
  1655. memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
  1656. switch (ioc->pdev->subsystem_device) {
  1657. case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
  1658. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
  1659. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1660. break;
  1661. case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
  1662. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
  1663. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1664. break;
  1665. case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
  1666. strncpy(dell_branding,
  1667. MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
  1668. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1669. break;
  1670. case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
  1671. strncpy(dell_branding,
  1672. MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
  1673. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1674. break;
  1675. case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
  1676. strncpy(dell_branding,
  1677. MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
  1678. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1679. break;
  1680. case MPT2SAS_DELL_PERC_H200_SSDID:
  1681. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
  1682. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1683. break;
  1684. case MPT2SAS_DELL_6GBPS_SAS_SSDID:
  1685. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
  1686. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1687. break;
  1688. default:
  1689. sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
  1690. break;
  1691. }
  1692. printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
  1693. " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
  1694. ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
  1695. ioc->pdev->subsystem_device);
  1696. }
  1697. /**
  1698. * _base_display_intel_branding - Display branding string
  1699. * @ioc: per adapter object
  1700. *
  1701. * Return nothing.
  1702. */
  1703. static void
  1704. _base_display_intel_branding(struct MPT2SAS_ADAPTER *ioc)
  1705. {
  1706. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL)
  1707. return;
  1708. switch (ioc->pdev->device) {
  1709. case MPI2_MFGPAGE_DEVID_SAS2008:
  1710. switch (ioc->pdev->subsystem_device) {
  1711. case MPT2SAS_INTEL_RMS2LL080_SSDID:
  1712. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1713. MPT2SAS_INTEL_RMS2LL080_BRANDING);
  1714. break;
  1715. case MPT2SAS_INTEL_RMS2LL040_SSDID:
  1716. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1717. MPT2SAS_INTEL_RMS2LL040_BRANDING);
  1718. break;
  1719. default:
  1720. break;
  1721. }
  1722. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1723. switch (ioc->pdev->subsystem_device) {
  1724. case MPT2SAS_INTEL_RS25GB008_SSDID:
  1725. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1726. MPT2SAS_INTEL_RS25GB008_BRANDING);
  1727. break;
  1728. default:
  1729. break;
  1730. }
  1731. default:
  1732. break;
  1733. }
  1734. }
  1735. /**
  1736. * _base_display_hp_branding - Display branding string
  1737. * @ioc: per adapter object
  1738. *
  1739. * Return nothing.
  1740. */
  1741. static void
  1742. _base_display_hp_branding(struct MPT2SAS_ADAPTER *ioc)
  1743. {
  1744. if (ioc->pdev->subsystem_vendor != MPT2SAS_HP_3PAR_SSVID)
  1745. return;
  1746. switch (ioc->pdev->device) {
  1747. case MPI2_MFGPAGE_DEVID_SAS2004:
  1748. switch (ioc->pdev->subsystem_device) {
  1749. case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID:
  1750. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1751. MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING);
  1752. break;
  1753. default:
  1754. break;
  1755. }
  1756. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1757. switch (ioc->pdev->subsystem_device) {
  1758. case MPT2SAS_HP_2_4_INTERNAL_SSDID:
  1759. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1760. MPT2SAS_HP_2_4_INTERNAL_BRANDING);
  1761. break;
  1762. case MPT2SAS_HP_2_4_EXTERNAL_SSDID:
  1763. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1764. MPT2SAS_HP_2_4_EXTERNAL_BRANDING);
  1765. break;
  1766. case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID:
  1767. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1768. MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING);
  1769. break;
  1770. case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID:
  1771. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1772. MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING);
  1773. break;
  1774. default:
  1775. break;
  1776. }
  1777. default:
  1778. break;
  1779. }
  1780. }
  1781. /**
  1782. * _base_display_ioc_capabilities - Disply IOC's capabilities.
  1783. * @ioc: per adapter object
  1784. *
  1785. * Return nothing.
  1786. */
  1787. static void
  1788. _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
  1789. {
  1790. int i = 0;
  1791. char desc[16];
  1792. u8 revision;
  1793. u32 iounit_pg1_flags;
  1794. u32 bios_version;
  1795. bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
  1796. pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
  1797. strncpy(desc, ioc->manu_pg0.ChipName, 16);
  1798. printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
  1799. "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
  1800. ioc->name, desc,
  1801. (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
  1802. (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
  1803. (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
  1804. ioc->facts.FWVersion.Word & 0x000000FF,
  1805. revision,
  1806. (bios_version & 0xFF000000) >> 24,
  1807. (bios_version & 0x00FF0000) >> 16,
  1808. (bios_version & 0x0000FF00) >> 8,
  1809. bios_version & 0x000000FF);
  1810. _base_display_dell_branding(ioc);
  1811. _base_display_intel_branding(ioc);
  1812. _base_display_hp_branding(ioc);
  1813. printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
  1814. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
  1815. printk("Initiator");
  1816. i++;
  1817. }
  1818. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
  1819. printk("%sTarget", i ? "," : "");
  1820. i++;
  1821. }
  1822. i = 0;
  1823. printk("), ");
  1824. printk("Capabilities=(");
  1825. if (!ioc->hide_ir_msg) {
  1826. if (ioc->facts.IOCCapabilities &
  1827. MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
  1828. printk("Raid");
  1829. i++;
  1830. }
  1831. }
  1832. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
  1833. printk("%sTLR", i ? "," : "");
  1834. i++;
  1835. }
  1836. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
  1837. printk("%sMulticast", i ? "," : "");
  1838. i++;
  1839. }
  1840. if (ioc->facts.IOCCapabilities &
  1841. MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
  1842. printk("%sBIDI Target", i ? "," : "");
  1843. i++;
  1844. }
  1845. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
  1846. printk("%sEEDP", i ? "," : "");
  1847. i++;
  1848. }
  1849. if (ioc->facts.IOCCapabilities &
  1850. MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
  1851. printk("%sSnapshot Buffer", i ? "," : "");
  1852. i++;
  1853. }
  1854. if (ioc->facts.IOCCapabilities &
  1855. MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
  1856. printk("%sDiag Trace Buffer", i ? "," : "");
  1857. i++;
  1858. }
  1859. if (ioc->facts.IOCCapabilities &
  1860. MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
  1861. printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
  1862. i++;
  1863. }
  1864. if (ioc->facts.IOCCapabilities &
  1865. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
  1866. printk("%sTask Set Full", i ? "," : "");
  1867. i++;
  1868. }
  1869. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1870. if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
  1871. printk("%sNCQ", i ? "," : "");
  1872. i++;
  1873. }
  1874. printk(")\n");
  1875. }
  1876. /**
  1877. * _base_update_missing_delay - change the missing delay timers
  1878. * @ioc: per adapter object
  1879. * @device_missing_delay: amount of time till device is reported missing
  1880. * @io_missing_delay: interval IO is returned when there is a missing device
  1881. *
  1882. * Return nothing.
  1883. *
  1884. * Passed on the command line, this function will modify the device missing
  1885. * delay, as well as the io missing delay. This should be called at driver
  1886. * load time.
  1887. */
  1888. static void
  1889. _base_update_missing_delay(struct MPT2SAS_ADAPTER *ioc,
  1890. u16 device_missing_delay, u8 io_missing_delay)
  1891. {
  1892. u16 dmd, dmd_new, dmd_orignal;
  1893. u8 io_missing_delay_original;
  1894. u16 sz;
  1895. Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
  1896. Mpi2ConfigReply_t mpi_reply;
  1897. u8 num_phys = 0;
  1898. u16 ioc_status;
  1899. mpt2sas_config_get_number_hba_phys(ioc, &num_phys);
  1900. if (!num_phys)
  1901. return;
  1902. sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
  1903. sizeof(Mpi2SasIOUnit1PhyData_t));
  1904. sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
  1905. if (!sas_iounit_pg1) {
  1906. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1907. ioc->name, __FILE__, __LINE__, __func__);
  1908. goto out;
  1909. }
  1910. if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
  1911. sas_iounit_pg1, sz))) {
  1912. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1913. ioc->name, __FILE__, __LINE__, __func__);
  1914. goto out;
  1915. }
  1916. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
  1917. MPI2_IOCSTATUS_MASK;
  1918. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  1919. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1920. ioc->name, __FILE__, __LINE__, __func__);
  1921. goto out;
  1922. }
  1923. /* device missing delay */
  1924. dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
  1925. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  1926. dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  1927. else
  1928. dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  1929. dmd_orignal = dmd;
  1930. if (device_missing_delay > 0x7F) {
  1931. dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
  1932. device_missing_delay;
  1933. dmd = dmd / 16;
  1934. dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
  1935. } else
  1936. dmd = device_missing_delay;
  1937. sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
  1938. /* io missing delay */
  1939. io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
  1940. sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
  1941. if (!mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
  1942. sz)) {
  1943. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  1944. dmd_new = (dmd &
  1945. MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  1946. else
  1947. dmd_new =
  1948. dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  1949. printk(MPT2SAS_INFO_FMT "device_missing_delay: old(%d), "
  1950. "new(%d)\n", ioc->name, dmd_orignal, dmd_new);
  1951. printk(MPT2SAS_INFO_FMT "ioc_missing_delay: old(%d), "
  1952. "new(%d)\n", ioc->name, io_missing_delay_original,
  1953. io_missing_delay);
  1954. ioc->device_missing_delay = dmd_new;
  1955. ioc->io_missing_delay = io_missing_delay;
  1956. }
  1957. out:
  1958. kfree(sas_iounit_pg1);
  1959. }
  1960. /**
  1961. * _base_static_config_pages - static start of day config pages
  1962. * @ioc: per adapter object
  1963. *
  1964. * Return nothing.
  1965. */
  1966. static void
  1967. _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
  1968. {
  1969. Mpi2ConfigReply_t mpi_reply;
  1970. u32 iounit_pg1_flags;
  1971. mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
  1972. if (ioc->ir_firmware)
  1973. mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
  1974. &ioc->manu_pg10);
  1975. mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
  1976. mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
  1977. mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
  1978. mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
  1979. mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  1980. _base_display_ioc_capabilities(ioc);
  1981. /*
  1982. * Enable task_set_full handling in iounit_pg1 when the
  1983. * facts capabilities indicate that its supported.
  1984. */
  1985. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1986. if ((ioc->facts.IOCCapabilities &
  1987. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
  1988. iounit_pg1_flags &=
  1989. ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1990. else
  1991. iounit_pg1_flags |=
  1992. MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1993. ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
  1994. mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  1995. }
  1996. /**
  1997. * _base_release_memory_pools - release memory
  1998. * @ioc: per adapter object
  1999. *
  2000. * Free memory allocated from _base_allocate_memory_pools.
  2001. *
  2002. * Return nothing.
  2003. */
  2004. static void
  2005. _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
  2006. {
  2007. int i;
  2008. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2009. __func__));
  2010. if (ioc->request) {
  2011. pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
  2012. ioc->request, ioc->request_dma);
  2013. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
  2014. ": free\n", ioc->name, ioc->request));
  2015. ioc->request = NULL;
  2016. }
  2017. if (ioc->sense) {
  2018. pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
  2019. if (ioc->sense_dma_pool)
  2020. pci_pool_destroy(ioc->sense_dma_pool);
  2021. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
  2022. ": free\n", ioc->name, ioc->sense));
  2023. ioc->sense = NULL;
  2024. }
  2025. if (ioc->reply) {
  2026. pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
  2027. if (ioc->reply_dma_pool)
  2028. pci_pool_destroy(ioc->reply_dma_pool);
  2029. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
  2030. ": free\n", ioc->name, ioc->reply));
  2031. ioc->reply = NULL;
  2032. }
  2033. if (ioc->reply_free) {
  2034. pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
  2035. ioc->reply_free_dma);
  2036. if (ioc->reply_free_dma_pool)
  2037. pci_pool_destroy(ioc->reply_free_dma_pool);
  2038. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
  2039. "(0x%p): free\n", ioc->name, ioc->reply_free));
  2040. ioc->reply_free = NULL;
  2041. }
  2042. if (ioc->reply_post_free) {
  2043. pci_pool_free(ioc->reply_post_free_dma_pool,
  2044. ioc->reply_post_free, ioc->reply_post_free_dma);
  2045. if (ioc->reply_post_free_dma_pool)
  2046. pci_pool_destroy(ioc->reply_post_free_dma_pool);
  2047. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2048. "reply_post_free_pool(0x%p): free\n", ioc->name,
  2049. ioc->reply_post_free));
  2050. ioc->reply_post_free = NULL;
  2051. }
  2052. if (ioc->config_page) {
  2053. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2054. "config_page(0x%p): free\n", ioc->name,
  2055. ioc->config_page));
  2056. pci_free_consistent(ioc->pdev, ioc->config_page_sz,
  2057. ioc->config_page, ioc->config_page_dma);
  2058. }
  2059. if (ioc->scsi_lookup) {
  2060. free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
  2061. ioc->scsi_lookup = NULL;
  2062. }
  2063. kfree(ioc->hpr_lookup);
  2064. kfree(ioc->internal_lookup);
  2065. if (ioc->chain_lookup) {
  2066. for (i = 0; i < ioc->chain_depth; i++) {
  2067. if (ioc->chain_lookup[i].chain_buffer)
  2068. pci_pool_free(ioc->chain_dma_pool,
  2069. ioc->chain_lookup[i].chain_buffer,
  2070. ioc->chain_lookup[i].chain_buffer_dma);
  2071. }
  2072. if (ioc->chain_dma_pool)
  2073. pci_pool_destroy(ioc->chain_dma_pool);
  2074. }
  2075. if (ioc->chain_lookup) {
  2076. free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
  2077. ioc->chain_lookup = NULL;
  2078. }
  2079. }
  2080. /**
  2081. * _base_allocate_memory_pools - allocate start of day memory pools
  2082. * @ioc: per adapter object
  2083. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2084. *
  2085. * Returns 0 success, anything else error
  2086. */
  2087. static int
  2088. _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2089. {
  2090. struct mpt2sas_facts *facts;
  2091. u32 queue_size, queue_diff;
  2092. u16 max_sge_elements;
  2093. u16 num_of_reply_frames;
  2094. u16 chains_needed_per_io;
  2095. u32 sz, total_sz, reply_post_free_sz;
  2096. u32 retry_sz;
  2097. u16 max_request_credit;
  2098. int i;
  2099. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2100. __func__));
  2101. retry_sz = 0;
  2102. facts = &ioc->facts;
  2103. /* command line tunables for max sgl entries */
  2104. if (max_sgl_entries != -1) {
  2105. ioc->shost->sg_tablesize = (max_sgl_entries <
  2106. MPT2SAS_SG_DEPTH) ? max_sgl_entries :
  2107. MPT2SAS_SG_DEPTH;
  2108. } else {
  2109. ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
  2110. }
  2111. /* command line tunables for max controller queue depth */
  2112. if (max_queue_depth != -1)
  2113. max_request_credit = (max_queue_depth < facts->RequestCredit)
  2114. ? max_queue_depth : facts->RequestCredit;
  2115. else
  2116. max_request_credit = facts->RequestCredit;
  2117. ioc->hba_queue_depth = max_request_credit;
  2118. ioc->hi_priority_depth = facts->HighPriorityCredit;
  2119. ioc->internal_depth = ioc->hi_priority_depth + 5;
  2120. /* request frame size */
  2121. ioc->request_sz = facts->IOCRequestFrameSize * 4;
  2122. /* reply frame size */
  2123. ioc->reply_sz = facts->ReplyFrameSize * 4;
  2124. retry_allocation:
  2125. total_sz = 0;
  2126. /* calculate number of sg elements left over in the 1st frame */
  2127. max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
  2128. sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
  2129. ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
  2130. /* now do the same for a chain buffer */
  2131. max_sge_elements = ioc->request_sz - ioc->sge_size;
  2132. ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
  2133. ioc->chain_offset_value_for_main_message =
  2134. ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
  2135. (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
  2136. /*
  2137. * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
  2138. */
  2139. chains_needed_per_io = ((ioc->shost->sg_tablesize -
  2140. ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
  2141. + 1;
  2142. if (chains_needed_per_io > facts->MaxChainDepth) {
  2143. chains_needed_per_io = facts->MaxChainDepth;
  2144. ioc->shost->sg_tablesize = min_t(u16,
  2145. ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
  2146. * chains_needed_per_io), ioc->shost->sg_tablesize);
  2147. }
  2148. ioc->chains_needed_per_io = chains_needed_per_io;
  2149. /* reply free queue sizing - taking into account for events */
  2150. num_of_reply_frames = ioc->hba_queue_depth + 32;
  2151. /* number of replies frames can't be a multiple of 16 */
  2152. /* decrease number of reply frames by 1 */
  2153. if (!(num_of_reply_frames % 16))
  2154. num_of_reply_frames--;
  2155. /* calculate number of reply free queue entries
  2156. * (must be multiple of 16)
  2157. */
  2158. /* (we know reply_free_queue_depth is not a multiple of 16) */
  2159. queue_size = num_of_reply_frames;
  2160. queue_size += 16 - (queue_size % 16);
  2161. ioc->reply_free_queue_depth = queue_size;
  2162. /* reply descriptor post queue sizing */
  2163. /* this size should be the number of request frames + number of reply
  2164. * frames
  2165. */
  2166. queue_size = ioc->hba_queue_depth + num_of_reply_frames + 1;
  2167. /* round up to 16 byte boundary */
  2168. if (queue_size % 16)
  2169. queue_size += 16 - (queue_size % 16);
  2170. /* check against IOC maximum reply post queue depth */
  2171. if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) {
  2172. queue_diff = queue_size -
  2173. facts->MaxReplyDescriptorPostQueueDepth;
  2174. /* round queue_diff up to multiple of 16 */
  2175. if (queue_diff % 16)
  2176. queue_diff += 16 - (queue_diff % 16);
  2177. /* adjust hba_queue_depth, reply_free_queue_depth,
  2178. * and queue_size
  2179. */
  2180. ioc->hba_queue_depth -= (queue_diff / 2);
  2181. ioc->reply_free_queue_depth -= (queue_diff / 2);
  2182. queue_size = facts->MaxReplyDescriptorPostQueueDepth;
  2183. }
  2184. ioc->reply_post_queue_depth = queue_size;
  2185. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
  2186. "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
  2187. "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
  2188. ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
  2189. ioc->chains_needed_per_io));
  2190. ioc->scsiio_depth = ioc->hba_queue_depth -
  2191. ioc->hi_priority_depth - ioc->internal_depth;
  2192. /* set the scsi host can_queue depth
  2193. * with some internal commands that could be outstanding
  2194. */
  2195. ioc->shost->can_queue = ioc->scsiio_depth - (2);
  2196. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
  2197. "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
  2198. /* contiguous pool for request and chains, 16 byte align, one extra "
  2199. * "frame for smid=0
  2200. */
  2201. ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
  2202. sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
  2203. /* hi-priority queue */
  2204. sz += (ioc->hi_priority_depth * ioc->request_sz);
  2205. /* internal queue */
  2206. sz += (ioc->internal_depth * ioc->request_sz);
  2207. ioc->request_dma_sz = sz;
  2208. ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
  2209. if (!ioc->request) {
  2210. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2211. "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2212. "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
  2213. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2214. if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
  2215. goto out;
  2216. retry_sz += 64;
  2217. ioc->hba_queue_depth = max_request_credit - retry_sz;
  2218. goto retry_allocation;
  2219. }
  2220. if (retry_sz)
  2221. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2222. "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2223. "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
  2224. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2225. /* hi-priority queue */
  2226. ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
  2227. ioc->request_sz);
  2228. ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
  2229. ioc->request_sz);
  2230. /* internal queue */
  2231. ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
  2232. ioc->request_sz);
  2233. ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
  2234. ioc->request_sz);
  2235. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
  2236. "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2237. ioc->request, ioc->hba_queue_depth, ioc->request_sz,
  2238. (ioc->hba_queue_depth * ioc->request_sz)/1024));
  2239. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
  2240. ioc->name, (unsigned long long) ioc->request_dma));
  2241. total_sz += sz;
  2242. sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
  2243. ioc->scsi_lookup_pages = get_order(sz);
  2244. ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
  2245. GFP_KERNEL, ioc->scsi_lookup_pages);
  2246. if (!ioc->scsi_lookup) {
  2247. printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
  2248. "sz(%d)\n", ioc->name, (int)sz);
  2249. goto out;
  2250. }
  2251. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
  2252. "depth(%d)\n", ioc->name, ioc->request,
  2253. ioc->scsiio_depth));
  2254. /* loop till the allocation succeeds */
  2255. do {
  2256. sz = ioc->chain_depth * sizeof(struct chain_tracker);
  2257. ioc->chain_pages = get_order(sz);
  2258. ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
  2259. GFP_KERNEL, ioc->chain_pages);
  2260. if (ioc->chain_lookup == NULL)
  2261. ioc->chain_depth -= 100;
  2262. } while (ioc->chain_lookup == NULL);
  2263. ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
  2264. ioc->request_sz, 16, 0);
  2265. if (!ioc->chain_dma_pool) {
  2266. printk(MPT2SAS_ERR_FMT "chain_dma_pool: pci_pool_create "
  2267. "failed\n", ioc->name);
  2268. goto out;
  2269. }
  2270. for (i = 0; i < ioc->chain_depth; i++) {
  2271. ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
  2272. ioc->chain_dma_pool , GFP_KERNEL,
  2273. &ioc->chain_lookup[i].chain_buffer_dma);
  2274. if (!ioc->chain_lookup[i].chain_buffer) {
  2275. ioc->chain_depth = i;
  2276. goto chain_done;
  2277. }
  2278. total_sz += ioc->request_sz;
  2279. }
  2280. chain_done:
  2281. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool depth"
  2282. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2283. ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
  2284. ioc->request_sz))/1024));
  2285. /* initialize hi-priority queue smid's */
  2286. ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
  2287. sizeof(struct request_tracker), GFP_KERNEL);
  2288. if (!ioc->hpr_lookup) {
  2289. printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
  2290. ioc->name);
  2291. goto out;
  2292. }
  2293. ioc->hi_priority_smid = ioc->scsiio_depth + 1;
  2294. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
  2295. "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
  2296. ioc->hi_priority_depth, ioc->hi_priority_smid));
  2297. /* initialize internal queue smid's */
  2298. ioc->internal_lookup = kcalloc(ioc->internal_depth,
  2299. sizeof(struct request_tracker), GFP_KERNEL);
  2300. if (!ioc->internal_lookup) {
  2301. printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
  2302. ioc->name);
  2303. goto out;
  2304. }
  2305. ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
  2306. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
  2307. "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
  2308. ioc->internal_depth, ioc->internal_smid));
  2309. /* sense buffers, 4 byte align */
  2310. sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
  2311. ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
  2312. 0);
  2313. if (!ioc->sense_dma_pool) {
  2314. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
  2315. ioc->name);
  2316. goto out;
  2317. }
  2318. ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
  2319. &ioc->sense_dma);
  2320. if (!ioc->sense) {
  2321. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
  2322. ioc->name);
  2323. goto out;
  2324. }
  2325. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2326. "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
  2327. "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
  2328. SCSI_SENSE_BUFFERSIZE, sz/1024));
  2329. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
  2330. ioc->name, (unsigned long long)ioc->sense_dma));
  2331. total_sz += sz;
  2332. /* reply pool, 4 byte align */
  2333. sz = ioc->reply_free_queue_depth * ioc->reply_sz;
  2334. ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
  2335. 0);
  2336. if (!ioc->reply_dma_pool) {
  2337. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
  2338. ioc->name);
  2339. goto out;
  2340. }
  2341. ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
  2342. &ioc->reply_dma);
  2343. if (!ioc->reply) {
  2344. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
  2345. ioc->name);
  2346. goto out;
  2347. }
  2348. ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
  2349. ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
  2350. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
  2351. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
  2352. ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
  2353. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
  2354. ioc->name, (unsigned long long)ioc->reply_dma));
  2355. total_sz += sz;
  2356. /* reply free queue, 16 byte align */
  2357. sz = ioc->reply_free_queue_depth * 4;
  2358. ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
  2359. ioc->pdev, sz, 16, 0);
  2360. if (!ioc->reply_free_dma_pool) {
  2361. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
  2362. "failed\n", ioc->name);
  2363. goto out;
  2364. }
  2365. ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
  2366. &ioc->reply_free_dma);
  2367. if (!ioc->reply_free) {
  2368. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
  2369. "failed\n", ioc->name);
  2370. goto out;
  2371. }
  2372. memset(ioc->reply_free, 0, sz);
  2373. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
  2374. "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
  2375. ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
  2376. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
  2377. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
  2378. total_sz += sz;
  2379. /* reply post queue, 16 byte align */
  2380. reply_post_free_sz = ioc->reply_post_queue_depth *
  2381. sizeof(Mpi2DefaultReplyDescriptor_t);
  2382. if (_base_is_controller_msix_enabled(ioc))
  2383. sz = reply_post_free_sz * ioc->reply_queue_count;
  2384. else
  2385. sz = reply_post_free_sz;
  2386. ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
  2387. ioc->pdev, sz, 16, 0);
  2388. if (!ioc->reply_post_free_dma_pool) {
  2389. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
  2390. "failed\n", ioc->name);
  2391. goto out;
  2392. }
  2393. ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
  2394. GFP_KERNEL, &ioc->reply_post_free_dma);
  2395. if (!ioc->reply_post_free) {
  2396. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
  2397. "failed\n", ioc->name);
  2398. goto out;
  2399. }
  2400. memset(ioc->reply_post_free, 0, sz);
  2401. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
  2402. "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
  2403. ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
  2404. sz/1024));
  2405. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
  2406. "(0x%llx)\n", ioc->name, (unsigned long long)
  2407. ioc->reply_post_free_dma));
  2408. total_sz += sz;
  2409. ioc->config_page_sz = 512;
  2410. ioc->config_page = pci_alloc_consistent(ioc->pdev,
  2411. ioc->config_page_sz, &ioc->config_page_dma);
  2412. if (!ioc->config_page) {
  2413. printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
  2414. "failed\n", ioc->name);
  2415. goto out;
  2416. }
  2417. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
  2418. "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
  2419. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
  2420. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
  2421. total_sz += ioc->config_page_sz;
  2422. printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
  2423. ioc->name, total_sz/1024);
  2424. printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
  2425. "Max Controller Queue Depth(%d)\n",
  2426. ioc->name, ioc->shost->can_queue, facts->RequestCredit);
  2427. printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
  2428. ioc->name, ioc->shost->sg_tablesize);
  2429. return 0;
  2430. out:
  2431. return -ENOMEM;
  2432. }
  2433. /**
  2434. * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
  2435. * @ioc: Pointer to MPT_ADAPTER structure
  2436. * @cooked: Request raw or cooked IOC state
  2437. *
  2438. * Returns all IOC Doorbell register bits if cooked==0, else just the
  2439. * Doorbell bits in MPI_IOC_STATE_MASK.
  2440. */
  2441. u32
  2442. mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
  2443. {
  2444. u32 s, sc;
  2445. s = readl(&ioc->chip->Doorbell);
  2446. sc = s & MPI2_IOC_STATE_MASK;
  2447. return cooked ? sc : s;
  2448. }
  2449. /**
  2450. * _base_wait_on_iocstate - waiting on a particular ioc state
  2451. * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
  2452. * @timeout: timeout in second
  2453. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2454. *
  2455. * Returns 0 for success, non-zero for failure.
  2456. */
  2457. static int
  2458. _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
  2459. int sleep_flag)
  2460. {
  2461. u32 count, cntdn;
  2462. u32 current_state;
  2463. count = 0;
  2464. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2465. do {
  2466. current_state = mpt2sas_base_get_iocstate(ioc, 1);
  2467. if (current_state == ioc_state)
  2468. return 0;
  2469. if (count && current_state == MPI2_IOC_STATE_FAULT)
  2470. break;
  2471. if (sleep_flag == CAN_SLEEP)
  2472. msleep(1);
  2473. else
  2474. udelay(500);
  2475. count++;
  2476. } while (--cntdn);
  2477. return current_state;
  2478. }
  2479. /**
  2480. * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
  2481. * a write to the doorbell)
  2482. * @ioc: per adapter object
  2483. * @timeout: timeout in second
  2484. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2485. *
  2486. * Returns 0 for success, non-zero for failure.
  2487. *
  2488. * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
  2489. */
  2490. static int
  2491. _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2492. int sleep_flag)
  2493. {
  2494. u32 cntdn, count;
  2495. u32 int_status;
  2496. count = 0;
  2497. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2498. do {
  2499. int_status = readl(&ioc->chip->HostInterruptStatus);
  2500. if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2501. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2502. "successful count(%d), timeout(%d)\n", ioc->name,
  2503. __func__, count, timeout));
  2504. return 0;
  2505. }
  2506. if (sleep_flag == CAN_SLEEP)
  2507. msleep(1);
  2508. else
  2509. udelay(500);
  2510. count++;
  2511. } while (--cntdn);
  2512. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2513. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2514. return -EFAULT;
  2515. }
  2516. /**
  2517. * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
  2518. * @ioc: per adapter object
  2519. * @timeout: timeout in second
  2520. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2521. *
  2522. * Returns 0 for success, non-zero for failure.
  2523. *
  2524. * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
  2525. * doorbell.
  2526. */
  2527. static int
  2528. _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2529. int sleep_flag)
  2530. {
  2531. u32 cntdn, count;
  2532. u32 int_status;
  2533. u32 doorbell;
  2534. count = 0;
  2535. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2536. do {
  2537. int_status = readl(&ioc->chip->HostInterruptStatus);
  2538. if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
  2539. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2540. "successful count(%d), timeout(%d)\n", ioc->name,
  2541. __func__, count, timeout));
  2542. return 0;
  2543. } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2544. doorbell = readl(&ioc->chip->Doorbell);
  2545. if ((doorbell & MPI2_IOC_STATE_MASK) ==
  2546. MPI2_IOC_STATE_FAULT) {
  2547. mpt2sas_base_fault_info(ioc , doorbell);
  2548. return -EFAULT;
  2549. }
  2550. } else if (int_status == 0xFFFFFFFF)
  2551. goto out;
  2552. if (sleep_flag == CAN_SLEEP)
  2553. msleep(1);
  2554. else
  2555. udelay(500);
  2556. count++;
  2557. } while (--cntdn);
  2558. out:
  2559. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2560. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2561. return -EFAULT;
  2562. }
  2563. /**
  2564. * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
  2565. * @ioc: per adapter object
  2566. * @timeout: timeout in second
  2567. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2568. *
  2569. * Returns 0 for success, non-zero for failure.
  2570. *
  2571. */
  2572. static int
  2573. _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2574. int sleep_flag)
  2575. {
  2576. u32 cntdn, count;
  2577. u32 doorbell_reg;
  2578. count = 0;
  2579. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2580. do {
  2581. doorbell_reg = readl(&ioc->chip->Doorbell);
  2582. if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
  2583. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2584. "successful count(%d), timeout(%d)\n", ioc->name,
  2585. __func__, count, timeout));
  2586. return 0;
  2587. }
  2588. if (sleep_flag == CAN_SLEEP)
  2589. msleep(1);
  2590. else
  2591. udelay(500);
  2592. count++;
  2593. } while (--cntdn);
  2594. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2595. "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
  2596. return -EFAULT;
  2597. }
  2598. /**
  2599. * _base_send_ioc_reset - send doorbell reset
  2600. * @ioc: per adapter object
  2601. * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
  2602. * @timeout: timeout in second
  2603. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2604. *
  2605. * Returns 0 for success, non-zero for failure.
  2606. */
  2607. static int
  2608. _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
  2609. int sleep_flag)
  2610. {
  2611. u32 ioc_state;
  2612. int r = 0;
  2613. if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
  2614. printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
  2615. ioc->name, __func__);
  2616. return -EFAULT;
  2617. }
  2618. if (!(ioc->facts.IOCCapabilities &
  2619. MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
  2620. return -EFAULT;
  2621. printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
  2622. writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
  2623. &ioc->chip->Doorbell);
  2624. if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
  2625. r = -EFAULT;
  2626. goto out;
  2627. }
  2628. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
  2629. timeout, sleep_flag);
  2630. if (ioc_state) {
  2631. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2632. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2633. r = -EFAULT;
  2634. goto out;
  2635. }
  2636. out:
  2637. printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
  2638. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2639. return r;
  2640. }
  2641. /**
  2642. * _base_handshake_req_reply_wait - send request thru doorbell interface
  2643. * @ioc: per adapter object
  2644. * @request_bytes: request length
  2645. * @request: pointer having request payload
  2646. * @reply_bytes: reply length
  2647. * @reply: pointer to reply payload
  2648. * @timeout: timeout in second
  2649. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2650. *
  2651. * Returns 0 for success, non-zero for failure.
  2652. */
  2653. static int
  2654. _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
  2655. u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
  2656. {
  2657. MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
  2658. int i;
  2659. u8 failed;
  2660. u16 dummy;
  2661. __le32 *mfp;
  2662. /* make sure doorbell is not in use */
  2663. if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
  2664. printk(MPT2SAS_ERR_FMT "doorbell is in use "
  2665. " (line=%d)\n", ioc->name, __LINE__);
  2666. return -EFAULT;
  2667. }
  2668. /* clear pending doorbell interrupts from previous state changes */
  2669. if (readl(&ioc->chip->HostInterruptStatus) &
  2670. MPI2_HIS_IOC2SYS_DB_STATUS)
  2671. writel(0, &ioc->chip->HostInterruptStatus);
  2672. /* send message to ioc */
  2673. writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
  2674. ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
  2675. &ioc->chip->Doorbell);
  2676. if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
  2677. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2678. "int failed (line=%d)\n", ioc->name, __LINE__);
  2679. return -EFAULT;
  2680. }
  2681. writel(0, &ioc->chip->HostInterruptStatus);
  2682. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
  2683. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2684. "ack failed (line=%d)\n", ioc->name, __LINE__);
  2685. return -EFAULT;
  2686. }
  2687. /* send message 32-bits at a time */
  2688. for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
  2689. writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
  2690. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
  2691. failed = 1;
  2692. }
  2693. if (failed) {
  2694. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2695. "sending request failed (line=%d)\n", ioc->name, __LINE__);
  2696. return -EFAULT;
  2697. }
  2698. /* now wait for the reply */
  2699. if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
  2700. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2701. "int failed (line=%d)\n", ioc->name, __LINE__);
  2702. return -EFAULT;
  2703. }
  2704. /* read the first two 16-bits, it gives the total length of the reply */
  2705. reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2706. & MPI2_DOORBELL_DATA_MASK);
  2707. writel(0, &ioc->chip->HostInterruptStatus);
  2708. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2709. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2710. "int failed (line=%d)\n", ioc->name, __LINE__);
  2711. return -EFAULT;
  2712. }
  2713. reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2714. & MPI2_DOORBELL_DATA_MASK);
  2715. writel(0, &ioc->chip->HostInterruptStatus);
  2716. for (i = 2; i < default_reply->MsgLength * 2; i++) {
  2717. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2718. printk(MPT2SAS_ERR_FMT "doorbell "
  2719. "handshake int failed (line=%d)\n", ioc->name,
  2720. __LINE__);
  2721. return -EFAULT;
  2722. }
  2723. if (i >= reply_bytes/2) /* overflow case */
  2724. dummy = readl(&ioc->chip->Doorbell);
  2725. else
  2726. reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2727. & MPI2_DOORBELL_DATA_MASK);
  2728. writel(0, &ioc->chip->HostInterruptStatus);
  2729. }
  2730. _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
  2731. if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
  2732. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
  2733. " (line=%d)\n", ioc->name, __LINE__));
  2734. }
  2735. writel(0, &ioc->chip->HostInterruptStatus);
  2736. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2737. mfp = (__le32 *)reply;
  2738. printk(KERN_INFO "\toffset:data\n");
  2739. for (i = 0; i < reply_bytes/4; i++)
  2740. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  2741. le32_to_cpu(mfp[i]));
  2742. }
  2743. return 0;
  2744. }
  2745. /**
  2746. * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
  2747. * @ioc: per adapter object
  2748. * @mpi_reply: the reply payload from FW
  2749. * @mpi_request: the request payload sent to FW
  2750. *
  2751. * The SAS IO Unit Control Request message allows the host to perform low-level
  2752. * operations, such as resets on the PHYs of the IO Unit, also allows the host
  2753. * to obtain the IOC assigned device handles for a device if it has other
  2754. * identifying information about the device, in addition allows the host to
  2755. * remove IOC resources associated with the device.
  2756. *
  2757. * Returns 0 for success, non-zero for failure.
  2758. */
  2759. int
  2760. mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
  2761. Mpi2SasIoUnitControlReply_t *mpi_reply,
  2762. Mpi2SasIoUnitControlRequest_t *mpi_request)
  2763. {
  2764. u16 smid;
  2765. u32 ioc_state;
  2766. unsigned long timeleft;
  2767. u8 issue_reset;
  2768. int rc;
  2769. void *request;
  2770. u16 wait_state_count;
  2771. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2772. __func__));
  2773. mutex_lock(&ioc->base_cmds.mutex);
  2774. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2775. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2776. ioc->name, __func__);
  2777. rc = -EAGAIN;
  2778. goto out;
  2779. }
  2780. wait_state_count = 0;
  2781. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2782. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2783. if (wait_state_count++ == 10) {
  2784. printk(MPT2SAS_ERR_FMT
  2785. "%s: failed due to ioc not operational\n",
  2786. ioc->name, __func__);
  2787. rc = -EFAULT;
  2788. goto out;
  2789. }
  2790. ssleep(1);
  2791. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2792. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2793. "operational state(count=%d)\n", ioc->name,
  2794. __func__, wait_state_count);
  2795. }
  2796. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2797. if (!smid) {
  2798. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2799. ioc->name, __func__);
  2800. rc = -EAGAIN;
  2801. goto out;
  2802. }
  2803. rc = 0;
  2804. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2805. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2806. ioc->base_cmds.smid = smid;
  2807. memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
  2808. if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2809. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
  2810. ioc->ioc_link_reset_in_progress = 1;
  2811. mpt2sas_base_put_smid_default(ioc, smid);
  2812. init_completion(&ioc->base_cmds.done);
  2813. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2814. msecs_to_jiffies(10000));
  2815. if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2816. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
  2817. ioc->ioc_link_reset_in_progress)
  2818. ioc->ioc_link_reset_in_progress = 0;
  2819. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2820. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2821. ioc->name, __func__);
  2822. _debug_dump_mf(mpi_request,
  2823. sizeof(Mpi2SasIoUnitControlRequest_t)/4);
  2824. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2825. issue_reset = 1;
  2826. goto issue_host_reset;
  2827. }
  2828. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2829. memcpy(mpi_reply, ioc->base_cmds.reply,
  2830. sizeof(Mpi2SasIoUnitControlReply_t));
  2831. else
  2832. memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
  2833. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2834. goto out;
  2835. issue_host_reset:
  2836. if (issue_reset)
  2837. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2838. FORCE_BIG_HAMMER);
  2839. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2840. rc = -EFAULT;
  2841. out:
  2842. mutex_unlock(&ioc->base_cmds.mutex);
  2843. return rc;
  2844. }
  2845. /**
  2846. * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
  2847. * @ioc: per adapter object
  2848. * @mpi_reply: the reply payload from FW
  2849. * @mpi_request: the request payload sent to FW
  2850. *
  2851. * The SCSI Enclosure Processor request message causes the IOC to
  2852. * communicate with SES devices to control LED status signals.
  2853. *
  2854. * Returns 0 for success, non-zero for failure.
  2855. */
  2856. int
  2857. mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
  2858. Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
  2859. {
  2860. u16 smid;
  2861. u32 ioc_state;
  2862. unsigned long timeleft;
  2863. u8 issue_reset;
  2864. int rc;
  2865. void *request;
  2866. u16 wait_state_count;
  2867. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2868. __func__));
  2869. mutex_lock(&ioc->base_cmds.mutex);
  2870. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2871. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2872. ioc->name, __func__);
  2873. rc = -EAGAIN;
  2874. goto out;
  2875. }
  2876. wait_state_count = 0;
  2877. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2878. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2879. if (wait_state_count++ == 10) {
  2880. printk(MPT2SAS_ERR_FMT
  2881. "%s: failed due to ioc not operational\n",
  2882. ioc->name, __func__);
  2883. rc = -EFAULT;
  2884. goto out;
  2885. }
  2886. ssleep(1);
  2887. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2888. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2889. "operational state(count=%d)\n", ioc->name,
  2890. __func__, wait_state_count);
  2891. }
  2892. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2893. if (!smid) {
  2894. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2895. ioc->name, __func__);
  2896. rc = -EAGAIN;
  2897. goto out;
  2898. }
  2899. rc = 0;
  2900. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2901. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2902. ioc->base_cmds.smid = smid;
  2903. memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
  2904. mpt2sas_base_put_smid_default(ioc, smid);
  2905. init_completion(&ioc->base_cmds.done);
  2906. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2907. msecs_to_jiffies(10000));
  2908. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2909. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2910. ioc->name, __func__);
  2911. _debug_dump_mf(mpi_request,
  2912. sizeof(Mpi2SepRequest_t)/4);
  2913. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2914. issue_reset = 1;
  2915. goto issue_host_reset;
  2916. }
  2917. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2918. memcpy(mpi_reply, ioc->base_cmds.reply,
  2919. sizeof(Mpi2SepReply_t));
  2920. else
  2921. memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
  2922. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2923. goto out;
  2924. issue_host_reset:
  2925. if (issue_reset)
  2926. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2927. FORCE_BIG_HAMMER);
  2928. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2929. rc = -EFAULT;
  2930. out:
  2931. mutex_unlock(&ioc->base_cmds.mutex);
  2932. return rc;
  2933. }
  2934. /**
  2935. * _base_get_port_facts - obtain port facts reply and save in ioc
  2936. * @ioc: per adapter object
  2937. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2938. *
  2939. * Returns 0 for success, non-zero for failure.
  2940. */
  2941. static int
  2942. _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
  2943. {
  2944. Mpi2PortFactsRequest_t mpi_request;
  2945. Mpi2PortFactsReply_t mpi_reply;
  2946. struct mpt2sas_port_facts *pfacts;
  2947. int mpi_reply_sz, mpi_request_sz, r;
  2948. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2949. __func__));
  2950. mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
  2951. mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
  2952. memset(&mpi_request, 0, mpi_request_sz);
  2953. mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
  2954. mpi_request.PortNumber = port;
  2955. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2956. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2957. if (r != 0) {
  2958. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2959. ioc->name, __func__, r);
  2960. return r;
  2961. }
  2962. pfacts = &ioc->pfacts[port];
  2963. memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
  2964. pfacts->PortNumber = mpi_reply.PortNumber;
  2965. pfacts->VP_ID = mpi_reply.VP_ID;
  2966. pfacts->VF_ID = mpi_reply.VF_ID;
  2967. pfacts->MaxPostedCmdBuffers =
  2968. le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
  2969. return 0;
  2970. }
  2971. /**
  2972. * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
  2973. * @ioc: per adapter object
  2974. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2975. *
  2976. * Returns 0 for success, non-zero for failure.
  2977. */
  2978. static int
  2979. _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2980. {
  2981. Mpi2IOCFactsRequest_t mpi_request;
  2982. Mpi2IOCFactsReply_t mpi_reply;
  2983. struct mpt2sas_facts *facts;
  2984. int mpi_reply_sz, mpi_request_sz, r;
  2985. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2986. __func__));
  2987. mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
  2988. mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
  2989. memset(&mpi_request, 0, mpi_request_sz);
  2990. mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
  2991. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2992. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2993. if (r != 0) {
  2994. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2995. ioc->name, __func__, r);
  2996. return r;
  2997. }
  2998. facts = &ioc->facts;
  2999. memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
  3000. facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
  3001. facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
  3002. facts->VP_ID = mpi_reply.VP_ID;
  3003. facts->VF_ID = mpi_reply.VF_ID;
  3004. facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
  3005. facts->MaxChainDepth = mpi_reply.MaxChainDepth;
  3006. facts->WhoInit = mpi_reply.WhoInit;
  3007. facts->NumberOfPorts = mpi_reply.NumberOfPorts;
  3008. facts->MaxMSIxVectors = mpi_reply.MaxMSIxVectors;
  3009. facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
  3010. facts->MaxReplyDescriptorPostQueueDepth =
  3011. le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
  3012. facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
  3013. facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
  3014. if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
  3015. ioc->ir_firmware = 1;
  3016. facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
  3017. facts->IOCRequestFrameSize =
  3018. le16_to_cpu(mpi_reply.IOCRequestFrameSize);
  3019. facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
  3020. facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
  3021. ioc->shost->max_id = -1;
  3022. facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
  3023. facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
  3024. facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
  3025. facts->HighPriorityCredit =
  3026. le16_to_cpu(mpi_reply.HighPriorityCredit);
  3027. facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
  3028. facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
  3029. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
  3030. "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
  3031. facts->MaxChainDepth));
  3032. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
  3033. "reply frame size(%d)\n", ioc->name,
  3034. facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
  3035. return 0;
  3036. }
  3037. /**
  3038. * _base_send_ioc_init - send ioc_init to firmware
  3039. * @ioc: per adapter object
  3040. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3041. *
  3042. * Returns 0 for success, non-zero for failure.
  3043. */
  3044. static int
  3045. _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3046. {
  3047. Mpi2IOCInitRequest_t mpi_request;
  3048. Mpi2IOCInitReply_t mpi_reply;
  3049. int r;
  3050. struct timeval current_time;
  3051. u16 ioc_status;
  3052. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3053. __func__));
  3054. memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
  3055. mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
  3056. mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
  3057. mpi_request.VF_ID = 0; /* TODO */
  3058. mpi_request.VP_ID = 0;
  3059. mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
  3060. mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
  3061. if (_base_is_controller_msix_enabled(ioc))
  3062. mpi_request.HostMSIxVectors = ioc->reply_queue_count;
  3063. mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
  3064. mpi_request.ReplyDescriptorPostQueueDepth =
  3065. cpu_to_le16(ioc->reply_post_queue_depth);
  3066. mpi_request.ReplyFreeQueueDepth =
  3067. cpu_to_le16(ioc->reply_free_queue_depth);
  3068. mpi_request.SenseBufferAddressHigh =
  3069. cpu_to_le32((u64)ioc->sense_dma >> 32);
  3070. mpi_request.SystemReplyAddressHigh =
  3071. cpu_to_le32((u64)ioc->reply_dma >> 32);
  3072. mpi_request.SystemRequestFrameBaseAddress =
  3073. cpu_to_le64((u64)ioc->request_dma);
  3074. mpi_request.ReplyFreeQueueAddress =
  3075. cpu_to_le64((u64)ioc->reply_free_dma);
  3076. mpi_request.ReplyDescriptorPostQueueAddress =
  3077. cpu_to_le64((u64)ioc->reply_post_free_dma);
  3078. /* This time stamp specifies number of milliseconds
  3079. * since epoch ~ midnight January 1, 1970.
  3080. */
  3081. do_gettimeofday(&current_time);
  3082. mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
  3083. (current_time.tv_usec / 1000));
  3084. if (ioc->logging_level & MPT_DEBUG_INIT) {
  3085. __le32 *mfp;
  3086. int i;
  3087. mfp = (__le32 *)&mpi_request;
  3088. printk(KERN_INFO "\toffset:data\n");
  3089. for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
  3090. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  3091. le32_to_cpu(mfp[i]));
  3092. }
  3093. r = _base_handshake_req_reply_wait(ioc,
  3094. sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
  3095. sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
  3096. sleep_flag);
  3097. if (r != 0) {
  3098. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3099. ioc->name, __func__, r);
  3100. return r;
  3101. }
  3102. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
  3103. if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
  3104. mpi_reply.IOCLogInfo) {
  3105. printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
  3106. r = -EIO;
  3107. }
  3108. return 0;
  3109. }
  3110. /**
  3111. * mpt2sas_port_enable_done - command completion routine for port enable
  3112. * @ioc: per adapter object
  3113. * @smid: system request message index
  3114. * @msix_index: MSIX table index supplied by the OS
  3115. * @reply: reply message frame(lower 32bit addr)
  3116. *
  3117. * Return 1 meaning mf should be freed from _base_interrupt
  3118. * 0 means the mf is freed from this function.
  3119. */
  3120. u8
  3121. mpt2sas_port_enable_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  3122. u32 reply)
  3123. {
  3124. MPI2DefaultReply_t *mpi_reply;
  3125. u16 ioc_status;
  3126. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  3127. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  3128. return 1;
  3129. if (ioc->port_enable_cmds.status == MPT2_CMD_NOT_USED)
  3130. return 1;
  3131. ioc->port_enable_cmds.status |= MPT2_CMD_COMPLETE;
  3132. if (mpi_reply) {
  3133. ioc->port_enable_cmds.status |= MPT2_CMD_REPLY_VALID;
  3134. memcpy(ioc->port_enable_cmds.reply, mpi_reply,
  3135. mpi_reply->MsgLength*4);
  3136. }
  3137. ioc->port_enable_cmds.status &= ~MPT2_CMD_PENDING;
  3138. ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
  3139. if (ioc_status != MPI2_IOCSTATUS_SUCCESS)
  3140. ioc->port_enable_failed = 1;
  3141. if (ioc->is_driver_loading) {
  3142. if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
  3143. mpt2sas_port_enable_complete(ioc);
  3144. return 1;
  3145. } else {
  3146. ioc->start_scan_failed = ioc_status;
  3147. ioc->start_scan = 0;
  3148. return 1;
  3149. }
  3150. }
  3151. complete(&ioc->port_enable_cmds.done);
  3152. return 1;
  3153. }
  3154. /**
  3155. * _base_send_port_enable - send port_enable(discovery stuff) to firmware
  3156. * @ioc: per adapter object
  3157. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3158. *
  3159. * Returns 0 for success, non-zero for failure.
  3160. */
  3161. static int
  3162. _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3163. {
  3164. Mpi2PortEnableRequest_t *mpi_request;
  3165. Mpi2PortEnableReply_t *mpi_reply;
  3166. unsigned long timeleft;
  3167. int r = 0;
  3168. u16 smid;
  3169. u16 ioc_status;
  3170. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  3171. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3172. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3173. ioc->name, __func__);
  3174. return -EAGAIN;
  3175. }
  3176. smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
  3177. if (!smid) {
  3178. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3179. ioc->name, __func__);
  3180. return -EAGAIN;
  3181. }
  3182. ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
  3183. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3184. ioc->port_enable_cmds.smid = smid;
  3185. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  3186. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  3187. init_completion(&ioc->port_enable_cmds.done);
  3188. mpt2sas_base_put_smid_default(ioc, smid);
  3189. timeleft = wait_for_completion_timeout(&ioc->port_enable_cmds.done,
  3190. 300*HZ);
  3191. if (!(ioc->port_enable_cmds.status & MPT2_CMD_COMPLETE)) {
  3192. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3193. ioc->name, __func__);
  3194. _debug_dump_mf(mpi_request,
  3195. sizeof(Mpi2PortEnableRequest_t)/4);
  3196. if (ioc->port_enable_cmds.status & MPT2_CMD_RESET)
  3197. r = -EFAULT;
  3198. else
  3199. r = -ETIME;
  3200. goto out;
  3201. }
  3202. mpi_reply = ioc->port_enable_cmds.reply;
  3203. ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
  3204. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  3205. printk(MPT2SAS_ERR_FMT "%s: failed with (ioc_status=0x%08x)\n",
  3206. ioc->name, __func__, ioc_status);
  3207. r = -EFAULT;
  3208. goto out;
  3209. }
  3210. out:
  3211. ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
  3212. printk(MPT2SAS_INFO_FMT "port enable: %s\n", ioc->name, ((r == 0) ?
  3213. "SUCCESS" : "FAILED"));
  3214. return r;
  3215. }
  3216. /**
  3217. * mpt2sas_port_enable - initiate firmware discovery (don't wait for reply)
  3218. * @ioc: per adapter object
  3219. *
  3220. * Returns 0 for success, non-zero for failure.
  3221. */
  3222. int
  3223. mpt2sas_port_enable(struct MPT2SAS_ADAPTER *ioc)
  3224. {
  3225. Mpi2PortEnableRequest_t *mpi_request;
  3226. u16 smid;
  3227. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  3228. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3229. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3230. ioc->name, __func__);
  3231. return -EAGAIN;
  3232. }
  3233. smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
  3234. if (!smid) {
  3235. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3236. ioc->name, __func__);
  3237. return -EAGAIN;
  3238. }
  3239. ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
  3240. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3241. ioc->port_enable_cmds.smid = smid;
  3242. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  3243. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  3244. mpt2sas_base_put_smid_default(ioc, smid);
  3245. return 0;
  3246. }
  3247. /**
  3248. * _base_determine_wait_on_discovery - desposition
  3249. * @ioc: per adapter object
  3250. *
  3251. * Decide whether to wait on discovery to complete. Used to either
  3252. * locate boot device, or report volumes ahead of physical devices.
  3253. *
  3254. * Returns 1 for wait, 0 for don't wait
  3255. */
  3256. static int
  3257. _base_determine_wait_on_discovery(struct MPT2SAS_ADAPTER *ioc)
  3258. {
  3259. /* We wait for discovery to complete if IR firmware is loaded.
  3260. * The sas topology events arrive before PD events, so we need time to
  3261. * turn on the bit in ioc->pd_handles to indicate PD
  3262. * Also, it maybe required to report Volumes ahead of physical
  3263. * devices when MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING is set.
  3264. */
  3265. if (ioc->ir_firmware)
  3266. return 1;
  3267. /* if no Bios, then we don't need to wait */
  3268. if (!ioc->bios_pg3.BiosVersion)
  3269. return 0;
  3270. /* Bios is present, then we drop down here.
  3271. *
  3272. * If there any entries in the Bios Page 2, then we wait
  3273. * for discovery to complete.
  3274. */
  3275. /* Current Boot Device */
  3276. if ((ioc->bios_pg2.CurrentBootDeviceForm &
  3277. MPI2_BIOSPAGE2_FORM_MASK) ==
  3278. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
  3279. /* Request Boot Device */
  3280. (ioc->bios_pg2.ReqBootDeviceForm &
  3281. MPI2_BIOSPAGE2_FORM_MASK) ==
  3282. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
  3283. /* Alternate Request Boot Device */
  3284. (ioc->bios_pg2.ReqAltBootDeviceForm &
  3285. MPI2_BIOSPAGE2_FORM_MASK) ==
  3286. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED)
  3287. return 0;
  3288. return 1;
  3289. }
  3290. /**
  3291. * _base_unmask_events - turn on notification for this event
  3292. * @ioc: per adapter object
  3293. * @event: firmware event
  3294. *
  3295. * The mask is stored in ioc->event_masks.
  3296. */
  3297. static void
  3298. _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
  3299. {
  3300. u32 desired_event;
  3301. if (event >= 128)
  3302. return;
  3303. desired_event = (1 << (event % 32));
  3304. if (event < 32)
  3305. ioc->event_masks[0] &= ~desired_event;
  3306. else if (event < 64)
  3307. ioc->event_masks[1] &= ~desired_event;
  3308. else if (event < 96)
  3309. ioc->event_masks[2] &= ~desired_event;
  3310. else if (event < 128)
  3311. ioc->event_masks[3] &= ~desired_event;
  3312. }
  3313. /**
  3314. * _base_event_notification - send event notification
  3315. * @ioc: per adapter object
  3316. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3317. *
  3318. * Returns 0 for success, non-zero for failure.
  3319. */
  3320. static int
  3321. _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3322. {
  3323. Mpi2EventNotificationRequest_t *mpi_request;
  3324. unsigned long timeleft;
  3325. u16 smid;
  3326. int r = 0;
  3327. int i;
  3328. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3329. __func__));
  3330. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3331. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3332. ioc->name, __func__);
  3333. return -EAGAIN;
  3334. }
  3335. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  3336. if (!smid) {
  3337. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3338. ioc->name, __func__);
  3339. return -EAGAIN;
  3340. }
  3341. ioc->base_cmds.status = MPT2_CMD_PENDING;
  3342. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3343. ioc->base_cmds.smid = smid;
  3344. memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
  3345. mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
  3346. mpi_request->VF_ID = 0; /* TODO */
  3347. mpi_request->VP_ID = 0;
  3348. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3349. mpi_request->EventMasks[i] =
  3350. cpu_to_le32(ioc->event_masks[i]);
  3351. mpt2sas_base_put_smid_default(ioc, smid);
  3352. init_completion(&ioc->base_cmds.done);
  3353. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
  3354. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  3355. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3356. ioc->name, __func__);
  3357. _debug_dump_mf(mpi_request,
  3358. sizeof(Mpi2EventNotificationRequest_t)/4);
  3359. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  3360. r = -EFAULT;
  3361. else
  3362. r = -ETIME;
  3363. } else
  3364. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
  3365. ioc->name, __func__));
  3366. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3367. return r;
  3368. }
  3369. /**
  3370. * mpt2sas_base_validate_event_type - validating event types
  3371. * @ioc: per adapter object
  3372. * @event: firmware event
  3373. *
  3374. * This will turn on firmware event notification when application
  3375. * ask for that event. We don't mask events that are already enabled.
  3376. */
  3377. void
  3378. mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
  3379. {
  3380. int i, j;
  3381. u32 event_mask, desired_event;
  3382. u8 send_update_to_fw;
  3383. for (i = 0, send_update_to_fw = 0; i <
  3384. MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
  3385. event_mask = ~event_type[i];
  3386. desired_event = 1;
  3387. for (j = 0; j < 32; j++) {
  3388. if (!(event_mask & desired_event) &&
  3389. (ioc->event_masks[i] & desired_event)) {
  3390. ioc->event_masks[i] &= ~desired_event;
  3391. send_update_to_fw = 1;
  3392. }
  3393. desired_event = (desired_event << 1);
  3394. }
  3395. }
  3396. if (!send_update_to_fw)
  3397. return;
  3398. mutex_lock(&ioc->base_cmds.mutex);
  3399. _base_event_notification(ioc, CAN_SLEEP);
  3400. mutex_unlock(&ioc->base_cmds.mutex);
  3401. }
  3402. /**
  3403. * _base_diag_reset - the "big hammer" start of day reset
  3404. * @ioc: per adapter object
  3405. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3406. *
  3407. * Returns 0 for success, non-zero for failure.
  3408. */
  3409. static int
  3410. _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3411. {
  3412. u32 host_diagnostic;
  3413. u32 ioc_state;
  3414. u32 count;
  3415. u32 hcb_size;
  3416. printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
  3417. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n",
  3418. ioc->name));
  3419. count = 0;
  3420. do {
  3421. /* Write magic sequence to WriteSequence register
  3422. * Loop until in diagnostic mode
  3423. */
  3424. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic "
  3425. "sequence\n", ioc->name));
  3426. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3427. writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
  3428. writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
  3429. writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
  3430. writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3431. writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3432. writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3433. /* wait 100 msec */
  3434. if (sleep_flag == CAN_SLEEP)
  3435. msleep(100);
  3436. else
  3437. mdelay(100);
  3438. if (count++ > 20)
  3439. goto out;
  3440. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3441. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic "
  3442. "sequence: count(%d), host_diagnostic(0x%08x)\n",
  3443. ioc->name, count, host_diagnostic));
  3444. } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
  3445. hcb_size = readl(&ioc->chip->HCBSize);
  3446. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n",
  3447. ioc->name));
  3448. writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
  3449. &ioc->chip->HostDiagnostic);
  3450. /* don't access any registers for 50 milliseconds */
  3451. msleep(50);
  3452. /* 300 second max wait */
  3453. for (count = 0; count < 3000000 ; count++) {
  3454. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3455. if (host_diagnostic == 0xFFFFFFFF)
  3456. goto out;
  3457. if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
  3458. break;
  3459. /* wait 100 msec */
  3460. if (sleep_flag == CAN_SLEEP)
  3461. msleep(1);
  3462. else
  3463. mdelay(1);
  3464. }
  3465. if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
  3466. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter "
  3467. "assuming the HCB Address points to good F/W\n",
  3468. ioc->name));
  3469. host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
  3470. host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
  3471. writel(host_diagnostic, &ioc->chip->HostDiagnostic);
  3472. drsprintk(ioc, printk(MPT2SAS_INFO_FMT
  3473. "re-enable the HCDW\n", ioc->name));
  3474. writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
  3475. &ioc->chip->HCBSize);
  3476. }
  3477. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n",
  3478. ioc->name));
  3479. writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
  3480. &ioc->chip->HostDiagnostic);
  3481. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the "
  3482. "diagnostic register\n", ioc->name));
  3483. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3484. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the "
  3485. "READY state\n", ioc->name));
  3486. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
  3487. sleep_flag);
  3488. if (ioc_state) {
  3489. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  3490. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  3491. goto out;
  3492. }
  3493. printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
  3494. return 0;
  3495. out:
  3496. printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
  3497. return -EFAULT;
  3498. }
  3499. /**
  3500. * _base_make_ioc_ready - put controller in READY state
  3501. * @ioc: per adapter object
  3502. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3503. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3504. *
  3505. * Returns 0 for success, non-zero for failure.
  3506. */
  3507. static int
  3508. _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3509. enum reset_type type)
  3510. {
  3511. u32 ioc_state;
  3512. int rc;
  3513. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3514. __func__));
  3515. if (ioc->pci_error_recovery)
  3516. return 0;
  3517. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3518. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
  3519. ioc->name, __func__, ioc_state));
  3520. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
  3521. return 0;
  3522. if (ioc_state & MPI2_DOORBELL_USED) {
  3523. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell "
  3524. "active!\n", ioc->name));
  3525. goto issue_diag_reset;
  3526. }
  3527. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  3528. mpt2sas_base_fault_info(ioc, ioc_state &
  3529. MPI2_DOORBELL_DATA_MASK);
  3530. goto issue_diag_reset;
  3531. }
  3532. if (type == FORCE_BIG_HAMMER)
  3533. goto issue_diag_reset;
  3534. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
  3535. if (!(_base_send_ioc_reset(ioc,
  3536. MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
  3537. ioc->ioc_reset_count++;
  3538. return 0;
  3539. }
  3540. issue_diag_reset:
  3541. rc = _base_diag_reset(ioc, CAN_SLEEP);
  3542. ioc->ioc_reset_count++;
  3543. return rc;
  3544. }
  3545. /**
  3546. * _base_make_ioc_operational - put controller in OPERATIONAL state
  3547. * @ioc: per adapter object
  3548. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3549. *
  3550. * Returns 0 for success, non-zero for failure.
  3551. */
  3552. static int
  3553. _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3554. {
  3555. int r, i;
  3556. unsigned long flags;
  3557. u32 reply_address;
  3558. u16 smid;
  3559. struct _tr_list *delayed_tr, *delayed_tr_next;
  3560. u8 hide_flag;
  3561. struct adapter_reply_queue *reply_q;
  3562. long reply_post_free;
  3563. u32 reply_post_free_sz;
  3564. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3565. __func__));
  3566. /* clean the delayed target reset list */
  3567. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3568. &ioc->delayed_tr_list, list) {
  3569. list_del(&delayed_tr->list);
  3570. kfree(delayed_tr);
  3571. }
  3572. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3573. &ioc->delayed_tr_volume_list, list) {
  3574. list_del(&delayed_tr->list);
  3575. kfree(delayed_tr);
  3576. }
  3577. /* initialize the scsi lookup free list */
  3578. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3579. INIT_LIST_HEAD(&ioc->free_list);
  3580. smid = 1;
  3581. for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
  3582. INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
  3583. ioc->scsi_lookup[i].cb_idx = 0xFF;
  3584. ioc->scsi_lookup[i].smid = smid;
  3585. ioc->scsi_lookup[i].scmd = NULL;
  3586. ioc->scsi_lookup[i].direct_io = 0;
  3587. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  3588. &ioc->free_list);
  3589. }
  3590. /* hi-priority queue */
  3591. INIT_LIST_HEAD(&ioc->hpr_free_list);
  3592. smid = ioc->hi_priority_smid;
  3593. for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
  3594. ioc->hpr_lookup[i].cb_idx = 0xFF;
  3595. ioc->hpr_lookup[i].smid = smid;
  3596. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  3597. &ioc->hpr_free_list);
  3598. }
  3599. /* internal queue */
  3600. INIT_LIST_HEAD(&ioc->internal_free_list);
  3601. smid = ioc->internal_smid;
  3602. for (i = 0; i < ioc->internal_depth; i++, smid++) {
  3603. ioc->internal_lookup[i].cb_idx = 0xFF;
  3604. ioc->internal_lookup[i].smid = smid;
  3605. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  3606. &ioc->internal_free_list);
  3607. }
  3608. /* chain pool */
  3609. INIT_LIST_HEAD(&ioc->free_chain_list);
  3610. for (i = 0; i < ioc->chain_depth; i++)
  3611. list_add_tail(&ioc->chain_lookup[i].tracker_list,
  3612. &ioc->free_chain_list);
  3613. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3614. /* initialize Reply Free Queue */
  3615. for (i = 0, reply_address = (u32)ioc->reply_dma ;
  3616. i < ioc->reply_free_queue_depth ; i++, reply_address +=
  3617. ioc->reply_sz)
  3618. ioc->reply_free[i] = cpu_to_le32(reply_address);
  3619. /* initialize reply queues */
  3620. _base_assign_reply_queues(ioc);
  3621. /* initialize Reply Post Free Queue */
  3622. reply_post_free = (long)ioc->reply_post_free;
  3623. reply_post_free_sz = ioc->reply_post_queue_depth *
  3624. sizeof(Mpi2DefaultReplyDescriptor_t);
  3625. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  3626. reply_q->reply_post_host_index = 0;
  3627. reply_q->reply_post_free = (Mpi2ReplyDescriptorsUnion_t *)
  3628. reply_post_free;
  3629. for (i = 0; i < ioc->reply_post_queue_depth; i++)
  3630. reply_q->reply_post_free[i].Words =
  3631. cpu_to_le64(ULLONG_MAX);
  3632. if (!_base_is_controller_msix_enabled(ioc))
  3633. goto skip_init_reply_post_free_queue;
  3634. reply_post_free += reply_post_free_sz;
  3635. }
  3636. skip_init_reply_post_free_queue:
  3637. r = _base_send_ioc_init(ioc, sleep_flag);
  3638. if (r)
  3639. return r;
  3640. /* initialize reply free host index */
  3641. ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
  3642. writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
  3643. /* initialize reply post host index */
  3644. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  3645. writel(reply_q->msix_index << MPI2_RPHI_MSIX_INDEX_SHIFT,
  3646. &ioc->chip->ReplyPostHostIndex);
  3647. if (!_base_is_controller_msix_enabled(ioc))
  3648. goto skip_init_reply_post_host_index;
  3649. }
  3650. skip_init_reply_post_host_index:
  3651. _base_unmask_interrupts(ioc);
  3652. r = _base_event_notification(ioc, sleep_flag);
  3653. if (r)
  3654. return r;
  3655. if (sleep_flag == CAN_SLEEP)
  3656. _base_static_config_pages(ioc);
  3657. if (ioc->is_driver_loading) {
  3658. ioc->wait_for_discovery_to_complete =
  3659. _base_determine_wait_on_discovery(ioc);
  3660. return r; /* scan_start and scan_finished support */
  3661. }
  3662. if (ioc->wait_for_discovery_to_complete && ioc->is_warpdrive) {
  3663. if (ioc->manu_pg10.OEMIdentifier == 0x80) {
  3664. hide_flag = (u8) (ioc->manu_pg10.OEMSpecificFlags0 &
  3665. MFG_PAGE10_HIDE_SSDS_MASK);
  3666. if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK)
  3667. ioc->mfg_pg10_hide_flag = hide_flag;
  3668. }
  3669. }
  3670. r = _base_send_port_enable(ioc, sleep_flag);
  3671. if (r)
  3672. return r;
  3673. return r;
  3674. }
  3675. /**
  3676. * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
  3677. * @ioc: per adapter object
  3678. *
  3679. * Return nothing.
  3680. */
  3681. void
  3682. mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
  3683. {
  3684. struct pci_dev *pdev = ioc->pdev;
  3685. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3686. __func__));
  3687. _base_mask_interrupts(ioc);
  3688. ioc->shost_recovery = 1;
  3689. _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3690. ioc->shost_recovery = 0;
  3691. _base_free_irq(ioc);
  3692. _base_disable_msix(ioc);
  3693. if (ioc->chip_phys)
  3694. iounmap(ioc->chip);
  3695. ioc->chip_phys = 0;
  3696. pci_release_selected_regions(ioc->pdev, ioc->bars);
  3697. pci_disable_pcie_error_reporting(pdev);
  3698. pci_disable_device(pdev);
  3699. return;
  3700. }
  3701. /**
  3702. * mpt2sas_base_attach - attach controller instance
  3703. * @ioc: per adapter object
  3704. *
  3705. * Returns 0 for success, non-zero for failure.
  3706. */
  3707. int
  3708. mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
  3709. {
  3710. int r, i;
  3711. int cpu_id, last_cpu_id = 0;
  3712. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3713. __func__));
  3714. /* setup cpu_msix_table */
  3715. ioc->cpu_count = num_online_cpus();
  3716. for_each_online_cpu(cpu_id)
  3717. last_cpu_id = cpu_id;
  3718. ioc->cpu_msix_table_sz = last_cpu_id + 1;
  3719. ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL);
  3720. ioc->reply_queue_count = 1;
  3721. if (!ioc->cpu_msix_table) {
  3722. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
  3723. "cpu_msix_table failed!!!\n", ioc->name));
  3724. r = -ENOMEM;
  3725. goto out_free_resources;
  3726. }
  3727. if (ioc->is_warpdrive) {
  3728. ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz,
  3729. sizeof(resource_size_t *), GFP_KERNEL);
  3730. if (!ioc->reply_post_host_index) {
  3731. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation "
  3732. "for cpu_msix_table failed!!!\n", ioc->name));
  3733. r = -ENOMEM;
  3734. goto out_free_resources;
  3735. }
  3736. }
  3737. r = mpt2sas_base_map_resources(ioc);
  3738. if (r)
  3739. return r;
  3740. if (ioc->is_warpdrive) {
  3741. ioc->reply_post_host_index[0] =
  3742. (resource_size_t *)&ioc->chip->ReplyPostHostIndex;
  3743. for (i = 1; i < ioc->cpu_msix_table_sz; i++)
  3744. ioc->reply_post_host_index[i] = (resource_size_t *)
  3745. ((u8 *)&ioc->chip->Doorbell + (0x4000 + ((i - 1)
  3746. * 4)));
  3747. }
  3748. pci_set_drvdata(ioc->pdev, ioc->shost);
  3749. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  3750. if (r)
  3751. goto out_free_resources;
  3752. r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3753. if (r)
  3754. goto out_free_resources;
  3755. ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
  3756. sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
  3757. if (!ioc->pfacts) {
  3758. r = -ENOMEM;
  3759. goto out_free_resources;
  3760. }
  3761. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
  3762. r = _base_get_port_facts(ioc, i, CAN_SLEEP);
  3763. if (r)
  3764. goto out_free_resources;
  3765. }
  3766. r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
  3767. if (r)
  3768. goto out_free_resources;
  3769. init_waitqueue_head(&ioc->reset_wq);
  3770. /* allocate memory pd handle bitmask list */
  3771. ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
  3772. if (ioc->facts.MaxDevHandle % 8)
  3773. ioc->pd_handles_sz++;
  3774. ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
  3775. GFP_KERNEL);
  3776. if (!ioc->pd_handles) {
  3777. r = -ENOMEM;
  3778. goto out_free_resources;
  3779. }
  3780. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  3781. /* base internal command bits */
  3782. mutex_init(&ioc->base_cmds.mutex);
  3783. ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3784. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3785. /* port_enable command bits */
  3786. ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3787. ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
  3788. /* transport internal command bits */
  3789. ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3790. ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
  3791. mutex_init(&ioc->transport_cmds.mutex);
  3792. /* scsih internal command bits */
  3793. ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3794. ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
  3795. mutex_init(&ioc->scsih_cmds.mutex);
  3796. /* task management internal command bits */
  3797. ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3798. ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
  3799. mutex_init(&ioc->tm_cmds.mutex);
  3800. /* config page internal command bits */
  3801. ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3802. ioc->config_cmds.status = MPT2_CMD_NOT_USED;
  3803. mutex_init(&ioc->config_cmds.mutex);
  3804. /* ctl module internal command bits */
  3805. ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3806. ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
  3807. ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
  3808. mutex_init(&ioc->ctl_cmds.mutex);
  3809. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3810. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3811. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
  3812. !ioc->ctl_cmds.sense) {
  3813. r = -ENOMEM;
  3814. goto out_free_resources;
  3815. }
  3816. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3817. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3818. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
  3819. r = -ENOMEM;
  3820. goto out_free_resources;
  3821. }
  3822. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3823. ioc->event_masks[i] = -1;
  3824. /* here we enable the events we care about */
  3825. _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
  3826. _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
  3827. _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
  3828. _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
  3829. _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
  3830. _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
  3831. _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
  3832. _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
  3833. _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
  3834. _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
  3835. r = _base_make_ioc_operational(ioc, CAN_SLEEP);
  3836. if (r)
  3837. goto out_free_resources;
  3838. if (missing_delay[0] != -1 && missing_delay[1] != -1)
  3839. _base_update_missing_delay(ioc, missing_delay[0],
  3840. missing_delay[1]);
  3841. return 0;
  3842. out_free_resources:
  3843. ioc->remove_host = 1;
  3844. mpt2sas_base_free_resources(ioc);
  3845. _base_release_memory_pools(ioc);
  3846. pci_set_drvdata(ioc->pdev, NULL);
  3847. kfree(ioc->cpu_msix_table);
  3848. if (ioc->is_warpdrive)
  3849. kfree(ioc->reply_post_host_index);
  3850. kfree(ioc->pd_handles);
  3851. kfree(ioc->tm_cmds.reply);
  3852. kfree(ioc->transport_cmds.reply);
  3853. kfree(ioc->scsih_cmds.reply);
  3854. kfree(ioc->config_cmds.reply);
  3855. kfree(ioc->base_cmds.reply);
  3856. kfree(ioc->port_enable_cmds.reply);
  3857. kfree(ioc->ctl_cmds.reply);
  3858. kfree(ioc->ctl_cmds.sense);
  3859. kfree(ioc->pfacts);
  3860. ioc->ctl_cmds.reply = NULL;
  3861. ioc->base_cmds.reply = NULL;
  3862. ioc->tm_cmds.reply = NULL;
  3863. ioc->scsih_cmds.reply = NULL;
  3864. ioc->transport_cmds.reply = NULL;
  3865. ioc->config_cmds.reply = NULL;
  3866. ioc->pfacts = NULL;
  3867. return r;
  3868. }
  3869. /**
  3870. * mpt2sas_base_detach - remove controller instance
  3871. * @ioc: per adapter object
  3872. *
  3873. * Return nothing.
  3874. */
  3875. void
  3876. mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
  3877. {
  3878. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3879. __func__));
  3880. mpt2sas_base_stop_watchdog(ioc);
  3881. mpt2sas_base_free_resources(ioc);
  3882. _base_release_memory_pools(ioc);
  3883. pci_set_drvdata(ioc->pdev, NULL);
  3884. kfree(ioc->cpu_msix_table);
  3885. if (ioc->is_warpdrive)
  3886. kfree(ioc->reply_post_host_index);
  3887. kfree(ioc->pd_handles);
  3888. kfree(ioc->pfacts);
  3889. kfree(ioc->ctl_cmds.reply);
  3890. kfree(ioc->ctl_cmds.sense);
  3891. kfree(ioc->base_cmds.reply);
  3892. kfree(ioc->port_enable_cmds.reply);
  3893. kfree(ioc->tm_cmds.reply);
  3894. kfree(ioc->transport_cmds.reply);
  3895. kfree(ioc->scsih_cmds.reply);
  3896. kfree(ioc->config_cmds.reply);
  3897. }
  3898. /**
  3899. * _base_reset_handler - reset callback handler (for base)
  3900. * @ioc: per adapter object
  3901. * @reset_phase: phase
  3902. *
  3903. * The handler for doing any required cleanup or initialization.
  3904. *
  3905. * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
  3906. * MPT2_IOC_DONE_RESET
  3907. *
  3908. * Return nothing.
  3909. */
  3910. static void
  3911. _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
  3912. {
  3913. mpt2sas_scsih_reset_handler(ioc, reset_phase);
  3914. mpt2sas_ctl_reset_handler(ioc, reset_phase);
  3915. switch (reset_phase) {
  3916. case MPT2_IOC_PRE_RESET:
  3917. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3918. "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
  3919. break;
  3920. case MPT2_IOC_AFTER_RESET:
  3921. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3922. "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
  3923. if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
  3924. ioc->transport_cmds.status |= MPT2_CMD_RESET;
  3925. mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
  3926. complete(&ioc->transport_cmds.done);
  3927. }
  3928. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3929. ioc->base_cmds.status |= MPT2_CMD_RESET;
  3930. mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
  3931. complete(&ioc->base_cmds.done);
  3932. }
  3933. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3934. ioc->port_enable_failed = 1;
  3935. ioc->port_enable_cmds.status |= MPT2_CMD_RESET;
  3936. mpt2sas_base_free_smid(ioc, ioc->port_enable_cmds.smid);
  3937. if (ioc->is_driver_loading) {
  3938. ioc->start_scan_failed =
  3939. MPI2_IOCSTATUS_INTERNAL_ERROR;
  3940. ioc->start_scan = 0;
  3941. ioc->port_enable_cmds.status =
  3942. MPT2_CMD_NOT_USED;
  3943. } else
  3944. complete(&ioc->port_enable_cmds.done);
  3945. }
  3946. if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
  3947. ioc->config_cmds.status |= MPT2_CMD_RESET;
  3948. mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
  3949. ioc->config_cmds.smid = USHRT_MAX;
  3950. complete(&ioc->config_cmds.done);
  3951. }
  3952. break;
  3953. case MPT2_IOC_DONE_RESET:
  3954. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3955. "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
  3956. break;
  3957. }
  3958. }
  3959. /**
  3960. * _wait_for_commands_to_complete - reset controller
  3961. * @ioc: Pointer to MPT_ADAPTER structure
  3962. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3963. *
  3964. * This function waiting(3s) for all pending commands to complete
  3965. * prior to putting controller in reset.
  3966. */
  3967. static void
  3968. _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3969. {
  3970. u32 ioc_state;
  3971. unsigned long flags;
  3972. u16 i;
  3973. ioc->pending_io_count = 0;
  3974. if (sleep_flag != CAN_SLEEP)
  3975. return;
  3976. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3977. if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
  3978. return;
  3979. /* pending command count */
  3980. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3981. for (i = 0; i < ioc->scsiio_depth; i++)
  3982. if (ioc->scsi_lookup[i].cb_idx != 0xFF)
  3983. ioc->pending_io_count++;
  3984. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3985. if (!ioc->pending_io_count)
  3986. return;
  3987. /* wait for pending commands to complete */
  3988. wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
  3989. }
  3990. /**
  3991. * mpt2sas_base_hard_reset_handler - reset controller
  3992. * @ioc: Pointer to MPT_ADAPTER structure
  3993. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3994. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3995. *
  3996. * Returns 0 for success, non-zero for failure.
  3997. */
  3998. int
  3999. mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  4000. enum reset_type type)
  4001. {
  4002. int r;
  4003. unsigned long flags;
  4004. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name,
  4005. __func__));
  4006. if (ioc->pci_error_recovery) {
  4007. printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n",
  4008. ioc->name, __func__);
  4009. r = 0;
  4010. goto out;
  4011. }
  4012. if (mpt2sas_fwfault_debug)
  4013. mpt2sas_halt_firmware(ioc);
  4014. /* TODO - What we really should be doing is pulling
  4015. * out all the code associated with NO_SLEEP; its never used.
  4016. * That is legacy code from mpt fusion driver, ported over.
  4017. * I will leave this BUG_ON here for now till its been resolved.
  4018. */
  4019. BUG_ON(sleep_flag == NO_SLEEP);
  4020. /* wait for an active reset in progress to complete */
  4021. if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
  4022. do {
  4023. ssleep(1);
  4024. } while (ioc->shost_recovery == 1);
  4025. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  4026. __func__));
  4027. return ioc->ioc_reset_in_progress_status;
  4028. }
  4029. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  4030. ioc->shost_recovery = 1;
  4031. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  4032. _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
  4033. _wait_for_commands_to_complete(ioc, sleep_flag);
  4034. _base_mask_interrupts(ioc);
  4035. r = _base_make_ioc_ready(ioc, sleep_flag, type);
  4036. if (r)
  4037. goto out;
  4038. _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
  4039. /* If this hard reset is called while port enable is active, then
  4040. * there is no reason to call make_ioc_operational
  4041. */
  4042. if (ioc->is_driver_loading && ioc->port_enable_failed) {
  4043. ioc->remove_host = 1;
  4044. r = -EFAULT;
  4045. goto out;
  4046. }
  4047. r = _base_make_ioc_operational(ioc, sleep_flag);
  4048. if (!r)
  4049. _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
  4050. out:
  4051. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n",
  4052. ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
  4053. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  4054. ioc->ioc_reset_in_progress_status = r;
  4055. ioc->shost_recovery = 0;
  4056. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  4057. mutex_unlock(&ioc->reset_in_progress_mutex);
  4058. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  4059. __func__));
  4060. return r;
  4061. }