mac53c94.c 15 KB

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  1. /*
  2. * SCSI low-level driver for the 53c94 SCSI bus adaptor found
  3. * on Power Macintosh computers, controlling the external SCSI chain.
  4. * We assume the 53c94 is connected to a DBDMA (descriptor-based DMA)
  5. * controller.
  6. *
  7. * Paul Mackerras, August 1996.
  8. * Copyright (C) 1996 Paul Mackerras.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/delay.h>
  12. #include <linux/types.h>
  13. #include <linux/string.h>
  14. #include <linux/slab.h>
  15. #include <linux/blkdev.h>
  16. #include <linux/proc_fs.h>
  17. #include <linux/stat.h>
  18. #include <linux/spinlock.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/module.h>
  21. #include <asm/dbdma.h>
  22. #include <asm/io.h>
  23. #include <asm/pgtable.h>
  24. #include <asm/prom.h>
  25. #include <asm/system.h>
  26. #include <asm/pci-bridge.h>
  27. #include <asm/macio.h>
  28. #include <scsi/scsi.h>
  29. #include <scsi/scsi_cmnd.h>
  30. #include <scsi/scsi_device.h>
  31. #include <scsi/scsi_host.h>
  32. #include "mac53c94.h"
  33. enum fsc_phase {
  34. idle,
  35. selecting,
  36. dataing,
  37. completing,
  38. busfreeing,
  39. };
  40. struct fsc_state {
  41. struct mac53c94_regs __iomem *regs;
  42. int intr;
  43. struct dbdma_regs __iomem *dma;
  44. int dmaintr;
  45. int clk_freq;
  46. struct Scsi_Host *host;
  47. struct scsi_cmnd *request_q;
  48. struct scsi_cmnd *request_qtail;
  49. struct scsi_cmnd *current_req; /* req we're currently working on */
  50. enum fsc_phase phase; /* what we're currently trying to do */
  51. struct dbdma_cmd *dma_cmds; /* space for dbdma commands, aligned */
  52. void *dma_cmd_space;
  53. struct pci_dev *pdev;
  54. dma_addr_t dma_addr;
  55. struct macio_dev *mdev;
  56. };
  57. static void mac53c94_init(struct fsc_state *);
  58. static void mac53c94_start(struct fsc_state *);
  59. static void mac53c94_interrupt(int, void *);
  60. static irqreturn_t do_mac53c94_interrupt(int, void *);
  61. static void cmd_done(struct fsc_state *, int result);
  62. static void set_dma_cmds(struct fsc_state *, struct scsi_cmnd *);
  63. static int mac53c94_queue_lck(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
  64. {
  65. struct fsc_state *state;
  66. #if 0
  67. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  68. int i;
  69. printk(KERN_DEBUG "mac53c94_queue %p: command is", cmd);
  70. for (i = 0; i < cmd->cmd_len; ++i)
  71. printk(KERN_CONT " %.2x", cmd->cmnd[i]);
  72. printk(KERN_CONT "\n");
  73. printk(KERN_DEBUG "use_sg=%d request_bufflen=%d request_buffer=%p\n",
  74. scsi_sg_count(cmd), scsi_bufflen(cmd), scsi_sglist(cmd));
  75. }
  76. #endif
  77. cmd->scsi_done = done;
  78. cmd->host_scribble = NULL;
  79. state = (struct fsc_state *) cmd->device->host->hostdata;
  80. if (state->request_q == NULL)
  81. state->request_q = cmd;
  82. else
  83. state->request_qtail->host_scribble = (void *) cmd;
  84. state->request_qtail = cmd;
  85. if (state->phase == idle)
  86. mac53c94_start(state);
  87. return 0;
  88. }
  89. static DEF_SCSI_QCMD(mac53c94_queue)
  90. static int mac53c94_host_reset(struct scsi_cmnd *cmd)
  91. {
  92. struct fsc_state *state = (struct fsc_state *) cmd->device->host->hostdata;
  93. struct mac53c94_regs __iomem *regs = state->regs;
  94. struct dbdma_regs __iomem *dma = state->dma;
  95. unsigned long flags;
  96. spin_lock_irqsave(cmd->device->host->host_lock, flags);
  97. writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control);
  98. writeb(CMD_SCSI_RESET, &regs->command); /* assert RST */
  99. udelay(100); /* leave it on for a while (>= 25us) */
  100. writeb(CMD_RESET, &regs->command);
  101. udelay(20);
  102. mac53c94_init(state);
  103. writeb(CMD_NOP, &regs->command);
  104. spin_unlock_irqrestore(cmd->device->host->host_lock, flags);
  105. return SUCCESS;
  106. }
  107. static void mac53c94_init(struct fsc_state *state)
  108. {
  109. struct mac53c94_regs __iomem *regs = state->regs;
  110. struct dbdma_regs __iomem *dma = state->dma;
  111. int x;
  112. writeb(state->host->this_id | CF1_PAR_ENABLE, &regs->config1);
  113. writeb(TIMO_VAL(250), &regs->sel_timeout); /* 250ms */
  114. writeb(CLKF_VAL(state->clk_freq), &regs->clk_factor);
  115. writeb(CF2_FEATURE_EN, &regs->config2);
  116. writeb(0, &regs->config3);
  117. writeb(0, &regs->sync_period);
  118. writeb(0, &regs->sync_offset);
  119. x = readb(&regs->interrupt);
  120. writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control);
  121. }
  122. /*
  123. * Start the next command for a 53C94.
  124. * Should be called with interrupts disabled.
  125. */
  126. static void mac53c94_start(struct fsc_state *state)
  127. {
  128. struct scsi_cmnd *cmd;
  129. struct mac53c94_regs __iomem *regs = state->regs;
  130. int i;
  131. if (state->phase != idle || state->current_req != NULL)
  132. panic("inappropriate mac53c94_start (state=%p)", state);
  133. if (state->request_q == NULL)
  134. return;
  135. state->current_req = cmd = state->request_q;
  136. state->request_q = (struct scsi_cmnd *) cmd->host_scribble;
  137. /* Off we go */
  138. writeb(0, &regs->count_lo);
  139. writeb(0, &regs->count_mid);
  140. writeb(0, &regs->count_hi);
  141. writeb(CMD_NOP + CMD_DMA_MODE, &regs->command);
  142. udelay(1);
  143. writeb(CMD_FLUSH, &regs->command);
  144. udelay(1);
  145. writeb(cmd->device->id, &regs->dest_id);
  146. writeb(0, &regs->sync_period);
  147. writeb(0, &regs->sync_offset);
  148. /* load the command into the FIFO */
  149. for (i = 0; i < cmd->cmd_len; ++i)
  150. writeb(cmd->cmnd[i], &regs->fifo);
  151. /* do select without ATN XXX */
  152. writeb(CMD_SELECT, &regs->command);
  153. state->phase = selecting;
  154. set_dma_cmds(state, cmd);
  155. }
  156. static irqreturn_t do_mac53c94_interrupt(int irq, void *dev_id)
  157. {
  158. unsigned long flags;
  159. struct Scsi_Host *dev = ((struct fsc_state *) dev_id)->current_req->device->host;
  160. spin_lock_irqsave(dev->host_lock, flags);
  161. mac53c94_interrupt(irq, dev_id);
  162. spin_unlock_irqrestore(dev->host_lock, flags);
  163. return IRQ_HANDLED;
  164. }
  165. static void mac53c94_interrupt(int irq, void *dev_id)
  166. {
  167. struct fsc_state *state = (struct fsc_state *) dev_id;
  168. struct mac53c94_regs __iomem *regs = state->regs;
  169. struct dbdma_regs __iomem *dma = state->dma;
  170. struct scsi_cmnd *cmd = state->current_req;
  171. int nb, stat, seq, intr;
  172. static int mac53c94_errors;
  173. /*
  174. * Apparently, reading the interrupt register unlatches
  175. * the status and sequence step registers.
  176. */
  177. seq = readb(&regs->seqstep);
  178. stat = readb(&regs->status);
  179. intr = readb(&regs->interrupt);
  180. #if 0
  181. printk(KERN_DEBUG "mac53c94_intr, intr=%x stat=%x seq=%x phase=%d\n",
  182. intr, stat, seq, state->phase);
  183. #endif
  184. if (intr & INTR_RESET) {
  185. /* SCSI bus was reset */
  186. printk(KERN_INFO "external SCSI bus reset detected\n");
  187. writeb(CMD_NOP, &regs->command);
  188. writel(RUN << 16, &dma->control); /* stop dma */
  189. cmd_done(state, DID_RESET << 16);
  190. return;
  191. }
  192. if (intr & INTR_ILL_CMD) {
  193. printk(KERN_ERR "53c94: invalid cmd, intr=%x stat=%x seq=%x phase=%d\n",
  194. intr, stat, seq, state->phase);
  195. cmd_done(state, DID_ERROR << 16);
  196. return;
  197. }
  198. if (stat & STAT_ERROR) {
  199. #if 0
  200. /* XXX these seem to be harmless? */
  201. printk("53c94: bad error, intr=%x stat=%x seq=%x phase=%d\n",
  202. intr, stat, seq, state->phase);
  203. #endif
  204. ++mac53c94_errors;
  205. writeb(CMD_NOP + CMD_DMA_MODE, &regs->command);
  206. }
  207. if (cmd == 0) {
  208. printk(KERN_DEBUG "53c94: interrupt with no command active?\n");
  209. return;
  210. }
  211. if (stat & STAT_PARITY) {
  212. printk(KERN_ERR "mac53c94: parity error\n");
  213. cmd_done(state, DID_PARITY << 16);
  214. return;
  215. }
  216. switch (state->phase) {
  217. case selecting:
  218. if (intr & INTR_DISCONNECT) {
  219. /* selection timed out */
  220. cmd_done(state, DID_BAD_TARGET << 16);
  221. return;
  222. }
  223. if (intr != INTR_BUS_SERV + INTR_DONE) {
  224. printk(KERN_DEBUG "got intr %x during selection\n", intr);
  225. cmd_done(state, DID_ERROR << 16);
  226. return;
  227. }
  228. if ((seq & SS_MASK) != SS_DONE) {
  229. printk(KERN_DEBUG "seq step %x after command\n", seq);
  230. cmd_done(state, DID_ERROR << 16);
  231. return;
  232. }
  233. writeb(CMD_NOP, &regs->command);
  234. /* set DMA controller going if any data to transfer */
  235. if ((stat & (STAT_MSG|STAT_CD)) == 0
  236. && (scsi_sg_count(cmd) > 0 || scsi_bufflen(cmd))) {
  237. nb = cmd->SCp.this_residual;
  238. if (nb > 0xfff0)
  239. nb = 0xfff0;
  240. cmd->SCp.this_residual -= nb;
  241. writeb(nb, &regs->count_lo);
  242. writeb(nb >> 8, &regs->count_mid);
  243. writeb(CMD_DMA_MODE + CMD_NOP, &regs->command);
  244. writel(virt_to_phys(state->dma_cmds), &dma->cmdptr);
  245. writel((RUN << 16) | RUN, &dma->control);
  246. writeb(CMD_DMA_MODE + CMD_XFER_DATA, &regs->command);
  247. state->phase = dataing;
  248. break;
  249. } else if ((stat & STAT_PHASE) == STAT_CD + STAT_IO) {
  250. /* up to status phase already */
  251. writeb(CMD_I_COMPLETE, &regs->command);
  252. state->phase = completing;
  253. } else {
  254. printk(KERN_DEBUG "in unexpected phase %x after cmd\n",
  255. stat & STAT_PHASE);
  256. cmd_done(state, DID_ERROR << 16);
  257. return;
  258. }
  259. break;
  260. case dataing:
  261. if (intr != INTR_BUS_SERV) {
  262. printk(KERN_DEBUG "got intr %x before status\n", intr);
  263. cmd_done(state, DID_ERROR << 16);
  264. return;
  265. }
  266. if (cmd->SCp.this_residual != 0
  267. && (stat & (STAT_MSG|STAT_CD)) == 0) {
  268. /* Set up the count regs to transfer more */
  269. nb = cmd->SCp.this_residual;
  270. if (nb > 0xfff0)
  271. nb = 0xfff0;
  272. cmd->SCp.this_residual -= nb;
  273. writeb(nb, &regs->count_lo);
  274. writeb(nb >> 8, &regs->count_mid);
  275. writeb(CMD_DMA_MODE + CMD_NOP, &regs->command);
  276. writeb(CMD_DMA_MODE + CMD_XFER_DATA, &regs->command);
  277. break;
  278. }
  279. if ((stat & STAT_PHASE) != STAT_CD + STAT_IO) {
  280. printk(KERN_DEBUG "intr %x before data xfer complete\n", intr);
  281. }
  282. writel(RUN << 16, &dma->control); /* stop dma */
  283. scsi_dma_unmap(cmd);
  284. /* should check dma status */
  285. writeb(CMD_I_COMPLETE, &regs->command);
  286. state->phase = completing;
  287. break;
  288. case completing:
  289. if (intr != INTR_DONE) {
  290. printk(KERN_DEBUG "got intr %x on completion\n", intr);
  291. cmd_done(state, DID_ERROR << 16);
  292. return;
  293. }
  294. cmd->SCp.Status = readb(&regs->fifo);
  295. cmd->SCp.Message = readb(&regs->fifo);
  296. cmd->result = CMD_ACCEPT_MSG;
  297. writeb(CMD_ACCEPT_MSG, &regs->command);
  298. state->phase = busfreeing;
  299. break;
  300. case busfreeing:
  301. if (intr != INTR_DISCONNECT) {
  302. printk(KERN_DEBUG "got intr %x when expected disconnect\n", intr);
  303. }
  304. cmd_done(state, (DID_OK << 16) + (cmd->SCp.Message << 8)
  305. + cmd->SCp.Status);
  306. break;
  307. default:
  308. printk(KERN_DEBUG "don't know about phase %d\n", state->phase);
  309. }
  310. }
  311. static void cmd_done(struct fsc_state *state, int result)
  312. {
  313. struct scsi_cmnd *cmd;
  314. cmd = state->current_req;
  315. if (cmd != 0) {
  316. cmd->result = result;
  317. (*cmd->scsi_done)(cmd);
  318. state->current_req = NULL;
  319. }
  320. state->phase = idle;
  321. mac53c94_start(state);
  322. }
  323. /*
  324. * Set up DMA commands for transferring data.
  325. */
  326. static void set_dma_cmds(struct fsc_state *state, struct scsi_cmnd *cmd)
  327. {
  328. int i, dma_cmd, total, nseg;
  329. struct scatterlist *scl;
  330. struct dbdma_cmd *dcmds;
  331. dma_addr_t dma_addr;
  332. u32 dma_len;
  333. nseg = scsi_dma_map(cmd);
  334. BUG_ON(nseg < 0);
  335. if (!nseg)
  336. return;
  337. dma_cmd = cmd->sc_data_direction == DMA_TO_DEVICE ?
  338. OUTPUT_MORE : INPUT_MORE;
  339. dcmds = state->dma_cmds;
  340. total = 0;
  341. scsi_for_each_sg(cmd, scl, nseg, i) {
  342. dma_addr = sg_dma_address(scl);
  343. dma_len = sg_dma_len(scl);
  344. if (dma_len > 0xffff)
  345. panic("mac53c94: scatterlist element >= 64k");
  346. total += dma_len;
  347. st_le16(&dcmds->req_count, dma_len);
  348. st_le16(&dcmds->command, dma_cmd);
  349. st_le32(&dcmds->phy_addr, dma_addr);
  350. dcmds->xfer_status = 0;
  351. ++dcmds;
  352. }
  353. dma_cmd += OUTPUT_LAST - OUTPUT_MORE;
  354. st_le16(&dcmds[-1].command, dma_cmd);
  355. st_le16(&dcmds->command, DBDMA_STOP);
  356. cmd->SCp.this_residual = total;
  357. }
  358. static struct scsi_host_template mac53c94_template = {
  359. .proc_name = "53c94",
  360. .name = "53C94",
  361. .queuecommand = mac53c94_queue,
  362. .eh_host_reset_handler = mac53c94_host_reset,
  363. .can_queue = 1,
  364. .this_id = 7,
  365. .sg_tablesize = SG_ALL,
  366. .cmd_per_lun = 1,
  367. .use_clustering = DISABLE_CLUSTERING,
  368. };
  369. static int mac53c94_probe(struct macio_dev *mdev, const struct of_device_id *match)
  370. {
  371. struct device_node *node = macio_get_of_node(mdev);
  372. struct pci_dev *pdev = macio_get_pci_dev(mdev);
  373. struct fsc_state *state;
  374. struct Scsi_Host *host;
  375. void *dma_cmd_space;
  376. const unsigned char *clkprop;
  377. int proplen, rc = -ENODEV;
  378. if (macio_resource_count(mdev) != 2 || macio_irq_count(mdev) != 2) {
  379. printk(KERN_ERR "mac53c94: expected 2 addrs and intrs"
  380. " (got %d/%d)\n",
  381. macio_resource_count(mdev), macio_irq_count(mdev));
  382. return -ENODEV;
  383. }
  384. if (macio_request_resources(mdev, "mac53c94") != 0) {
  385. printk(KERN_ERR "mac53c94: unable to request memory resources");
  386. return -EBUSY;
  387. }
  388. host = scsi_host_alloc(&mac53c94_template, sizeof(struct fsc_state));
  389. if (host == NULL) {
  390. printk(KERN_ERR "mac53c94: couldn't register host");
  391. rc = -ENOMEM;
  392. goto out_release;
  393. }
  394. state = (struct fsc_state *) host->hostdata;
  395. macio_set_drvdata(mdev, state);
  396. state->host = host;
  397. state->pdev = pdev;
  398. state->mdev = mdev;
  399. state->regs = (struct mac53c94_regs __iomem *)
  400. ioremap(macio_resource_start(mdev, 0), 0x1000);
  401. state->intr = macio_irq(mdev, 0);
  402. state->dma = (struct dbdma_regs __iomem *)
  403. ioremap(macio_resource_start(mdev, 1), 0x1000);
  404. state->dmaintr = macio_irq(mdev, 1);
  405. if (state->regs == NULL || state->dma == NULL) {
  406. printk(KERN_ERR "mac53c94: ioremap failed for %s\n",
  407. node->full_name);
  408. goto out_free;
  409. }
  410. clkprop = of_get_property(node, "clock-frequency", &proplen);
  411. if (clkprop == NULL || proplen != sizeof(int)) {
  412. printk(KERN_ERR "%s: can't get clock frequency, "
  413. "assuming 25MHz\n", node->full_name);
  414. state->clk_freq = 25000000;
  415. } else
  416. state->clk_freq = *(int *)clkprop;
  417. /* Space for dma command list: +1 for stop command,
  418. * +1 to allow for aligning.
  419. * XXX FIXME: Use DMA consistent routines
  420. */
  421. dma_cmd_space = kmalloc((host->sg_tablesize + 2) *
  422. sizeof(struct dbdma_cmd), GFP_KERNEL);
  423. if (dma_cmd_space == 0) {
  424. printk(KERN_ERR "mac53c94: couldn't allocate dma "
  425. "command space for %s\n", node->full_name);
  426. rc = -ENOMEM;
  427. goto out_free;
  428. }
  429. state->dma_cmds = (struct dbdma_cmd *)DBDMA_ALIGN(dma_cmd_space);
  430. memset(state->dma_cmds, 0, (host->sg_tablesize + 1)
  431. * sizeof(struct dbdma_cmd));
  432. state->dma_cmd_space = dma_cmd_space;
  433. mac53c94_init(state);
  434. if (request_irq(state->intr, do_mac53c94_interrupt, 0, "53C94",state)) {
  435. printk(KERN_ERR "mac53C94: can't get irq %d for %s\n",
  436. state->intr, node->full_name);
  437. goto out_free_dma;
  438. }
  439. rc = scsi_add_host(host, &mdev->ofdev.dev);
  440. if (rc != 0)
  441. goto out_release_irq;
  442. scsi_scan_host(host);
  443. return 0;
  444. out_release_irq:
  445. free_irq(state->intr, state);
  446. out_free_dma:
  447. kfree(state->dma_cmd_space);
  448. out_free:
  449. if (state->dma != NULL)
  450. iounmap(state->dma);
  451. if (state->regs != NULL)
  452. iounmap(state->regs);
  453. scsi_host_put(host);
  454. out_release:
  455. macio_release_resources(mdev);
  456. return rc;
  457. }
  458. static int mac53c94_remove(struct macio_dev *mdev)
  459. {
  460. struct fsc_state *fp = (struct fsc_state *)macio_get_drvdata(mdev);
  461. struct Scsi_Host *host = fp->host;
  462. scsi_remove_host(host);
  463. free_irq(fp->intr, fp);
  464. if (fp->regs)
  465. iounmap(fp->regs);
  466. if (fp->dma)
  467. iounmap(fp->dma);
  468. kfree(fp->dma_cmd_space);
  469. scsi_host_put(host);
  470. macio_release_resources(mdev);
  471. return 0;
  472. }
  473. static struct of_device_id mac53c94_match[] =
  474. {
  475. {
  476. .name = "53c94",
  477. },
  478. {},
  479. };
  480. MODULE_DEVICE_TABLE (of, mac53c94_match);
  481. static struct macio_driver mac53c94_driver =
  482. {
  483. .driver = {
  484. .name = "mac53c94",
  485. .owner = THIS_MODULE,
  486. .of_match_table = mac53c94_match,
  487. },
  488. .probe = mac53c94_probe,
  489. .remove = mac53c94_remove,
  490. };
  491. static int __init init_mac53c94(void)
  492. {
  493. return macio_register_driver(&mac53c94_driver);
  494. }
  495. static void __exit exit_mac53c94(void)
  496. {
  497. return macio_unregister_driver(&mac53c94_driver);
  498. }
  499. module_init(init_mac53c94);
  500. module_exit(exit_mac53c94);
  501. MODULE_DESCRIPTION("PowerMac 53c94 SCSI driver");
  502. MODULE_AUTHOR("Paul Mackerras <paulus@samba.org>");
  503. MODULE_LICENSE("GPL");