ipr.c 256 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394439543964397439843994400440144024403440444054406440744084409441044114412441344144415441644174418441944204421442244234424442544264427442844294430443144324433443444354436443744384439444044414442444344444445444644474448444944504451445244534454445544564457445844594460446144624463446444654466446744684469447044714472447344744475447644774478447944804481448244834484448544864487448844894490449144924493449444954496449744984499450045014502450345044505450645074508450945104511451245134514451545164517451845194520452145224523452445254526452745284529453045314532453345344535453645374538453945404541454245434544454545464547454845494550455145524553455445554556455745584559456045614562456345644565456645674568456945704571457245734574457545764577457845794580458145824583458445854586458745884589459045914592459345944595459645974598459946004601460246034604460546064607460846094610461146124613461446154616461746184619462046214622462346244625462646274628462946304631463246334634463546364637463846394640464146424643464446454646464746484649465046514652465346544655465646574658465946604661466246634664466546664667466846694670467146724673467446754676467746784679468046814682468346844685468646874688468946904691469246934694469546964697469846994700470147024703470447054706470747084709471047114712471347144715471647174718471947204721472247234724472547264727472847294730473147324733473447354736473747384739474047414742474347444745474647474748474947504751475247534754475547564757475847594760476147624763476447654766476747684769477047714772477347744775477647774778477947804781478247834784478547864787478847894790479147924793479447954796479747984799480048014802480348044805480648074808480948104811481248134814481548164817481848194820482148224823482448254826482748284829483048314832483348344835483648374838483948404841484248434844484548464847484848494850485148524853485448554856485748584859486048614862486348644865486648674868486948704871487248734874487548764877487848794880488148824883488448854886488748884889489048914892489348944895489648974898489949004901490249034904490549064907490849094910491149124913491449154916491749184919492049214922492349244925492649274928492949304931493249334934493549364937493849394940494149424943494449454946494749484949495049514952495349544955495649574958495949604961496249634964496549664967496849694970497149724973497449754976497749784979498049814982498349844985498649874988498949904991499249934994499549964997499849995000500150025003500450055006500750085009501050115012501350145015501650175018501950205021502250235024502550265027502850295030503150325033503450355036503750385039504050415042504350445045504650475048504950505051505250535054505550565057505850595060506150625063506450655066506750685069507050715072507350745075507650775078507950805081508250835084508550865087508850895090509150925093509450955096509750985099510051015102510351045105510651075108510951105111511251135114511551165117511851195120512151225123512451255126512751285129513051315132513351345135513651375138513951405141514251435144514551465147514851495150515151525153515451555156515751585159516051615162516351645165516651675168516951705171517251735174517551765177517851795180518151825183518451855186518751885189519051915192519351945195519651975198519952005201520252035204520552065207520852095210521152125213521452155216521752185219522052215222522352245225522652275228522952305231523252335234523552365237523852395240524152425243524452455246524752485249525052515252525352545255525652575258525952605261526252635264526552665267526852695270527152725273527452755276527752785279528052815282528352845285528652875288528952905291529252935294529552965297529852995300530153025303530453055306530753085309531053115312531353145315531653175318531953205321532253235324532553265327532853295330533153325333533453355336533753385339534053415342534353445345534653475348534953505351535253535354535553565357535853595360536153625363536453655366536753685369537053715372537353745375537653775378537953805381538253835384538553865387538853895390539153925393539453955396539753985399540054015402540354045405540654075408540954105411541254135414541554165417541854195420542154225423542454255426542754285429543054315432543354345435543654375438543954405441544254435444544554465447544854495450545154525453545454555456545754585459546054615462546354645465546654675468546954705471547254735474547554765477547854795480548154825483548454855486548754885489549054915492549354945495549654975498549955005501550255035504550555065507550855095510551155125513551455155516551755185519552055215522552355245525552655275528552955305531553255335534553555365537553855395540554155425543554455455546554755485549555055515552555355545555555655575558555955605561556255635564556555665567556855695570557155725573557455755576557755785579558055815582558355845585558655875588558955905591559255935594559555965597559855995600560156025603560456055606560756085609561056115612561356145615561656175618561956205621562256235624562556265627562856295630563156325633563456355636563756385639564056415642564356445645564656475648564956505651565256535654565556565657565856595660566156625663566456655666566756685669567056715672567356745675567656775678567956805681568256835684568556865687568856895690569156925693569456955696569756985699570057015702570357045705570657075708570957105711571257135714571557165717571857195720572157225723572457255726572757285729573057315732573357345735573657375738573957405741574257435744574557465747574857495750575157525753575457555756575757585759576057615762576357645765576657675768576957705771577257735774577557765777577857795780578157825783578457855786578757885789579057915792579357945795579657975798579958005801580258035804580558065807580858095810581158125813581458155816581758185819582058215822582358245825582658275828582958305831583258335834583558365837583858395840584158425843584458455846584758485849585058515852585358545855585658575858585958605861586258635864586558665867586858695870587158725873587458755876587758785879588058815882588358845885588658875888588958905891589258935894589558965897589858995900590159025903590459055906590759085909591059115912591359145915591659175918591959205921592259235924592559265927592859295930593159325933593459355936593759385939594059415942594359445945594659475948594959505951595259535954595559565957595859595960596159625963596459655966596759685969597059715972597359745975597659775978597959805981598259835984598559865987598859895990599159925993599459955996599759985999600060016002600360046005600660076008600960106011601260136014601560166017601860196020602160226023602460256026602760286029603060316032603360346035603660376038603960406041604260436044604560466047604860496050605160526053605460556056605760586059606060616062606360646065606660676068606960706071607260736074607560766077607860796080608160826083608460856086608760886089609060916092609360946095609660976098609961006101610261036104610561066107610861096110611161126113611461156116611761186119612061216122612361246125612661276128612961306131613261336134613561366137613861396140614161426143614461456146614761486149615061516152615361546155615661576158615961606161616261636164616561666167616861696170617161726173617461756176617761786179618061816182618361846185618661876188618961906191619261936194619561966197619861996200620162026203620462056206620762086209621062116212621362146215621662176218621962206221622262236224622562266227622862296230623162326233623462356236623762386239624062416242624362446245624662476248624962506251625262536254625562566257625862596260626162626263626462656266626762686269627062716272627362746275627662776278627962806281628262836284628562866287628862896290629162926293629462956296629762986299630063016302630363046305630663076308630963106311631263136314631563166317631863196320632163226323632463256326632763286329633063316332633363346335633663376338633963406341634263436344634563466347634863496350635163526353635463556356635763586359636063616362636363646365636663676368636963706371637263736374637563766377637863796380638163826383638463856386638763886389639063916392639363946395639663976398639964006401640264036404640564066407640864096410641164126413641464156416641764186419642064216422642364246425642664276428642964306431643264336434643564366437643864396440644164426443644464456446644764486449645064516452645364546455645664576458645964606461646264636464646564666467646864696470647164726473647464756476647764786479648064816482648364846485648664876488648964906491649264936494649564966497649864996500650165026503650465056506650765086509651065116512651365146515651665176518651965206521652265236524652565266527652865296530653165326533653465356536653765386539654065416542654365446545654665476548654965506551655265536554655565566557655865596560656165626563656465656566656765686569657065716572657365746575657665776578657965806581658265836584658565866587658865896590659165926593659465956596659765986599660066016602660366046605660666076608660966106611661266136614661566166617661866196620662166226623662466256626662766286629663066316632663366346635663666376638663966406641664266436644664566466647664866496650665166526653665466556656665766586659666066616662666366646665666666676668666966706671667266736674667566766677667866796680668166826683668466856686668766886689669066916692669366946695669666976698669967006701670267036704670567066707670867096710671167126713671467156716671767186719672067216722672367246725672667276728672967306731673267336734673567366737673867396740674167426743674467456746674767486749675067516752675367546755675667576758675967606761676267636764676567666767676867696770677167726773677467756776677767786779678067816782678367846785678667876788678967906791679267936794679567966797679867996800680168026803680468056806680768086809681068116812681368146815681668176818681968206821682268236824682568266827682868296830683168326833683468356836683768386839684068416842684368446845684668476848684968506851685268536854685568566857685868596860686168626863686468656866686768686869687068716872687368746875687668776878687968806881688268836884688568866887688868896890689168926893689468956896689768986899690069016902690369046905690669076908690969106911691269136914691569166917691869196920692169226923692469256926692769286929693069316932693369346935693669376938693969406941694269436944694569466947694869496950695169526953695469556956695769586959696069616962696369646965696669676968696969706971697269736974697569766977697869796980698169826983698469856986698769886989699069916992699369946995699669976998699970007001700270037004700570067007700870097010701170127013701470157016701770187019702070217022702370247025702670277028702970307031703270337034703570367037703870397040704170427043704470457046704770487049705070517052705370547055705670577058705970607061706270637064706570667067706870697070707170727073707470757076707770787079708070817082708370847085708670877088708970907091709270937094709570967097709870997100710171027103710471057106710771087109711071117112711371147115711671177118711971207121712271237124712571267127712871297130713171327133713471357136713771387139714071417142714371447145714671477148714971507151715271537154715571567157715871597160716171627163716471657166716771687169717071717172717371747175717671777178717971807181718271837184718571867187718871897190719171927193719471957196719771987199720072017202720372047205720672077208720972107211721272137214721572167217721872197220722172227223722472257226722772287229723072317232723372347235723672377238723972407241724272437244724572467247724872497250725172527253725472557256725772587259726072617262726372647265726672677268726972707271727272737274727572767277727872797280728172827283728472857286728772887289729072917292729372947295729672977298729973007301730273037304730573067307730873097310731173127313731473157316731773187319732073217322732373247325732673277328732973307331733273337334733573367337733873397340734173427343734473457346734773487349735073517352735373547355735673577358735973607361736273637364736573667367736873697370737173727373737473757376737773787379738073817382738373847385738673877388738973907391739273937394739573967397739873997400740174027403740474057406740774087409741074117412741374147415741674177418741974207421742274237424742574267427742874297430743174327433743474357436743774387439744074417442744374447445744674477448744974507451745274537454745574567457745874597460746174627463746474657466746774687469747074717472747374747475747674777478747974807481748274837484748574867487748874897490749174927493749474957496749774987499750075017502750375047505750675077508750975107511751275137514751575167517751875197520752175227523752475257526752775287529753075317532753375347535753675377538753975407541754275437544754575467547754875497550755175527553755475557556755775587559756075617562756375647565756675677568756975707571757275737574757575767577757875797580758175827583758475857586758775887589759075917592759375947595759675977598759976007601760276037604760576067607760876097610761176127613761476157616761776187619762076217622762376247625762676277628762976307631763276337634763576367637763876397640764176427643764476457646764776487649765076517652765376547655765676577658765976607661766276637664766576667667766876697670767176727673767476757676767776787679768076817682768376847685768676877688768976907691769276937694769576967697769876997700770177027703770477057706770777087709771077117712771377147715771677177718771977207721772277237724772577267727772877297730773177327733773477357736773777387739774077417742774377447745774677477748774977507751775277537754775577567757775877597760776177627763776477657766776777687769777077717772777377747775777677777778777977807781778277837784778577867787778877897790779177927793779477957796779777987799780078017802780378047805780678077808780978107811781278137814781578167817781878197820782178227823782478257826782778287829783078317832783378347835783678377838783978407841784278437844784578467847784878497850785178527853785478557856785778587859786078617862786378647865786678677868786978707871787278737874787578767877787878797880788178827883788478857886788778887889789078917892789378947895789678977898789979007901790279037904790579067907790879097910791179127913791479157916791779187919792079217922792379247925792679277928792979307931793279337934793579367937793879397940794179427943794479457946794779487949795079517952795379547955795679577958795979607961796279637964796579667967796879697970797179727973797479757976797779787979798079817982798379847985798679877988798979907991799279937994799579967997799879998000800180028003800480058006800780088009801080118012801380148015801680178018801980208021802280238024802580268027802880298030803180328033803480358036803780388039804080418042804380448045804680478048804980508051805280538054805580568057805880598060806180628063806480658066806780688069807080718072807380748075807680778078807980808081808280838084808580868087808880898090809180928093809480958096809780988099810081018102810381048105810681078108810981108111811281138114811581168117811881198120812181228123812481258126812781288129813081318132813381348135813681378138813981408141814281438144814581468147814881498150815181528153815481558156815781588159816081618162816381648165816681678168816981708171817281738174817581768177817881798180818181828183818481858186818781888189819081918192819381948195819681978198819982008201820282038204820582068207820882098210821182128213821482158216821782188219822082218222822382248225822682278228822982308231823282338234823582368237823882398240824182428243824482458246824782488249825082518252825382548255825682578258825982608261826282638264826582668267826882698270827182728273827482758276827782788279828082818282828382848285828682878288828982908291829282938294829582968297829882998300830183028303830483058306830783088309831083118312831383148315831683178318831983208321832283238324832583268327832883298330833183328333833483358336833783388339834083418342834383448345834683478348834983508351835283538354835583568357835883598360836183628363836483658366836783688369837083718372837383748375837683778378837983808381838283838384838583868387838883898390839183928393839483958396839783988399840084018402840384048405840684078408840984108411841284138414841584168417841884198420842184228423842484258426842784288429843084318432843384348435843684378438843984408441844284438444844584468447844884498450845184528453845484558456845784588459846084618462846384648465846684678468846984708471847284738474847584768477847884798480848184828483848484858486848784888489849084918492849384948495849684978498849985008501850285038504850585068507850885098510851185128513851485158516851785188519852085218522852385248525852685278528852985308531853285338534853585368537853885398540854185428543854485458546854785488549855085518552855385548555855685578558855985608561856285638564856585668567856885698570857185728573857485758576857785788579858085818582858385848585858685878588858985908591859285938594859585968597859885998600860186028603860486058606860786088609861086118612861386148615861686178618861986208621862286238624862586268627862886298630863186328633863486358636863786388639864086418642864386448645864686478648864986508651865286538654865586568657865886598660866186628663866486658666866786688669867086718672867386748675867686778678867986808681868286838684868586868687868886898690869186928693869486958696869786988699870087018702870387048705870687078708870987108711871287138714871587168717871887198720872187228723872487258726872787288729873087318732873387348735873687378738873987408741874287438744874587468747874887498750875187528753875487558756875787588759876087618762876387648765876687678768876987708771877287738774877587768777877887798780878187828783878487858786878787888789879087918792879387948795879687978798879988008801880288038804880588068807880888098810881188128813881488158816881788188819882088218822882388248825882688278828882988308831883288338834883588368837883888398840884188428843884488458846884788488849885088518852885388548855885688578858885988608861886288638864886588668867886888698870887188728873887488758876887788788879888088818882888388848885888688878888888988908891889288938894889588968897889888998900890189028903890489058906890789088909891089118912891389148915891689178918891989208921892289238924892589268927892889298930893189328933893489358936893789388939894089418942894389448945894689478948894989508951895289538954895589568957895889598960896189628963896489658966896789688969897089718972897389748975897689778978897989808981898289838984898589868987898889898990899189928993899489958996899789988999900090019002900390049005900690079008900990109011901290139014901590169017901890199020902190229023902490259026902790289029903090319032903390349035903690379038903990409041904290439044904590469047904890499050905190529053905490559056905790589059906090619062906390649065906690679068906990709071907290739074907590769077907890799080908190829083908490859086908790889089909090919092909390949095909690979098909991009101910291039104910591069107910891099110911191129113911491159116911791189119912091219122912391249125912691279128912991309131913291339134913591369137913891399140914191429143914491459146914791489149915091519152915391549155915691579158915991609161916291639164916591669167916891699170917191729173917491759176917791789179918091819182918391849185918691879188918991909191919291939194919591969197919891999200920192029203920492059206920792089209921092119212921392149215921692179218921992209221922292239224922592269227922892299230923192329233923492359236923792389239924092419242
  1. /*
  2. * ipr.c -- driver for IBM Power Linux RAID adapters
  3. *
  4. * Written By: Brian King <brking@us.ibm.com>, IBM Corporation
  5. *
  6. * Copyright (C) 2003, 2004 IBM Corporation
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. /*
  24. * Notes:
  25. *
  26. * This driver is used to control the following SCSI adapters:
  27. *
  28. * IBM iSeries: 5702, 5703, 2780, 5709, 570A, 570B
  29. *
  30. * IBM pSeries: PCI-X Dual Channel Ultra 320 SCSI RAID Adapter
  31. * PCI-X Dual Channel Ultra 320 SCSI Adapter
  32. * PCI-X Dual Channel Ultra 320 SCSI RAID Enablement Card
  33. * Embedded SCSI adapter on p615 and p655 systems
  34. *
  35. * Supported Hardware Features:
  36. * - Ultra 320 SCSI controller
  37. * - PCI-X host interface
  38. * - Embedded PowerPC RISC Processor and Hardware XOR DMA Engine
  39. * - Non-Volatile Write Cache
  40. * - Supports attachment of non-RAID disks, tape, and optical devices
  41. * - RAID Levels 0, 5, 10
  42. * - Hot spare
  43. * - Background Parity Checking
  44. * - Background Data Scrubbing
  45. * - Ability to increase the capacity of an existing RAID 5 disk array
  46. * by adding disks
  47. *
  48. * Driver Features:
  49. * - Tagged command queuing
  50. * - Adapter microcode download
  51. * - PCI hot plug
  52. * - SCSI device hot plug
  53. *
  54. */
  55. #include <linux/fs.h>
  56. #include <linux/init.h>
  57. #include <linux/types.h>
  58. #include <linux/errno.h>
  59. #include <linux/kernel.h>
  60. #include <linux/slab.h>
  61. #include <linux/vmalloc.h>
  62. #include <linux/ioport.h>
  63. #include <linux/delay.h>
  64. #include <linux/pci.h>
  65. #include <linux/wait.h>
  66. #include <linux/spinlock.h>
  67. #include <linux/sched.h>
  68. #include <linux/interrupt.h>
  69. #include <linux/blkdev.h>
  70. #include <linux/firmware.h>
  71. #include <linux/module.h>
  72. #include <linux/moduleparam.h>
  73. #include <linux/libata.h>
  74. #include <linux/hdreg.h>
  75. #include <linux/reboot.h>
  76. #include <linux/stringify.h>
  77. #include <asm/io.h>
  78. #include <asm/irq.h>
  79. #include <asm/processor.h>
  80. #include <scsi/scsi.h>
  81. #include <scsi/scsi_host.h>
  82. #include <scsi/scsi_tcq.h>
  83. #include <scsi/scsi_eh.h>
  84. #include <scsi/scsi_cmnd.h>
  85. #include "ipr.h"
  86. /*
  87. * Global Data
  88. */
  89. static LIST_HEAD(ipr_ioa_head);
  90. static unsigned int ipr_log_level = IPR_DEFAULT_LOG_LEVEL;
  91. static unsigned int ipr_max_speed = 1;
  92. static int ipr_testmode = 0;
  93. static unsigned int ipr_fastfail = 0;
  94. static unsigned int ipr_transop_timeout = 0;
  95. static unsigned int ipr_debug = 0;
  96. static unsigned int ipr_max_devs = IPR_DEFAULT_SIS64_DEVS;
  97. static unsigned int ipr_dual_ioa_raid = 1;
  98. static DEFINE_SPINLOCK(ipr_driver_lock);
  99. /* This table describes the differences between DMA controller chips */
  100. static const struct ipr_chip_cfg_t ipr_chip_cfg[] = {
  101. { /* Gemstone, Citrine, Obsidian, and Obsidian-E */
  102. .mailbox = 0x0042C,
  103. .cache_line_size = 0x20,
  104. {
  105. .set_interrupt_mask_reg = 0x0022C,
  106. .clr_interrupt_mask_reg = 0x00230,
  107. .clr_interrupt_mask_reg32 = 0x00230,
  108. .sense_interrupt_mask_reg = 0x0022C,
  109. .sense_interrupt_mask_reg32 = 0x0022C,
  110. .clr_interrupt_reg = 0x00228,
  111. .clr_interrupt_reg32 = 0x00228,
  112. .sense_interrupt_reg = 0x00224,
  113. .sense_interrupt_reg32 = 0x00224,
  114. .ioarrin_reg = 0x00404,
  115. .sense_uproc_interrupt_reg = 0x00214,
  116. .sense_uproc_interrupt_reg32 = 0x00214,
  117. .set_uproc_interrupt_reg = 0x00214,
  118. .set_uproc_interrupt_reg32 = 0x00214,
  119. .clr_uproc_interrupt_reg = 0x00218,
  120. .clr_uproc_interrupt_reg32 = 0x00218
  121. }
  122. },
  123. { /* Snipe and Scamp */
  124. .mailbox = 0x0052C,
  125. .cache_line_size = 0x20,
  126. {
  127. .set_interrupt_mask_reg = 0x00288,
  128. .clr_interrupt_mask_reg = 0x0028C,
  129. .clr_interrupt_mask_reg32 = 0x0028C,
  130. .sense_interrupt_mask_reg = 0x00288,
  131. .sense_interrupt_mask_reg32 = 0x00288,
  132. .clr_interrupt_reg = 0x00284,
  133. .clr_interrupt_reg32 = 0x00284,
  134. .sense_interrupt_reg = 0x00280,
  135. .sense_interrupt_reg32 = 0x00280,
  136. .ioarrin_reg = 0x00504,
  137. .sense_uproc_interrupt_reg = 0x00290,
  138. .sense_uproc_interrupt_reg32 = 0x00290,
  139. .set_uproc_interrupt_reg = 0x00290,
  140. .set_uproc_interrupt_reg32 = 0x00290,
  141. .clr_uproc_interrupt_reg = 0x00294,
  142. .clr_uproc_interrupt_reg32 = 0x00294
  143. }
  144. },
  145. { /* CRoC */
  146. .mailbox = 0x00044,
  147. .cache_line_size = 0x20,
  148. {
  149. .set_interrupt_mask_reg = 0x00010,
  150. .clr_interrupt_mask_reg = 0x00018,
  151. .clr_interrupt_mask_reg32 = 0x0001C,
  152. .sense_interrupt_mask_reg = 0x00010,
  153. .sense_interrupt_mask_reg32 = 0x00014,
  154. .clr_interrupt_reg = 0x00008,
  155. .clr_interrupt_reg32 = 0x0000C,
  156. .sense_interrupt_reg = 0x00000,
  157. .sense_interrupt_reg32 = 0x00004,
  158. .ioarrin_reg = 0x00070,
  159. .sense_uproc_interrupt_reg = 0x00020,
  160. .sense_uproc_interrupt_reg32 = 0x00024,
  161. .set_uproc_interrupt_reg = 0x00020,
  162. .set_uproc_interrupt_reg32 = 0x00024,
  163. .clr_uproc_interrupt_reg = 0x00028,
  164. .clr_uproc_interrupt_reg32 = 0x0002C,
  165. .init_feedback_reg = 0x0005C,
  166. .dump_addr_reg = 0x00064,
  167. .dump_data_reg = 0x00068,
  168. .endian_swap_reg = 0x00084
  169. }
  170. },
  171. };
  172. static const struct ipr_chip_t ipr_chip[] = {
  173. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  174. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  175. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  176. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  177. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E, IPR_USE_MSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  178. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_SNIPE, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[1] },
  179. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[1] },
  180. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2, IPR_USE_MSI, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] },
  181. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_ASIC_E2, IPR_USE_MSI, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] }
  182. };
  183. static int ipr_max_bus_speeds [] = {
  184. IPR_80MBs_SCSI_RATE, IPR_U160_SCSI_RATE, IPR_U320_SCSI_RATE
  185. };
  186. MODULE_AUTHOR("Brian King <brking@us.ibm.com>");
  187. MODULE_DESCRIPTION("IBM Power RAID SCSI Adapter Driver");
  188. module_param_named(max_speed, ipr_max_speed, uint, 0);
  189. MODULE_PARM_DESC(max_speed, "Maximum bus speed (0-2). Default: 1=U160. Speeds: 0=80 MB/s, 1=U160, 2=U320");
  190. module_param_named(log_level, ipr_log_level, uint, 0);
  191. MODULE_PARM_DESC(log_level, "Set to 0 - 4 for increasing verbosity of device driver");
  192. module_param_named(testmode, ipr_testmode, int, 0);
  193. MODULE_PARM_DESC(testmode, "DANGEROUS!!! Allows unsupported configurations");
  194. module_param_named(fastfail, ipr_fastfail, int, S_IRUGO | S_IWUSR);
  195. MODULE_PARM_DESC(fastfail, "Reduce timeouts and retries");
  196. module_param_named(transop_timeout, ipr_transop_timeout, int, 0);
  197. MODULE_PARM_DESC(transop_timeout, "Time in seconds to wait for adapter to come operational (default: 300)");
  198. module_param_named(debug, ipr_debug, int, S_IRUGO | S_IWUSR);
  199. MODULE_PARM_DESC(debug, "Enable device driver debugging logging. Set to 1 to enable. (default: 0)");
  200. module_param_named(dual_ioa_raid, ipr_dual_ioa_raid, int, 0);
  201. MODULE_PARM_DESC(dual_ioa_raid, "Enable dual adapter RAID support. Set to 1 to enable. (default: 1)");
  202. module_param_named(max_devs, ipr_max_devs, int, 0);
  203. MODULE_PARM_DESC(max_devs, "Specify the maximum number of physical devices. "
  204. "[Default=" __stringify(IPR_DEFAULT_SIS64_DEVS) "]");
  205. MODULE_LICENSE("GPL");
  206. MODULE_VERSION(IPR_DRIVER_VERSION);
  207. /* A constant array of IOASCs/URCs/Error Messages */
  208. static const
  209. struct ipr_error_table_t ipr_error_table[] = {
  210. {0x00000000, 1, IPR_DEFAULT_LOG_LEVEL,
  211. "8155: An unknown error was received"},
  212. {0x00330000, 0, 0,
  213. "Soft underlength error"},
  214. {0x005A0000, 0, 0,
  215. "Command to be cancelled not found"},
  216. {0x00808000, 0, 0,
  217. "Qualified success"},
  218. {0x01080000, 1, IPR_DEFAULT_LOG_LEVEL,
  219. "FFFE: Soft device bus error recovered by the IOA"},
  220. {0x01088100, 0, IPR_DEFAULT_LOG_LEVEL,
  221. "4101: Soft device bus fabric error"},
  222. {0x01100100, 0, IPR_DEFAULT_LOG_LEVEL,
  223. "FFFC: Logical block guard error recovered by the device"},
  224. {0x01100300, 0, IPR_DEFAULT_LOG_LEVEL,
  225. "FFFC: Logical block reference tag error recovered by the device"},
  226. {0x01108300, 0, IPR_DEFAULT_LOG_LEVEL,
  227. "4171: Recovered scatter list tag / sequence number error"},
  228. {0x01109000, 0, IPR_DEFAULT_LOG_LEVEL,
  229. "FF3D: Recovered logical block CRC error on IOA to Host transfer"},
  230. {0x01109200, 0, IPR_DEFAULT_LOG_LEVEL,
  231. "4171: Recovered logical block sequence number error on IOA to Host transfer"},
  232. {0x0110A000, 0, IPR_DEFAULT_LOG_LEVEL,
  233. "FFFD: Recovered logical block reference tag error detected by the IOA"},
  234. {0x0110A100, 0, IPR_DEFAULT_LOG_LEVEL,
  235. "FFFD: Logical block guard error recovered by the IOA"},
  236. {0x01170600, 0, IPR_DEFAULT_LOG_LEVEL,
  237. "FFF9: Device sector reassign successful"},
  238. {0x01170900, 0, IPR_DEFAULT_LOG_LEVEL,
  239. "FFF7: Media error recovered by device rewrite procedures"},
  240. {0x01180200, 0, IPR_DEFAULT_LOG_LEVEL,
  241. "7001: IOA sector reassignment successful"},
  242. {0x01180500, 0, IPR_DEFAULT_LOG_LEVEL,
  243. "FFF9: Soft media error. Sector reassignment recommended"},
  244. {0x01180600, 0, IPR_DEFAULT_LOG_LEVEL,
  245. "FFF7: Media error recovered by IOA rewrite procedures"},
  246. {0x01418000, 0, IPR_DEFAULT_LOG_LEVEL,
  247. "FF3D: Soft PCI bus error recovered by the IOA"},
  248. {0x01440000, 1, IPR_DEFAULT_LOG_LEVEL,
  249. "FFF6: Device hardware error recovered by the IOA"},
  250. {0x01448100, 0, IPR_DEFAULT_LOG_LEVEL,
  251. "FFF6: Device hardware error recovered by the device"},
  252. {0x01448200, 1, IPR_DEFAULT_LOG_LEVEL,
  253. "FF3D: Soft IOA error recovered by the IOA"},
  254. {0x01448300, 0, IPR_DEFAULT_LOG_LEVEL,
  255. "FFFA: Undefined device response recovered by the IOA"},
  256. {0x014A0000, 1, IPR_DEFAULT_LOG_LEVEL,
  257. "FFF6: Device bus error, message or command phase"},
  258. {0x014A8000, 0, IPR_DEFAULT_LOG_LEVEL,
  259. "FFFE: Task Management Function failed"},
  260. {0x015D0000, 0, IPR_DEFAULT_LOG_LEVEL,
  261. "FFF6: Failure prediction threshold exceeded"},
  262. {0x015D9200, 0, IPR_DEFAULT_LOG_LEVEL,
  263. "8009: Impending cache battery pack failure"},
  264. {0x02040400, 0, 0,
  265. "34FF: Disk device format in progress"},
  266. {0x02048000, 0, IPR_DEFAULT_LOG_LEVEL,
  267. "9070: IOA requested reset"},
  268. {0x023F0000, 0, 0,
  269. "Synchronization required"},
  270. {0x024E0000, 0, 0,
  271. "No ready, IOA shutdown"},
  272. {0x025A0000, 0, 0,
  273. "Not ready, IOA has been shutdown"},
  274. {0x02670100, 0, IPR_DEFAULT_LOG_LEVEL,
  275. "3020: Storage subsystem configuration error"},
  276. {0x03110B00, 0, 0,
  277. "FFF5: Medium error, data unreadable, recommend reassign"},
  278. {0x03110C00, 0, 0,
  279. "7000: Medium error, data unreadable, do not reassign"},
  280. {0x03310000, 0, IPR_DEFAULT_LOG_LEVEL,
  281. "FFF3: Disk media format bad"},
  282. {0x04050000, 0, IPR_DEFAULT_LOG_LEVEL,
  283. "3002: Addressed device failed to respond to selection"},
  284. {0x04080000, 1, IPR_DEFAULT_LOG_LEVEL,
  285. "3100: Device bus error"},
  286. {0x04080100, 0, IPR_DEFAULT_LOG_LEVEL,
  287. "3109: IOA timed out a device command"},
  288. {0x04088000, 0, 0,
  289. "3120: SCSI bus is not operational"},
  290. {0x04088100, 0, IPR_DEFAULT_LOG_LEVEL,
  291. "4100: Hard device bus fabric error"},
  292. {0x04100100, 0, IPR_DEFAULT_LOG_LEVEL,
  293. "310C: Logical block guard error detected by the device"},
  294. {0x04100300, 0, IPR_DEFAULT_LOG_LEVEL,
  295. "310C: Logical block reference tag error detected by the device"},
  296. {0x04108300, 1, IPR_DEFAULT_LOG_LEVEL,
  297. "4170: Scatter list tag / sequence number error"},
  298. {0x04109000, 1, IPR_DEFAULT_LOG_LEVEL,
  299. "8150: Logical block CRC error on IOA to Host transfer"},
  300. {0x04109200, 1, IPR_DEFAULT_LOG_LEVEL,
  301. "4170: Logical block sequence number error on IOA to Host transfer"},
  302. {0x0410A000, 0, IPR_DEFAULT_LOG_LEVEL,
  303. "310D: Logical block reference tag error detected by the IOA"},
  304. {0x0410A100, 0, IPR_DEFAULT_LOG_LEVEL,
  305. "310D: Logical block guard error detected by the IOA"},
  306. {0x04118000, 0, IPR_DEFAULT_LOG_LEVEL,
  307. "9000: IOA reserved area data check"},
  308. {0x04118100, 0, IPR_DEFAULT_LOG_LEVEL,
  309. "9001: IOA reserved area invalid data pattern"},
  310. {0x04118200, 0, IPR_DEFAULT_LOG_LEVEL,
  311. "9002: IOA reserved area LRC error"},
  312. {0x04118300, 1, IPR_DEFAULT_LOG_LEVEL,
  313. "Hardware Error, IOA metadata access error"},
  314. {0x04320000, 0, IPR_DEFAULT_LOG_LEVEL,
  315. "102E: Out of alternate sectors for disk storage"},
  316. {0x04330000, 1, IPR_DEFAULT_LOG_LEVEL,
  317. "FFF4: Data transfer underlength error"},
  318. {0x04338000, 1, IPR_DEFAULT_LOG_LEVEL,
  319. "FFF4: Data transfer overlength error"},
  320. {0x043E0100, 0, IPR_DEFAULT_LOG_LEVEL,
  321. "3400: Logical unit failure"},
  322. {0x04408500, 0, IPR_DEFAULT_LOG_LEVEL,
  323. "FFF4: Device microcode is corrupt"},
  324. {0x04418000, 1, IPR_DEFAULT_LOG_LEVEL,
  325. "8150: PCI bus error"},
  326. {0x04430000, 1, 0,
  327. "Unsupported device bus message received"},
  328. {0x04440000, 1, IPR_DEFAULT_LOG_LEVEL,
  329. "FFF4: Disk device problem"},
  330. {0x04448200, 1, IPR_DEFAULT_LOG_LEVEL,
  331. "8150: Permanent IOA failure"},
  332. {0x04448300, 0, IPR_DEFAULT_LOG_LEVEL,
  333. "3010: Disk device returned wrong response to IOA"},
  334. {0x04448400, 0, IPR_DEFAULT_LOG_LEVEL,
  335. "8151: IOA microcode error"},
  336. {0x04448500, 0, 0,
  337. "Device bus status error"},
  338. {0x04448600, 0, IPR_DEFAULT_LOG_LEVEL,
  339. "8157: IOA error requiring IOA reset to recover"},
  340. {0x04448700, 0, 0,
  341. "ATA device status error"},
  342. {0x04490000, 0, 0,
  343. "Message reject received from the device"},
  344. {0x04449200, 0, IPR_DEFAULT_LOG_LEVEL,
  345. "8008: A permanent cache battery pack failure occurred"},
  346. {0x0444A000, 0, IPR_DEFAULT_LOG_LEVEL,
  347. "9090: Disk unit has been modified after the last known status"},
  348. {0x0444A200, 0, IPR_DEFAULT_LOG_LEVEL,
  349. "9081: IOA detected device error"},
  350. {0x0444A300, 0, IPR_DEFAULT_LOG_LEVEL,
  351. "9082: IOA detected device error"},
  352. {0x044A0000, 1, IPR_DEFAULT_LOG_LEVEL,
  353. "3110: Device bus error, message or command phase"},
  354. {0x044A8000, 1, IPR_DEFAULT_LOG_LEVEL,
  355. "3110: SAS Command / Task Management Function failed"},
  356. {0x04670400, 0, IPR_DEFAULT_LOG_LEVEL,
  357. "9091: Incorrect hardware configuration change has been detected"},
  358. {0x04678000, 0, IPR_DEFAULT_LOG_LEVEL,
  359. "9073: Invalid multi-adapter configuration"},
  360. {0x04678100, 0, IPR_DEFAULT_LOG_LEVEL,
  361. "4010: Incorrect connection between cascaded expanders"},
  362. {0x04678200, 0, IPR_DEFAULT_LOG_LEVEL,
  363. "4020: Connections exceed IOA design limits"},
  364. {0x04678300, 0, IPR_DEFAULT_LOG_LEVEL,
  365. "4030: Incorrect multipath connection"},
  366. {0x04679000, 0, IPR_DEFAULT_LOG_LEVEL,
  367. "4110: Unsupported enclosure function"},
  368. {0x046E0000, 0, IPR_DEFAULT_LOG_LEVEL,
  369. "FFF4: Command to logical unit failed"},
  370. {0x05240000, 1, 0,
  371. "Illegal request, invalid request type or request packet"},
  372. {0x05250000, 0, 0,
  373. "Illegal request, invalid resource handle"},
  374. {0x05258000, 0, 0,
  375. "Illegal request, commands not allowed to this device"},
  376. {0x05258100, 0, 0,
  377. "Illegal request, command not allowed to a secondary adapter"},
  378. {0x05258200, 0, 0,
  379. "Illegal request, command not allowed to a non-optimized resource"},
  380. {0x05260000, 0, 0,
  381. "Illegal request, invalid field in parameter list"},
  382. {0x05260100, 0, 0,
  383. "Illegal request, parameter not supported"},
  384. {0x05260200, 0, 0,
  385. "Illegal request, parameter value invalid"},
  386. {0x052C0000, 0, 0,
  387. "Illegal request, command sequence error"},
  388. {0x052C8000, 1, 0,
  389. "Illegal request, dual adapter support not enabled"},
  390. {0x06040500, 0, IPR_DEFAULT_LOG_LEVEL,
  391. "9031: Array protection temporarily suspended, protection resuming"},
  392. {0x06040600, 0, IPR_DEFAULT_LOG_LEVEL,
  393. "9040: Array protection temporarily suspended, protection resuming"},
  394. {0x06288000, 0, IPR_DEFAULT_LOG_LEVEL,
  395. "3140: Device bus not ready to ready transition"},
  396. {0x06290000, 0, IPR_DEFAULT_LOG_LEVEL,
  397. "FFFB: SCSI bus was reset"},
  398. {0x06290500, 0, 0,
  399. "FFFE: SCSI bus transition to single ended"},
  400. {0x06290600, 0, 0,
  401. "FFFE: SCSI bus transition to LVD"},
  402. {0x06298000, 0, IPR_DEFAULT_LOG_LEVEL,
  403. "FFFB: SCSI bus was reset by another initiator"},
  404. {0x063F0300, 0, IPR_DEFAULT_LOG_LEVEL,
  405. "3029: A device replacement has occurred"},
  406. {0x064C8000, 0, IPR_DEFAULT_LOG_LEVEL,
  407. "9051: IOA cache data exists for a missing or failed device"},
  408. {0x064C8100, 0, IPR_DEFAULT_LOG_LEVEL,
  409. "9055: Auxiliary cache IOA contains cache data needed by the primary IOA"},
  410. {0x06670100, 0, IPR_DEFAULT_LOG_LEVEL,
  411. "9025: Disk unit is not supported at its physical location"},
  412. {0x06670600, 0, IPR_DEFAULT_LOG_LEVEL,
  413. "3020: IOA detected a SCSI bus configuration error"},
  414. {0x06678000, 0, IPR_DEFAULT_LOG_LEVEL,
  415. "3150: SCSI bus configuration error"},
  416. {0x06678100, 0, IPR_DEFAULT_LOG_LEVEL,
  417. "9074: Asymmetric advanced function disk configuration"},
  418. {0x06678300, 0, IPR_DEFAULT_LOG_LEVEL,
  419. "4040: Incomplete multipath connection between IOA and enclosure"},
  420. {0x06678400, 0, IPR_DEFAULT_LOG_LEVEL,
  421. "4041: Incomplete multipath connection between enclosure and device"},
  422. {0x06678500, 0, IPR_DEFAULT_LOG_LEVEL,
  423. "9075: Incomplete multipath connection between IOA and remote IOA"},
  424. {0x06678600, 0, IPR_DEFAULT_LOG_LEVEL,
  425. "9076: Configuration error, missing remote IOA"},
  426. {0x06679100, 0, IPR_DEFAULT_LOG_LEVEL,
  427. "4050: Enclosure does not support a required multipath function"},
  428. {0x06690000, 0, IPR_DEFAULT_LOG_LEVEL,
  429. "4070: Logically bad block written on device"},
  430. {0x06690200, 0, IPR_DEFAULT_LOG_LEVEL,
  431. "9041: Array protection temporarily suspended"},
  432. {0x06698200, 0, IPR_DEFAULT_LOG_LEVEL,
  433. "9042: Corrupt array parity detected on specified device"},
  434. {0x066B0200, 0, IPR_DEFAULT_LOG_LEVEL,
  435. "9030: Array no longer protected due to missing or failed disk unit"},
  436. {0x066B8000, 0, IPR_DEFAULT_LOG_LEVEL,
  437. "9071: Link operational transition"},
  438. {0x066B8100, 0, IPR_DEFAULT_LOG_LEVEL,
  439. "9072: Link not operational transition"},
  440. {0x066B8200, 0, IPR_DEFAULT_LOG_LEVEL,
  441. "9032: Array exposed but still protected"},
  442. {0x066B8300, 0, IPR_DEFAULT_LOG_LEVEL + 1,
  443. "70DD: Device forced failed by disrupt device command"},
  444. {0x066B9100, 0, IPR_DEFAULT_LOG_LEVEL,
  445. "4061: Multipath redundancy level got better"},
  446. {0x066B9200, 0, IPR_DEFAULT_LOG_LEVEL,
  447. "4060: Multipath redundancy level got worse"},
  448. {0x07270000, 0, 0,
  449. "Failure due to other device"},
  450. {0x07278000, 0, IPR_DEFAULT_LOG_LEVEL,
  451. "9008: IOA does not support functions expected by devices"},
  452. {0x07278100, 0, IPR_DEFAULT_LOG_LEVEL,
  453. "9010: Cache data associated with attached devices cannot be found"},
  454. {0x07278200, 0, IPR_DEFAULT_LOG_LEVEL,
  455. "9011: Cache data belongs to devices other than those attached"},
  456. {0x07278400, 0, IPR_DEFAULT_LOG_LEVEL,
  457. "9020: Array missing 2 or more devices with only 1 device present"},
  458. {0x07278500, 0, IPR_DEFAULT_LOG_LEVEL,
  459. "9021: Array missing 2 or more devices with 2 or more devices present"},
  460. {0x07278600, 0, IPR_DEFAULT_LOG_LEVEL,
  461. "9022: Exposed array is missing a required device"},
  462. {0x07278700, 0, IPR_DEFAULT_LOG_LEVEL,
  463. "9023: Array member(s) not at required physical locations"},
  464. {0x07278800, 0, IPR_DEFAULT_LOG_LEVEL,
  465. "9024: Array not functional due to present hardware configuration"},
  466. {0x07278900, 0, IPR_DEFAULT_LOG_LEVEL,
  467. "9026: Array not functional due to present hardware configuration"},
  468. {0x07278A00, 0, IPR_DEFAULT_LOG_LEVEL,
  469. "9027: Array is missing a device and parity is out of sync"},
  470. {0x07278B00, 0, IPR_DEFAULT_LOG_LEVEL,
  471. "9028: Maximum number of arrays already exist"},
  472. {0x07278C00, 0, IPR_DEFAULT_LOG_LEVEL,
  473. "9050: Required cache data cannot be located for a disk unit"},
  474. {0x07278D00, 0, IPR_DEFAULT_LOG_LEVEL,
  475. "9052: Cache data exists for a device that has been modified"},
  476. {0x07278F00, 0, IPR_DEFAULT_LOG_LEVEL,
  477. "9054: IOA resources not available due to previous problems"},
  478. {0x07279100, 0, IPR_DEFAULT_LOG_LEVEL,
  479. "9092: Disk unit requires initialization before use"},
  480. {0x07279200, 0, IPR_DEFAULT_LOG_LEVEL,
  481. "9029: Incorrect hardware configuration change has been detected"},
  482. {0x07279600, 0, IPR_DEFAULT_LOG_LEVEL,
  483. "9060: One or more disk pairs are missing from an array"},
  484. {0x07279700, 0, IPR_DEFAULT_LOG_LEVEL,
  485. "9061: One or more disks are missing from an array"},
  486. {0x07279800, 0, IPR_DEFAULT_LOG_LEVEL,
  487. "9062: One or more disks are missing from an array"},
  488. {0x07279900, 0, IPR_DEFAULT_LOG_LEVEL,
  489. "9063: Maximum number of functional arrays has been exceeded"},
  490. {0x0B260000, 0, 0,
  491. "Aborted command, invalid descriptor"},
  492. {0x0B5A0000, 0, 0,
  493. "Command terminated by host"}
  494. };
  495. static const struct ipr_ses_table_entry ipr_ses_table[] = {
  496. { "2104-DL1 ", "XXXXXXXXXXXXXXXX", 80 },
  497. { "2104-TL1 ", "XXXXXXXXXXXXXXXX", 80 },
  498. { "HSBP07M P U2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* Hidive 7 slot */
  499. { "HSBP05M P U2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* Hidive 5 slot */
  500. { "HSBP05M S U2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* Bowtie */
  501. { "HSBP06E ASU2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* MartinFenning */
  502. { "2104-DU3 ", "XXXXXXXXXXXXXXXX", 160 },
  503. { "2104-TU3 ", "XXXXXXXXXXXXXXXX", 160 },
  504. { "HSBP04C RSU2SCSI", "XXXXXXX*XXXXXXXX", 160 },
  505. { "HSBP06E RSU2SCSI", "XXXXXXX*XXXXXXXX", 160 },
  506. { "St V1S2 ", "XXXXXXXXXXXXXXXX", 160 },
  507. { "HSBPD4M PU3SCSI", "XXXXXXX*XXXXXXXX", 160 },
  508. { "VSBPD1H U3SCSI", "XXXXXXX*XXXXXXXX", 160 }
  509. };
  510. /*
  511. * Function Prototypes
  512. */
  513. static int ipr_reset_alert(struct ipr_cmnd *);
  514. static void ipr_process_ccn(struct ipr_cmnd *);
  515. static void ipr_process_error(struct ipr_cmnd *);
  516. static void ipr_reset_ioa_job(struct ipr_cmnd *);
  517. static void ipr_initiate_ioa_reset(struct ipr_ioa_cfg *,
  518. enum ipr_shutdown_type);
  519. #ifdef CONFIG_SCSI_IPR_TRACE
  520. /**
  521. * ipr_trc_hook - Add a trace entry to the driver trace
  522. * @ipr_cmd: ipr command struct
  523. * @type: trace type
  524. * @add_data: additional data
  525. *
  526. * Return value:
  527. * none
  528. **/
  529. static void ipr_trc_hook(struct ipr_cmnd *ipr_cmd,
  530. u8 type, u32 add_data)
  531. {
  532. struct ipr_trace_entry *trace_entry;
  533. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  534. trace_entry = &ioa_cfg->trace[ioa_cfg->trace_index++];
  535. trace_entry->time = jiffies;
  536. trace_entry->op_code = ipr_cmd->ioarcb.cmd_pkt.cdb[0];
  537. trace_entry->type = type;
  538. if (ipr_cmd->ioa_cfg->sis64)
  539. trace_entry->ata_op_code = ipr_cmd->i.ata_ioadl.regs.command;
  540. else
  541. trace_entry->ata_op_code = ipr_cmd->ioarcb.u.add_data.u.regs.command;
  542. trace_entry->cmd_index = ipr_cmd->cmd_index & 0xff;
  543. trace_entry->res_handle = ipr_cmd->ioarcb.res_handle;
  544. trace_entry->u.add_data = add_data;
  545. }
  546. #else
  547. #define ipr_trc_hook(ipr_cmd, type, add_data) do { } while(0)
  548. #endif
  549. /**
  550. * ipr_reinit_ipr_cmnd - Re-initialize an IPR Cmnd block for reuse
  551. * @ipr_cmd: ipr command struct
  552. *
  553. * Return value:
  554. * none
  555. **/
  556. static void ipr_reinit_ipr_cmnd(struct ipr_cmnd *ipr_cmd)
  557. {
  558. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  559. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  560. struct ipr_ioasa64 *ioasa64 = &ipr_cmd->s.ioasa64;
  561. dma_addr_t dma_addr = ipr_cmd->dma_addr;
  562. memset(&ioarcb->cmd_pkt, 0, sizeof(struct ipr_cmd_pkt));
  563. ioarcb->data_transfer_length = 0;
  564. ioarcb->read_data_transfer_length = 0;
  565. ioarcb->ioadl_len = 0;
  566. ioarcb->read_ioadl_len = 0;
  567. if (ipr_cmd->ioa_cfg->sis64) {
  568. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  569. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ioadl64));
  570. ioasa64->u.gata.status = 0;
  571. } else {
  572. ioarcb->write_ioadl_addr =
  573. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, i.ioadl));
  574. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  575. ioasa->u.gata.status = 0;
  576. }
  577. ioasa->hdr.ioasc = 0;
  578. ioasa->hdr.residual_data_len = 0;
  579. ipr_cmd->scsi_cmd = NULL;
  580. ipr_cmd->qc = NULL;
  581. ipr_cmd->sense_buffer[0] = 0;
  582. ipr_cmd->dma_use_sg = 0;
  583. }
  584. /**
  585. * ipr_init_ipr_cmnd - Initialize an IPR Cmnd block
  586. * @ipr_cmd: ipr command struct
  587. *
  588. * Return value:
  589. * none
  590. **/
  591. static void ipr_init_ipr_cmnd(struct ipr_cmnd *ipr_cmd)
  592. {
  593. ipr_reinit_ipr_cmnd(ipr_cmd);
  594. ipr_cmd->u.scratch = 0;
  595. ipr_cmd->sibling = NULL;
  596. init_timer(&ipr_cmd->timer);
  597. }
  598. /**
  599. * ipr_get_free_ipr_cmnd - Get a free IPR Cmnd block
  600. * @ioa_cfg: ioa config struct
  601. *
  602. * Return value:
  603. * pointer to ipr command struct
  604. **/
  605. static
  606. struct ipr_cmnd *ipr_get_free_ipr_cmnd(struct ipr_ioa_cfg *ioa_cfg)
  607. {
  608. struct ipr_cmnd *ipr_cmd;
  609. ipr_cmd = list_entry(ioa_cfg->free_q.next, struct ipr_cmnd, queue);
  610. list_del(&ipr_cmd->queue);
  611. ipr_init_ipr_cmnd(ipr_cmd);
  612. return ipr_cmd;
  613. }
  614. /**
  615. * ipr_mask_and_clear_interrupts - Mask all and clear specified interrupts
  616. * @ioa_cfg: ioa config struct
  617. * @clr_ints: interrupts to clear
  618. *
  619. * This function masks all interrupts on the adapter, then clears the
  620. * interrupts specified in the mask
  621. *
  622. * Return value:
  623. * none
  624. **/
  625. static void ipr_mask_and_clear_interrupts(struct ipr_ioa_cfg *ioa_cfg,
  626. u32 clr_ints)
  627. {
  628. volatile u32 int_reg;
  629. /* Stop new interrupts */
  630. ioa_cfg->allow_interrupts = 0;
  631. /* Set interrupt mask to stop all new interrupts */
  632. if (ioa_cfg->sis64)
  633. writeq(~0, ioa_cfg->regs.set_interrupt_mask_reg);
  634. else
  635. writel(~0, ioa_cfg->regs.set_interrupt_mask_reg);
  636. /* Clear any pending interrupts */
  637. if (ioa_cfg->sis64)
  638. writel(~0, ioa_cfg->regs.clr_interrupt_reg);
  639. writel(clr_ints, ioa_cfg->regs.clr_interrupt_reg32);
  640. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  641. }
  642. /**
  643. * ipr_save_pcix_cmd_reg - Save PCI-X command register
  644. * @ioa_cfg: ioa config struct
  645. *
  646. * Return value:
  647. * 0 on success / -EIO on failure
  648. **/
  649. static int ipr_save_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)
  650. {
  651. int pcix_cmd_reg = pci_find_capability(ioa_cfg->pdev, PCI_CAP_ID_PCIX);
  652. if (pcix_cmd_reg == 0)
  653. return 0;
  654. if (pci_read_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,
  655. &ioa_cfg->saved_pcix_cmd_reg) != PCIBIOS_SUCCESSFUL) {
  656. dev_err(&ioa_cfg->pdev->dev, "Failed to save PCI-X command register\n");
  657. return -EIO;
  658. }
  659. ioa_cfg->saved_pcix_cmd_reg |= PCI_X_CMD_DPERR_E | PCI_X_CMD_ERO;
  660. return 0;
  661. }
  662. /**
  663. * ipr_set_pcix_cmd_reg - Setup PCI-X command register
  664. * @ioa_cfg: ioa config struct
  665. *
  666. * Return value:
  667. * 0 on success / -EIO on failure
  668. **/
  669. static int ipr_set_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)
  670. {
  671. int pcix_cmd_reg = pci_find_capability(ioa_cfg->pdev, PCI_CAP_ID_PCIX);
  672. if (pcix_cmd_reg) {
  673. if (pci_write_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,
  674. ioa_cfg->saved_pcix_cmd_reg) != PCIBIOS_SUCCESSFUL) {
  675. dev_err(&ioa_cfg->pdev->dev, "Failed to setup PCI-X command register\n");
  676. return -EIO;
  677. }
  678. }
  679. return 0;
  680. }
  681. /**
  682. * ipr_sata_eh_done - done function for aborted SATA commands
  683. * @ipr_cmd: ipr command struct
  684. *
  685. * This function is invoked for ops generated to SATA
  686. * devices which are being aborted.
  687. *
  688. * Return value:
  689. * none
  690. **/
  691. static void ipr_sata_eh_done(struct ipr_cmnd *ipr_cmd)
  692. {
  693. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  694. struct ata_queued_cmd *qc = ipr_cmd->qc;
  695. struct ipr_sata_port *sata_port = qc->ap->private_data;
  696. qc->err_mask |= AC_ERR_OTHER;
  697. sata_port->ioasa.status |= ATA_BUSY;
  698. list_add_tail(&ipr_cmd->queue, &ioa_cfg->free_q);
  699. ata_qc_complete(qc);
  700. }
  701. /**
  702. * ipr_scsi_eh_done - mid-layer done function for aborted ops
  703. * @ipr_cmd: ipr command struct
  704. *
  705. * This function is invoked by the interrupt handler for
  706. * ops generated by the SCSI mid-layer which are being aborted.
  707. *
  708. * Return value:
  709. * none
  710. **/
  711. static void ipr_scsi_eh_done(struct ipr_cmnd *ipr_cmd)
  712. {
  713. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  714. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  715. scsi_cmd->result |= (DID_ERROR << 16);
  716. scsi_dma_unmap(ipr_cmd->scsi_cmd);
  717. scsi_cmd->scsi_done(scsi_cmd);
  718. list_add_tail(&ipr_cmd->queue, &ioa_cfg->free_q);
  719. }
  720. /**
  721. * ipr_fail_all_ops - Fails all outstanding ops.
  722. * @ioa_cfg: ioa config struct
  723. *
  724. * This function fails all outstanding ops.
  725. *
  726. * Return value:
  727. * none
  728. **/
  729. static void ipr_fail_all_ops(struct ipr_ioa_cfg *ioa_cfg)
  730. {
  731. struct ipr_cmnd *ipr_cmd, *temp;
  732. ENTER;
  733. list_for_each_entry_safe(ipr_cmd, temp, &ioa_cfg->pending_q, queue) {
  734. list_del(&ipr_cmd->queue);
  735. ipr_cmd->s.ioasa.hdr.ioasc = cpu_to_be32(IPR_IOASC_IOA_WAS_RESET);
  736. ipr_cmd->s.ioasa.hdr.ilid = cpu_to_be32(IPR_DRIVER_ILID);
  737. if (ipr_cmd->scsi_cmd)
  738. ipr_cmd->done = ipr_scsi_eh_done;
  739. else if (ipr_cmd->qc)
  740. ipr_cmd->done = ipr_sata_eh_done;
  741. ipr_trc_hook(ipr_cmd, IPR_TRACE_FINISH, IPR_IOASC_IOA_WAS_RESET);
  742. del_timer(&ipr_cmd->timer);
  743. ipr_cmd->done(ipr_cmd);
  744. }
  745. LEAVE;
  746. }
  747. /**
  748. * ipr_send_command - Send driver initiated requests.
  749. * @ipr_cmd: ipr command struct
  750. *
  751. * This function sends a command to the adapter using the correct write call.
  752. * In the case of sis64, calculate the ioarcb size required. Then or in the
  753. * appropriate bits.
  754. *
  755. * Return value:
  756. * none
  757. **/
  758. static void ipr_send_command(struct ipr_cmnd *ipr_cmd)
  759. {
  760. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  761. dma_addr_t send_dma_addr = ipr_cmd->dma_addr;
  762. if (ioa_cfg->sis64) {
  763. /* The default size is 256 bytes */
  764. send_dma_addr |= 0x1;
  765. /* If the number of ioadls * size of ioadl > 128 bytes,
  766. then use a 512 byte ioarcb */
  767. if (ipr_cmd->dma_use_sg * sizeof(struct ipr_ioadl64_desc) > 128 )
  768. send_dma_addr |= 0x4;
  769. writeq(send_dma_addr, ioa_cfg->regs.ioarrin_reg);
  770. } else
  771. writel(send_dma_addr, ioa_cfg->regs.ioarrin_reg);
  772. }
  773. /**
  774. * ipr_do_req - Send driver initiated requests.
  775. * @ipr_cmd: ipr command struct
  776. * @done: done function
  777. * @timeout_func: timeout function
  778. * @timeout: timeout value
  779. *
  780. * This function sends the specified command to the adapter with the
  781. * timeout given. The done function is invoked on command completion.
  782. *
  783. * Return value:
  784. * none
  785. **/
  786. static void ipr_do_req(struct ipr_cmnd *ipr_cmd,
  787. void (*done) (struct ipr_cmnd *),
  788. void (*timeout_func) (struct ipr_cmnd *), u32 timeout)
  789. {
  790. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  791. list_add_tail(&ipr_cmd->queue, &ioa_cfg->pending_q);
  792. ipr_cmd->done = done;
  793. ipr_cmd->timer.data = (unsigned long) ipr_cmd;
  794. ipr_cmd->timer.expires = jiffies + timeout;
  795. ipr_cmd->timer.function = (void (*)(unsigned long))timeout_func;
  796. add_timer(&ipr_cmd->timer);
  797. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, 0);
  798. mb();
  799. ipr_send_command(ipr_cmd);
  800. }
  801. /**
  802. * ipr_internal_cmd_done - Op done function for an internally generated op.
  803. * @ipr_cmd: ipr command struct
  804. *
  805. * This function is the op done function for an internally generated,
  806. * blocking op. It simply wakes the sleeping thread.
  807. *
  808. * Return value:
  809. * none
  810. **/
  811. static void ipr_internal_cmd_done(struct ipr_cmnd *ipr_cmd)
  812. {
  813. if (ipr_cmd->sibling)
  814. ipr_cmd->sibling = NULL;
  815. else
  816. complete(&ipr_cmd->completion);
  817. }
  818. /**
  819. * ipr_init_ioadl - initialize the ioadl for the correct SIS type
  820. * @ipr_cmd: ipr command struct
  821. * @dma_addr: dma address
  822. * @len: transfer length
  823. * @flags: ioadl flag value
  824. *
  825. * This function initializes an ioadl in the case where there is only a single
  826. * descriptor.
  827. *
  828. * Return value:
  829. * nothing
  830. **/
  831. static void ipr_init_ioadl(struct ipr_cmnd *ipr_cmd, dma_addr_t dma_addr,
  832. u32 len, int flags)
  833. {
  834. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  835. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ioadl64;
  836. ipr_cmd->dma_use_sg = 1;
  837. if (ipr_cmd->ioa_cfg->sis64) {
  838. ioadl64->flags = cpu_to_be32(flags);
  839. ioadl64->data_len = cpu_to_be32(len);
  840. ioadl64->address = cpu_to_be64(dma_addr);
  841. ipr_cmd->ioarcb.ioadl_len =
  842. cpu_to_be32(sizeof(struct ipr_ioadl64_desc));
  843. ipr_cmd->ioarcb.data_transfer_length = cpu_to_be32(len);
  844. } else {
  845. ioadl->flags_and_data_len = cpu_to_be32(flags | len);
  846. ioadl->address = cpu_to_be32(dma_addr);
  847. if (flags == IPR_IOADL_FLAGS_READ_LAST) {
  848. ipr_cmd->ioarcb.read_ioadl_len =
  849. cpu_to_be32(sizeof(struct ipr_ioadl_desc));
  850. ipr_cmd->ioarcb.read_data_transfer_length = cpu_to_be32(len);
  851. } else {
  852. ipr_cmd->ioarcb.ioadl_len =
  853. cpu_to_be32(sizeof(struct ipr_ioadl_desc));
  854. ipr_cmd->ioarcb.data_transfer_length = cpu_to_be32(len);
  855. }
  856. }
  857. }
  858. /**
  859. * ipr_send_blocking_cmd - Send command and sleep on its completion.
  860. * @ipr_cmd: ipr command struct
  861. * @timeout_func: function to invoke if command times out
  862. * @timeout: timeout
  863. *
  864. * Return value:
  865. * none
  866. **/
  867. static void ipr_send_blocking_cmd(struct ipr_cmnd *ipr_cmd,
  868. void (*timeout_func) (struct ipr_cmnd *ipr_cmd),
  869. u32 timeout)
  870. {
  871. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  872. init_completion(&ipr_cmd->completion);
  873. ipr_do_req(ipr_cmd, ipr_internal_cmd_done, timeout_func, timeout);
  874. spin_unlock_irq(ioa_cfg->host->host_lock);
  875. wait_for_completion(&ipr_cmd->completion);
  876. spin_lock_irq(ioa_cfg->host->host_lock);
  877. }
  878. /**
  879. * ipr_send_hcam - Send an HCAM to the adapter.
  880. * @ioa_cfg: ioa config struct
  881. * @type: HCAM type
  882. * @hostrcb: hostrcb struct
  883. *
  884. * This function will send a Host Controlled Async command to the adapter.
  885. * If HCAMs are currently not allowed to be issued to the adapter, it will
  886. * place the hostrcb on the free queue.
  887. *
  888. * Return value:
  889. * none
  890. **/
  891. static void ipr_send_hcam(struct ipr_ioa_cfg *ioa_cfg, u8 type,
  892. struct ipr_hostrcb *hostrcb)
  893. {
  894. struct ipr_cmnd *ipr_cmd;
  895. struct ipr_ioarcb *ioarcb;
  896. if (ioa_cfg->allow_cmds) {
  897. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  898. list_add_tail(&ipr_cmd->queue, &ioa_cfg->pending_q);
  899. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_pending_q);
  900. ipr_cmd->u.hostrcb = hostrcb;
  901. ioarcb = &ipr_cmd->ioarcb;
  902. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  903. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_HCAM;
  904. ioarcb->cmd_pkt.cdb[0] = IPR_HOST_CONTROLLED_ASYNC;
  905. ioarcb->cmd_pkt.cdb[1] = type;
  906. ioarcb->cmd_pkt.cdb[7] = (sizeof(hostrcb->hcam) >> 8) & 0xff;
  907. ioarcb->cmd_pkt.cdb[8] = sizeof(hostrcb->hcam) & 0xff;
  908. ipr_init_ioadl(ipr_cmd, hostrcb->hostrcb_dma,
  909. sizeof(hostrcb->hcam), IPR_IOADL_FLAGS_READ_LAST);
  910. if (type == IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE)
  911. ipr_cmd->done = ipr_process_ccn;
  912. else
  913. ipr_cmd->done = ipr_process_error;
  914. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, IPR_IOA_RES_ADDR);
  915. mb();
  916. ipr_send_command(ipr_cmd);
  917. } else {
  918. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_free_q);
  919. }
  920. }
  921. /**
  922. * ipr_update_ata_class - Update the ata class in the resource entry
  923. * @res: resource entry struct
  924. * @proto: cfgte device bus protocol value
  925. *
  926. * Return value:
  927. * none
  928. **/
  929. static void ipr_update_ata_class(struct ipr_resource_entry *res, unsigned int proto)
  930. {
  931. switch(proto) {
  932. case IPR_PROTO_SATA:
  933. case IPR_PROTO_SAS_STP:
  934. res->ata_class = ATA_DEV_ATA;
  935. break;
  936. case IPR_PROTO_SATA_ATAPI:
  937. case IPR_PROTO_SAS_STP_ATAPI:
  938. res->ata_class = ATA_DEV_ATAPI;
  939. break;
  940. default:
  941. res->ata_class = ATA_DEV_UNKNOWN;
  942. break;
  943. };
  944. }
  945. /**
  946. * ipr_init_res_entry - Initialize a resource entry struct.
  947. * @res: resource entry struct
  948. * @cfgtew: config table entry wrapper struct
  949. *
  950. * Return value:
  951. * none
  952. **/
  953. static void ipr_init_res_entry(struct ipr_resource_entry *res,
  954. struct ipr_config_table_entry_wrapper *cfgtew)
  955. {
  956. int found = 0;
  957. unsigned int proto;
  958. struct ipr_ioa_cfg *ioa_cfg = res->ioa_cfg;
  959. struct ipr_resource_entry *gscsi_res = NULL;
  960. res->needs_sync_complete = 0;
  961. res->in_erp = 0;
  962. res->add_to_ml = 0;
  963. res->del_from_ml = 0;
  964. res->resetting_device = 0;
  965. res->sdev = NULL;
  966. res->sata_port = NULL;
  967. if (ioa_cfg->sis64) {
  968. proto = cfgtew->u.cfgte64->proto;
  969. res->res_flags = cfgtew->u.cfgte64->res_flags;
  970. res->qmodel = IPR_QUEUEING_MODEL64(res);
  971. res->type = cfgtew->u.cfgte64->res_type;
  972. memcpy(res->res_path, &cfgtew->u.cfgte64->res_path,
  973. sizeof(res->res_path));
  974. res->bus = 0;
  975. memcpy(&res->dev_lun.scsi_lun, &cfgtew->u.cfgte64->lun,
  976. sizeof(res->dev_lun.scsi_lun));
  977. res->lun = scsilun_to_int(&res->dev_lun);
  978. if (res->type == IPR_RES_TYPE_GENERIC_SCSI) {
  979. list_for_each_entry(gscsi_res, &ioa_cfg->used_res_q, queue) {
  980. if (gscsi_res->dev_id == cfgtew->u.cfgte64->dev_id) {
  981. found = 1;
  982. res->target = gscsi_res->target;
  983. break;
  984. }
  985. }
  986. if (!found) {
  987. res->target = find_first_zero_bit(ioa_cfg->target_ids,
  988. ioa_cfg->max_devs_supported);
  989. set_bit(res->target, ioa_cfg->target_ids);
  990. }
  991. } else if (res->type == IPR_RES_TYPE_IOAFP) {
  992. res->bus = IPR_IOAFP_VIRTUAL_BUS;
  993. res->target = 0;
  994. } else if (res->type == IPR_RES_TYPE_ARRAY) {
  995. res->bus = IPR_ARRAY_VIRTUAL_BUS;
  996. res->target = find_first_zero_bit(ioa_cfg->array_ids,
  997. ioa_cfg->max_devs_supported);
  998. set_bit(res->target, ioa_cfg->array_ids);
  999. } else if (res->type == IPR_RES_TYPE_VOLUME_SET) {
  1000. res->bus = IPR_VSET_VIRTUAL_BUS;
  1001. res->target = find_first_zero_bit(ioa_cfg->vset_ids,
  1002. ioa_cfg->max_devs_supported);
  1003. set_bit(res->target, ioa_cfg->vset_ids);
  1004. } else {
  1005. res->target = find_first_zero_bit(ioa_cfg->target_ids,
  1006. ioa_cfg->max_devs_supported);
  1007. set_bit(res->target, ioa_cfg->target_ids);
  1008. }
  1009. } else {
  1010. proto = cfgtew->u.cfgte->proto;
  1011. res->qmodel = IPR_QUEUEING_MODEL(res);
  1012. res->flags = cfgtew->u.cfgte->flags;
  1013. if (res->flags & IPR_IS_IOA_RESOURCE)
  1014. res->type = IPR_RES_TYPE_IOAFP;
  1015. else
  1016. res->type = cfgtew->u.cfgte->rsvd_subtype & 0x0f;
  1017. res->bus = cfgtew->u.cfgte->res_addr.bus;
  1018. res->target = cfgtew->u.cfgte->res_addr.target;
  1019. res->lun = cfgtew->u.cfgte->res_addr.lun;
  1020. res->lun_wwn = get_unaligned_be64(cfgtew->u.cfgte->lun_wwn);
  1021. }
  1022. ipr_update_ata_class(res, proto);
  1023. }
  1024. /**
  1025. * ipr_is_same_device - Determine if two devices are the same.
  1026. * @res: resource entry struct
  1027. * @cfgtew: config table entry wrapper struct
  1028. *
  1029. * Return value:
  1030. * 1 if the devices are the same / 0 otherwise
  1031. **/
  1032. static int ipr_is_same_device(struct ipr_resource_entry *res,
  1033. struct ipr_config_table_entry_wrapper *cfgtew)
  1034. {
  1035. if (res->ioa_cfg->sis64) {
  1036. if (!memcmp(&res->dev_id, &cfgtew->u.cfgte64->dev_id,
  1037. sizeof(cfgtew->u.cfgte64->dev_id)) &&
  1038. !memcmp(&res->dev_lun.scsi_lun, &cfgtew->u.cfgte64->lun,
  1039. sizeof(cfgtew->u.cfgte64->lun))) {
  1040. return 1;
  1041. }
  1042. } else {
  1043. if (res->bus == cfgtew->u.cfgte->res_addr.bus &&
  1044. res->target == cfgtew->u.cfgte->res_addr.target &&
  1045. res->lun == cfgtew->u.cfgte->res_addr.lun)
  1046. return 1;
  1047. }
  1048. return 0;
  1049. }
  1050. /**
  1051. * ipr_format_res_path - Format the resource path for printing.
  1052. * @res_path: resource path
  1053. * @buf: buffer
  1054. *
  1055. * Return value:
  1056. * pointer to buffer
  1057. **/
  1058. static char *ipr_format_res_path(u8 *res_path, char *buffer, int len)
  1059. {
  1060. int i;
  1061. char *p = buffer;
  1062. *p = '\0';
  1063. p += snprintf(p, buffer + len - p, "%02X", res_path[0]);
  1064. for (i = 1; res_path[i] != 0xff && ((i * 3) < len); i++)
  1065. p += snprintf(p, buffer + len - p, "-%02X", res_path[i]);
  1066. return buffer;
  1067. }
  1068. /**
  1069. * ipr_update_res_entry - Update the resource entry.
  1070. * @res: resource entry struct
  1071. * @cfgtew: config table entry wrapper struct
  1072. *
  1073. * Return value:
  1074. * none
  1075. **/
  1076. static void ipr_update_res_entry(struct ipr_resource_entry *res,
  1077. struct ipr_config_table_entry_wrapper *cfgtew)
  1078. {
  1079. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1080. unsigned int proto;
  1081. int new_path = 0;
  1082. if (res->ioa_cfg->sis64) {
  1083. res->flags = cfgtew->u.cfgte64->flags;
  1084. res->res_flags = cfgtew->u.cfgte64->res_flags;
  1085. res->type = cfgtew->u.cfgte64->res_type;
  1086. memcpy(&res->std_inq_data, &cfgtew->u.cfgte64->std_inq_data,
  1087. sizeof(struct ipr_std_inq_data));
  1088. res->qmodel = IPR_QUEUEING_MODEL64(res);
  1089. proto = cfgtew->u.cfgte64->proto;
  1090. res->res_handle = cfgtew->u.cfgte64->res_handle;
  1091. res->dev_id = cfgtew->u.cfgte64->dev_id;
  1092. memcpy(&res->dev_lun.scsi_lun, &cfgtew->u.cfgte64->lun,
  1093. sizeof(res->dev_lun.scsi_lun));
  1094. if (memcmp(res->res_path, &cfgtew->u.cfgte64->res_path,
  1095. sizeof(res->res_path))) {
  1096. memcpy(res->res_path, &cfgtew->u.cfgte64->res_path,
  1097. sizeof(res->res_path));
  1098. new_path = 1;
  1099. }
  1100. if (res->sdev && new_path)
  1101. sdev_printk(KERN_INFO, res->sdev, "Resource path: %s\n",
  1102. ipr_format_res_path(res->res_path, buffer,
  1103. sizeof(buffer)));
  1104. } else {
  1105. res->flags = cfgtew->u.cfgte->flags;
  1106. if (res->flags & IPR_IS_IOA_RESOURCE)
  1107. res->type = IPR_RES_TYPE_IOAFP;
  1108. else
  1109. res->type = cfgtew->u.cfgte->rsvd_subtype & 0x0f;
  1110. memcpy(&res->std_inq_data, &cfgtew->u.cfgte->std_inq_data,
  1111. sizeof(struct ipr_std_inq_data));
  1112. res->qmodel = IPR_QUEUEING_MODEL(res);
  1113. proto = cfgtew->u.cfgte->proto;
  1114. res->res_handle = cfgtew->u.cfgte->res_handle;
  1115. }
  1116. ipr_update_ata_class(res, proto);
  1117. }
  1118. /**
  1119. * ipr_clear_res_target - Clear the bit in the bit map representing the target
  1120. * for the resource.
  1121. * @res: resource entry struct
  1122. * @cfgtew: config table entry wrapper struct
  1123. *
  1124. * Return value:
  1125. * none
  1126. **/
  1127. static void ipr_clear_res_target(struct ipr_resource_entry *res)
  1128. {
  1129. struct ipr_resource_entry *gscsi_res = NULL;
  1130. struct ipr_ioa_cfg *ioa_cfg = res->ioa_cfg;
  1131. if (!ioa_cfg->sis64)
  1132. return;
  1133. if (res->bus == IPR_ARRAY_VIRTUAL_BUS)
  1134. clear_bit(res->target, ioa_cfg->array_ids);
  1135. else if (res->bus == IPR_VSET_VIRTUAL_BUS)
  1136. clear_bit(res->target, ioa_cfg->vset_ids);
  1137. else if (res->bus == 0 && res->type == IPR_RES_TYPE_GENERIC_SCSI) {
  1138. list_for_each_entry(gscsi_res, &ioa_cfg->used_res_q, queue)
  1139. if (gscsi_res->dev_id == res->dev_id && gscsi_res != res)
  1140. return;
  1141. clear_bit(res->target, ioa_cfg->target_ids);
  1142. } else if (res->bus == 0)
  1143. clear_bit(res->target, ioa_cfg->target_ids);
  1144. }
  1145. /**
  1146. * ipr_handle_config_change - Handle a config change from the adapter
  1147. * @ioa_cfg: ioa config struct
  1148. * @hostrcb: hostrcb
  1149. *
  1150. * Return value:
  1151. * none
  1152. **/
  1153. static void ipr_handle_config_change(struct ipr_ioa_cfg *ioa_cfg,
  1154. struct ipr_hostrcb *hostrcb)
  1155. {
  1156. struct ipr_resource_entry *res = NULL;
  1157. struct ipr_config_table_entry_wrapper cfgtew;
  1158. __be32 cc_res_handle;
  1159. u32 is_ndn = 1;
  1160. if (ioa_cfg->sis64) {
  1161. cfgtew.u.cfgte64 = &hostrcb->hcam.u.ccn.u.cfgte64;
  1162. cc_res_handle = cfgtew.u.cfgte64->res_handle;
  1163. } else {
  1164. cfgtew.u.cfgte = &hostrcb->hcam.u.ccn.u.cfgte;
  1165. cc_res_handle = cfgtew.u.cfgte->res_handle;
  1166. }
  1167. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  1168. if (res->res_handle == cc_res_handle) {
  1169. is_ndn = 0;
  1170. break;
  1171. }
  1172. }
  1173. if (is_ndn) {
  1174. if (list_empty(&ioa_cfg->free_res_q)) {
  1175. ipr_send_hcam(ioa_cfg,
  1176. IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE,
  1177. hostrcb);
  1178. return;
  1179. }
  1180. res = list_entry(ioa_cfg->free_res_q.next,
  1181. struct ipr_resource_entry, queue);
  1182. list_del(&res->queue);
  1183. ipr_init_res_entry(res, &cfgtew);
  1184. list_add_tail(&res->queue, &ioa_cfg->used_res_q);
  1185. }
  1186. ipr_update_res_entry(res, &cfgtew);
  1187. if (hostrcb->hcam.notify_type == IPR_HOST_RCB_NOTIF_TYPE_REM_ENTRY) {
  1188. if (res->sdev) {
  1189. res->del_from_ml = 1;
  1190. res->res_handle = IPR_INVALID_RES_HANDLE;
  1191. if (ioa_cfg->allow_ml_add_del)
  1192. schedule_work(&ioa_cfg->work_q);
  1193. } else {
  1194. ipr_clear_res_target(res);
  1195. list_move_tail(&res->queue, &ioa_cfg->free_res_q);
  1196. }
  1197. } else if (!res->sdev || res->del_from_ml) {
  1198. res->add_to_ml = 1;
  1199. if (ioa_cfg->allow_ml_add_del)
  1200. schedule_work(&ioa_cfg->work_q);
  1201. }
  1202. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE, hostrcb);
  1203. }
  1204. /**
  1205. * ipr_process_ccn - Op done function for a CCN.
  1206. * @ipr_cmd: ipr command struct
  1207. *
  1208. * This function is the op done function for a configuration
  1209. * change notification host controlled async from the adapter.
  1210. *
  1211. * Return value:
  1212. * none
  1213. **/
  1214. static void ipr_process_ccn(struct ipr_cmnd *ipr_cmd)
  1215. {
  1216. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  1217. struct ipr_hostrcb *hostrcb = ipr_cmd->u.hostrcb;
  1218. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  1219. list_del(&hostrcb->queue);
  1220. list_add_tail(&ipr_cmd->queue, &ioa_cfg->free_q);
  1221. if (ioasc) {
  1222. if (ioasc != IPR_IOASC_IOA_WAS_RESET)
  1223. dev_err(&ioa_cfg->pdev->dev,
  1224. "Host RCB failed with IOASC: 0x%08X\n", ioasc);
  1225. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE, hostrcb);
  1226. } else {
  1227. ipr_handle_config_change(ioa_cfg, hostrcb);
  1228. }
  1229. }
  1230. /**
  1231. * strip_and_pad_whitespace - Strip and pad trailing whitespace.
  1232. * @i: index into buffer
  1233. * @buf: string to modify
  1234. *
  1235. * This function will strip all trailing whitespace, pad the end
  1236. * of the string with a single space, and NULL terminate the string.
  1237. *
  1238. * Return value:
  1239. * new length of string
  1240. **/
  1241. static int strip_and_pad_whitespace(int i, char *buf)
  1242. {
  1243. while (i && buf[i] == ' ')
  1244. i--;
  1245. buf[i+1] = ' ';
  1246. buf[i+2] = '\0';
  1247. return i + 2;
  1248. }
  1249. /**
  1250. * ipr_log_vpd_compact - Log the passed extended VPD compactly.
  1251. * @prefix: string to print at start of printk
  1252. * @hostrcb: hostrcb pointer
  1253. * @vpd: vendor/product id/sn struct
  1254. *
  1255. * Return value:
  1256. * none
  1257. **/
  1258. static void ipr_log_vpd_compact(char *prefix, struct ipr_hostrcb *hostrcb,
  1259. struct ipr_vpd *vpd)
  1260. {
  1261. char buffer[IPR_VENDOR_ID_LEN + IPR_PROD_ID_LEN + IPR_SERIAL_NUM_LEN + 3];
  1262. int i = 0;
  1263. memcpy(buffer, vpd->vpids.vendor_id, IPR_VENDOR_ID_LEN);
  1264. i = strip_and_pad_whitespace(IPR_VENDOR_ID_LEN - 1, buffer);
  1265. memcpy(&buffer[i], vpd->vpids.product_id, IPR_PROD_ID_LEN);
  1266. i = strip_and_pad_whitespace(i + IPR_PROD_ID_LEN - 1, buffer);
  1267. memcpy(&buffer[i], vpd->sn, IPR_SERIAL_NUM_LEN);
  1268. buffer[IPR_SERIAL_NUM_LEN + i] = '\0';
  1269. ipr_hcam_err(hostrcb, "%s VPID/SN: %s\n", prefix, buffer);
  1270. }
  1271. /**
  1272. * ipr_log_vpd - Log the passed VPD to the error log.
  1273. * @vpd: vendor/product id/sn struct
  1274. *
  1275. * Return value:
  1276. * none
  1277. **/
  1278. static void ipr_log_vpd(struct ipr_vpd *vpd)
  1279. {
  1280. char buffer[IPR_VENDOR_ID_LEN + IPR_PROD_ID_LEN
  1281. + IPR_SERIAL_NUM_LEN];
  1282. memcpy(buffer, vpd->vpids.vendor_id, IPR_VENDOR_ID_LEN);
  1283. memcpy(buffer + IPR_VENDOR_ID_LEN, vpd->vpids.product_id,
  1284. IPR_PROD_ID_LEN);
  1285. buffer[IPR_VENDOR_ID_LEN + IPR_PROD_ID_LEN] = '\0';
  1286. ipr_err("Vendor/Product ID: %s\n", buffer);
  1287. memcpy(buffer, vpd->sn, IPR_SERIAL_NUM_LEN);
  1288. buffer[IPR_SERIAL_NUM_LEN] = '\0';
  1289. ipr_err(" Serial Number: %s\n", buffer);
  1290. }
  1291. /**
  1292. * ipr_log_ext_vpd_compact - Log the passed extended VPD compactly.
  1293. * @prefix: string to print at start of printk
  1294. * @hostrcb: hostrcb pointer
  1295. * @vpd: vendor/product id/sn/wwn struct
  1296. *
  1297. * Return value:
  1298. * none
  1299. **/
  1300. static void ipr_log_ext_vpd_compact(char *prefix, struct ipr_hostrcb *hostrcb,
  1301. struct ipr_ext_vpd *vpd)
  1302. {
  1303. ipr_log_vpd_compact(prefix, hostrcb, &vpd->vpd);
  1304. ipr_hcam_err(hostrcb, "%s WWN: %08X%08X\n", prefix,
  1305. be32_to_cpu(vpd->wwid[0]), be32_to_cpu(vpd->wwid[1]));
  1306. }
  1307. /**
  1308. * ipr_log_ext_vpd - Log the passed extended VPD to the error log.
  1309. * @vpd: vendor/product id/sn/wwn struct
  1310. *
  1311. * Return value:
  1312. * none
  1313. **/
  1314. static void ipr_log_ext_vpd(struct ipr_ext_vpd *vpd)
  1315. {
  1316. ipr_log_vpd(&vpd->vpd);
  1317. ipr_err(" WWN: %08X%08X\n", be32_to_cpu(vpd->wwid[0]),
  1318. be32_to_cpu(vpd->wwid[1]));
  1319. }
  1320. /**
  1321. * ipr_log_enhanced_cache_error - Log a cache error.
  1322. * @ioa_cfg: ioa config struct
  1323. * @hostrcb: hostrcb struct
  1324. *
  1325. * Return value:
  1326. * none
  1327. **/
  1328. static void ipr_log_enhanced_cache_error(struct ipr_ioa_cfg *ioa_cfg,
  1329. struct ipr_hostrcb *hostrcb)
  1330. {
  1331. struct ipr_hostrcb_type_12_error *error;
  1332. if (ioa_cfg->sis64)
  1333. error = &hostrcb->hcam.u.error64.u.type_12_error;
  1334. else
  1335. error = &hostrcb->hcam.u.error.u.type_12_error;
  1336. ipr_err("-----Current Configuration-----\n");
  1337. ipr_err("Cache Directory Card Information:\n");
  1338. ipr_log_ext_vpd(&error->ioa_vpd);
  1339. ipr_err("Adapter Card Information:\n");
  1340. ipr_log_ext_vpd(&error->cfc_vpd);
  1341. ipr_err("-----Expected Configuration-----\n");
  1342. ipr_err("Cache Directory Card Information:\n");
  1343. ipr_log_ext_vpd(&error->ioa_last_attached_to_cfc_vpd);
  1344. ipr_err("Adapter Card Information:\n");
  1345. ipr_log_ext_vpd(&error->cfc_last_attached_to_ioa_vpd);
  1346. ipr_err("Additional IOA Data: %08X %08X %08X\n",
  1347. be32_to_cpu(error->ioa_data[0]),
  1348. be32_to_cpu(error->ioa_data[1]),
  1349. be32_to_cpu(error->ioa_data[2]));
  1350. }
  1351. /**
  1352. * ipr_log_cache_error - Log a cache error.
  1353. * @ioa_cfg: ioa config struct
  1354. * @hostrcb: hostrcb struct
  1355. *
  1356. * Return value:
  1357. * none
  1358. **/
  1359. static void ipr_log_cache_error(struct ipr_ioa_cfg *ioa_cfg,
  1360. struct ipr_hostrcb *hostrcb)
  1361. {
  1362. struct ipr_hostrcb_type_02_error *error =
  1363. &hostrcb->hcam.u.error.u.type_02_error;
  1364. ipr_err("-----Current Configuration-----\n");
  1365. ipr_err("Cache Directory Card Information:\n");
  1366. ipr_log_vpd(&error->ioa_vpd);
  1367. ipr_err("Adapter Card Information:\n");
  1368. ipr_log_vpd(&error->cfc_vpd);
  1369. ipr_err("-----Expected Configuration-----\n");
  1370. ipr_err("Cache Directory Card Information:\n");
  1371. ipr_log_vpd(&error->ioa_last_attached_to_cfc_vpd);
  1372. ipr_err("Adapter Card Information:\n");
  1373. ipr_log_vpd(&error->cfc_last_attached_to_ioa_vpd);
  1374. ipr_err("Additional IOA Data: %08X %08X %08X\n",
  1375. be32_to_cpu(error->ioa_data[0]),
  1376. be32_to_cpu(error->ioa_data[1]),
  1377. be32_to_cpu(error->ioa_data[2]));
  1378. }
  1379. /**
  1380. * ipr_log_enhanced_config_error - Log a configuration error.
  1381. * @ioa_cfg: ioa config struct
  1382. * @hostrcb: hostrcb struct
  1383. *
  1384. * Return value:
  1385. * none
  1386. **/
  1387. static void ipr_log_enhanced_config_error(struct ipr_ioa_cfg *ioa_cfg,
  1388. struct ipr_hostrcb *hostrcb)
  1389. {
  1390. int errors_logged, i;
  1391. struct ipr_hostrcb_device_data_entry_enhanced *dev_entry;
  1392. struct ipr_hostrcb_type_13_error *error;
  1393. error = &hostrcb->hcam.u.error.u.type_13_error;
  1394. errors_logged = be32_to_cpu(error->errors_logged);
  1395. ipr_err("Device Errors Detected/Logged: %d/%d\n",
  1396. be32_to_cpu(error->errors_detected), errors_logged);
  1397. dev_entry = error->dev;
  1398. for (i = 0; i < errors_logged; i++, dev_entry++) {
  1399. ipr_err_separator;
  1400. ipr_phys_res_err(ioa_cfg, dev_entry->dev_res_addr, "Device %d", i + 1);
  1401. ipr_log_ext_vpd(&dev_entry->vpd);
  1402. ipr_err("-----New Device Information-----\n");
  1403. ipr_log_ext_vpd(&dev_entry->new_vpd);
  1404. ipr_err("Cache Directory Card Information:\n");
  1405. ipr_log_ext_vpd(&dev_entry->ioa_last_with_dev_vpd);
  1406. ipr_err("Adapter Card Information:\n");
  1407. ipr_log_ext_vpd(&dev_entry->cfc_last_with_dev_vpd);
  1408. }
  1409. }
  1410. /**
  1411. * ipr_log_sis64_config_error - Log a device error.
  1412. * @ioa_cfg: ioa config struct
  1413. * @hostrcb: hostrcb struct
  1414. *
  1415. * Return value:
  1416. * none
  1417. **/
  1418. static void ipr_log_sis64_config_error(struct ipr_ioa_cfg *ioa_cfg,
  1419. struct ipr_hostrcb *hostrcb)
  1420. {
  1421. int errors_logged, i;
  1422. struct ipr_hostrcb64_device_data_entry_enhanced *dev_entry;
  1423. struct ipr_hostrcb_type_23_error *error;
  1424. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1425. error = &hostrcb->hcam.u.error64.u.type_23_error;
  1426. errors_logged = be32_to_cpu(error->errors_logged);
  1427. ipr_err("Device Errors Detected/Logged: %d/%d\n",
  1428. be32_to_cpu(error->errors_detected), errors_logged);
  1429. dev_entry = error->dev;
  1430. for (i = 0; i < errors_logged; i++, dev_entry++) {
  1431. ipr_err_separator;
  1432. ipr_err("Device %d : %s", i + 1,
  1433. ipr_format_res_path(dev_entry->res_path, buffer,
  1434. sizeof(buffer)));
  1435. ipr_log_ext_vpd(&dev_entry->vpd);
  1436. ipr_err("-----New Device Information-----\n");
  1437. ipr_log_ext_vpd(&dev_entry->new_vpd);
  1438. ipr_err("Cache Directory Card Information:\n");
  1439. ipr_log_ext_vpd(&dev_entry->ioa_last_with_dev_vpd);
  1440. ipr_err("Adapter Card Information:\n");
  1441. ipr_log_ext_vpd(&dev_entry->cfc_last_with_dev_vpd);
  1442. }
  1443. }
  1444. /**
  1445. * ipr_log_config_error - Log a configuration error.
  1446. * @ioa_cfg: ioa config struct
  1447. * @hostrcb: hostrcb struct
  1448. *
  1449. * Return value:
  1450. * none
  1451. **/
  1452. static void ipr_log_config_error(struct ipr_ioa_cfg *ioa_cfg,
  1453. struct ipr_hostrcb *hostrcb)
  1454. {
  1455. int errors_logged, i;
  1456. struct ipr_hostrcb_device_data_entry *dev_entry;
  1457. struct ipr_hostrcb_type_03_error *error;
  1458. error = &hostrcb->hcam.u.error.u.type_03_error;
  1459. errors_logged = be32_to_cpu(error->errors_logged);
  1460. ipr_err("Device Errors Detected/Logged: %d/%d\n",
  1461. be32_to_cpu(error->errors_detected), errors_logged);
  1462. dev_entry = error->dev;
  1463. for (i = 0; i < errors_logged; i++, dev_entry++) {
  1464. ipr_err_separator;
  1465. ipr_phys_res_err(ioa_cfg, dev_entry->dev_res_addr, "Device %d", i + 1);
  1466. ipr_log_vpd(&dev_entry->vpd);
  1467. ipr_err("-----New Device Information-----\n");
  1468. ipr_log_vpd(&dev_entry->new_vpd);
  1469. ipr_err("Cache Directory Card Information:\n");
  1470. ipr_log_vpd(&dev_entry->ioa_last_with_dev_vpd);
  1471. ipr_err("Adapter Card Information:\n");
  1472. ipr_log_vpd(&dev_entry->cfc_last_with_dev_vpd);
  1473. ipr_err("Additional IOA Data: %08X %08X %08X %08X %08X\n",
  1474. be32_to_cpu(dev_entry->ioa_data[0]),
  1475. be32_to_cpu(dev_entry->ioa_data[1]),
  1476. be32_to_cpu(dev_entry->ioa_data[2]),
  1477. be32_to_cpu(dev_entry->ioa_data[3]),
  1478. be32_to_cpu(dev_entry->ioa_data[4]));
  1479. }
  1480. }
  1481. /**
  1482. * ipr_log_enhanced_array_error - Log an array configuration error.
  1483. * @ioa_cfg: ioa config struct
  1484. * @hostrcb: hostrcb struct
  1485. *
  1486. * Return value:
  1487. * none
  1488. **/
  1489. static void ipr_log_enhanced_array_error(struct ipr_ioa_cfg *ioa_cfg,
  1490. struct ipr_hostrcb *hostrcb)
  1491. {
  1492. int i, num_entries;
  1493. struct ipr_hostrcb_type_14_error *error;
  1494. struct ipr_hostrcb_array_data_entry_enhanced *array_entry;
  1495. const u8 zero_sn[IPR_SERIAL_NUM_LEN] = { [0 ... IPR_SERIAL_NUM_LEN-1] = '0' };
  1496. error = &hostrcb->hcam.u.error.u.type_14_error;
  1497. ipr_err_separator;
  1498. ipr_err("RAID %s Array Configuration: %d:%d:%d:%d\n",
  1499. error->protection_level,
  1500. ioa_cfg->host->host_no,
  1501. error->last_func_vset_res_addr.bus,
  1502. error->last_func_vset_res_addr.target,
  1503. error->last_func_vset_res_addr.lun);
  1504. ipr_err_separator;
  1505. array_entry = error->array_member;
  1506. num_entries = min_t(u32, be32_to_cpu(error->num_entries),
  1507. ARRAY_SIZE(error->array_member));
  1508. for (i = 0; i < num_entries; i++, array_entry++) {
  1509. if (!memcmp(array_entry->vpd.vpd.sn, zero_sn, IPR_SERIAL_NUM_LEN))
  1510. continue;
  1511. if (be32_to_cpu(error->exposed_mode_adn) == i)
  1512. ipr_err("Exposed Array Member %d:\n", i);
  1513. else
  1514. ipr_err("Array Member %d:\n", i);
  1515. ipr_log_ext_vpd(&array_entry->vpd);
  1516. ipr_phys_res_err(ioa_cfg, array_entry->dev_res_addr, "Current Location");
  1517. ipr_phys_res_err(ioa_cfg, array_entry->expected_dev_res_addr,
  1518. "Expected Location");
  1519. ipr_err_separator;
  1520. }
  1521. }
  1522. /**
  1523. * ipr_log_array_error - Log an array configuration error.
  1524. * @ioa_cfg: ioa config struct
  1525. * @hostrcb: hostrcb struct
  1526. *
  1527. * Return value:
  1528. * none
  1529. **/
  1530. static void ipr_log_array_error(struct ipr_ioa_cfg *ioa_cfg,
  1531. struct ipr_hostrcb *hostrcb)
  1532. {
  1533. int i;
  1534. struct ipr_hostrcb_type_04_error *error;
  1535. struct ipr_hostrcb_array_data_entry *array_entry;
  1536. const u8 zero_sn[IPR_SERIAL_NUM_LEN] = { [0 ... IPR_SERIAL_NUM_LEN-1] = '0' };
  1537. error = &hostrcb->hcam.u.error.u.type_04_error;
  1538. ipr_err_separator;
  1539. ipr_err("RAID %s Array Configuration: %d:%d:%d:%d\n",
  1540. error->protection_level,
  1541. ioa_cfg->host->host_no,
  1542. error->last_func_vset_res_addr.bus,
  1543. error->last_func_vset_res_addr.target,
  1544. error->last_func_vset_res_addr.lun);
  1545. ipr_err_separator;
  1546. array_entry = error->array_member;
  1547. for (i = 0; i < 18; i++) {
  1548. if (!memcmp(array_entry->vpd.sn, zero_sn, IPR_SERIAL_NUM_LEN))
  1549. continue;
  1550. if (be32_to_cpu(error->exposed_mode_adn) == i)
  1551. ipr_err("Exposed Array Member %d:\n", i);
  1552. else
  1553. ipr_err("Array Member %d:\n", i);
  1554. ipr_log_vpd(&array_entry->vpd);
  1555. ipr_phys_res_err(ioa_cfg, array_entry->dev_res_addr, "Current Location");
  1556. ipr_phys_res_err(ioa_cfg, array_entry->expected_dev_res_addr,
  1557. "Expected Location");
  1558. ipr_err_separator;
  1559. if (i == 9)
  1560. array_entry = error->array_member2;
  1561. else
  1562. array_entry++;
  1563. }
  1564. }
  1565. /**
  1566. * ipr_log_hex_data - Log additional hex IOA error data.
  1567. * @ioa_cfg: ioa config struct
  1568. * @data: IOA error data
  1569. * @len: data length
  1570. *
  1571. * Return value:
  1572. * none
  1573. **/
  1574. static void ipr_log_hex_data(struct ipr_ioa_cfg *ioa_cfg, u32 *data, int len)
  1575. {
  1576. int i;
  1577. if (len == 0)
  1578. return;
  1579. if (ioa_cfg->log_level <= IPR_DEFAULT_LOG_LEVEL)
  1580. len = min_t(int, len, IPR_DEFAULT_MAX_ERROR_DUMP);
  1581. for (i = 0; i < len / 4; i += 4) {
  1582. ipr_err("%08X: %08X %08X %08X %08X\n", i*4,
  1583. be32_to_cpu(data[i]),
  1584. be32_to_cpu(data[i+1]),
  1585. be32_to_cpu(data[i+2]),
  1586. be32_to_cpu(data[i+3]));
  1587. }
  1588. }
  1589. /**
  1590. * ipr_log_enhanced_dual_ioa_error - Log an enhanced dual adapter error.
  1591. * @ioa_cfg: ioa config struct
  1592. * @hostrcb: hostrcb struct
  1593. *
  1594. * Return value:
  1595. * none
  1596. **/
  1597. static void ipr_log_enhanced_dual_ioa_error(struct ipr_ioa_cfg *ioa_cfg,
  1598. struct ipr_hostrcb *hostrcb)
  1599. {
  1600. struct ipr_hostrcb_type_17_error *error;
  1601. if (ioa_cfg->sis64)
  1602. error = &hostrcb->hcam.u.error64.u.type_17_error;
  1603. else
  1604. error = &hostrcb->hcam.u.error.u.type_17_error;
  1605. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  1606. strim(error->failure_reason);
  1607. ipr_hcam_err(hostrcb, "%s [PRC: %08X]\n", error->failure_reason,
  1608. be32_to_cpu(hostrcb->hcam.u.error.prc));
  1609. ipr_log_ext_vpd_compact("Remote IOA", hostrcb, &error->vpd);
  1610. ipr_log_hex_data(ioa_cfg, error->data,
  1611. be32_to_cpu(hostrcb->hcam.length) -
  1612. (offsetof(struct ipr_hostrcb_error, u) +
  1613. offsetof(struct ipr_hostrcb_type_17_error, data)));
  1614. }
  1615. /**
  1616. * ipr_log_dual_ioa_error - Log a dual adapter error.
  1617. * @ioa_cfg: ioa config struct
  1618. * @hostrcb: hostrcb struct
  1619. *
  1620. * Return value:
  1621. * none
  1622. **/
  1623. static void ipr_log_dual_ioa_error(struct ipr_ioa_cfg *ioa_cfg,
  1624. struct ipr_hostrcb *hostrcb)
  1625. {
  1626. struct ipr_hostrcb_type_07_error *error;
  1627. error = &hostrcb->hcam.u.error.u.type_07_error;
  1628. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  1629. strim(error->failure_reason);
  1630. ipr_hcam_err(hostrcb, "%s [PRC: %08X]\n", error->failure_reason,
  1631. be32_to_cpu(hostrcb->hcam.u.error.prc));
  1632. ipr_log_vpd_compact("Remote IOA", hostrcb, &error->vpd);
  1633. ipr_log_hex_data(ioa_cfg, error->data,
  1634. be32_to_cpu(hostrcb->hcam.length) -
  1635. (offsetof(struct ipr_hostrcb_error, u) +
  1636. offsetof(struct ipr_hostrcb_type_07_error, data)));
  1637. }
  1638. static const struct {
  1639. u8 active;
  1640. char *desc;
  1641. } path_active_desc[] = {
  1642. { IPR_PATH_NO_INFO, "Path" },
  1643. { IPR_PATH_ACTIVE, "Active path" },
  1644. { IPR_PATH_NOT_ACTIVE, "Inactive path" }
  1645. };
  1646. static const struct {
  1647. u8 state;
  1648. char *desc;
  1649. } path_state_desc[] = {
  1650. { IPR_PATH_STATE_NO_INFO, "has no path state information available" },
  1651. { IPR_PATH_HEALTHY, "is healthy" },
  1652. { IPR_PATH_DEGRADED, "is degraded" },
  1653. { IPR_PATH_FAILED, "is failed" }
  1654. };
  1655. /**
  1656. * ipr_log_fabric_path - Log a fabric path error
  1657. * @hostrcb: hostrcb struct
  1658. * @fabric: fabric descriptor
  1659. *
  1660. * Return value:
  1661. * none
  1662. **/
  1663. static void ipr_log_fabric_path(struct ipr_hostrcb *hostrcb,
  1664. struct ipr_hostrcb_fabric_desc *fabric)
  1665. {
  1666. int i, j;
  1667. u8 path_state = fabric->path_state;
  1668. u8 active = path_state & IPR_PATH_ACTIVE_MASK;
  1669. u8 state = path_state & IPR_PATH_STATE_MASK;
  1670. for (i = 0; i < ARRAY_SIZE(path_active_desc); i++) {
  1671. if (path_active_desc[i].active != active)
  1672. continue;
  1673. for (j = 0; j < ARRAY_SIZE(path_state_desc); j++) {
  1674. if (path_state_desc[j].state != state)
  1675. continue;
  1676. if (fabric->cascaded_expander == 0xff && fabric->phy == 0xff) {
  1677. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d\n",
  1678. path_active_desc[i].desc, path_state_desc[j].desc,
  1679. fabric->ioa_port);
  1680. } else if (fabric->cascaded_expander == 0xff) {
  1681. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d, Phy=%d\n",
  1682. path_active_desc[i].desc, path_state_desc[j].desc,
  1683. fabric->ioa_port, fabric->phy);
  1684. } else if (fabric->phy == 0xff) {
  1685. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d, Cascade=%d\n",
  1686. path_active_desc[i].desc, path_state_desc[j].desc,
  1687. fabric->ioa_port, fabric->cascaded_expander);
  1688. } else {
  1689. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d, Cascade=%d, Phy=%d\n",
  1690. path_active_desc[i].desc, path_state_desc[j].desc,
  1691. fabric->ioa_port, fabric->cascaded_expander, fabric->phy);
  1692. }
  1693. return;
  1694. }
  1695. }
  1696. ipr_err("Path state=%02X IOA Port=%d Cascade=%d Phy=%d\n", path_state,
  1697. fabric->ioa_port, fabric->cascaded_expander, fabric->phy);
  1698. }
  1699. /**
  1700. * ipr_log64_fabric_path - Log a fabric path error
  1701. * @hostrcb: hostrcb struct
  1702. * @fabric: fabric descriptor
  1703. *
  1704. * Return value:
  1705. * none
  1706. **/
  1707. static void ipr_log64_fabric_path(struct ipr_hostrcb *hostrcb,
  1708. struct ipr_hostrcb64_fabric_desc *fabric)
  1709. {
  1710. int i, j;
  1711. u8 path_state = fabric->path_state;
  1712. u8 active = path_state & IPR_PATH_ACTIVE_MASK;
  1713. u8 state = path_state & IPR_PATH_STATE_MASK;
  1714. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1715. for (i = 0; i < ARRAY_SIZE(path_active_desc); i++) {
  1716. if (path_active_desc[i].active != active)
  1717. continue;
  1718. for (j = 0; j < ARRAY_SIZE(path_state_desc); j++) {
  1719. if (path_state_desc[j].state != state)
  1720. continue;
  1721. ipr_hcam_err(hostrcb, "%s %s: Resource Path=%s\n",
  1722. path_active_desc[i].desc, path_state_desc[j].desc,
  1723. ipr_format_res_path(fabric->res_path, buffer,
  1724. sizeof(buffer)));
  1725. return;
  1726. }
  1727. }
  1728. ipr_err("Path state=%02X Resource Path=%s\n", path_state,
  1729. ipr_format_res_path(fabric->res_path, buffer, sizeof(buffer)));
  1730. }
  1731. static const struct {
  1732. u8 type;
  1733. char *desc;
  1734. } path_type_desc[] = {
  1735. { IPR_PATH_CFG_IOA_PORT, "IOA port" },
  1736. { IPR_PATH_CFG_EXP_PORT, "Expander port" },
  1737. { IPR_PATH_CFG_DEVICE_PORT, "Device port" },
  1738. { IPR_PATH_CFG_DEVICE_LUN, "Device LUN" }
  1739. };
  1740. static const struct {
  1741. u8 status;
  1742. char *desc;
  1743. } path_status_desc[] = {
  1744. { IPR_PATH_CFG_NO_PROB, "Functional" },
  1745. { IPR_PATH_CFG_DEGRADED, "Degraded" },
  1746. { IPR_PATH_CFG_FAILED, "Failed" },
  1747. { IPR_PATH_CFG_SUSPECT, "Suspect" },
  1748. { IPR_PATH_NOT_DETECTED, "Missing" },
  1749. { IPR_PATH_INCORRECT_CONN, "Incorrectly connected" }
  1750. };
  1751. static const char *link_rate[] = {
  1752. "unknown",
  1753. "disabled",
  1754. "phy reset problem",
  1755. "spinup hold",
  1756. "port selector",
  1757. "unknown",
  1758. "unknown",
  1759. "unknown",
  1760. "1.5Gbps",
  1761. "3.0Gbps",
  1762. "unknown",
  1763. "unknown",
  1764. "unknown",
  1765. "unknown",
  1766. "unknown",
  1767. "unknown"
  1768. };
  1769. /**
  1770. * ipr_log_path_elem - Log a fabric path element.
  1771. * @hostrcb: hostrcb struct
  1772. * @cfg: fabric path element struct
  1773. *
  1774. * Return value:
  1775. * none
  1776. **/
  1777. static void ipr_log_path_elem(struct ipr_hostrcb *hostrcb,
  1778. struct ipr_hostrcb_config_element *cfg)
  1779. {
  1780. int i, j;
  1781. u8 type = cfg->type_status & IPR_PATH_CFG_TYPE_MASK;
  1782. u8 status = cfg->type_status & IPR_PATH_CFG_STATUS_MASK;
  1783. if (type == IPR_PATH_CFG_NOT_EXIST)
  1784. return;
  1785. for (i = 0; i < ARRAY_SIZE(path_type_desc); i++) {
  1786. if (path_type_desc[i].type != type)
  1787. continue;
  1788. for (j = 0; j < ARRAY_SIZE(path_status_desc); j++) {
  1789. if (path_status_desc[j].status != status)
  1790. continue;
  1791. if (type == IPR_PATH_CFG_IOA_PORT) {
  1792. ipr_hcam_err(hostrcb, "%s %s: Phy=%d, Link rate=%s, WWN=%08X%08X\n",
  1793. path_status_desc[j].desc, path_type_desc[i].desc,
  1794. cfg->phy, link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1795. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1796. } else {
  1797. if (cfg->cascaded_expander == 0xff && cfg->phy == 0xff) {
  1798. ipr_hcam_err(hostrcb, "%s %s: Link rate=%s, WWN=%08X%08X\n",
  1799. path_status_desc[j].desc, path_type_desc[i].desc,
  1800. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1801. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1802. } else if (cfg->cascaded_expander == 0xff) {
  1803. ipr_hcam_err(hostrcb, "%s %s: Phy=%d, Link rate=%s, "
  1804. "WWN=%08X%08X\n", path_status_desc[j].desc,
  1805. path_type_desc[i].desc, cfg->phy,
  1806. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1807. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1808. } else if (cfg->phy == 0xff) {
  1809. ipr_hcam_err(hostrcb, "%s %s: Cascade=%d, Link rate=%s, "
  1810. "WWN=%08X%08X\n", path_status_desc[j].desc,
  1811. path_type_desc[i].desc, cfg->cascaded_expander,
  1812. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1813. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1814. } else {
  1815. ipr_hcam_err(hostrcb, "%s %s: Cascade=%d, Phy=%d, Link rate=%s "
  1816. "WWN=%08X%08X\n", path_status_desc[j].desc,
  1817. path_type_desc[i].desc, cfg->cascaded_expander, cfg->phy,
  1818. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1819. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1820. }
  1821. }
  1822. return;
  1823. }
  1824. }
  1825. ipr_hcam_err(hostrcb, "Path element=%02X: Cascade=%d Phy=%d Link rate=%s "
  1826. "WWN=%08X%08X\n", cfg->type_status, cfg->cascaded_expander, cfg->phy,
  1827. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1828. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1829. }
  1830. /**
  1831. * ipr_log64_path_elem - Log a fabric path element.
  1832. * @hostrcb: hostrcb struct
  1833. * @cfg: fabric path element struct
  1834. *
  1835. * Return value:
  1836. * none
  1837. **/
  1838. static void ipr_log64_path_elem(struct ipr_hostrcb *hostrcb,
  1839. struct ipr_hostrcb64_config_element *cfg)
  1840. {
  1841. int i, j;
  1842. u8 desc_id = cfg->descriptor_id & IPR_DESCRIPTOR_MASK;
  1843. u8 type = cfg->type_status & IPR_PATH_CFG_TYPE_MASK;
  1844. u8 status = cfg->type_status & IPR_PATH_CFG_STATUS_MASK;
  1845. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1846. if (type == IPR_PATH_CFG_NOT_EXIST || desc_id != IPR_DESCRIPTOR_SIS64)
  1847. return;
  1848. for (i = 0; i < ARRAY_SIZE(path_type_desc); i++) {
  1849. if (path_type_desc[i].type != type)
  1850. continue;
  1851. for (j = 0; j < ARRAY_SIZE(path_status_desc); j++) {
  1852. if (path_status_desc[j].status != status)
  1853. continue;
  1854. ipr_hcam_err(hostrcb, "%s %s: Resource Path=%s, Link rate=%s, WWN=%08X%08X\n",
  1855. path_status_desc[j].desc, path_type_desc[i].desc,
  1856. ipr_format_res_path(cfg->res_path, buffer,
  1857. sizeof(buffer)),
  1858. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1859. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1860. return;
  1861. }
  1862. }
  1863. ipr_hcam_err(hostrcb, "Path element=%02X: Resource Path=%s, Link rate=%s "
  1864. "WWN=%08X%08X\n", cfg->type_status,
  1865. ipr_format_res_path(cfg->res_path, buffer, sizeof(buffer)),
  1866. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1867. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1868. }
  1869. /**
  1870. * ipr_log_fabric_error - Log a fabric error.
  1871. * @ioa_cfg: ioa config struct
  1872. * @hostrcb: hostrcb struct
  1873. *
  1874. * Return value:
  1875. * none
  1876. **/
  1877. static void ipr_log_fabric_error(struct ipr_ioa_cfg *ioa_cfg,
  1878. struct ipr_hostrcb *hostrcb)
  1879. {
  1880. struct ipr_hostrcb_type_20_error *error;
  1881. struct ipr_hostrcb_fabric_desc *fabric;
  1882. struct ipr_hostrcb_config_element *cfg;
  1883. int i, add_len;
  1884. error = &hostrcb->hcam.u.error.u.type_20_error;
  1885. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  1886. ipr_hcam_err(hostrcb, "%s\n", error->failure_reason);
  1887. add_len = be32_to_cpu(hostrcb->hcam.length) -
  1888. (offsetof(struct ipr_hostrcb_error, u) +
  1889. offsetof(struct ipr_hostrcb_type_20_error, desc));
  1890. for (i = 0, fabric = error->desc; i < error->num_entries; i++) {
  1891. ipr_log_fabric_path(hostrcb, fabric);
  1892. for_each_fabric_cfg(fabric, cfg)
  1893. ipr_log_path_elem(hostrcb, cfg);
  1894. add_len -= be16_to_cpu(fabric->length);
  1895. fabric = (struct ipr_hostrcb_fabric_desc *)
  1896. ((unsigned long)fabric + be16_to_cpu(fabric->length));
  1897. }
  1898. ipr_log_hex_data(ioa_cfg, (u32 *)fabric, add_len);
  1899. }
  1900. /**
  1901. * ipr_log_sis64_array_error - Log a sis64 array error.
  1902. * @ioa_cfg: ioa config struct
  1903. * @hostrcb: hostrcb struct
  1904. *
  1905. * Return value:
  1906. * none
  1907. **/
  1908. static void ipr_log_sis64_array_error(struct ipr_ioa_cfg *ioa_cfg,
  1909. struct ipr_hostrcb *hostrcb)
  1910. {
  1911. int i, num_entries;
  1912. struct ipr_hostrcb_type_24_error *error;
  1913. struct ipr_hostrcb64_array_data_entry *array_entry;
  1914. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1915. const u8 zero_sn[IPR_SERIAL_NUM_LEN] = { [0 ... IPR_SERIAL_NUM_LEN-1] = '0' };
  1916. error = &hostrcb->hcam.u.error64.u.type_24_error;
  1917. ipr_err_separator;
  1918. ipr_err("RAID %s Array Configuration: %s\n",
  1919. error->protection_level,
  1920. ipr_format_res_path(error->last_res_path, buffer, sizeof(buffer)));
  1921. ipr_err_separator;
  1922. array_entry = error->array_member;
  1923. num_entries = min_t(u32, error->num_entries,
  1924. ARRAY_SIZE(error->array_member));
  1925. for (i = 0; i < num_entries; i++, array_entry++) {
  1926. if (!memcmp(array_entry->vpd.vpd.sn, zero_sn, IPR_SERIAL_NUM_LEN))
  1927. continue;
  1928. if (error->exposed_mode_adn == i)
  1929. ipr_err("Exposed Array Member %d:\n", i);
  1930. else
  1931. ipr_err("Array Member %d:\n", i);
  1932. ipr_err("Array Member %d:\n", i);
  1933. ipr_log_ext_vpd(&array_entry->vpd);
  1934. ipr_err("Current Location: %s\n",
  1935. ipr_format_res_path(array_entry->res_path, buffer,
  1936. sizeof(buffer)));
  1937. ipr_err("Expected Location: %s\n",
  1938. ipr_format_res_path(array_entry->expected_res_path,
  1939. buffer, sizeof(buffer)));
  1940. ipr_err_separator;
  1941. }
  1942. }
  1943. /**
  1944. * ipr_log_sis64_fabric_error - Log a sis64 fabric error.
  1945. * @ioa_cfg: ioa config struct
  1946. * @hostrcb: hostrcb struct
  1947. *
  1948. * Return value:
  1949. * none
  1950. **/
  1951. static void ipr_log_sis64_fabric_error(struct ipr_ioa_cfg *ioa_cfg,
  1952. struct ipr_hostrcb *hostrcb)
  1953. {
  1954. struct ipr_hostrcb_type_30_error *error;
  1955. struct ipr_hostrcb64_fabric_desc *fabric;
  1956. struct ipr_hostrcb64_config_element *cfg;
  1957. int i, add_len;
  1958. error = &hostrcb->hcam.u.error64.u.type_30_error;
  1959. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  1960. ipr_hcam_err(hostrcb, "%s\n", error->failure_reason);
  1961. add_len = be32_to_cpu(hostrcb->hcam.length) -
  1962. (offsetof(struct ipr_hostrcb64_error, u) +
  1963. offsetof(struct ipr_hostrcb_type_30_error, desc));
  1964. for (i = 0, fabric = error->desc; i < error->num_entries; i++) {
  1965. ipr_log64_fabric_path(hostrcb, fabric);
  1966. for_each_fabric_cfg(fabric, cfg)
  1967. ipr_log64_path_elem(hostrcb, cfg);
  1968. add_len -= be16_to_cpu(fabric->length);
  1969. fabric = (struct ipr_hostrcb64_fabric_desc *)
  1970. ((unsigned long)fabric + be16_to_cpu(fabric->length));
  1971. }
  1972. ipr_log_hex_data(ioa_cfg, (u32 *)fabric, add_len);
  1973. }
  1974. /**
  1975. * ipr_log_generic_error - Log an adapter error.
  1976. * @ioa_cfg: ioa config struct
  1977. * @hostrcb: hostrcb struct
  1978. *
  1979. * Return value:
  1980. * none
  1981. **/
  1982. static void ipr_log_generic_error(struct ipr_ioa_cfg *ioa_cfg,
  1983. struct ipr_hostrcb *hostrcb)
  1984. {
  1985. ipr_log_hex_data(ioa_cfg, hostrcb->hcam.u.raw.data,
  1986. be32_to_cpu(hostrcb->hcam.length));
  1987. }
  1988. /**
  1989. * ipr_get_error - Find the specfied IOASC in the ipr_error_table.
  1990. * @ioasc: IOASC
  1991. *
  1992. * This function will return the index of into the ipr_error_table
  1993. * for the specified IOASC. If the IOASC is not in the table,
  1994. * 0 will be returned, which points to the entry used for unknown errors.
  1995. *
  1996. * Return value:
  1997. * index into the ipr_error_table
  1998. **/
  1999. static u32 ipr_get_error(u32 ioasc)
  2000. {
  2001. int i;
  2002. for (i = 0; i < ARRAY_SIZE(ipr_error_table); i++)
  2003. if (ipr_error_table[i].ioasc == (ioasc & IPR_IOASC_IOASC_MASK))
  2004. return i;
  2005. return 0;
  2006. }
  2007. /**
  2008. * ipr_handle_log_data - Log an adapter error.
  2009. * @ioa_cfg: ioa config struct
  2010. * @hostrcb: hostrcb struct
  2011. *
  2012. * This function logs an adapter error to the system.
  2013. *
  2014. * Return value:
  2015. * none
  2016. **/
  2017. static void ipr_handle_log_data(struct ipr_ioa_cfg *ioa_cfg,
  2018. struct ipr_hostrcb *hostrcb)
  2019. {
  2020. u32 ioasc;
  2021. int error_index;
  2022. if (hostrcb->hcam.notify_type != IPR_HOST_RCB_NOTIF_TYPE_ERROR_LOG_ENTRY)
  2023. return;
  2024. if (hostrcb->hcam.notifications_lost == IPR_HOST_RCB_NOTIFICATIONS_LOST)
  2025. dev_err(&ioa_cfg->pdev->dev, "Error notifications lost\n");
  2026. if (ioa_cfg->sis64)
  2027. ioasc = be32_to_cpu(hostrcb->hcam.u.error64.fd_ioasc);
  2028. else
  2029. ioasc = be32_to_cpu(hostrcb->hcam.u.error.fd_ioasc);
  2030. if (!ioa_cfg->sis64 && (ioasc == IPR_IOASC_BUS_WAS_RESET ||
  2031. ioasc == IPR_IOASC_BUS_WAS_RESET_BY_OTHER)) {
  2032. /* Tell the midlayer we had a bus reset so it will handle the UA properly */
  2033. scsi_report_bus_reset(ioa_cfg->host,
  2034. hostrcb->hcam.u.error.fd_res_addr.bus);
  2035. }
  2036. error_index = ipr_get_error(ioasc);
  2037. if (!ipr_error_table[error_index].log_hcam)
  2038. return;
  2039. ipr_hcam_err(hostrcb, "%s\n", ipr_error_table[error_index].error);
  2040. /* Set indication we have logged an error */
  2041. ioa_cfg->errors_logged++;
  2042. if (ioa_cfg->log_level < ipr_error_table[error_index].log_hcam)
  2043. return;
  2044. if (be32_to_cpu(hostrcb->hcam.length) > sizeof(hostrcb->hcam.u.raw))
  2045. hostrcb->hcam.length = cpu_to_be32(sizeof(hostrcb->hcam.u.raw));
  2046. switch (hostrcb->hcam.overlay_id) {
  2047. case IPR_HOST_RCB_OVERLAY_ID_2:
  2048. ipr_log_cache_error(ioa_cfg, hostrcb);
  2049. break;
  2050. case IPR_HOST_RCB_OVERLAY_ID_3:
  2051. ipr_log_config_error(ioa_cfg, hostrcb);
  2052. break;
  2053. case IPR_HOST_RCB_OVERLAY_ID_4:
  2054. case IPR_HOST_RCB_OVERLAY_ID_6:
  2055. ipr_log_array_error(ioa_cfg, hostrcb);
  2056. break;
  2057. case IPR_HOST_RCB_OVERLAY_ID_7:
  2058. ipr_log_dual_ioa_error(ioa_cfg, hostrcb);
  2059. break;
  2060. case IPR_HOST_RCB_OVERLAY_ID_12:
  2061. ipr_log_enhanced_cache_error(ioa_cfg, hostrcb);
  2062. break;
  2063. case IPR_HOST_RCB_OVERLAY_ID_13:
  2064. ipr_log_enhanced_config_error(ioa_cfg, hostrcb);
  2065. break;
  2066. case IPR_HOST_RCB_OVERLAY_ID_14:
  2067. case IPR_HOST_RCB_OVERLAY_ID_16:
  2068. ipr_log_enhanced_array_error(ioa_cfg, hostrcb);
  2069. break;
  2070. case IPR_HOST_RCB_OVERLAY_ID_17:
  2071. ipr_log_enhanced_dual_ioa_error(ioa_cfg, hostrcb);
  2072. break;
  2073. case IPR_HOST_RCB_OVERLAY_ID_20:
  2074. ipr_log_fabric_error(ioa_cfg, hostrcb);
  2075. break;
  2076. case IPR_HOST_RCB_OVERLAY_ID_23:
  2077. ipr_log_sis64_config_error(ioa_cfg, hostrcb);
  2078. break;
  2079. case IPR_HOST_RCB_OVERLAY_ID_24:
  2080. case IPR_HOST_RCB_OVERLAY_ID_26:
  2081. ipr_log_sis64_array_error(ioa_cfg, hostrcb);
  2082. break;
  2083. case IPR_HOST_RCB_OVERLAY_ID_30:
  2084. ipr_log_sis64_fabric_error(ioa_cfg, hostrcb);
  2085. break;
  2086. case IPR_HOST_RCB_OVERLAY_ID_1:
  2087. case IPR_HOST_RCB_OVERLAY_ID_DEFAULT:
  2088. default:
  2089. ipr_log_generic_error(ioa_cfg, hostrcb);
  2090. break;
  2091. }
  2092. }
  2093. /**
  2094. * ipr_process_error - Op done function for an adapter error log.
  2095. * @ipr_cmd: ipr command struct
  2096. *
  2097. * This function is the op done function for an error log host
  2098. * controlled async from the adapter. It will log the error and
  2099. * send the HCAM back to the adapter.
  2100. *
  2101. * Return value:
  2102. * none
  2103. **/
  2104. static void ipr_process_error(struct ipr_cmnd *ipr_cmd)
  2105. {
  2106. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  2107. struct ipr_hostrcb *hostrcb = ipr_cmd->u.hostrcb;
  2108. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  2109. u32 fd_ioasc;
  2110. if (ioa_cfg->sis64)
  2111. fd_ioasc = be32_to_cpu(hostrcb->hcam.u.error64.fd_ioasc);
  2112. else
  2113. fd_ioasc = be32_to_cpu(hostrcb->hcam.u.error.fd_ioasc);
  2114. list_del(&hostrcb->queue);
  2115. list_add_tail(&ipr_cmd->queue, &ioa_cfg->free_q);
  2116. if (!ioasc) {
  2117. ipr_handle_log_data(ioa_cfg, hostrcb);
  2118. if (fd_ioasc == IPR_IOASC_NR_IOA_RESET_REQUIRED)
  2119. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_ABBREV);
  2120. } else if (ioasc != IPR_IOASC_IOA_WAS_RESET) {
  2121. dev_err(&ioa_cfg->pdev->dev,
  2122. "Host RCB failed with IOASC: 0x%08X\n", ioasc);
  2123. }
  2124. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_LOG_DATA, hostrcb);
  2125. }
  2126. /**
  2127. * ipr_timeout - An internally generated op has timed out.
  2128. * @ipr_cmd: ipr command struct
  2129. *
  2130. * This function blocks host requests and initiates an
  2131. * adapter reset.
  2132. *
  2133. * Return value:
  2134. * none
  2135. **/
  2136. static void ipr_timeout(struct ipr_cmnd *ipr_cmd)
  2137. {
  2138. unsigned long lock_flags = 0;
  2139. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  2140. ENTER;
  2141. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2142. ioa_cfg->errors_logged++;
  2143. dev_err(&ioa_cfg->pdev->dev,
  2144. "Adapter being reset due to command timeout.\n");
  2145. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  2146. ioa_cfg->sdt_state = GET_DUMP;
  2147. if (!ioa_cfg->in_reset_reload || ioa_cfg->reset_cmd == ipr_cmd)
  2148. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  2149. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2150. LEAVE;
  2151. }
  2152. /**
  2153. * ipr_oper_timeout - Adapter timed out transitioning to operational
  2154. * @ipr_cmd: ipr command struct
  2155. *
  2156. * This function blocks host requests and initiates an
  2157. * adapter reset.
  2158. *
  2159. * Return value:
  2160. * none
  2161. **/
  2162. static void ipr_oper_timeout(struct ipr_cmnd *ipr_cmd)
  2163. {
  2164. unsigned long lock_flags = 0;
  2165. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  2166. ENTER;
  2167. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2168. ioa_cfg->errors_logged++;
  2169. dev_err(&ioa_cfg->pdev->dev,
  2170. "Adapter timed out transitioning to operational.\n");
  2171. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  2172. ioa_cfg->sdt_state = GET_DUMP;
  2173. if (!ioa_cfg->in_reset_reload || ioa_cfg->reset_cmd == ipr_cmd) {
  2174. if (ipr_fastfail)
  2175. ioa_cfg->reset_retries += IPR_NUM_RESET_RELOAD_RETRIES;
  2176. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  2177. }
  2178. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2179. LEAVE;
  2180. }
  2181. /**
  2182. * ipr_reset_reload - Reset/Reload the IOA
  2183. * @ioa_cfg: ioa config struct
  2184. * @shutdown_type: shutdown type
  2185. *
  2186. * This function resets the adapter and re-initializes it.
  2187. * This function assumes that all new host commands have been stopped.
  2188. * Return value:
  2189. * SUCCESS / FAILED
  2190. **/
  2191. static int ipr_reset_reload(struct ipr_ioa_cfg *ioa_cfg,
  2192. enum ipr_shutdown_type shutdown_type)
  2193. {
  2194. if (!ioa_cfg->in_reset_reload)
  2195. ipr_initiate_ioa_reset(ioa_cfg, shutdown_type);
  2196. spin_unlock_irq(ioa_cfg->host->host_lock);
  2197. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  2198. spin_lock_irq(ioa_cfg->host->host_lock);
  2199. /* If we got hit with a host reset while we were already resetting
  2200. the adapter for some reason, and the reset failed. */
  2201. if (ioa_cfg->ioa_is_dead) {
  2202. ipr_trace;
  2203. return FAILED;
  2204. }
  2205. return SUCCESS;
  2206. }
  2207. /**
  2208. * ipr_find_ses_entry - Find matching SES in SES table
  2209. * @res: resource entry struct of SES
  2210. *
  2211. * Return value:
  2212. * pointer to SES table entry / NULL on failure
  2213. **/
  2214. static const struct ipr_ses_table_entry *
  2215. ipr_find_ses_entry(struct ipr_resource_entry *res)
  2216. {
  2217. int i, j, matches;
  2218. struct ipr_std_inq_vpids *vpids;
  2219. const struct ipr_ses_table_entry *ste = ipr_ses_table;
  2220. for (i = 0; i < ARRAY_SIZE(ipr_ses_table); i++, ste++) {
  2221. for (j = 0, matches = 0; j < IPR_PROD_ID_LEN; j++) {
  2222. if (ste->compare_product_id_byte[j] == 'X') {
  2223. vpids = &res->std_inq_data.vpids;
  2224. if (vpids->product_id[j] == ste->product_id[j])
  2225. matches++;
  2226. else
  2227. break;
  2228. } else
  2229. matches++;
  2230. }
  2231. if (matches == IPR_PROD_ID_LEN)
  2232. return ste;
  2233. }
  2234. return NULL;
  2235. }
  2236. /**
  2237. * ipr_get_max_scsi_speed - Determine max SCSI speed for a given bus
  2238. * @ioa_cfg: ioa config struct
  2239. * @bus: SCSI bus
  2240. * @bus_width: bus width
  2241. *
  2242. * Return value:
  2243. * SCSI bus speed in units of 100KHz, 1600 is 160 MHz
  2244. * For a 2-byte wide SCSI bus, the maximum transfer speed is
  2245. * twice the maximum transfer rate (e.g. for a wide enabled bus,
  2246. * max 160MHz = max 320MB/sec).
  2247. **/
  2248. static u32 ipr_get_max_scsi_speed(struct ipr_ioa_cfg *ioa_cfg, u8 bus, u8 bus_width)
  2249. {
  2250. struct ipr_resource_entry *res;
  2251. const struct ipr_ses_table_entry *ste;
  2252. u32 max_xfer_rate = IPR_MAX_SCSI_RATE(bus_width);
  2253. /* Loop through each config table entry in the config table buffer */
  2254. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  2255. if (!(IPR_IS_SES_DEVICE(res->std_inq_data)))
  2256. continue;
  2257. if (bus != res->bus)
  2258. continue;
  2259. if (!(ste = ipr_find_ses_entry(res)))
  2260. continue;
  2261. max_xfer_rate = (ste->max_bus_speed_limit * 10) / (bus_width / 8);
  2262. }
  2263. return max_xfer_rate;
  2264. }
  2265. /**
  2266. * ipr_wait_iodbg_ack - Wait for an IODEBUG ACK from the IOA
  2267. * @ioa_cfg: ioa config struct
  2268. * @max_delay: max delay in micro-seconds to wait
  2269. *
  2270. * Waits for an IODEBUG ACK from the IOA, doing busy looping.
  2271. *
  2272. * Return value:
  2273. * 0 on success / other on failure
  2274. **/
  2275. static int ipr_wait_iodbg_ack(struct ipr_ioa_cfg *ioa_cfg, int max_delay)
  2276. {
  2277. volatile u32 pcii_reg;
  2278. int delay = 1;
  2279. /* Read interrupt reg until IOA signals IO Debug Acknowledge */
  2280. while (delay < max_delay) {
  2281. pcii_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  2282. if (pcii_reg & IPR_PCII_IO_DEBUG_ACKNOWLEDGE)
  2283. return 0;
  2284. /* udelay cannot be used if delay is more than a few milliseconds */
  2285. if ((delay / 1000) > MAX_UDELAY_MS)
  2286. mdelay(delay / 1000);
  2287. else
  2288. udelay(delay);
  2289. delay += delay;
  2290. }
  2291. return -EIO;
  2292. }
  2293. /**
  2294. * ipr_get_sis64_dump_data_section - Dump IOA memory
  2295. * @ioa_cfg: ioa config struct
  2296. * @start_addr: adapter address to dump
  2297. * @dest: destination kernel buffer
  2298. * @length_in_words: length to dump in 4 byte words
  2299. *
  2300. * Return value:
  2301. * 0 on success
  2302. **/
  2303. static int ipr_get_sis64_dump_data_section(struct ipr_ioa_cfg *ioa_cfg,
  2304. u32 start_addr,
  2305. __be32 *dest, u32 length_in_words)
  2306. {
  2307. int i;
  2308. for (i = 0; i < length_in_words; i++) {
  2309. writel(start_addr+(i*4), ioa_cfg->regs.dump_addr_reg);
  2310. *dest = cpu_to_be32(readl(ioa_cfg->regs.dump_data_reg));
  2311. dest++;
  2312. }
  2313. return 0;
  2314. }
  2315. /**
  2316. * ipr_get_ldump_data_section - Dump IOA memory
  2317. * @ioa_cfg: ioa config struct
  2318. * @start_addr: adapter address to dump
  2319. * @dest: destination kernel buffer
  2320. * @length_in_words: length to dump in 4 byte words
  2321. *
  2322. * Return value:
  2323. * 0 on success / -EIO on failure
  2324. **/
  2325. static int ipr_get_ldump_data_section(struct ipr_ioa_cfg *ioa_cfg,
  2326. u32 start_addr,
  2327. __be32 *dest, u32 length_in_words)
  2328. {
  2329. volatile u32 temp_pcii_reg;
  2330. int i, delay = 0;
  2331. if (ioa_cfg->sis64)
  2332. return ipr_get_sis64_dump_data_section(ioa_cfg, start_addr,
  2333. dest, length_in_words);
  2334. /* Write IOA interrupt reg starting LDUMP state */
  2335. writel((IPR_UPROCI_RESET_ALERT | IPR_UPROCI_IO_DEBUG_ALERT),
  2336. ioa_cfg->regs.set_uproc_interrupt_reg32);
  2337. /* Wait for IO debug acknowledge */
  2338. if (ipr_wait_iodbg_ack(ioa_cfg,
  2339. IPR_LDUMP_MAX_LONG_ACK_DELAY_IN_USEC)) {
  2340. dev_err(&ioa_cfg->pdev->dev,
  2341. "IOA dump long data transfer timeout\n");
  2342. return -EIO;
  2343. }
  2344. /* Signal LDUMP interlocked - clear IO debug ack */
  2345. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE,
  2346. ioa_cfg->regs.clr_interrupt_reg);
  2347. /* Write Mailbox with starting address */
  2348. writel(start_addr, ioa_cfg->ioa_mailbox);
  2349. /* Signal address valid - clear IOA Reset alert */
  2350. writel(IPR_UPROCI_RESET_ALERT,
  2351. ioa_cfg->regs.clr_uproc_interrupt_reg32);
  2352. for (i = 0; i < length_in_words; i++) {
  2353. /* Wait for IO debug acknowledge */
  2354. if (ipr_wait_iodbg_ack(ioa_cfg,
  2355. IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC)) {
  2356. dev_err(&ioa_cfg->pdev->dev,
  2357. "IOA dump short data transfer timeout\n");
  2358. return -EIO;
  2359. }
  2360. /* Read data from mailbox and increment destination pointer */
  2361. *dest = cpu_to_be32(readl(ioa_cfg->ioa_mailbox));
  2362. dest++;
  2363. /* For all but the last word of data, signal data received */
  2364. if (i < (length_in_words - 1)) {
  2365. /* Signal dump data received - Clear IO debug Ack */
  2366. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE,
  2367. ioa_cfg->regs.clr_interrupt_reg);
  2368. }
  2369. }
  2370. /* Signal end of block transfer. Set reset alert then clear IO debug ack */
  2371. writel(IPR_UPROCI_RESET_ALERT,
  2372. ioa_cfg->regs.set_uproc_interrupt_reg32);
  2373. writel(IPR_UPROCI_IO_DEBUG_ALERT,
  2374. ioa_cfg->regs.clr_uproc_interrupt_reg32);
  2375. /* Signal dump data received - Clear IO debug Ack */
  2376. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE,
  2377. ioa_cfg->regs.clr_interrupt_reg);
  2378. /* Wait for IOA to signal LDUMP exit - IOA reset alert will be cleared */
  2379. while (delay < IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC) {
  2380. temp_pcii_reg =
  2381. readl(ioa_cfg->regs.sense_uproc_interrupt_reg32);
  2382. if (!(temp_pcii_reg & IPR_UPROCI_RESET_ALERT))
  2383. return 0;
  2384. udelay(10);
  2385. delay += 10;
  2386. }
  2387. return 0;
  2388. }
  2389. #ifdef CONFIG_SCSI_IPR_DUMP
  2390. /**
  2391. * ipr_sdt_copy - Copy Smart Dump Table to kernel buffer
  2392. * @ioa_cfg: ioa config struct
  2393. * @pci_address: adapter address
  2394. * @length: length of data to copy
  2395. *
  2396. * Copy data from PCI adapter to kernel buffer.
  2397. * Note: length MUST be a 4 byte multiple
  2398. * Return value:
  2399. * 0 on success / other on failure
  2400. **/
  2401. static int ipr_sdt_copy(struct ipr_ioa_cfg *ioa_cfg,
  2402. unsigned long pci_address, u32 length)
  2403. {
  2404. int bytes_copied = 0;
  2405. int cur_len, rc, rem_len, rem_page_len, max_dump_size;
  2406. __be32 *page;
  2407. unsigned long lock_flags = 0;
  2408. struct ipr_ioa_dump *ioa_dump = &ioa_cfg->dump->ioa_dump;
  2409. if (ioa_cfg->sis64)
  2410. max_dump_size = IPR_FMT3_MAX_IOA_DUMP_SIZE;
  2411. else
  2412. max_dump_size = IPR_FMT2_MAX_IOA_DUMP_SIZE;
  2413. while (bytes_copied < length &&
  2414. (ioa_dump->hdr.len + bytes_copied) < max_dump_size) {
  2415. if (ioa_dump->page_offset >= PAGE_SIZE ||
  2416. ioa_dump->page_offset == 0) {
  2417. page = (__be32 *)__get_free_page(GFP_ATOMIC);
  2418. if (!page) {
  2419. ipr_trace;
  2420. return bytes_copied;
  2421. }
  2422. ioa_dump->page_offset = 0;
  2423. ioa_dump->ioa_data[ioa_dump->next_page_index] = page;
  2424. ioa_dump->next_page_index++;
  2425. } else
  2426. page = ioa_dump->ioa_data[ioa_dump->next_page_index - 1];
  2427. rem_len = length - bytes_copied;
  2428. rem_page_len = PAGE_SIZE - ioa_dump->page_offset;
  2429. cur_len = min(rem_len, rem_page_len);
  2430. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2431. if (ioa_cfg->sdt_state == ABORT_DUMP) {
  2432. rc = -EIO;
  2433. } else {
  2434. rc = ipr_get_ldump_data_section(ioa_cfg,
  2435. pci_address + bytes_copied,
  2436. &page[ioa_dump->page_offset / 4],
  2437. (cur_len / sizeof(u32)));
  2438. }
  2439. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2440. if (!rc) {
  2441. ioa_dump->page_offset += cur_len;
  2442. bytes_copied += cur_len;
  2443. } else {
  2444. ipr_trace;
  2445. break;
  2446. }
  2447. schedule();
  2448. }
  2449. return bytes_copied;
  2450. }
  2451. /**
  2452. * ipr_init_dump_entry_hdr - Initialize a dump entry header.
  2453. * @hdr: dump entry header struct
  2454. *
  2455. * Return value:
  2456. * nothing
  2457. **/
  2458. static void ipr_init_dump_entry_hdr(struct ipr_dump_entry_header *hdr)
  2459. {
  2460. hdr->eye_catcher = IPR_DUMP_EYE_CATCHER;
  2461. hdr->num_elems = 1;
  2462. hdr->offset = sizeof(*hdr);
  2463. hdr->status = IPR_DUMP_STATUS_SUCCESS;
  2464. }
  2465. /**
  2466. * ipr_dump_ioa_type_data - Fill in the adapter type in the dump.
  2467. * @ioa_cfg: ioa config struct
  2468. * @driver_dump: driver dump struct
  2469. *
  2470. * Return value:
  2471. * nothing
  2472. **/
  2473. static void ipr_dump_ioa_type_data(struct ipr_ioa_cfg *ioa_cfg,
  2474. struct ipr_driver_dump *driver_dump)
  2475. {
  2476. struct ipr_inquiry_page3 *ucode_vpd = &ioa_cfg->vpd_cbs->page3_data;
  2477. ipr_init_dump_entry_hdr(&driver_dump->ioa_type_entry.hdr);
  2478. driver_dump->ioa_type_entry.hdr.len =
  2479. sizeof(struct ipr_dump_ioa_type_entry) -
  2480. sizeof(struct ipr_dump_entry_header);
  2481. driver_dump->ioa_type_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_BINARY;
  2482. driver_dump->ioa_type_entry.hdr.id = IPR_DUMP_DRIVER_TYPE_ID;
  2483. driver_dump->ioa_type_entry.type = ioa_cfg->type;
  2484. driver_dump->ioa_type_entry.fw_version = (ucode_vpd->major_release << 24) |
  2485. (ucode_vpd->card_type << 16) | (ucode_vpd->minor_release[0] << 8) |
  2486. ucode_vpd->minor_release[1];
  2487. driver_dump->hdr.num_entries++;
  2488. }
  2489. /**
  2490. * ipr_dump_version_data - Fill in the driver version in the dump.
  2491. * @ioa_cfg: ioa config struct
  2492. * @driver_dump: driver dump struct
  2493. *
  2494. * Return value:
  2495. * nothing
  2496. **/
  2497. static void ipr_dump_version_data(struct ipr_ioa_cfg *ioa_cfg,
  2498. struct ipr_driver_dump *driver_dump)
  2499. {
  2500. ipr_init_dump_entry_hdr(&driver_dump->version_entry.hdr);
  2501. driver_dump->version_entry.hdr.len =
  2502. sizeof(struct ipr_dump_version_entry) -
  2503. sizeof(struct ipr_dump_entry_header);
  2504. driver_dump->version_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_ASCII;
  2505. driver_dump->version_entry.hdr.id = IPR_DUMP_DRIVER_VERSION_ID;
  2506. strcpy(driver_dump->version_entry.version, IPR_DRIVER_VERSION);
  2507. driver_dump->hdr.num_entries++;
  2508. }
  2509. /**
  2510. * ipr_dump_trace_data - Fill in the IOA trace in the dump.
  2511. * @ioa_cfg: ioa config struct
  2512. * @driver_dump: driver dump struct
  2513. *
  2514. * Return value:
  2515. * nothing
  2516. **/
  2517. static void ipr_dump_trace_data(struct ipr_ioa_cfg *ioa_cfg,
  2518. struct ipr_driver_dump *driver_dump)
  2519. {
  2520. ipr_init_dump_entry_hdr(&driver_dump->trace_entry.hdr);
  2521. driver_dump->trace_entry.hdr.len =
  2522. sizeof(struct ipr_dump_trace_entry) -
  2523. sizeof(struct ipr_dump_entry_header);
  2524. driver_dump->trace_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_BINARY;
  2525. driver_dump->trace_entry.hdr.id = IPR_DUMP_TRACE_ID;
  2526. memcpy(driver_dump->trace_entry.trace, ioa_cfg->trace, IPR_TRACE_SIZE);
  2527. driver_dump->hdr.num_entries++;
  2528. }
  2529. /**
  2530. * ipr_dump_location_data - Fill in the IOA location in the dump.
  2531. * @ioa_cfg: ioa config struct
  2532. * @driver_dump: driver dump struct
  2533. *
  2534. * Return value:
  2535. * nothing
  2536. **/
  2537. static void ipr_dump_location_data(struct ipr_ioa_cfg *ioa_cfg,
  2538. struct ipr_driver_dump *driver_dump)
  2539. {
  2540. ipr_init_dump_entry_hdr(&driver_dump->location_entry.hdr);
  2541. driver_dump->location_entry.hdr.len =
  2542. sizeof(struct ipr_dump_location_entry) -
  2543. sizeof(struct ipr_dump_entry_header);
  2544. driver_dump->location_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_ASCII;
  2545. driver_dump->location_entry.hdr.id = IPR_DUMP_LOCATION_ID;
  2546. strcpy(driver_dump->location_entry.location, dev_name(&ioa_cfg->pdev->dev));
  2547. driver_dump->hdr.num_entries++;
  2548. }
  2549. /**
  2550. * ipr_get_ioa_dump - Perform a dump of the driver and adapter.
  2551. * @ioa_cfg: ioa config struct
  2552. * @dump: dump struct
  2553. *
  2554. * Return value:
  2555. * nothing
  2556. **/
  2557. static void ipr_get_ioa_dump(struct ipr_ioa_cfg *ioa_cfg, struct ipr_dump *dump)
  2558. {
  2559. unsigned long start_addr, sdt_word;
  2560. unsigned long lock_flags = 0;
  2561. struct ipr_driver_dump *driver_dump = &dump->driver_dump;
  2562. struct ipr_ioa_dump *ioa_dump = &dump->ioa_dump;
  2563. u32 num_entries, max_num_entries, start_off, end_off;
  2564. u32 max_dump_size, bytes_to_copy, bytes_copied, rc;
  2565. struct ipr_sdt *sdt;
  2566. int valid = 1;
  2567. int i;
  2568. ENTER;
  2569. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2570. if (ioa_cfg->sdt_state != READ_DUMP) {
  2571. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2572. return;
  2573. }
  2574. if (ioa_cfg->sis64) {
  2575. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2576. ssleep(IPR_DUMP_DELAY_SECONDS);
  2577. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2578. }
  2579. start_addr = readl(ioa_cfg->ioa_mailbox);
  2580. if (!ioa_cfg->sis64 && !ipr_sdt_is_fmt2(start_addr)) {
  2581. dev_err(&ioa_cfg->pdev->dev,
  2582. "Invalid dump table format: %lx\n", start_addr);
  2583. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2584. return;
  2585. }
  2586. dev_err(&ioa_cfg->pdev->dev, "Dump of IOA initiated\n");
  2587. driver_dump->hdr.eye_catcher = IPR_DUMP_EYE_CATCHER;
  2588. /* Initialize the overall dump header */
  2589. driver_dump->hdr.len = sizeof(struct ipr_driver_dump);
  2590. driver_dump->hdr.num_entries = 1;
  2591. driver_dump->hdr.first_entry_offset = sizeof(struct ipr_dump_header);
  2592. driver_dump->hdr.status = IPR_DUMP_STATUS_SUCCESS;
  2593. driver_dump->hdr.os = IPR_DUMP_OS_LINUX;
  2594. driver_dump->hdr.driver_name = IPR_DUMP_DRIVER_NAME;
  2595. ipr_dump_version_data(ioa_cfg, driver_dump);
  2596. ipr_dump_location_data(ioa_cfg, driver_dump);
  2597. ipr_dump_ioa_type_data(ioa_cfg, driver_dump);
  2598. ipr_dump_trace_data(ioa_cfg, driver_dump);
  2599. /* Update dump_header */
  2600. driver_dump->hdr.len += sizeof(struct ipr_dump_entry_header);
  2601. /* IOA Dump entry */
  2602. ipr_init_dump_entry_hdr(&ioa_dump->hdr);
  2603. ioa_dump->hdr.len = 0;
  2604. ioa_dump->hdr.data_type = IPR_DUMP_DATA_TYPE_BINARY;
  2605. ioa_dump->hdr.id = IPR_DUMP_IOA_DUMP_ID;
  2606. /* First entries in sdt are actually a list of dump addresses and
  2607. lengths to gather the real dump data. sdt represents the pointer
  2608. to the ioa generated dump table. Dump data will be extracted based
  2609. on entries in this table */
  2610. sdt = &ioa_dump->sdt;
  2611. if (ioa_cfg->sis64) {
  2612. max_num_entries = IPR_FMT3_NUM_SDT_ENTRIES;
  2613. max_dump_size = IPR_FMT3_MAX_IOA_DUMP_SIZE;
  2614. } else {
  2615. max_num_entries = IPR_FMT2_NUM_SDT_ENTRIES;
  2616. max_dump_size = IPR_FMT2_MAX_IOA_DUMP_SIZE;
  2617. }
  2618. bytes_to_copy = offsetof(struct ipr_sdt, entry) +
  2619. (max_num_entries * sizeof(struct ipr_sdt_entry));
  2620. rc = ipr_get_ldump_data_section(ioa_cfg, start_addr, (__be32 *)sdt,
  2621. bytes_to_copy / sizeof(__be32));
  2622. /* Smart Dump table is ready to use and the first entry is valid */
  2623. if (rc || ((be32_to_cpu(sdt->hdr.state) != IPR_FMT3_SDT_READY_TO_USE) &&
  2624. (be32_to_cpu(sdt->hdr.state) != IPR_FMT2_SDT_READY_TO_USE))) {
  2625. dev_err(&ioa_cfg->pdev->dev,
  2626. "Dump of IOA failed. Dump table not valid: %d, %X.\n",
  2627. rc, be32_to_cpu(sdt->hdr.state));
  2628. driver_dump->hdr.status = IPR_DUMP_STATUS_FAILED;
  2629. ioa_cfg->sdt_state = DUMP_OBTAINED;
  2630. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2631. return;
  2632. }
  2633. num_entries = be32_to_cpu(sdt->hdr.num_entries_used);
  2634. if (num_entries > max_num_entries)
  2635. num_entries = max_num_entries;
  2636. /* Update dump length to the actual data to be copied */
  2637. dump->driver_dump.hdr.len += sizeof(struct ipr_sdt_header);
  2638. if (ioa_cfg->sis64)
  2639. dump->driver_dump.hdr.len += num_entries * sizeof(struct ipr_sdt_entry);
  2640. else
  2641. dump->driver_dump.hdr.len += max_num_entries * sizeof(struct ipr_sdt_entry);
  2642. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2643. for (i = 0; i < num_entries; i++) {
  2644. if (ioa_dump->hdr.len > max_dump_size) {
  2645. driver_dump->hdr.status = IPR_DUMP_STATUS_QUAL_SUCCESS;
  2646. break;
  2647. }
  2648. if (sdt->entry[i].flags & IPR_SDT_VALID_ENTRY) {
  2649. sdt_word = be32_to_cpu(sdt->entry[i].start_token);
  2650. if (ioa_cfg->sis64)
  2651. bytes_to_copy = be32_to_cpu(sdt->entry[i].end_token);
  2652. else {
  2653. start_off = sdt_word & IPR_FMT2_MBX_ADDR_MASK;
  2654. end_off = be32_to_cpu(sdt->entry[i].end_token);
  2655. if (ipr_sdt_is_fmt2(sdt_word) && sdt_word)
  2656. bytes_to_copy = end_off - start_off;
  2657. else
  2658. valid = 0;
  2659. }
  2660. if (valid) {
  2661. if (bytes_to_copy > max_dump_size) {
  2662. sdt->entry[i].flags &= ~IPR_SDT_VALID_ENTRY;
  2663. continue;
  2664. }
  2665. /* Copy data from adapter to driver buffers */
  2666. bytes_copied = ipr_sdt_copy(ioa_cfg, sdt_word,
  2667. bytes_to_copy);
  2668. ioa_dump->hdr.len += bytes_copied;
  2669. if (bytes_copied != bytes_to_copy) {
  2670. driver_dump->hdr.status = IPR_DUMP_STATUS_QUAL_SUCCESS;
  2671. break;
  2672. }
  2673. }
  2674. }
  2675. }
  2676. dev_err(&ioa_cfg->pdev->dev, "Dump of IOA completed.\n");
  2677. /* Update dump_header */
  2678. driver_dump->hdr.len += ioa_dump->hdr.len;
  2679. wmb();
  2680. ioa_cfg->sdt_state = DUMP_OBTAINED;
  2681. LEAVE;
  2682. }
  2683. #else
  2684. #define ipr_get_ioa_dump(ioa_cfg, dump) do { } while(0)
  2685. #endif
  2686. /**
  2687. * ipr_release_dump - Free adapter dump memory
  2688. * @kref: kref struct
  2689. *
  2690. * Return value:
  2691. * nothing
  2692. **/
  2693. static void ipr_release_dump(struct kref *kref)
  2694. {
  2695. struct ipr_dump *dump = container_of(kref,struct ipr_dump,kref);
  2696. struct ipr_ioa_cfg *ioa_cfg = dump->ioa_cfg;
  2697. unsigned long lock_flags = 0;
  2698. int i;
  2699. ENTER;
  2700. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2701. ioa_cfg->dump = NULL;
  2702. ioa_cfg->sdt_state = INACTIVE;
  2703. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2704. for (i = 0; i < dump->ioa_dump.next_page_index; i++)
  2705. free_page((unsigned long) dump->ioa_dump.ioa_data[i]);
  2706. vfree(dump->ioa_dump.ioa_data);
  2707. kfree(dump);
  2708. LEAVE;
  2709. }
  2710. /**
  2711. * ipr_worker_thread - Worker thread
  2712. * @work: ioa config struct
  2713. *
  2714. * Called at task level from a work thread. This function takes care
  2715. * of adding and removing device from the mid-layer as configuration
  2716. * changes are detected by the adapter.
  2717. *
  2718. * Return value:
  2719. * nothing
  2720. **/
  2721. static void ipr_worker_thread(struct work_struct *work)
  2722. {
  2723. unsigned long lock_flags;
  2724. struct ipr_resource_entry *res;
  2725. struct scsi_device *sdev;
  2726. struct ipr_dump *dump;
  2727. struct ipr_ioa_cfg *ioa_cfg =
  2728. container_of(work, struct ipr_ioa_cfg, work_q);
  2729. u8 bus, target, lun;
  2730. int did_work;
  2731. ENTER;
  2732. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2733. if (ioa_cfg->sdt_state == READ_DUMP) {
  2734. dump = ioa_cfg->dump;
  2735. if (!dump) {
  2736. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2737. return;
  2738. }
  2739. kref_get(&dump->kref);
  2740. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2741. ipr_get_ioa_dump(ioa_cfg, dump);
  2742. kref_put(&dump->kref, ipr_release_dump);
  2743. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2744. if (ioa_cfg->sdt_state == DUMP_OBTAINED && !ioa_cfg->dump_timeout)
  2745. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  2746. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2747. return;
  2748. }
  2749. restart:
  2750. do {
  2751. did_work = 0;
  2752. if (!ioa_cfg->allow_cmds || !ioa_cfg->allow_ml_add_del) {
  2753. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2754. return;
  2755. }
  2756. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  2757. if (res->del_from_ml && res->sdev) {
  2758. did_work = 1;
  2759. sdev = res->sdev;
  2760. if (!scsi_device_get(sdev)) {
  2761. if (!res->add_to_ml)
  2762. list_move_tail(&res->queue, &ioa_cfg->free_res_q);
  2763. else
  2764. res->del_from_ml = 0;
  2765. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2766. scsi_remove_device(sdev);
  2767. scsi_device_put(sdev);
  2768. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2769. }
  2770. break;
  2771. }
  2772. }
  2773. } while(did_work);
  2774. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  2775. if (res->add_to_ml) {
  2776. bus = res->bus;
  2777. target = res->target;
  2778. lun = res->lun;
  2779. res->add_to_ml = 0;
  2780. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2781. scsi_add_device(ioa_cfg->host, bus, target, lun);
  2782. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2783. goto restart;
  2784. }
  2785. }
  2786. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2787. kobject_uevent(&ioa_cfg->host->shost_dev.kobj, KOBJ_CHANGE);
  2788. LEAVE;
  2789. }
  2790. #ifdef CONFIG_SCSI_IPR_TRACE
  2791. /**
  2792. * ipr_read_trace - Dump the adapter trace
  2793. * @filp: open sysfs file
  2794. * @kobj: kobject struct
  2795. * @bin_attr: bin_attribute struct
  2796. * @buf: buffer
  2797. * @off: offset
  2798. * @count: buffer size
  2799. *
  2800. * Return value:
  2801. * number of bytes printed to buffer
  2802. **/
  2803. static ssize_t ipr_read_trace(struct file *filp, struct kobject *kobj,
  2804. struct bin_attribute *bin_attr,
  2805. char *buf, loff_t off, size_t count)
  2806. {
  2807. struct device *dev = container_of(kobj, struct device, kobj);
  2808. struct Scsi_Host *shost = class_to_shost(dev);
  2809. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  2810. unsigned long lock_flags = 0;
  2811. ssize_t ret;
  2812. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2813. ret = memory_read_from_buffer(buf, count, &off, ioa_cfg->trace,
  2814. IPR_TRACE_SIZE);
  2815. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2816. return ret;
  2817. }
  2818. static struct bin_attribute ipr_trace_attr = {
  2819. .attr = {
  2820. .name = "trace",
  2821. .mode = S_IRUGO,
  2822. },
  2823. .size = 0,
  2824. .read = ipr_read_trace,
  2825. };
  2826. #endif
  2827. /**
  2828. * ipr_show_fw_version - Show the firmware version
  2829. * @dev: class device struct
  2830. * @buf: buffer
  2831. *
  2832. * Return value:
  2833. * number of bytes printed to buffer
  2834. **/
  2835. static ssize_t ipr_show_fw_version(struct device *dev,
  2836. struct device_attribute *attr, char *buf)
  2837. {
  2838. struct Scsi_Host *shost = class_to_shost(dev);
  2839. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  2840. struct ipr_inquiry_page3 *ucode_vpd = &ioa_cfg->vpd_cbs->page3_data;
  2841. unsigned long lock_flags = 0;
  2842. int len;
  2843. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2844. len = snprintf(buf, PAGE_SIZE, "%02X%02X%02X%02X\n",
  2845. ucode_vpd->major_release, ucode_vpd->card_type,
  2846. ucode_vpd->minor_release[0],
  2847. ucode_vpd->minor_release[1]);
  2848. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2849. return len;
  2850. }
  2851. static struct device_attribute ipr_fw_version_attr = {
  2852. .attr = {
  2853. .name = "fw_version",
  2854. .mode = S_IRUGO,
  2855. },
  2856. .show = ipr_show_fw_version,
  2857. };
  2858. /**
  2859. * ipr_show_log_level - Show the adapter's error logging level
  2860. * @dev: class device struct
  2861. * @buf: buffer
  2862. *
  2863. * Return value:
  2864. * number of bytes printed to buffer
  2865. **/
  2866. static ssize_t ipr_show_log_level(struct device *dev,
  2867. struct device_attribute *attr, char *buf)
  2868. {
  2869. struct Scsi_Host *shost = class_to_shost(dev);
  2870. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  2871. unsigned long lock_flags = 0;
  2872. int len;
  2873. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2874. len = snprintf(buf, PAGE_SIZE, "%d\n", ioa_cfg->log_level);
  2875. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2876. return len;
  2877. }
  2878. /**
  2879. * ipr_store_log_level - Change the adapter's error logging level
  2880. * @dev: class device struct
  2881. * @buf: buffer
  2882. *
  2883. * Return value:
  2884. * number of bytes printed to buffer
  2885. **/
  2886. static ssize_t ipr_store_log_level(struct device *dev,
  2887. struct device_attribute *attr,
  2888. const char *buf, size_t count)
  2889. {
  2890. struct Scsi_Host *shost = class_to_shost(dev);
  2891. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  2892. unsigned long lock_flags = 0;
  2893. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2894. ioa_cfg->log_level = simple_strtoul(buf, NULL, 10);
  2895. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2896. return strlen(buf);
  2897. }
  2898. static struct device_attribute ipr_log_level_attr = {
  2899. .attr = {
  2900. .name = "log_level",
  2901. .mode = S_IRUGO | S_IWUSR,
  2902. },
  2903. .show = ipr_show_log_level,
  2904. .store = ipr_store_log_level
  2905. };
  2906. /**
  2907. * ipr_store_diagnostics - IOA Diagnostics interface
  2908. * @dev: device struct
  2909. * @buf: buffer
  2910. * @count: buffer size
  2911. *
  2912. * This function will reset the adapter and wait a reasonable
  2913. * amount of time for any errors that the adapter might log.
  2914. *
  2915. * Return value:
  2916. * count on success / other on failure
  2917. **/
  2918. static ssize_t ipr_store_diagnostics(struct device *dev,
  2919. struct device_attribute *attr,
  2920. const char *buf, size_t count)
  2921. {
  2922. struct Scsi_Host *shost = class_to_shost(dev);
  2923. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  2924. unsigned long lock_flags = 0;
  2925. int rc = count;
  2926. if (!capable(CAP_SYS_ADMIN))
  2927. return -EACCES;
  2928. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2929. while(ioa_cfg->in_reset_reload) {
  2930. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2931. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  2932. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2933. }
  2934. ioa_cfg->errors_logged = 0;
  2935. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  2936. if (ioa_cfg->in_reset_reload) {
  2937. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2938. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  2939. /* Wait for a second for any errors to be logged */
  2940. msleep(1000);
  2941. } else {
  2942. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2943. return -EIO;
  2944. }
  2945. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2946. if (ioa_cfg->in_reset_reload || ioa_cfg->errors_logged)
  2947. rc = -EIO;
  2948. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2949. return rc;
  2950. }
  2951. static struct device_attribute ipr_diagnostics_attr = {
  2952. .attr = {
  2953. .name = "run_diagnostics",
  2954. .mode = S_IWUSR,
  2955. },
  2956. .store = ipr_store_diagnostics
  2957. };
  2958. /**
  2959. * ipr_show_adapter_state - Show the adapter's state
  2960. * @class_dev: device struct
  2961. * @buf: buffer
  2962. *
  2963. * Return value:
  2964. * number of bytes printed to buffer
  2965. **/
  2966. static ssize_t ipr_show_adapter_state(struct device *dev,
  2967. struct device_attribute *attr, char *buf)
  2968. {
  2969. struct Scsi_Host *shost = class_to_shost(dev);
  2970. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  2971. unsigned long lock_flags = 0;
  2972. int len;
  2973. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2974. if (ioa_cfg->ioa_is_dead)
  2975. len = snprintf(buf, PAGE_SIZE, "offline\n");
  2976. else
  2977. len = snprintf(buf, PAGE_SIZE, "online\n");
  2978. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2979. return len;
  2980. }
  2981. /**
  2982. * ipr_store_adapter_state - Change adapter state
  2983. * @dev: device struct
  2984. * @buf: buffer
  2985. * @count: buffer size
  2986. *
  2987. * This function will change the adapter's state.
  2988. *
  2989. * Return value:
  2990. * count on success / other on failure
  2991. **/
  2992. static ssize_t ipr_store_adapter_state(struct device *dev,
  2993. struct device_attribute *attr,
  2994. const char *buf, size_t count)
  2995. {
  2996. struct Scsi_Host *shost = class_to_shost(dev);
  2997. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  2998. unsigned long lock_flags;
  2999. int result = count;
  3000. if (!capable(CAP_SYS_ADMIN))
  3001. return -EACCES;
  3002. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3003. if (ioa_cfg->ioa_is_dead && !strncmp(buf, "online", 6)) {
  3004. ioa_cfg->ioa_is_dead = 0;
  3005. ioa_cfg->reset_retries = 0;
  3006. ioa_cfg->in_ioa_bringdown = 0;
  3007. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  3008. }
  3009. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3010. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3011. return result;
  3012. }
  3013. static struct device_attribute ipr_ioa_state_attr = {
  3014. .attr = {
  3015. .name = "online_state",
  3016. .mode = S_IRUGO | S_IWUSR,
  3017. },
  3018. .show = ipr_show_adapter_state,
  3019. .store = ipr_store_adapter_state
  3020. };
  3021. /**
  3022. * ipr_store_reset_adapter - Reset the adapter
  3023. * @dev: device struct
  3024. * @buf: buffer
  3025. * @count: buffer size
  3026. *
  3027. * This function will reset the adapter.
  3028. *
  3029. * Return value:
  3030. * count on success / other on failure
  3031. **/
  3032. static ssize_t ipr_store_reset_adapter(struct device *dev,
  3033. struct device_attribute *attr,
  3034. const char *buf, size_t count)
  3035. {
  3036. struct Scsi_Host *shost = class_to_shost(dev);
  3037. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3038. unsigned long lock_flags;
  3039. int result = count;
  3040. if (!capable(CAP_SYS_ADMIN))
  3041. return -EACCES;
  3042. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3043. if (!ioa_cfg->in_reset_reload)
  3044. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  3045. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3046. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3047. return result;
  3048. }
  3049. static struct device_attribute ipr_ioa_reset_attr = {
  3050. .attr = {
  3051. .name = "reset_host",
  3052. .mode = S_IWUSR,
  3053. },
  3054. .store = ipr_store_reset_adapter
  3055. };
  3056. /**
  3057. * ipr_alloc_ucode_buffer - Allocates a microcode download buffer
  3058. * @buf_len: buffer length
  3059. *
  3060. * Allocates a DMA'able buffer in chunks and assembles a scatter/gather
  3061. * list to use for microcode download
  3062. *
  3063. * Return value:
  3064. * pointer to sglist / NULL on failure
  3065. **/
  3066. static struct ipr_sglist *ipr_alloc_ucode_buffer(int buf_len)
  3067. {
  3068. int sg_size, order, bsize_elem, num_elem, i, j;
  3069. struct ipr_sglist *sglist;
  3070. struct scatterlist *scatterlist;
  3071. struct page *page;
  3072. /* Get the minimum size per scatter/gather element */
  3073. sg_size = buf_len / (IPR_MAX_SGLIST - 1);
  3074. /* Get the actual size per element */
  3075. order = get_order(sg_size);
  3076. /* Determine the actual number of bytes per element */
  3077. bsize_elem = PAGE_SIZE * (1 << order);
  3078. /* Determine the actual number of sg entries needed */
  3079. if (buf_len % bsize_elem)
  3080. num_elem = (buf_len / bsize_elem) + 1;
  3081. else
  3082. num_elem = buf_len / bsize_elem;
  3083. /* Allocate a scatter/gather list for the DMA */
  3084. sglist = kzalloc(sizeof(struct ipr_sglist) +
  3085. (sizeof(struct scatterlist) * (num_elem - 1)),
  3086. GFP_KERNEL);
  3087. if (sglist == NULL) {
  3088. ipr_trace;
  3089. return NULL;
  3090. }
  3091. scatterlist = sglist->scatterlist;
  3092. sg_init_table(scatterlist, num_elem);
  3093. sglist->order = order;
  3094. sglist->num_sg = num_elem;
  3095. /* Allocate a bunch of sg elements */
  3096. for (i = 0; i < num_elem; i++) {
  3097. page = alloc_pages(GFP_KERNEL, order);
  3098. if (!page) {
  3099. ipr_trace;
  3100. /* Free up what we already allocated */
  3101. for (j = i - 1; j >= 0; j--)
  3102. __free_pages(sg_page(&scatterlist[j]), order);
  3103. kfree(sglist);
  3104. return NULL;
  3105. }
  3106. sg_set_page(&scatterlist[i], page, 0, 0);
  3107. }
  3108. return sglist;
  3109. }
  3110. /**
  3111. * ipr_free_ucode_buffer - Frees a microcode download buffer
  3112. * @p_dnld: scatter/gather list pointer
  3113. *
  3114. * Free a DMA'able ucode download buffer previously allocated with
  3115. * ipr_alloc_ucode_buffer
  3116. *
  3117. * Return value:
  3118. * nothing
  3119. **/
  3120. static void ipr_free_ucode_buffer(struct ipr_sglist *sglist)
  3121. {
  3122. int i;
  3123. for (i = 0; i < sglist->num_sg; i++)
  3124. __free_pages(sg_page(&sglist->scatterlist[i]), sglist->order);
  3125. kfree(sglist);
  3126. }
  3127. /**
  3128. * ipr_copy_ucode_buffer - Copy user buffer to kernel buffer
  3129. * @sglist: scatter/gather list pointer
  3130. * @buffer: buffer pointer
  3131. * @len: buffer length
  3132. *
  3133. * Copy a microcode image from a user buffer into a buffer allocated by
  3134. * ipr_alloc_ucode_buffer
  3135. *
  3136. * Return value:
  3137. * 0 on success / other on failure
  3138. **/
  3139. static int ipr_copy_ucode_buffer(struct ipr_sglist *sglist,
  3140. u8 *buffer, u32 len)
  3141. {
  3142. int bsize_elem, i, result = 0;
  3143. struct scatterlist *scatterlist;
  3144. void *kaddr;
  3145. /* Determine the actual number of bytes per element */
  3146. bsize_elem = PAGE_SIZE * (1 << sglist->order);
  3147. scatterlist = sglist->scatterlist;
  3148. for (i = 0; i < (len / bsize_elem); i++, buffer += bsize_elem) {
  3149. struct page *page = sg_page(&scatterlist[i]);
  3150. kaddr = kmap(page);
  3151. memcpy(kaddr, buffer, bsize_elem);
  3152. kunmap(page);
  3153. scatterlist[i].length = bsize_elem;
  3154. if (result != 0) {
  3155. ipr_trace;
  3156. return result;
  3157. }
  3158. }
  3159. if (len % bsize_elem) {
  3160. struct page *page = sg_page(&scatterlist[i]);
  3161. kaddr = kmap(page);
  3162. memcpy(kaddr, buffer, len % bsize_elem);
  3163. kunmap(page);
  3164. scatterlist[i].length = len % bsize_elem;
  3165. }
  3166. sglist->buffer_len = len;
  3167. return result;
  3168. }
  3169. /**
  3170. * ipr_build_ucode_ioadl64 - Build a microcode download IOADL
  3171. * @ipr_cmd: ipr command struct
  3172. * @sglist: scatter/gather list
  3173. *
  3174. * Builds a microcode download IOA data list (IOADL).
  3175. *
  3176. **/
  3177. static void ipr_build_ucode_ioadl64(struct ipr_cmnd *ipr_cmd,
  3178. struct ipr_sglist *sglist)
  3179. {
  3180. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  3181. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ioadl64;
  3182. struct scatterlist *scatterlist = sglist->scatterlist;
  3183. int i;
  3184. ipr_cmd->dma_use_sg = sglist->num_dma_sg;
  3185. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  3186. ioarcb->data_transfer_length = cpu_to_be32(sglist->buffer_len);
  3187. ioarcb->ioadl_len =
  3188. cpu_to_be32(sizeof(struct ipr_ioadl64_desc) * ipr_cmd->dma_use_sg);
  3189. for (i = 0; i < ipr_cmd->dma_use_sg; i++) {
  3190. ioadl64[i].flags = cpu_to_be32(IPR_IOADL_FLAGS_WRITE);
  3191. ioadl64[i].data_len = cpu_to_be32(sg_dma_len(&scatterlist[i]));
  3192. ioadl64[i].address = cpu_to_be64(sg_dma_address(&scatterlist[i]));
  3193. }
  3194. ioadl64[i-1].flags |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  3195. }
  3196. /**
  3197. * ipr_build_ucode_ioadl - Build a microcode download IOADL
  3198. * @ipr_cmd: ipr command struct
  3199. * @sglist: scatter/gather list
  3200. *
  3201. * Builds a microcode download IOA data list (IOADL).
  3202. *
  3203. **/
  3204. static void ipr_build_ucode_ioadl(struct ipr_cmnd *ipr_cmd,
  3205. struct ipr_sglist *sglist)
  3206. {
  3207. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  3208. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  3209. struct scatterlist *scatterlist = sglist->scatterlist;
  3210. int i;
  3211. ipr_cmd->dma_use_sg = sglist->num_dma_sg;
  3212. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  3213. ioarcb->data_transfer_length = cpu_to_be32(sglist->buffer_len);
  3214. ioarcb->ioadl_len =
  3215. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  3216. for (i = 0; i < ipr_cmd->dma_use_sg; i++) {
  3217. ioadl[i].flags_and_data_len =
  3218. cpu_to_be32(IPR_IOADL_FLAGS_WRITE | sg_dma_len(&scatterlist[i]));
  3219. ioadl[i].address =
  3220. cpu_to_be32(sg_dma_address(&scatterlist[i]));
  3221. }
  3222. ioadl[i-1].flags_and_data_len |=
  3223. cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  3224. }
  3225. /**
  3226. * ipr_update_ioa_ucode - Update IOA's microcode
  3227. * @ioa_cfg: ioa config struct
  3228. * @sglist: scatter/gather list
  3229. *
  3230. * Initiate an adapter reset to update the IOA's microcode
  3231. *
  3232. * Return value:
  3233. * 0 on success / -EIO on failure
  3234. **/
  3235. static int ipr_update_ioa_ucode(struct ipr_ioa_cfg *ioa_cfg,
  3236. struct ipr_sglist *sglist)
  3237. {
  3238. unsigned long lock_flags;
  3239. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3240. while(ioa_cfg->in_reset_reload) {
  3241. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3242. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3243. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3244. }
  3245. if (ioa_cfg->ucode_sglist) {
  3246. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3247. dev_err(&ioa_cfg->pdev->dev,
  3248. "Microcode download already in progress\n");
  3249. return -EIO;
  3250. }
  3251. sglist->num_dma_sg = pci_map_sg(ioa_cfg->pdev, sglist->scatterlist,
  3252. sglist->num_sg, DMA_TO_DEVICE);
  3253. if (!sglist->num_dma_sg) {
  3254. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3255. dev_err(&ioa_cfg->pdev->dev,
  3256. "Failed to map microcode download buffer!\n");
  3257. return -EIO;
  3258. }
  3259. ioa_cfg->ucode_sglist = sglist;
  3260. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  3261. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3262. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3263. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3264. ioa_cfg->ucode_sglist = NULL;
  3265. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3266. return 0;
  3267. }
  3268. /**
  3269. * ipr_store_update_fw - Update the firmware on the adapter
  3270. * @class_dev: device struct
  3271. * @buf: buffer
  3272. * @count: buffer size
  3273. *
  3274. * This function will update the firmware on the adapter.
  3275. *
  3276. * Return value:
  3277. * count on success / other on failure
  3278. **/
  3279. static ssize_t ipr_store_update_fw(struct device *dev,
  3280. struct device_attribute *attr,
  3281. const char *buf, size_t count)
  3282. {
  3283. struct Scsi_Host *shost = class_to_shost(dev);
  3284. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3285. struct ipr_ucode_image_header *image_hdr;
  3286. const struct firmware *fw_entry;
  3287. struct ipr_sglist *sglist;
  3288. char fname[100];
  3289. char *src;
  3290. int len, result, dnld_size;
  3291. if (!capable(CAP_SYS_ADMIN))
  3292. return -EACCES;
  3293. len = snprintf(fname, 99, "%s", buf);
  3294. fname[len-1] = '\0';
  3295. if(request_firmware(&fw_entry, fname, &ioa_cfg->pdev->dev)) {
  3296. dev_err(&ioa_cfg->pdev->dev, "Firmware file %s not found\n", fname);
  3297. return -EIO;
  3298. }
  3299. image_hdr = (struct ipr_ucode_image_header *)fw_entry->data;
  3300. src = (u8 *)image_hdr + be32_to_cpu(image_hdr->header_length);
  3301. dnld_size = fw_entry->size - be32_to_cpu(image_hdr->header_length);
  3302. sglist = ipr_alloc_ucode_buffer(dnld_size);
  3303. if (!sglist) {
  3304. dev_err(&ioa_cfg->pdev->dev, "Microcode buffer allocation failed\n");
  3305. release_firmware(fw_entry);
  3306. return -ENOMEM;
  3307. }
  3308. result = ipr_copy_ucode_buffer(sglist, src, dnld_size);
  3309. if (result) {
  3310. dev_err(&ioa_cfg->pdev->dev,
  3311. "Microcode buffer copy to DMA buffer failed\n");
  3312. goto out;
  3313. }
  3314. ipr_info("Updating microcode, please be patient. This may take up to 30 minutes.\n");
  3315. result = ipr_update_ioa_ucode(ioa_cfg, sglist);
  3316. if (!result)
  3317. result = count;
  3318. out:
  3319. ipr_free_ucode_buffer(sglist);
  3320. release_firmware(fw_entry);
  3321. return result;
  3322. }
  3323. static struct device_attribute ipr_update_fw_attr = {
  3324. .attr = {
  3325. .name = "update_fw",
  3326. .mode = S_IWUSR,
  3327. },
  3328. .store = ipr_store_update_fw
  3329. };
  3330. /**
  3331. * ipr_show_fw_type - Show the adapter's firmware type.
  3332. * @dev: class device struct
  3333. * @buf: buffer
  3334. *
  3335. * Return value:
  3336. * number of bytes printed to buffer
  3337. **/
  3338. static ssize_t ipr_show_fw_type(struct device *dev,
  3339. struct device_attribute *attr, char *buf)
  3340. {
  3341. struct Scsi_Host *shost = class_to_shost(dev);
  3342. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3343. unsigned long lock_flags = 0;
  3344. int len;
  3345. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3346. len = snprintf(buf, PAGE_SIZE, "%d\n", ioa_cfg->sis64);
  3347. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3348. return len;
  3349. }
  3350. static struct device_attribute ipr_ioa_fw_type_attr = {
  3351. .attr = {
  3352. .name = "fw_type",
  3353. .mode = S_IRUGO,
  3354. },
  3355. .show = ipr_show_fw_type
  3356. };
  3357. static struct device_attribute *ipr_ioa_attrs[] = {
  3358. &ipr_fw_version_attr,
  3359. &ipr_log_level_attr,
  3360. &ipr_diagnostics_attr,
  3361. &ipr_ioa_state_attr,
  3362. &ipr_ioa_reset_attr,
  3363. &ipr_update_fw_attr,
  3364. &ipr_ioa_fw_type_attr,
  3365. NULL,
  3366. };
  3367. #ifdef CONFIG_SCSI_IPR_DUMP
  3368. /**
  3369. * ipr_read_dump - Dump the adapter
  3370. * @filp: open sysfs file
  3371. * @kobj: kobject struct
  3372. * @bin_attr: bin_attribute struct
  3373. * @buf: buffer
  3374. * @off: offset
  3375. * @count: buffer size
  3376. *
  3377. * Return value:
  3378. * number of bytes printed to buffer
  3379. **/
  3380. static ssize_t ipr_read_dump(struct file *filp, struct kobject *kobj,
  3381. struct bin_attribute *bin_attr,
  3382. char *buf, loff_t off, size_t count)
  3383. {
  3384. struct device *cdev = container_of(kobj, struct device, kobj);
  3385. struct Scsi_Host *shost = class_to_shost(cdev);
  3386. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3387. struct ipr_dump *dump;
  3388. unsigned long lock_flags = 0;
  3389. char *src;
  3390. int len, sdt_end;
  3391. size_t rc = count;
  3392. if (!capable(CAP_SYS_ADMIN))
  3393. return -EACCES;
  3394. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3395. dump = ioa_cfg->dump;
  3396. if (ioa_cfg->sdt_state != DUMP_OBTAINED || !dump) {
  3397. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3398. return 0;
  3399. }
  3400. kref_get(&dump->kref);
  3401. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3402. if (off > dump->driver_dump.hdr.len) {
  3403. kref_put(&dump->kref, ipr_release_dump);
  3404. return 0;
  3405. }
  3406. if (off + count > dump->driver_dump.hdr.len) {
  3407. count = dump->driver_dump.hdr.len - off;
  3408. rc = count;
  3409. }
  3410. if (count && off < sizeof(dump->driver_dump)) {
  3411. if (off + count > sizeof(dump->driver_dump))
  3412. len = sizeof(dump->driver_dump) - off;
  3413. else
  3414. len = count;
  3415. src = (u8 *)&dump->driver_dump + off;
  3416. memcpy(buf, src, len);
  3417. buf += len;
  3418. off += len;
  3419. count -= len;
  3420. }
  3421. off -= sizeof(dump->driver_dump);
  3422. if (ioa_cfg->sis64)
  3423. sdt_end = offsetof(struct ipr_ioa_dump, sdt.entry) +
  3424. (be32_to_cpu(dump->ioa_dump.sdt.hdr.num_entries_used) *
  3425. sizeof(struct ipr_sdt_entry));
  3426. else
  3427. sdt_end = offsetof(struct ipr_ioa_dump, sdt.entry) +
  3428. (IPR_FMT2_NUM_SDT_ENTRIES * sizeof(struct ipr_sdt_entry));
  3429. if (count && off < sdt_end) {
  3430. if (off + count > sdt_end)
  3431. len = sdt_end - off;
  3432. else
  3433. len = count;
  3434. src = (u8 *)&dump->ioa_dump + off;
  3435. memcpy(buf, src, len);
  3436. buf += len;
  3437. off += len;
  3438. count -= len;
  3439. }
  3440. off -= sdt_end;
  3441. while (count) {
  3442. if ((off & PAGE_MASK) != ((off + count) & PAGE_MASK))
  3443. len = PAGE_ALIGN(off) - off;
  3444. else
  3445. len = count;
  3446. src = (u8 *)dump->ioa_dump.ioa_data[(off & PAGE_MASK) >> PAGE_SHIFT];
  3447. src += off & ~PAGE_MASK;
  3448. memcpy(buf, src, len);
  3449. buf += len;
  3450. off += len;
  3451. count -= len;
  3452. }
  3453. kref_put(&dump->kref, ipr_release_dump);
  3454. return rc;
  3455. }
  3456. /**
  3457. * ipr_alloc_dump - Prepare for adapter dump
  3458. * @ioa_cfg: ioa config struct
  3459. *
  3460. * Return value:
  3461. * 0 on success / other on failure
  3462. **/
  3463. static int ipr_alloc_dump(struct ipr_ioa_cfg *ioa_cfg)
  3464. {
  3465. struct ipr_dump *dump;
  3466. __be32 **ioa_data;
  3467. unsigned long lock_flags = 0;
  3468. dump = kzalloc(sizeof(struct ipr_dump), GFP_KERNEL);
  3469. if (!dump) {
  3470. ipr_err("Dump memory allocation failed\n");
  3471. return -ENOMEM;
  3472. }
  3473. if (ioa_cfg->sis64)
  3474. ioa_data = vmalloc(IPR_FMT3_MAX_NUM_DUMP_PAGES * sizeof(__be32 *));
  3475. else
  3476. ioa_data = vmalloc(IPR_FMT2_MAX_NUM_DUMP_PAGES * sizeof(__be32 *));
  3477. if (!ioa_data) {
  3478. ipr_err("Dump memory allocation failed\n");
  3479. kfree(dump);
  3480. return -ENOMEM;
  3481. }
  3482. dump->ioa_dump.ioa_data = ioa_data;
  3483. kref_init(&dump->kref);
  3484. dump->ioa_cfg = ioa_cfg;
  3485. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3486. if (INACTIVE != ioa_cfg->sdt_state) {
  3487. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3488. vfree(dump->ioa_dump.ioa_data);
  3489. kfree(dump);
  3490. return 0;
  3491. }
  3492. ioa_cfg->dump = dump;
  3493. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  3494. if (ioa_cfg->ioa_is_dead && !ioa_cfg->dump_taken) {
  3495. ioa_cfg->dump_taken = 1;
  3496. schedule_work(&ioa_cfg->work_q);
  3497. }
  3498. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3499. return 0;
  3500. }
  3501. /**
  3502. * ipr_free_dump - Free adapter dump memory
  3503. * @ioa_cfg: ioa config struct
  3504. *
  3505. * Return value:
  3506. * 0 on success / other on failure
  3507. **/
  3508. static int ipr_free_dump(struct ipr_ioa_cfg *ioa_cfg)
  3509. {
  3510. struct ipr_dump *dump;
  3511. unsigned long lock_flags = 0;
  3512. ENTER;
  3513. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3514. dump = ioa_cfg->dump;
  3515. if (!dump) {
  3516. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3517. return 0;
  3518. }
  3519. ioa_cfg->dump = NULL;
  3520. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3521. kref_put(&dump->kref, ipr_release_dump);
  3522. LEAVE;
  3523. return 0;
  3524. }
  3525. /**
  3526. * ipr_write_dump - Setup dump state of adapter
  3527. * @filp: open sysfs file
  3528. * @kobj: kobject struct
  3529. * @bin_attr: bin_attribute struct
  3530. * @buf: buffer
  3531. * @off: offset
  3532. * @count: buffer size
  3533. *
  3534. * Return value:
  3535. * number of bytes printed to buffer
  3536. **/
  3537. static ssize_t ipr_write_dump(struct file *filp, struct kobject *kobj,
  3538. struct bin_attribute *bin_attr,
  3539. char *buf, loff_t off, size_t count)
  3540. {
  3541. struct device *cdev = container_of(kobj, struct device, kobj);
  3542. struct Scsi_Host *shost = class_to_shost(cdev);
  3543. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3544. int rc;
  3545. if (!capable(CAP_SYS_ADMIN))
  3546. return -EACCES;
  3547. if (buf[0] == '1')
  3548. rc = ipr_alloc_dump(ioa_cfg);
  3549. else if (buf[0] == '0')
  3550. rc = ipr_free_dump(ioa_cfg);
  3551. else
  3552. return -EINVAL;
  3553. if (rc)
  3554. return rc;
  3555. else
  3556. return count;
  3557. }
  3558. static struct bin_attribute ipr_dump_attr = {
  3559. .attr = {
  3560. .name = "dump",
  3561. .mode = S_IRUSR | S_IWUSR,
  3562. },
  3563. .size = 0,
  3564. .read = ipr_read_dump,
  3565. .write = ipr_write_dump
  3566. };
  3567. #else
  3568. static int ipr_free_dump(struct ipr_ioa_cfg *ioa_cfg) { return 0; };
  3569. #endif
  3570. /**
  3571. * ipr_change_queue_depth - Change the device's queue depth
  3572. * @sdev: scsi device struct
  3573. * @qdepth: depth to set
  3574. * @reason: calling context
  3575. *
  3576. * Return value:
  3577. * actual depth set
  3578. **/
  3579. static int ipr_change_queue_depth(struct scsi_device *sdev, int qdepth,
  3580. int reason)
  3581. {
  3582. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3583. struct ipr_resource_entry *res;
  3584. unsigned long lock_flags = 0;
  3585. if (reason != SCSI_QDEPTH_DEFAULT)
  3586. return -EOPNOTSUPP;
  3587. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3588. res = (struct ipr_resource_entry *)sdev->hostdata;
  3589. if (res && ipr_is_gata(res) && qdepth > IPR_MAX_CMD_PER_ATA_LUN)
  3590. qdepth = IPR_MAX_CMD_PER_ATA_LUN;
  3591. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3592. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  3593. return sdev->queue_depth;
  3594. }
  3595. /**
  3596. * ipr_change_queue_type - Change the device's queue type
  3597. * @dsev: scsi device struct
  3598. * @tag_type: type of tags to use
  3599. *
  3600. * Return value:
  3601. * actual queue type set
  3602. **/
  3603. static int ipr_change_queue_type(struct scsi_device *sdev, int tag_type)
  3604. {
  3605. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3606. struct ipr_resource_entry *res;
  3607. unsigned long lock_flags = 0;
  3608. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3609. res = (struct ipr_resource_entry *)sdev->hostdata;
  3610. if (res) {
  3611. if (ipr_is_gscsi(res) && sdev->tagged_supported) {
  3612. /*
  3613. * We don't bother quiescing the device here since the
  3614. * adapter firmware does it for us.
  3615. */
  3616. scsi_set_tag_type(sdev, tag_type);
  3617. if (tag_type)
  3618. scsi_activate_tcq(sdev, sdev->queue_depth);
  3619. else
  3620. scsi_deactivate_tcq(sdev, sdev->queue_depth);
  3621. } else
  3622. tag_type = 0;
  3623. } else
  3624. tag_type = 0;
  3625. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3626. return tag_type;
  3627. }
  3628. /**
  3629. * ipr_show_adapter_handle - Show the adapter's resource handle for this device
  3630. * @dev: device struct
  3631. * @attr: device attribute structure
  3632. * @buf: buffer
  3633. *
  3634. * Return value:
  3635. * number of bytes printed to buffer
  3636. **/
  3637. static ssize_t ipr_show_adapter_handle(struct device *dev, struct device_attribute *attr, char *buf)
  3638. {
  3639. struct scsi_device *sdev = to_scsi_device(dev);
  3640. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3641. struct ipr_resource_entry *res;
  3642. unsigned long lock_flags = 0;
  3643. ssize_t len = -ENXIO;
  3644. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3645. res = (struct ipr_resource_entry *)sdev->hostdata;
  3646. if (res)
  3647. len = snprintf(buf, PAGE_SIZE, "%08X\n", res->res_handle);
  3648. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3649. return len;
  3650. }
  3651. static struct device_attribute ipr_adapter_handle_attr = {
  3652. .attr = {
  3653. .name = "adapter_handle",
  3654. .mode = S_IRUSR,
  3655. },
  3656. .show = ipr_show_adapter_handle
  3657. };
  3658. /**
  3659. * ipr_show_resource_path - Show the resource path or the resource address for
  3660. * this device.
  3661. * @dev: device struct
  3662. * @attr: device attribute structure
  3663. * @buf: buffer
  3664. *
  3665. * Return value:
  3666. * number of bytes printed to buffer
  3667. **/
  3668. static ssize_t ipr_show_resource_path(struct device *dev, struct device_attribute *attr, char *buf)
  3669. {
  3670. struct scsi_device *sdev = to_scsi_device(dev);
  3671. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3672. struct ipr_resource_entry *res;
  3673. unsigned long lock_flags = 0;
  3674. ssize_t len = -ENXIO;
  3675. char buffer[IPR_MAX_RES_PATH_LENGTH];
  3676. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3677. res = (struct ipr_resource_entry *)sdev->hostdata;
  3678. if (res && ioa_cfg->sis64)
  3679. len = snprintf(buf, PAGE_SIZE, "%s\n",
  3680. ipr_format_res_path(res->res_path, buffer,
  3681. sizeof(buffer)));
  3682. else if (res)
  3683. len = snprintf(buf, PAGE_SIZE, "%d:%d:%d:%d\n", ioa_cfg->host->host_no,
  3684. res->bus, res->target, res->lun);
  3685. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3686. return len;
  3687. }
  3688. static struct device_attribute ipr_resource_path_attr = {
  3689. .attr = {
  3690. .name = "resource_path",
  3691. .mode = S_IRUGO,
  3692. },
  3693. .show = ipr_show_resource_path
  3694. };
  3695. /**
  3696. * ipr_show_device_id - Show the device_id for this device.
  3697. * @dev: device struct
  3698. * @attr: device attribute structure
  3699. * @buf: buffer
  3700. *
  3701. * Return value:
  3702. * number of bytes printed to buffer
  3703. **/
  3704. static ssize_t ipr_show_device_id(struct device *dev, struct device_attribute *attr, char *buf)
  3705. {
  3706. struct scsi_device *sdev = to_scsi_device(dev);
  3707. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3708. struct ipr_resource_entry *res;
  3709. unsigned long lock_flags = 0;
  3710. ssize_t len = -ENXIO;
  3711. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3712. res = (struct ipr_resource_entry *)sdev->hostdata;
  3713. if (res && ioa_cfg->sis64)
  3714. len = snprintf(buf, PAGE_SIZE, "0x%llx\n", res->dev_id);
  3715. else if (res)
  3716. len = snprintf(buf, PAGE_SIZE, "0x%llx\n", res->lun_wwn);
  3717. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3718. return len;
  3719. }
  3720. static struct device_attribute ipr_device_id_attr = {
  3721. .attr = {
  3722. .name = "device_id",
  3723. .mode = S_IRUGO,
  3724. },
  3725. .show = ipr_show_device_id
  3726. };
  3727. /**
  3728. * ipr_show_resource_type - Show the resource type for this device.
  3729. * @dev: device struct
  3730. * @attr: device attribute structure
  3731. * @buf: buffer
  3732. *
  3733. * Return value:
  3734. * number of bytes printed to buffer
  3735. **/
  3736. static ssize_t ipr_show_resource_type(struct device *dev, struct device_attribute *attr, char *buf)
  3737. {
  3738. struct scsi_device *sdev = to_scsi_device(dev);
  3739. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3740. struct ipr_resource_entry *res;
  3741. unsigned long lock_flags = 0;
  3742. ssize_t len = -ENXIO;
  3743. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3744. res = (struct ipr_resource_entry *)sdev->hostdata;
  3745. if (res)
  3746. len = snprintf(buf, PAGE_SIZE, "%x\n", res->type);
  3747. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3748. return len;
  3749. }
  3750. static struct device_attribute ipr_resource_type_attr = {
  3751. .attr = {
  3752. .name = "resource_type",
  3753. .mode = S_IRUGO,
  3754. },
  3755. .show = ipr_show_resource_type
  3756. };
  3757. static struct device_attribute *ipr_dev_attrs[] = {
  3758. &ipr_adapter_handle_attr,
  3759. &ipr_resource_path_attr,
  3760. &ipr_device_id_attr,
  3761. &ipr_resource_type_attr,
  3762. NULL,
  3763. };
  3764. /**
  3765. * ipr_biosparam - Return the HSC mapping
  3766. * @sdev: scsi device struct
  3767. * @block_device: block device pointer
  3768. * @capacity: capacity of the device
  3769. * @parm: Array containing returned HSC values.
  3770. *
  3771. * This function generates the HSC parms that fdisk uses.
  3772. * We want to make sure we return something that places partitions
  3773. * on 4k boundaries for best performance with the IOA.
  3774. *
  3775. * Return value:
  3776. * 0 on success
  3777. **/
  3778. static int ipr_biosparam(struct scsi_device *sdev,
  3779. struct block_device *block_device,
  3780. sector_t capacity, int *parm)
  3781. {
  3782. int heads, sectors;
  3783. sector_t cylinders;
  3784. heads = 128;
  3785. sectors = 32;
  3786. cylinders = capacity;
  3787. sector_div(cylinders, (128 * 32));
  3788. /* return result */
  3789. parm[0] = heads;
  3790. parm[1] = sectors;
  3791. parm[2] = cylinders;
  3792. return 0;
  3793. }
  3794. /**
  3795. * ipr_find_starget - Find target based on bus/target.
  3796. * @starget: scsi target struct
  3797. *
  3798. * Return value:
  3799. * resource entry pointer if found / NULL if not found
  3800. **/
  3801. static struct ipr_resource_entry *ipr_find_starget(struct scsi_target *starget)
  3802. {
  3803. struct Scsi_Host *shost = dev_to_shost(&starget->dev);
  3804. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) shost->hostdata;
  3805. struct ipr_resource_entry *res;
  3806. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  3807. if ((res->bus == starget->channel) &&
  3808. (res->target == starget->id) &&
  3809. (res->lun == 0)) {
  3810. return res;
  3811. }
  3812. }
  3813. return NULL;
  3814. }
  3815. static struct ata_port_info sata_port_info;
  3816. /**
  3817. * ipr_target_alloc - Prepare for commands to a SCSI target
  3818. * @starget: scsi target struct
  3819. *
  3820. * If the device is a SATA device, this function allocates an
  3821. * ATA port with libata, else it does nothing.
  3822. *
  3823. * Return value:
  3824. * 0 on success / non-0 on failure
  3825. **/
  3826. static int ipr_target_alloc(struct scsi_target *starget)
  3827. {
  3828. struct Scsi_Host *shost = dev_to_shost(&starget->dev);
  3829. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) shost->hostdata;
  3830. struct ipr_sata_port *sata_port;
  3831. struct ata_port *ap;
  3832. struct ipr_resource_entry *res;
  3833. unsigned long lock_flags;
  3834. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3835. res = ipr_find_starget(starget);
  3836. starget->hostdata = NULL;
  3837. if (res && ipr_is_gata(res)) {
  3838. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3839. sata_port = kzalloc(sizeof(*sata_port), GFP_KERNEL);
  3840. if (!sata_port)
  3841. return -ENOMEM;
  3842. ap = ata_sas_port_alloc(&ioa_cfg->ata_host, &sata_port_info, shost);
  3843. if (ap) {
  3844. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3845. sata_port->ioa_cfg = ioa_cfg;
  3846. sata_port->ap = ap;
  3847. sata_port->res = res;
  3848. res->sata_port = sata_port;
  3849. ap->private_data = sata_port;
  3850. starget->hostdata = sata_port;
  3851. } else {
  3852. kfree(sata_port);
  3853. return -ENOMEM;
  3854. }
  3855. }
  3856. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3857. return 0;
  3858. }
  3859. /**
  3860. * ipr_target_destroy - Destroy a SCSI target
  3861. * @starget: scsi target struct
  3862. *
  3863. * If the device was a SATA device, this function frees the libata
  3864. * ATA port, else it does nothing.
  3865. *
  3866. **/
  3867. static void ipr_target_destroy(struct scsi_target *starget)
  3868. {
  3869. struct ipr_sata_port *sata_port = starget->hostdata;
  3870. struct Scsi_Host *shost = dev_to_shost(&starget->dev);
  3871. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) shost->hostdata;
  3872. if (ioa_cfg->sis64) {
  3873. if (starget->channel == IPR_ARRAY_VIRTUAL_BUS)
  3874. clear_bit(starget->id, ioa_cfg->array_ids);
  3875. else if (starget->channel == IPR_VSET_VIRTUAL_BUS)
  3876. clear_bit(starget->id, ioa_cfg->vset_ids);
  3877. else if (starget->channel == 0)
  3878. clear_bit(starget->id, ioa_cfg->target_ids);
  3879. }
  3880. if (sata_port) {
  3881. starget->hostdata = NULL;
  3882. ata_sas_port_destroy(sata_port->ap);
  3883. kfree(sata_port);
  3884. }
  3885. }
  3886. /**
  3887. * ipr_find_sdev - Find device based on bus/target/lun.
  3888. * @sdev: scsi device struct
  3889. *
  3890. * Return value:
  3891. * resource entry pointer if found / NULL if not found
  3892. **/
  3893. static struct ipr_resource_entry *ipr_find_sdev(struct scsi_device *sdev)
  3894. {
  3895. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  3896. struct ipr_resource_entry *res;
  3897. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  3898. if ((res->bus == sdev->channel) &&
  3899. (res->target == sdev->id) &&
  3900. (res->lun == sdev->lun))
  3901. return res;
  3902. }
  3903. return NULL;
  3904. }
  3905. /**
  3906. * ipr_slave_destroy - Unconfigure a SCSI device
  3907. * @sdev: scsi device struct
  3908. *
  3909. * Return value:
  3910. * nothing
  3911. **/
  3912. static void ipr_slave_destroy(struct scsi_device *sdev)
  3913. {
  3914. struct ipr_resource_entry *res;
  3915. struct ipr_ioa_cfg *ioa_cfg;
  3916. unsigned long lock_flags = 0;
  3917. ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  3918. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3919. res = (struct ipr_resource_entry *) sdev->hostdata;
  3920. if (res) {
  3921. if (res->sata_port)
  3922. res->sata_port->ap->link.device[0].class = ATA_DEV_NONE;
  3923. sdev->hostdata = NULL;
  3924. res->sdev = NULL;
  3925. res->sata_port = NULL;
  3926. }
  3927. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3928. }
  3929. /**
  3930. * ipr_slave_configure - Configure a SCSI device
  3931. * @sdev: scsi device struct
  3932. *
  3933. * This function configures the specified scsi device.
  3934. *
  3935. * Return value:
  3936. * 0 on success
  3937. **/
  3938. static int ipr_slave_configure(struct scsi_device *sdev)
  3939. {
  3940. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  3941. struct ipr_resource_entry *res;
  3942. struct ata_port *ap = NULL;
  3943. unsigned long lock_flags = 0;
  3944. char buffer[IPR_MAX_RES_PATH_LENGTH];
  3945. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3946. res = sdev->hostdata;
  3947. if (res) {
  3948. if (ipr_is_af_dasd_device(res))
  3949. sdev->type = TYPE_RAID;
  3950. if (ipr_is_af_dasd_device(res) || ipr_is_ioa_resource(res)) {
  3951. sdev->scsi_level = 4;
  3952. sdev->no_uld_attach = 1;
  3953. }
  3954. if (ipr_is_vset_device(res)) {
  3955. blk_queue_rq_timeout(sdev->request_queue,
  3956. IPR_VSET_RW_TIMEOUT);
  3957. blk_queue_max_hw_sectors(sdev->request_queue, IPR_VSET_MAX_SECTORS);
  3958. }
  3959. if (ipr_is_gata(res) && res->sata_port)
  3960. ap = res->sata_port->ap;
  3961. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3962. if (ap) {
  3963. scsi_adjust_queue_depth(sdev, 0, IPR_MAX_CMD_PER_ATA_LUN);
  3964. ata_sas_slave_configure(sdev, ap);
  3965. } else
  3966. scsi_adjust_queue_depth(sdev, 0, sdev->host->cmd_per_lun);
  3967. if (ioa_cfg->sis64)
  3968. sdev_printk(KERN_INFO, sdev, "Resource path: %s\n",
  3969. ipr_format_res_path(res->res_path, buffer,
  3970. sizeof(buffer)));
  3971. return 0;
  3972. }
  3973. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3974. return 0;
  3975. }
  3976. /**
  3977. * ipr_ata_slave_alloc - Prepare for commands to a SATA device
  3978. * @sdev: scsi device struct
  3979. *
  3980. * This function initializes an ATA port so that future commands
  3981. * sent through queuecommand will work.
  3982. *
  3983. * Return value:
  3984. * 0 on success
  3985. **/
  3986. static int ipr_ata_slave_alloc(struct scsi_device *sdev)
  3987. {
  3988. struct ipr_sata_port *sata_port = NULL;
  3989. int rc = -ENXIO;
  3990. ENTER;
  3991. if (sdev->sdev_target)
  3992. sata_port = sdev->sdev_target->hostdata;
  3993. if (sata_port)
  3994. rc = ata_sas_port_init(sata_port->ap);
  3995. if (rc)
  3996. ipr_slave_destroy(sdev);
  3997. LEAVE;
  3998. return rc;
  3999. }
  4000. /**
  4001. * ipr_slave_alloc - Prepare for commands to a device.
  4002. * @sdev: scsi device struct
  4003. *
  4004. * This function saves a pointer to the resource entry
  4005. * in the scsi device struct if the device exists. We
  4006. * can then use this pointer in ipr_queuecommand when
  4007. * handling new commands.
  4008. *
  4009. * Return value:
  4010. * 0 on success / -ENXIO if device does not exist
  4011. **/
  4012. static int ipr_slave_alloc(struct scsi_device *sdev)
  4013. {
  4014. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  4015. struct ipr_resource_entry *res;
  4016. unsigned long lock_flags;
  4017. int rc = -ENXIO;
  4018. sdev->hostdata = NULL;
  4019. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4020. res = ipr_find_sdev(sdev);
  4021. if (res) {
  4022. res->sdev = sdev;
  4023. res->add_to_ml = 0;
  4024. res->in_erp = 0;
  4025. sdev->hostdata = res;
  4026. if (!ipr_is_naca_model(res))
  4027. res->needs_sync_complete = 1;
  4028. rc = 0;
  4029. if (ipr_is_gata(res)) {
  4030. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4031. return ipr_ata_slave_alloc(sdev);
  4032. }
  4033. }
  4034. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4035. return rc;
  4036. }
  4037. /**
  4038. * ipr_eh_host_reset - Reset the host adapter
  4039. * @scsi_cmd: scsi command struct
  4040. *
  4041. * Return value:
  4042. * SUCCESS / FAILED
  4043. **/
  4044. static int __ipr_eh_host_reset(struct scsi_cmnd * scsi_cmd)
  4045. {
  4046. struct ipr_ioa_cfg *ioa_cfg;
  4047. int rc;
  4048. ENTER;
  4049. ioa_cfg = (struct ipr_ioa_cfg *) scsi_cmd->device->host->hostdata;
  4050. dev_err(&ioa_cfg->pdev->dev,
  4051. "Adapter being reset as a result of error recovery.\n");
  4052. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  4053. ioa_cfg->sdt_state = GET_DUMP;
  4054. rc = ipr_reset_reload(ioa_cfg, IPR_SHUTDOWN_ABBREV);
  4055. LEAVE;
  4056. return rc;
  4057. }
  4058. static int ipr_eh_host_reset(struct scsi_cmnd * cmd)
  4059. {
  4060. int rc;
  4061. spin_lock_irq(cmd->device->host->host_lock);
  4062. rc = __ipr_eh_host_reset(cmd);
  4063. spin_unlock_irq(cmd->device->host->host_lock);
  4064. return rc;
  4065. }
  4066. /**
  4067. * ipr_device_reset - Reset the device
  4068. * @ioa_cfg: ioa config struct
  4069. * @res: resource entry struct
  4070. *
  4071. * This function issues a device reset to the affected device.
  4072. * If the device is a SCSI device, a LUN reset will be sent
  4073. * to the device first. If that does not work, a target reset
  4074. * will be sent. If the device is a SATA device, a PHY reset will
  4075. * be sent.
  4076. *
  4077. * Return value:
  4078. * 0 on success / non-zero on failure
  4079. **/
  4080. static int ipr_device_reset(struct ipr_ioa_cfg *ioa_cfg,
  4081. struct ipr_resource_entry *res)
  4082. {
  4083. struct ipr_cmnd *ipr_cmd;
  4084. struct ipr_ioarcb *ioarcb;
  4085. struct ipr_cmd_pkt *cmd_pkt;
  4086. struct ipr_ioarcb_ata_regs *regs;
  4087. u32 ioasc;
  4088. ENTER;
  4089. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  4090. ioarcb = &ipr_cmd->ioarcb;
  4091. cmd_pkt = &ioarcb->cmd_pkt;
  4092. if (ipr_cmd->ioa_cfg->sis64) {
  4093. regs = &ipr_cmd->i.ata_ioadl.regs;
  4094. ioarcb->add_cmd_parms_offset = cpu_to_be16(sizeof(*ioarcb));
  4095. } else
  4096. regs = &ioarcb->u.add_data.u.regs;
  4097. ioarcb->res_handle = res->res_handle;
  4098. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  4099. cmd_pkt->cdb[0] = IPR_RESET_DEVICE;
  4100. if (ipr_is_gata(res)) {
  4101. cmd_pkt->cdb[2] = IPR_ATA_PHY_RESET;
  4102. ioarcb->add_cmd_parms_len = cpu_to_be16(sizeof(regs->flags));
  4103. regs->flags |= IPR_ATA_FLAG_STATUS_ON_GOOD_COMPLETION;
  4104. }
  4105. ipr_send_blocking_cmd(ipr_cmd, ipr_timeout, IPR_DEVICE_RESET_TIMEOUT);
  4106. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4107. list_add_tail(&ipr_cmd->queue, &ioa_cfg->free_q);
  4108. if (ipr_is_gata(res) && res->sata_port && ioasc != IPR_IOASC_IOA_WAS_RESET) {
  4109. if (ipr_cmd->ioa_cfg->sis64)
  4110. memcpy(&res->sata_port->ioasa, &ipr_cmd->s.ioasa64.u.gata,
  4111. sizeof(struct ipr_ioasa_gata));
  4112. else
  4113. memcpy(&res->sata_port->ioasa, &ipr_cmd->s.ioasa.u.gata,
  4114. sizeof(struct ipr_ioasa_gata));
  4115. }
  4116. LEAVE;
  4117. return (IPR_IOASC_SENSE_KEY(ioasc) ? -EIO : 0);
  4118. }
  4119. /**
  4120. * ipr_sata_reset - Reset the SATA port
  4121. * @link: SATA link to reset
  4122. * @classes: class of the attached device
  4123. *
  4124. * This function issues a SATA phy reset to the affected ATA link.
  4125. *
  4126. * Return value:
  4127. * 0 on success / non-zero on failure
  4128. **/
  4129. static int ipr_sata_reset(struct ata_link *link, unsigned int *classes,
  4130. unsigned long deadline)
  4131. {
  4132. struct ipr_sata_port *sata_port = link->ap->private_data;
  4133. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  4134. struct ipr_resource_entry *res;
  4135. unsigned long lock_flags = 0;
  4136. int rc = -ENXIO;
  4137. ENTER;
  4138. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4139. while(ioa_cfg->in_reset_reload) {
  4140. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4141. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  4142. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4143. }
  4144. res = sata_port->res;
  4145. if (res) {
  4146. rc = ipr_device_reset(ioa_cfg, res);
  4147. *classes = res->ata_class;
  4148. }
  4149. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4150. LEAVE;
  4151. return rc;
  4152. }
  4153. /**
  4154. * ipr_eh_dev_reset - Reset the device
  4155. * @scsi_cmd: scsi command struct
  4156. *
  4157. * This function issues a device reset to the affected device.
  4158. * A LUN reset will be sent to the device first. If that does
  4159. * not work, a target reset will be sent.
  4160. *
  4161. * Return value:
  4162. * SUCCESS / FAILED
  4163. **/
  4164. static int __ipr_eh_dev_reset(struct scsi_cmnd * scsi_cmd)
  4165. {
  4166. struct ipr_cmnd *ipr_cmd;
  4167. struct ipr_ioa_cfg *ioa_cfg;
  4168. struct ipr_resource_entry *res;
  4169. struct ata_port *ap;
  4170. int rc = 0;
  4171. ENTER;
  4172. ioa_cfg = (struct ipr_ioa_cfg *) scsi_cmd->device->host->hostdata;
  4173. res = scsi_cmd->device->hostdata;
  4174. if (!res)
  4175. return FAILED;
  4176. /*
  4177. * If we are currently going through reset/reload, return failed. This will force the
  4178. * mid-layer to call ipr_eh_host_reset, which will then go to sleep and wait for the
  4179. * reset to complete
  4180. */
  4181. if (ioa_cfg->in_reset_reload)
  4182. return FAILED;
  4183. if (ioa_cfg->ioa_is_dead)
  4184. return FAILED;
  4185. list_for_each_entry(ipr_cmd, &ioa_cfg->pending_q, queue) {
  4186. if (ipr_cmd->ioarcb.res_handle == res->res_handle) {
  4187. if (ipr_cmd->scsi_cmd)
  4188. ipr_cmd->done = ipr_scsi_eh_done;
  4189. if (ipr_cmd->qc)
  4190. ipr_cmd->done = ipr_sata_eh_done;
  4191. if (ipr_cmd->qc && !(ipr_cmd->qc->flags & ATA_QCFLAG_FAILED)) {
  4192. ipr_cmd->qc->err_mask |= AC_ERR_TIMEOUT;
  4193. ipr_cmd->qc->flags |= ATA_QCFLAG_FAILED;
  4194. }
  4195. }
  4196. }
  4197. res->resetting_device = 1;
  4198. scmd_printk(KERN_ERR, scsi_cmd, "Resetting device\n");
  4199. if (ipr_is_gata(res) && res->sata_port) {
  4200. ap = res->sata_port->ap;
  4201. spin_unlock_irq(scsi_cmd->device->host->host_lock);
  4202. ata_std_error_handler(ap);
  4203. spin_lock_irq(scsi_cmd->device->host->host_lock);
  4204. list_for_each_entry(ipr_cmd, &ioa_cfg->pending_q, queue) {
  4205. if (ipr_cmd->ioarcb.res_handle == res->res_handle) {
  4206. rc = -EIO;
  4207. break;
  4208. }
  4209. }
  4210. } else
  4211. rc = ipr_device_reset(ioa_cfg, res);
  4212. res->resetting_device = 0;
  4213. LEAVE;
  4214. return (rc ? FAILED : SUCCESS);
  4215. }
  4216. static int ipr_eh_dev_reset(struct scsi_cmnd * cmd)
  4217. {
  4218. int rc;
  4219. spin_lock_irq(cmd->device->host->host_lock);
  4220. rc = __ipr_eh_dev_reset(cmd);
  4221. spin_unlock_irq(cmd->device->host->host_lock);
  4222. return rc;
  4223. }
  4224. /**
  4225. * ipr_bus_reset_done - Op done function for bus reset.
  4226. * @ipr_cmd: ipr command struct
  4227. *
  4228. * This function is the op done function for a bus reset
  4229. *
  4230. * Return value:
  4231. * none
  4232. **/
  4233. static void ipr_bus_reset_done(struct ipr_cmnd *ipr_cmd)
  4234. {
  4235. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  4236. struct ipr_resource_entry *res;
  4237. ENTER;
  4238. if (!ioa_cfg->sis64)
  4239. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  4240. if (res->res_handle == ipr_cmd->ioarcb.res_handle) {
  4241. scsi_report_bus_reset(ioa_cfg->host, res->bus);
  4242. break;
  4243. }
  4244. }
  4245. /*
  4246. * If abort has not completed, indicate the reset has, else call the
  4247. * abort's done function to wake the sleeping eh thread
  4248. */
  4249. if (ipr_cmd->sibling->sibling)
  4250. ipr_cmd->sibling->sibling = NULL;
  4251. else
  4252. ipr_cmd->sibling->done(ipr_cmd->sibling);
  4253. list_add_tail(&ipr_cmd->queue, &ioa_cfg->free_q);
  4254. LEAVE;
  4255. }
  4256. /**
  4257. * ipr_abort_timeout - An abort task has timed out
  4258. * @ipr_cmd: ipr command struct
  4259. *
  4260. * This function handles when an abort task times out. If this
  4261. * happens we issue a bus reset since we have resources tied
  4262. * up that must be freed before returning to the midlayer.
  4263. *
  4264. * Return value:
  4265. * none
  4266. **/
  4267. static void ipr_abort_timeout(struct ipr_cmnd *ipr_cmd)
  4268. {
  4269. struct ipr_cmnd *reset_cmd;
  4270. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  4271. struct ipr_cmd_pkt *cmd_pkt;
  4272. unsigned long lock_flags = 0;
  4273. ENTER;
  4274. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4275. if (ipr_cmd->completion.done || ioa_cfg->in_reset_reload) {
  4276. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4277. return;
  4278. }
  4279. sdev_printk(KERN_ERR, ipr_cmd->u.sdev, "Abort timed out. Resetting bus.\n");
  4280. reset_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  4281. ipr_cmd->sibling = reset_cmd;
  4282. reset_cmd->sibling = ipr_cmd;
  4283. reset_cmd->ioarcb.res_handle = ipr_cmd->ioarcb.res_handle;
  4284. cmd_pkt = &reset_cmd->ioarcb.cmd_pkt;
  4285. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  4286. cmd_pkt->cdb[0] = IPR_RESET_DEVICE;
  4287. cmd_pkt->cdb[2] = IPR_RESET_TYPE_SELECT | IPR_BUS_RESET;
  4288. ipr_do_req(reset_cmd, ipr_bus_reset_done, ipr_timeout, IPR_DEVICE_RESET_TIMEOUT);
  4289. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4290. LEAVE;
  4291. }
  4292. /**
  4293. * ipr_cancel_op - Cancel specified op
  4294. * @scsi_cmd: scsi command struct
  4295. *
  4296. * This function cancels specified op.
  4297. *
  4298. * Return value:
  4299. * SUCCESS / FAILED
  4300. **/
  4301. static int ipr_cancel_op(struct scsi_cmnd * scsi_cmd)
  4302. {
  4303. struct ipr_cmnd *ipr_cmd;
  4304. struct ipr_ioa_cfg *ioa_cfg;
  4305. struct ipr_resource_entry *res;
  4306. struct ipr_cmd_pkt *cmd_pkt;
  4307. u32 ioasc;
  4308. int op_found = 0;
  4309. ENTER;
  4310. ioa_cfg = (struct ipr_ioa_cfg *)scsi_cmd->device->host->hostdata;
  4311. res = scsi_cmd->device->hostdata;
  4312. /* If we are currently going through reset/reload, return failed.
  4313. * This will force the mid-layer to call ipr_eh_host_reset,
  4314. * which will then go to sleep and wait for the reset to complete
  4315. */
  4316. if (ioa_cfg->in_reset_reload || ioa_cfg->ioa_is_dead)
  4317. return FAILED;
  4318. if (!res || !ipr_is_gscsi(res))
  4319. return FAILED;
  4320. list_for_each_entry(ipr_cmd, &ioa_cfg->pending_q, queue) {
  4321. if (ipr_cmd->scsi_cmd == scsi_cmd) {
  4322. ipr_cmd->done = ipr_scsi_eh_done;
  4323. op_found = 1;
  4324. break;
  4325. }
  4326. }
  4327. if (!op_found)
  4328. return SUCCESS;
  4329. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  4330. ipr_cmd->ioarcb.res_handle = res->res_handle;
  4331. cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
  4332. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  4333. cmd_pkt->cdb[0] = IPR_CANCEL_ALL_REQUESTS;
  4334. ipr_cmd->u.sdev = scsi_cmd->device;
  4335. scmd_printk(KERN_ERR, scsi_cmd, "Aborting command: %02X\n",
  4336. scsi_cmd->cmnd[0]);
  4337. ipr_send_blocking_cmd(ipr_cmd, ipr_abort_timeout, IPR_CANCEL_ALL_TIMEOUT);
  4338. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4339. /*
  4340. * If the abort task timed out and we sent a bus reset, we will get
  4341. * one the following responses to the abort
  4342. */
  4343. if (ioasc == IPR_IOASC_BUS_WAS_RESET || ioasc == IPR_IOASC_SYNC_REQUIRED) {
  4344. ioasc = 0;
  4345. ipr_trace;
  4346. }
  4347. list_add_tail(&ipr_cmd->queue, &ioa_cfg->free_q);
  4348. if (!ipr_is_naca_model(res))
  4349. res->needs_sync_complete = 1;
  4350. LEAVE;
  4351. return (IPR_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS);
  4352. }
  4353. /**
  4354. * ipr_eh_abort - Abort a single op
  4355. * @scsi_cmd: scsi command struct
  4356. *
  4357. * Return value:
  4358. * SUCCESS / FAILED
  4359. **/
  4360. static int ipr_eh_abort(struct scsi_cmnd * scsi_cmd)
  4361. {
  4362. unsigned long flags;
  4363. int rc;
  4364. ENTER;
  4365. spin_lock_irqsave(scsi_cmd->device->host->host_lock, flags);
  4366. rc = ipr_cancel_op(scsi_cmd);
  4367. spin_unlock_irqrestore(scsi_cmd->device->host->host_lock, flags);
  4368. LEAVE;
  4369. return rc;
  4370. }
  4371. /**
  4372. * ipr_handle_other_interrupt - Handle "other" interrupts
  4373. * @ioa_cfg: ioa config struct
  4374. * @int_reg: interrupt register
  4375. *
  4376. * Return value:
  4377. * IRQ_NONE / IRQ_HANDLED
  4378. **/
  4379. static irqreturn_t ipr_handle_other_interrupt(struct ipr_ioa_cfg *ioa_cfg,
  4380. u32 int_reg)
  4381. {
  4382. irqreturn_t rc = IRQ_HANDLED;
  4383. u32 int_mask_reg;
  4384. int_mask_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg32);
  4385. int_reg &= ~int_mask_reg;
  4386. /* If an interrupt on the adapter did not occur, ignore it.
  4387. * Or in the case of SIS 64, check for a stage change interrupt.
  4388. */
  4389. if ((int_reg & IPR_PCII_OPER_INTERRUPTS) == 0) {
  4390. if (ioa_cfg->sis64) {
  4391. int_mask_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  4392. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;
  4393. if (int_reg & IPR_PCII_IPL_STAGE_CHANGE) {
  4394. /* clear stage change */
  4395. writel(IPR_PCII_IPL_STAGE_CHANGE, ioa_cfg->regs.clr_interrupt_reg);
  4396. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;
  4397. list_del(&ioa_cfg->reset_cmd->queue);
  4398. del_timer(&ioa_cfg->reset_cmd->timer);
  4399. ipr_reset_ioa_job(ioa_cfg->reset_cmd);
  4400. return IRQ_HANDLED;
  4401. }
  4402. }
  4403. return IRQ_NONE;
  4404. }
  4405. if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
  4406. /* Mask the interrupt */
  4407. writel(IPR_PCII_IOA_TRANS_TO_OPER, ioa_cfg->regs.set_interrupt_mask_reg);
  4408. /* Clear the interrupt */
  4409. writel(IPR_PCII_IOA_TRANS_TO_OPER, ioa_cfg->regs.clr_interrupt_reg);
  4410. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  4411. list_del(&ioa_cfg->reset_cmd->queue);
  4412. del_timer(&ioa_cfg->reset_cmd->timer);
  4413. ipr_reset_ioa_job(ioa_cfg->reset_cmd);
  4414. } else if ((int_reg & IPR_PCII_HRRQ_UPDATED) == int_reg) {
  4415. if (ipr_debug && printk_ratelimit())
  4416. dev_err(&ioa_cfg->pdev->dev,
  4417. "Spurious interrupt detected. 0x%08X\n", int_reg);
  4418. writel(IPR_PCII_HRRQ_UPDATED, ioa_cfg->regs.clr_interrupt_reg32);
  4419. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  4420. return IRQ_NONE;
  4421. } else {
  4422. if (int_reg & IPR_PCII_IOA_UNIT_CHECKED)
  4423. ioa_cfg->ioa_unit_checked = 1;
  4424. else
  4425. dev_err(&ioa_cfg->pdev->dev,
  4426. "Permanent IOA failure. 0x%08X\n", int_reg);
  4427. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  4428. ioa_cfg->sdt_state = GET_DUMP;
  4429. ipr_mask_and_clear_interrupts(ioa_cfg, ~0);
  4430. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  4431. }
  4432. return rc;
  4433. }
  4434. /**
  4435. * ipr_isr_eh - Interrupt service routine error handler
  4436. * @ioa_cfg: ioa config struct
  4437. * @msg: message to log
  4438. *
  4439. * Return value:
  4440. * none
  4441. **/
  4442. static void ipr_isr_eh(struct ipr_ioa_cfg *ioa_cfg, char *msg)
  4443. {
  4444. ioa_cfg->errors_logged++;
  4445. dev_err(&ioa_cfg->pdev->dev, "%s\n", msg);
  4446. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  4447. ioa_cfg->sdt_state = GET_DUMP;
  4448. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  4449. }
  4450. /**
  4451. * ipr_isr - Interrupt service routine
  4452. * @irq: irq number
  4453. * @devp: pointer to ioa config struct
  4454. *
  4455. * Return value:
  4456. * IRQ_NONE / IRQ_HANDLED
  4457. **/
  4458. static irqreturn_t ipr_isr(int irq, void *devp)
  4459. {
  4460. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)devp;
  4461. unsigned long lock_flags = 0;
  4462. u32 int_reg = 0;
  4463. u32 ioasc;
  4464. u16 cmd_index;
  4465. int num_hrrq = 0;
  4466. int irq_none = 0;
  4467. struct ipr_cmnd *ipr_cmd;
  4468. irqreturn_t rc = IRQ_NONE;
  4469. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4470. /* If interrupts are disabled, ignore the interrupt */
  4471. if (!ioa_cfg->allow_interrupts) {
  4472. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4473. return IRQ_NONE;
  4474. }
  4475. while (1) {
  4476. ipr_cmd = NULL;
  4477. while ((be32_to_cpu(*ioa_cfg->hrrq_curr) & IPR_HRRQ_TOGGLE_BIT) ==
  4478. ioa_cfg->toggle_bit) {
  4479. cmd_index = (be32_to_cpu(*ioa_cfg->hrrq_curr) &
  4480. IPR_HRRQ_REQ_RESP_HANDLE_MASK) >> IPR_HRRQ_REQ_RESP_HANDLE_SHIFT;
  4481. if (unlikely(cmd_index >= IPR_NUM_CMD_BLKS)) {
  4482. ipr_isr_eh(ioa_cfg, "Invalid response handle from IOA");
  4483. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4484. return IRQ_HANDLED;
  4485. }
  4486. ipr_cmd = ioa_cfg->ipr_cmnd_list[cmd_index];
  4487. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4488. ipr_trc_hook(ipr_cmd, IPR_TRACE_FINISH, ioasc);
  4489. list_del(&ipr_cmd->queue);
  4490. del_timer(&ipr_cmd->timer);
  4491. ipr_cmd->done(ipr_cmd);
  4492. rc = IRQ_HANDLED;
  4493. if (ioa_cfg->hrrq_curr < ioa_cfg->hrrq_end) {
  4494. ioa_cfg->hrrq_curr++;
  4495. } else {
  4496. ioa_cfg->hrrq_curr = ioa_cfg->hrrq_start;
  4497. ioa_cfg->toggle_bit ^= 1u;
  4498. }
  4499. }
  4500. if (ipr_cmd != NULL) {
  4501. /* Clear the PCI interrupt */
  4502. num_hrrq = 0;
  4503. do {
  4504. writel(IPR_PCII_HRRQ_UPDATED, ioa_cfg->regs.clr_interrupt_reg32);
  4505. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  4506. } while (int_reg & IPR_PCII_HRRQ_UPDATED &&
  4507. num_hrrq++ < IPR_MAX_HRRQ_RETRIES);
  4508. } else if (rc == IRQ_NONE && irq_none == 0) {
  4509. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  4510. irq_none++;
  4511. } else if (num_hrrq == IPR_MAX_HRRQ_RETRIES &&
  4512. int_reg & IPR_PCII_HRRQ_UPDATED) {
  4513. ipr_isr_eh(ioa_cfg, "Error clearing HRRQ");
  4514. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4515. return IRQ_HANDLED;
  4516. } else
  4517. break;
  4518. }
  4519. if (unlikely(rc == IRQ_NONE))
  4520. rc = ipr_handle_other_interrupt(ioa_cfg, int_reg);
  4521. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4522. return rc;
  4523. }
  4524. /**
  4525. * ipr_build_ioadl64 - Build a scatter/gather list and map the buffer
  4526. * @ioa_cfg: ioa config struct
  4527. * @ipr_cmd: ipr command struct
  4528. *
  4529. * Return value:
  4530. * 0 on success / -1 on failure
  4531. **/
  4532. static int ipr_build_ioadl64(struct ipr_ioa_cfg *ioa_cfg,
  4533. struct ipr_cmnd *ipr_cmd)
  4534. {
  4535. int i, nseg;
  4536. struct scatterlist *sg;
  4537. u32 length;
  4538. u32 ioadl_flags = 0;
  4539. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  4540. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  4541. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ioadl64;
  4542. length = scsi_bufflen(scsi_cmd);
  4543. if (!length)
  4544. return 0;
  4545. nseg = scsi_dma_map(scsi_cmd);
  4546. if (nseg < 0) {
  4547. if (printk_ratelimit())
  4548. dev_err(&ioa_cfg->pdev->dev, "pci_map_sg failed!\n");
  4549. return -1;
  4550. }
  4551. ipr_cmd->dma_use_sg = nseg;
  4552. ioarcb->data_transfer_length = cpu_to_be32(length);
  4553. ioarcb->ioadl_len =
  4554. cpu_to_be32(sizeof(struct ipr_ioadl64_desc) * ipr_cmd->dma_use_sg);
  4555. if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE) {
  4556. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  4557. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  4558. } else if (scsi_cmd->sc_data_direction == DMA_FROM_DEVICE)
  4559. ioadl_flags = IPR_IOADL_FLAGS_READ;
  4560. scsi_for_each_sg(scsi_cmd, sg, ipr_cmd->dma_use_sg, i) {
  4561. ioadl64[i].flags = cpu_to_be32(ioadl_flags);
  4562. ioadl64[i].data_len = cpu_to_be32(sg_dma_len(sg));
  4563. ioadl64[i].address = cpu_to_be64(sg_dma_address(sg));
  4564. }
  4565. ioadl64[i-1].flags |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  4566. return 0;
  4567. }
  4568. /**
  4569. * ipr_build_ioadl - Build a scatter/gather list and map the buffer
  4570. * @ioa_cfg: ioa config struct
  4571. * @ipr_cmd: ipr command struct
  4572. *
  4573. * Return value:
  4574. * 0 on success / -1 on failure
  4575. **/
  4576. static int ipr_build_ioadl(struct ipr_ioa_cfg *ioa_cfg,
  4577. struct ipr_cmnd *ipr_cmd)
  4578. {
  4579. int i, nseg;
  4580. struct scatterlist *sg;
  4581. u32 length;
  4582. u32 ioadl_flags = 0;
  4583. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  4584. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  4585. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  4586. length = scsi_bufflen(scsi_cmd);
  4587. if (!length)
  4588. return 0;
  4589. nseg = scsi_dma_map(scsi_cmd);
  4590. if (nseg < 0) {
  4591. dev_err(&ioa_cfg->pdev->dev, "pci_map_sg failed!\n");
  4592. return -1;
  4593. }
  4594. ipr_cmd->dma_use_sg = nseg;
  4595. if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE) {
  4596. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  4597. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  4598. ioarcb->data_transfer_length = cpu_to_be32(length);
  4599. ioarcb->ioadl_len =
  4600. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  4601. } else if (scsi_cmd->sc_data_direction == DMA_FROM_DEVICE) {
  4602. ioadl_flags = IPR_IOADL_FLAGS_READ;
  4603. ioarcb->read_data_transfer_length = cpu_to_be32(length);
  4604. ioarcb->read_ioadl_len =
  4605. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  4606. }
  4607. if (ipr_cmd->dma_use_sg <= ARRAY_SIZE(ioarcb->u.add_data.u.ioadl)) {
  4608. ioadl = ioarcb->u.add_data.u.ioadl;
  4609. ioarcb->write_ioadl_addr = cpu_to_be32((ipr_cmd->dma_addr) +
  4610. offsetof(struct ipr_ioarcb, u.add_data));
  4611. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  4612. }
  4613. scsi_for_each_sg(scsi_cmd, sg, ipr_cmd->dma_use_sg, i) {
  4614. ioadl[i].flags_and_data_len =
  4615. cpu_to_be32(ioadl_flags | sg_dma_len(sg));
  4616. ioadl[i].address = cpu_to_be32(sg_dma_address(sg));
  4617. }
  4618. ioadl[i-1].flags_and_data_len |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  4619. return 0;
  4620. }
  4621. /**
  4622. * ipr_get_task_attributes - Translate SPI Q-Tag to task attributes
  4623. * @scsi_cmd: scsi command struct
  4624. *
  4625. * Return value:
  4626. * task attributes
  4627. **/
  4628. static u8 ipr_get_task_attributes(struct scsi_cmnd *scsi_cmd)
  4629. {
  4630. u8 tag[2];
  4631. u8 rc = IPR_FLAGS_LO_UNTAGGED_TASK;
  4632. if (scsi_populate_tag_msg(scsi_cmd, tag)) {
  4633. switch (tag[0]) {
  4634. case MSG_SIMPLE_TAG:
  4635. rc = IPR_FLAGS_LO_SIMPLE_TASK;
  4636. break;
  4637. case MSG_HEAD_TAG:
  4638. rc = IPR_FLAGS_LO_HEAD_OF_Q_TASK;
  4639. break;
  4640. case MSG_ORDERED_TAG:
  4641. rc = IPR_FLAGS_LO_ORDERED_TASK;
  4642. break;
  4643. };
  4644. }
  4645. return rc;
  4646. }
  4647. /**
  4648. * ipr_erp_done - Process completion of ERP for a device
  4649. * @ipr_cmd: ipr command struct
  4650. *
  4651. * This function copies the sense buffer into the scsi_cmd
  4652. * struct and pushes the scsi_done function.
  4653. *
  4654. * Return value:
  4655. * nothing
  4656. **/
  4657. static void ipr_erp_done(struct ipr_cmnd *ipr_cmd)
  4658. {
  4659. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  4660. struct ipr_resource_entry *res = scsi_cmd->device->hostdata;
  4661. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  4662. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4663. if (IPR_IOASC_SENSE_KEY(ioasc) > 0) {
  4664. scsi_cmd->result |= (DID_ERROR << 16);
  4665. scmd_printk(KERN_ERR, scsi_cmd,
  4666. "Request Sense failed with IOASC: 0x%08X\n", ioasc);
  4667. } else {
  4668. memcpy(scsi_cmd->sense_buffer, ipr_cmd->sense_buffer,
  4669. SCSI_SENSE_BUFFERSIZE);
  4670. }
  4671. if (res) {
  4672. if (!ipr_is_naca_model(res))
  4673. res->needs_sync_complete = 1;
  4674. res->in_erp = 0;
  4675. }
  4676. scsi_dma_unmap(ipr_cmd->scsi_cmd);
  4677. list_add_tail(&ipr_cmd->queue, &ioa_cfg->free_q);
  4678. scsi_cmd->scsi_done(scsi_cmd);
  4679. }
  4680. /**
  4681. * ipr_reinit_ipr_cmnd_for_erp - Re-initialize a cmnd block to be used for ERP
  4682. * @ipr_cmd: ipr command struct
  4683. *
  4684. * Return value:
  4685. * none
  4686. **/
  4687. static void ipr_reinit_ipr_cmnd_for_erp(struct ipr_cmnd *ipr_cmd)
  4688. {
  4689. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  4690. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  4691. dma_addr_t dma_addr = ipr_cmd->dma_addr;
  4692. memset(&ioarcb->cmd_pkt, 0, sizeof(struct ipr_cmd_pkt));
  4693. ioarcb->data_transfer_length = 0;
  4694. ioarcb->read_data_transfer_length = 0;
  4695. ioarcb->ioadl_len = 0;
  4696. ioarcb->read_ioadl_len = 0;
  4697. ioasa->hdr.ioasc = 0;
  4698. ioasa->hdr.residual_data_len = 0;
  4699. if (ipr_cmd->ioa_cfg->sis64)
  4700. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  4701. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ioadl64));
  4702. else {
  4703. ioarcb->write_ioadl_addr =
  4704. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, i.ioadl));
  4705. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  4706. }
  4707. }
  4708. /**
  4709. * ipr_erp_request_sense - Send request sense to a device
  4710. * @ipr_cmd: ipr command struct
  4711. *
  4712. * This function sends a request sense to a device as a result
  4713. * of a check condition.
  4714. *
  4715. * Return value:
  4716. * nothing
  4717. **/
  4718. static void ipr_erp_request_sense(struct ipr_cmnd *ipr_cmd)
  4719. {
  4720. struct ipr_cmd_pkt *cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
  4721. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4722. if (IPR_IOASC_SENSE_KEY(ioasc) > 0) {
  4723. ipr_erp_done(ipr_cmd);
  4724. return;
  4725. }
  4726. ipr_reinit_ipr_cmnd_for_erp(ipr_cmd);
  4727. cmd_pkt->request_type = IPR_RQTYPE_SCSICDB;
  4728. cmd_pkt->cdb[0] = REQUEST_SENSE;
  4729. cmd_pkt->cdb[4] = SCSI_SENSE_BUFFERSIZE;
  4730. cmd_pkt->flags_hi |= IPR_FLAGS_HI_SYNC_OVERRIDE;
  4731. cmd_pkt->flags_hi |= IPR_FLAGS_HI_NO_ULEN_CHK;
  4732. cmd_pkt->timeout = cpu_to_be16(IPR_REQUEST_SENSE_TIMEOUT / HZ);
  4733. ipr_init_ioadl(ipr_cmd, ipr_cmd->sense_buffer_dma,
  4734. SCSI_SENSE_BUFFERSIZE, IPR_IOADL_FLAGS_READ_LAST);
  4735. ipr_do_req(ipr_cmd, ipr_erp_done, ipr_timeout,
  4736. IPR_REQUEST_SENSE_TIMEOUT * 2);
  4737. }
  4738. /**
  4739. * ipr_erp_cancel_all - Send cancel all to a device
  4740. * @ipr_cmd: ipr command struct
  4741. *
  4742. * This function sends a cancel all to a device to clear the
  4743. * queue. If we are running TCQ on the device, QERR is set to 1,
  4744. * which means all outstanding ops have been dropped on the floor.
  4745. * Cancel all will return them to us.
  4746. *
  4747. * Return value:
  4748. * nothing
  4749. **/
  4750. static void ipr_erp_cancel_all(struct ipr_cmnd *ipr_cmd)
  4751. {
  4752. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  4753. struct ipr_resource_entry *res = scsi_cmd->device->hostdata;
  4754. struct ipr_cmd_pkt *cmd_pkt;
  4755. res->in_erp = 1;
  4756. ipr_reinit_ipr_cmnd_for_erp(ipr_cmd);
  4757. if (!scsi_get_tag_type(scsi_cmd->device)) {
  4758. ipr_erp_request_sense(ipr_cmd);
  4759. return;
  4760. }
  4761. cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
  4762. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  4763. cmd_pkt->cdb[0] = IPR_CANCEL_ALL_REQUESTS;
  4764. ipr_do_req(ipr_cmd, ipr_erp_request_sense, ipr_timeout,
  4765. IPR_CANCEL_ALL_TIMEOUT);
  4766. }
  4767. /**
  4768. * ipr_dump_ioasa - Dump contents of IOASA
  4769. * @ioa_cfg: ioa config struct
  4770. * @ipr_cmd: ipr command struct
  4771. * @res: resource entry struct
  4772. *
  4773. * This function is invoked by the interrupt handler when ops
  4774. * fail. It will log the IOASA if appropriate. Only called
  4775. * for GPDD ops.
  4776. *
  4777. * Return value:
  4778. * none
  4779. **/
  4780. static void ipr_dump_ioasa(struct ipr_ioa_cfg *ioa_cfg,
  4781. struct ipr_cmnd *ipr_cmd, struct ipr_resource_entry *res)
  4782. {
  4783. int i;
  4784. u16 data_len;
  4785. u32 ioasc, fd_ioasc;
  4786. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  4787. __be32 *ioasa_data = (__be32 *)ioasa;
  4788. int error_index;
  4789. ioasc = be32_to_cpu(ioasa->hdr.ioasc) & IPR_IOASC_IOASC_MASK;
  4790. fd_ioasc = be32_to_cpu(ioasa->hdr.fd_ioasc) & IPR_IOASC_IOASC_MASK;
  4791. if (0 == ioasc)
  4792. return;
  4793. if (ioa_cfg->log_level < IPR_DEFAULT_LOG_LEVEL)
  4794. return;
  4795. if (ioasc == IPR_IOASC_BUS_WAS_RESET && fd_ioasc)
  4796. error_index = ipr_get_error(fd_ioasc);
  4797. else
  4798. error_index = ipr_get_error(ioasc);
  4799. if (ioa_cfg->log_level < IPR_MAX_LOG_LEVEL) {
  4800. /* Don't log an error if the IOA already logged one */
  4801. if (ioasa->hdr.ilid != 0)
  4802. return;
  4803. if (!ipr_is_gscsi(res))
  4804. return;
  4805. if (ipr_error_table[error_index].log_ioasa == 0)
  4806. return;
  4807. }
  4808. ipr_res_err(ioa_cfg, res, "%s\n", ipr_error_table[error_index].error);
  4809. data_len = be16_to_cpu(ioasa->hdr.ret_stat_len);
  4810. if (ioa_cfg->sis64 && sizeof(struct ipr_ioasa64) < data_len)
  4811. data_len = sizeof(struct ipr_ioasa64);
  4812. else if (!ioa_cfg->sis64 && sizeof(struct ipr_ioasa) < data_len)
  4813. data_len = sizeof(struct ipr_ioasa);
  4814. ipr_err("IOASA Dump:\n");
  4815. for (i = 0; i < data_len / 4; i += 4) {
  4816. ipr_err("%08X: %08X %08X %08X %08X\n", i*4,
  4817. be32_to_cpu(ioasa_data[i]),
  4818. be32_to_cpu(ioasa_data[i+1]),
  4819. be32_to_cpu(ioasa_data[i+2]),
  4820. be32_to_cpu(ioasa_data[i+3]));
  4821. }
  4822. }
  4823. /**
  4824. * ipr_gen_sense - Generate SCSI sense data from an IOASA
  4825. * @ioasa: IOASA
  4826. * @sense_buf: sense data buffer
  4827. *
  4828. * Return value:
  4829. * none
  4830. **/
  4831. static void ipr_gen_sense(struct ipr_cmnd *ipr_cmd)
  4832. {
  4833. u32 failing_lba;
  4834. u8 *sense_buf = ipr_cmd->scsi_cmd->sense_buffer;
  4835. struct ipr_resource_entry *res = ipr_cmd->scsi_cmd->device->hostdata;
  4836. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  4837. u32 ioasc = be32_to_cpu(ioasa->hdr.ioasc);
  4838. memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE);
  4839. if (ioasc >= IPR_FIRST_DRIVER_IOASC)
  4840. return;
  4841. ipr_cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION;
  4842. if (ipr_is_vset_device(res) &&
  4843. ioasc == IPR_IOASC_MED_DO_NOT_REALLOC &&
  4844. ioasa->u.vset.failing_lba_hi != 0) {
  4845. sense_buf[0] = 0x72;
  4846. sense_buf[1] = IPR_IOASC_SENSE_KEY(ioasc);
  4847. sense_buf[2] = IPR_IOASC_SENSE_CODE(ioasc);
  4848. sense_buf[3] = IPR_IOASC_SENSE_QUAL(ioasc);
  4849. sense_buf[7] = 12;
  4850. sense_buf[8] = 0;
  4851. sense_buf[9] = 0x0A;
  4852. sense_buf[10] = 0x80;
  4853. failing_lba = be32_to_cpu(ioasa->u.vset.failing_lba_hi);
  4854. sense_buf[12] = (failing_lba & 0xff000000) >> 24;
  4855. sense_buf[13] = (failing_lba & 0x00ff0000) >> 16;
  4856. sense_buf[14] = (failing_lba & 0x0000ff00) >> 8;
  4857. sense_buf[15] = failing_lba & 0x000000ff;
  4858. failing_lba = be32_to_cpu(ioasa->u.vset.failing_lba_lo);
  4859. sense_buf[16] = (failing_lba & 0xff000000) >> 24;
  4860. sense_buf[17] = (failing_lba & 0x00ff0000) >> 16;
  4861. sense_buf[18] = (failing_lba & 0x0000ff00) >> 8;
  4862. sense_buf[19] = failing_lba & 0x000000ff;
  4863. } else {
  4864. sense_buf[0] = 0x70;
  4865. sense_buf[2] = IPR_IOASC_SENSE_KEY(ioasc);
  4866. sense_buf[12] = IPR_IOASC_SENSE_CODE(ioasc);
  4867. sense_buf[13] = IPR_IOASC_SENSE_QUAL(ioasc);
  4868. /* Illegal request */
  4869. if ((IPR_IOASC_SENSE_KEY(ioasc) == 0x05) &&
  4870. (be32_to_cpu(ioasa->hdr.ioasc_specific) & IPR_FIELD_POINTER_VALID)) {
  4871. sense_buf[7] = 10; /* additional length */
  4872. /* IOARCB was in error */
  4873. if (IPR_IOASC_SENSE_CODE(ioasc) == 0x24)
  4874. sense_buf[15] = 0xC0;
  4875. else /* Parameter data was invalid */
  4876. sense_buf[15] = 0x80;
  4877. sense_buf[16] =
  4878. ((IPR_FIELD_POINTER_MASK &
  4879. be32_to_cpu(ioasa->hdr.ioasc_specific)) >> 8) & 0xff;
  4880. sense_buf[17] =
  4881. (IPR_FIELD_POINTER_MASK &
  4882. be32_to_cpu(ioasa->hdr.ioasc_specific)) & 0xff;
  4883. } else {
  4884. if (ioasc == IPR_IOASC_MED_DO_NOT_REALLOC) {
  4885. if (ipr_is_vset_device(res))
  4886. failing_lba = be32_to_cpu(ioasa->u.vset.failing_lba_lo);
  4887. else
  4888. failing_lba = be32_to_cpu(ioasa->u.dasd.failing_lba);
  4889. sense_buf[0] |= 0x80; /* Or in the Valid bit */
  4890. sense_buf[3] = (failing_lba & 0xff000000) >> 24;
  4891. sense_buf[4] = (failing_lba & 0x00ff0000) >> 16;
  4892. sense_buf[5] = (failing_lba & 0x0000ff00) >> 8;
  4893. sense_buf[6] = failing_lba & 0x000000ff;
  4894. }
  4895. sense_buf[7] = 6; /* additional length */
  4896. }
  4897. }
  4898. }
  4899. /**
  4900. * ipr_get_autosense - Copy autosense data to sense buffer
  4901. * @ipr_cmd: ipr command struct
  4902. *
  4903. * This function copies the autosense buffer to the buffer
  4904. * in the scsi_cmd, if there is autosense available.
  4905. *
  4906. * Return value:
  4907. * 1 if autosense was available / 0 if not
  4908. **/
  4909. static int ipr_get_autosense(struct ipr_cmnd *ipr_cmd)
  4910. {
  4911. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  4912. struct ipr_ioasa64 *ioasa64 = &ipr_cmd->s.ioasa64;
  4913. if ((be32_to_cpu(ioasa->hdr.ioasc_specific) & IPR_AUTOSENSE_VALID) == 0)
  4914. return 0;
  4915. if (ipr_cmd->ioa_cfg->sis64)
  4916. memcpy(ipr_cmd->scsi_cmd->sense_buffer, ioasa64->auto_sense.data,
  4917. min_t(u16, be16_to_cpu(ioasa64->auto_sense.auto_sense_len),
  4918. SCSI_SENSE_BUFFERSIZE));
  4919. else
  4920. memcpy(ipr_cmd->scsi_cmd->sense_buffer, ioasa->auto_sense.data,
  4921. min_t(u16, be16_to_cpu(ioasa->auto_sense.auto_sense_len),
  4922. SCSI_SENSE_BUFFERSIZE));
  4923. return 1;
  4924. }
  4925. /**
  4926. * ipr_erp_start - Process an error response for a SCSI op
  4927. * @ioa_cfg: ioa config struct
  4928. * @ipr_cmd: ipr command struct
  4929. *
  4930. * This function determines whether or not to initiate ERP
  4931. * on the affected device.
  4932. *
  4933. * Return value:
  4934. * nothing
  4935. **/
  4936. static void ipr_erp_start(struct ipr_ioa_cfg *ioa_cfg,
  4937. struct ipr_cmnd *ipr_cmd)
  4938. {
  4939. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  4940. struct ipr_resource_entry *res = scsi_cmd->device->hostdata;
  4941. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4942. u32 masked_ioasc = ioasc & IPR_IOASC_IOASC_MASK;
  4943. if (!res) {
  4944. ipr_scsi_eh_done(ipr_cmd);
  4945. return;
  4946. }
  4947. if (!ipr_is_gscsi(res) && masked_ioasc != IPR_IOASC_HW_DEV_BUS_STATUS)
  4948. ipr_gen_sense(ipr_cmd);
  4949. ipr_dump_ioasa(ioa_cfg, ipr_cmd, res);
  4950. switch (masked_ioasc) {
  4951. case IPR_IOASC_ABORTED_CMD_TERM_BY_HOST:
  4952. if (ipr_is_naca_model(res))
  4953. scsi_cmd->result |= (DID_ABORT << 16);
  4954. else
  4955. scsi_cmd->result |= (DID_IMM_RETRY << 16);
  4956. break;
  4957. case IPR_IOASC_IR_RESOURCE_HANDLE:
  4958. case IPR_IOASC_IR_NO_CMDS_TO_2ND_IOA:
  4959. scsi_cmd->result |= (DID_NO_CONNECT << 16);
  4960. break;
  4961. case IPR_IOASC_HW_SEL_TIMEOUT:
  4962. scsi_cmd->result |= (DID_NO_CONNECT << 16);
  4963. if (!ipr_is_naca_model(res))
  4964. res->needs_sync_complete = 1;
  4965. break;
  4966. case IPR_IOASC_SYNC_REQUIRED:
  4967. if (!res->in_erp)
  4968. res->needs_sync_complete = 1;
  4969. scsi_cmd->result |= (DID_IMM_RETRY << 16);
  4970. break;
  4971. case IPR_IOASC_MED_DO_NOT_REALLOC: /* prevent retries */
  4972. case IPR_IOASA_IR_DUAL_IOA_DISABLED:
  4973. scsi_cmd->result |= (DID_PASSTHROUGH << 16);
  4974. break;
  4975. case IPR_IOASC_BUS_WAS_RESET:
  4976. case IPR_IOASC_BUS_WAS_RESET_BY_OTHER:
  4977. /*
  4978. * Report the bus reset and ask for a retry. The device
  4979. * will give CC/UA the next command.
  4980. */
  4981. if (!res->resetting_device)
  4982. scsi_report_bus_reset(ioa_cfg->host, scsi_cmd->device->channel);
  4983. scsi_cmd->result |= (DID_ERROR << 16);
  4984. if (!ipr_is_naca_model(res))
  4985. res->needs_sync_complete = 1;
  4986. break;
  4987. case IPR_IOASC_HW_DEV_BUS_STATUS:
  4988. scsi_cmd->result |= IPR_IOASC_SENSE_STATUS(ioasc);
  4989. if (IPR_IOASC_SENSE_STATUS(ioasc) == SAM_STAT_CHECK_CONDITION) {
  4990. if (!ipr_get_autosense(ipr_cmd)) {
  4991. if (!ipr_is_naca_model(res)) {
  4992. ipr_erp_cancel_all(ipr_cmd);
  4993. return;
  4994. }
  4995. }
  4996. }
  4997. if (!ipr_is_naca_model(res))
  4998. res->needs_sync_complete = 1;
  4999. break;
  5000. case IPR_IOASC_NR_INIT_CMD_REQUIRED:
  5001. break;
  5002. default:
  5003. if (IPR_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
  5004. scsi_cmd->result |= (DID_ERROR << 16);
  5005. if (!ipr_is_vset_device(res) && !ipr_is_naca_model(res))
  5006. res->needs_sync_complete = 1;
  5007. break;
  5008. }
  5009. scsi_dma_unmap(ipr_cmd->scsi_cmd);
  5010. list_add_tail(&ipr_cmd->queue, &ioa_cfg->free_q);
  5011. scsi_cmd->scsi_done(scsi_cmd);
  5012. }
  5013. /**
  5014. * ipr_scsi_done - mid-layer done function
  5015. * @ipr_cmd: ipr command struct
  5016. *
  5017. * This function is invoked by the interrupt handler for
  5018. * ops generated by the SCSI mid-layer
  5019. *
  5020. * Return value:
  5021. * none
  5022. **/
  5023. static void ipr_scsi_done(struct ipr_cmnd *ipr_cmd)
  5024. {
  5025. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5026. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5027. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5028. scsi_set_resid(scsi_cmd, be32_to_cpu(ipr_cmd->s.ioasa.hdr.residual_data_len));
  5029. if (likely(IPR_IOASC_SENSE_KEY(ioasc) == 0)) {
  5030. scsi_dma_unmap(ipr_cmd->scsi_cmd);
  5031. list_add_tail(&ipr_cmd->queue, &ioa_cfg->free_q);
  5032. scsi_cmd->scsi_done(scsi_cmd);
  5033. } else
  5034. ipr_erp_start(ioa_cfg, ipr_cmd);
  5035. }
  5036. /**
  5037. * ipr_queuecommand - Queue a mid-layer request
  5038. * @scsi_cmd: scsi command struct
  5039. * @done: done function
  5040. *
  5041. * This function queues a request generated by the mid-layer.
  5042. *
  5043. * Return value:
  5044. * 0 on success
  5045. * SCSI_MLQUEUE_DEVICE_BUSY if device is busy
  5046. * SCSI_MLQUEUE_HOST_BUSY if host is busy
  5047. **/
  5048. static int ipr_queuecommand_lck(struct scsi_cmnd *scsi_cmd,
  5049. void (*done) (struct scsi_cmnd *))
  5050. {
  5051. struct ipr_ioa_cfg *ioa_cfg;
  5052. struct ipr_resource_entry *res;
  5053. struct ipr_ioarcb *ioarcb;
  5054. struct ipr_cmnd *ipr_cmd;
  5055. int rc = 0;
  5056. scsi_cmd->scsi_done = done;
  5057. ioa_cfg = (struct ipr_ioa_cfg *)scsi_cmd->device->host->hostdata;
  5058. res = scsi_cmd->device->hostdata;
  5059. scsi_cmd->result = (DID_OK << 16);
  5060. /*
  5061. * We are currently blocking all devices due to a host reset
  5062. * We have told the host to stop giving us new requests, but
  5063. * ERP ops don't count. FIXME
  5064. */
  5065. if (unlikely(!ioa_cfg->allow_cmds && !ioa_cfg->ioa_is_dead))
  5066. return SCSI_MLQUEUE_HOST_BUSY;
  5067. /*
  5068. * FIXME - Create scsi_set_host_offline interface
  5069. * and the ioa_is_dead check can be removed
  5070. */
  5071. if (unlikely(ioa_cfg->ioa_is_dead || !res)) {
  5072. memset(scsi_cmd->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
  5073. scsi_cmd->result = (DID_NO_CONNECT << 16);
  5074. scsi_cmd->scsi_done(scsi_cmd);
  5075. return 0;
  5076. }
  5077. if (ipr_is_gata(res) && res->sata_port)
  5078. return ata_sas_queuecmd(scsi_cmd, res->sata_port->ap);
  5079. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  5080. ioarcb = &ipr_cmd->ioarcb;
  5081. list_add_tail(&ipr_cmd->queue, &ioa_cfg->pending_q);
  5082. memcpy(ioarcb->cmd_pkt.cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len);
  5083. ipr_cmd->scsi_cmd = scsi_cmd;
  5084. ioarcb->res_handle = res->res_handle;
  5085. ipr_cmd->done = ipr_scsi_done;
  5086. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, IPR_GET_RES_PHYS_LOC(res));
  5087. if (ipr_is_gscsi(res) || ipr_is_vset_device(res)) {
  5088. if (scsi_cmd->underflow == 0)
  5089. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_ULEN_CHK;
  5090. if (res->needs_sync_complete) {
  5091. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_SYNC_COMPLETE;
  5092. res->needs_sync_complete = 0;
  5093. }
  5094. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_LINK_DESC;
  5095. if (ipr_is_gscsi(res))
  5096. ioarcb->cmd_pkt.flags_lo |= IPR_FLAGS_LO_DELAY_AFTER_RST;
  5097. ioarcb->cmd_pkt.flags_lo |= IPR_FLAGS_LO_ALIGNED_BFR;
  5098. ioarcb->cmd_pkt.flags_lo |= ipr_get_task_attributes(scsi_cmd);
  5099. }
  5100. if (scsi_cmd->cmnd[0] >= 0xC0 &&
  5101. (!ipr_is_gscsi(res) || scsi_cmd->cmnd[0] == IPR_QUERY_RSRC_STATE))
  5102. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  5103. if (likely(rc == 0)) {
  5104. if (ioa_cfg->sis64)
  5105. rc = ipr_build_ioadl64(ioa_cfg, ipr_cmd);
  5106. else
  5107. rc = ipr_build_ioadl(ioa_cfg, ipr_cmd);
  5108. }
  5109. if (likely(rc == 0)) {
  5110. mb();
  5111. ipr_send_command(ipr_cmd);
  5112. } else {
  5113. list_move_tail(&ipr_cmd->queue, &ioa_cfg->free_q);
  5114. return SCSI_MLQUEUE_HOST_BUSY;
  5115. }
  5116. return 0;
  5117. }
  5118. static DEF_SCSI_QCMD(ipr_queuecommand)
  5119. /**
  5120. * ipr_ioctl - IOCTL handler
  5121. * @sdev: scsi device struct
  5122. * @cmd: IOCTL cmd
  5123. * @arg: IOCTL arg
  5124. *
  5125. * Return value:
  5126. * 0 on success / other on failure
  5127. **/
  5128. static int ipr_ioctl(struct scsi_device *sdev, int cmd, void __user *arg)
  5129. {
  5130. struct ipr_resource_entry *res;
  5131. res = (struct ipr_resource_entry *)sdev->hostdata;
  5132. if (res && ipr_is_gata(res)) {
  5133. if (cmd == HDIO_GET_IDENTITY)
  5134. return -ENOTTY;
  5135. return ata_sas_scsi_ioctl(res->sata_port->ap, sdev, cmd, arg);
  5136. }
  5137. return -EINVAL;
  5138. }
  5139. /**
  5140. * ipr_info - Get information about the card/driver
  5141. * @scsi_host: scsi host struct
  5142. *
  5143. * Return value:
  5144. * pointer to buffer with description string
  5145. **/
  5146. static const char * ipr_ioa_info(struct Scsi_Host *host)
  5147. {
  5148. static char buffer[512];
  5149. struct ipr_ioa_cfg *ioa_cfg;
  5150. unsigned long lock_flags = 0;
  5151. ioa_cfg = (struct ipr_ioa_cfg *) host->hostdata;
  5152. spin_lock_irqsave(host->host_lock, lock_flags);
  5153. sprintf(buffer, "IBM %X Storage Adapter", ioa_cfg->type);
  5154. spin_unlock_irqrestore(host->host_lock, lock_flags);
  5155. return buffer;
  5156. }
  5157. static struct scsi_host_template driver_template = {
  5158. .module = THIS_MODULE,
  5159. .name = "IPR",
  5160. .info = ipr_ioa_info,
  5161. .ioctl = ipr_ioctl,
  5162. .queuecommand = ipr_queuecommand,
  5163. .eh_abort_handler = ipr_eh_abort,
  5164. .eh_device_reset_handler = ipr_eh_dev_reset,
  5165. .eh_host_reset_handler = ipr_eh_host_reset,
  5166. .slave_alloc = ipr_slave_alloc,
  5167. .slave_configure = ipr_slave_configure,
  5168. .slave_destroy = ipr_slave_destroy,
  5169. .target_alloc = ipr_target_alloc,
  5170. .target_destroy = ipr_target_destroy,
  5171. .change_queue_depth = ipr_change_queue_depth,
  5172. .change_queue_type = ipr_change_queue_type,
  5173. .bios_param = ipr_biosparam,
  5174. .can_queue = IPR_MAX_COMMANDS,
  5175. .this_id = -1,
  5176. .sg_tablesize = IPR_MAX_SGLIST,
  5177. .max_sectors = IPR_IOA_MAX_SECTORS,
  5178. .cmd_per_lun = IPR_MAX_CMD_PER_LUN,
  5179. .use_clustering = ENABLE_CLUSTERING,
  5180. .shost_attrs = ipr_ioa_attrs,
  5181. .sdev_attrs = ipr_dev_attrs,
  5182. .proc_name = IPR_NAME
  5183. };
  5184. /**
  5185. * ipr_ata_phy_reset - libata phy_reset handler
  5186. * @ap: ata port to reset
  5187. *
  5188. **/
  5189. static void ipr_ata_phy_reset(struct ata_port *ap)
  5190. {
  5191. unsigned long flags;
  5192. struct ipr_sata_port *sata_port = ap->private_data;
  5193. struct ipr_resource_entry *res = sata_port->res;
  5194. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  5195. int rc;
  5196. ENTER;
  5197. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  5198. while(ioa_cfg->in_reset_reload) {
  5199. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  5200. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  5201. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  5202. }
  5203. if (!ioa_cfg->allow_cmds)
  5204. goto out_unlock;
  5205. rc = ipr_device_reset(ioa_cfg, res);
  5206. if (rc) {
  5207. ap->link.device[0].class = ATA_DEV_NONE;
  5208. goto out_unlock;
  5209. }
  5210. ap->link.device[0].class = res->ata_class;
  5211. if (ap->link.device[0].class == ATA_DEV_UNKNOWN)
  5212. ap->link.device[0].class = ATA_DEV_NONE;
  5213. out_unlock:
  5214. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  5215. LEAVE;
  5216. }
  5217. /**
  5218. * ipr_ata_post_internal - Cleanup after an internal command
  5219. * @qc: ATA queued command
  5220. *
  5221. * Return value:
  5222. * none
  5223. **/
  5224. static void ipr_ata_post_internal(struct ata_queued_cmd *qc)
  5225. {
  5226. struct ipr_sata_port *sata_port = qc->ap->private_data;
  5227. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  5228. struct ipr_cmnd *ipr_cmd;
  5229. unsigned long flags;
  5230. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  5231. while(ioa_cfg->in_reset_reload) {
  5232. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  5233. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  5234. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  5235. }
  5236. list_for_each_entry(ipr_cmd, &ioa_cfg->pending_q, queue) {
  5237. if (ipr_cmd->qc == qc) {
  5238. ipr_device_reset(ioa_cfg, sata_port->res);
  5239. break;
  5240. }
  5241. }
  5242. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  5243. }
  5244. /**
  5245. * ipr_copy_sata_tf - Copy a SATA taskfile to an IOA data structure
  5246. * @regs: destination
  5247. * @tf: source ATA taskfile
  5248. *
  5249. * Return value:
  5250. * none
  5251. **/
  5252. static void ipr_copy_sata_tf(struct ipr_ioarcb_ata_regs *regs,
  5253. struct ata_taskfile *tf)
  5254. {
  5255. regs->feature = tf->feature;
  5256. regs->nsect = tf->nsect;
  5257. regs->lbal = tf->lbal;
  5258. regs->lbam = tf->lbam;
  5259. regs->lbah = tf->lbah;
  5260. regs->device = tf->device;
  5261. regs->command = tf->command;
  5262. regs->hob_feature = tf->hob_feature;
  5263. regs->hob_nsect = tf->hob_nsect;
  5264. regs->hob_lbal = tf->hob_lbal;
  5265. regs->hob_lbam = tf->hob_lbam;
  5266. regs->hob_lbah = tf->hob_lbah;
  5267. regs->ctl = tf->ctl;
  5268. }
  5269. /**
  5270. * ipr_sata_done - done function for SATA commands
  5271. * @ipr_cmd: ipr command struct
  5272. *
  5273. * This function is invoked by the interrupt handler for
  5274. * ops generated by the SCSI mid-layer to SATA devices
  5275. *
  5276. * Return value:
  5277. * none
  5278. **/
  5279. static void ipr_sata_done(struct ipr_cmnd *ipr_cmd)
  5280. {
  5281. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5282. struct ata_queued_cmd *qc = ipr_cmd->qc;
  5283. struct ipr_sata_port *sata_port = qc->ap->private_data;
  5284. struct ipr_resource_entry *res = sata_port->res;
  5285. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5286. if (ipr_cmd->ioa_cfg->sis64)
  5287. memcpy(&sata_port->ioasa, &ipr_cmd->s.ioasa64.u.gata,
  5288. sizeof(struct ipr_ioasa_gata));
  5289. else
  5290. memcpy(&sata_port->ioasa, &ipr_cmd->s.ioasa.u.gata,
  5291. sizeof(struct ipr_ioasa_gata));
  5292. ipr_dump_ioasa(ioa_cfg, ipr_cmd, res);
  5293. if (be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc_specific) & IPR_ATA_DEVICE_WAS_RESET)
  5294. scsi_report_device_reset(ioa_cfg->host, res->bus, res->target);
  5295. if (IPR_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
  5296. qc->err_mask |= __ac_err_mask(sata_port->ioasa.status);
  5297. else
  5298. qc->err_mask |= ac_err_mask(sata_port->ioasa.status);
  5299. list_add_tail(&ipr_cmd->queue, &ioa_cfg->free_q);
  5300. ata_qc_complete(qc);
  5301. }
  5302. /**
  5303. * ipr_build_ata_ioadl64 - Build an ATA scatter/gather list
  5304. * @ipr_cmd: ipr command struct
  5305. * @qc: ATA queued command
  5306. *
  5307. **/
  5308. static void ipr_build_ata_ioadl64(struct ipr_cmnd *ipr_cmd,
  5309. struct ata_queued_cmd *qc)
  5310. {
  5311. u32 ioadl_flags = 0;
  5312. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5313. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ioadl64;
  5314. struct ipr_ioadl64_desc *last_ioadl64 = NULL;
  5315. int len = qc->nbytes;
  5316. struct scatterlist *sg;
  5317. unsigned int si;
  5318. dma_addr_t dma_addr = ipr_cmd->dma_addr;
  5319. if (len == 0)
  5320. return;
  5321. if (qc->dma_dir == DMA_TO_DEVICE) {
  5322. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  5323. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  5324. } else if (qc->dma_dir == DMA_FROM_DEVICE)
  5325. ioadl_flags = IPR_IOADL_FLAGS_READ;
  5326. ioarcb->data_transfer_length = cpu_to_be32(len);
  5327. ioarcb->ioadl_len =
  5328. cpu_to_be32(sizeof(struct ipr_ioadl64_desc) * ipr_cmd->dma_use_sg);
  5329. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  5330. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ata_ioadl));
  5331. for_each_sg(qc->sg, sg, qc->n_elem, si) {
  5332. ioadl64->flags = cpu_to_be32(ioadl_flags);
  5333. ioadl64->data_len = cpu_to_be32(sg_dma_len(sg));
  5334. ioadl64->address = cpu_to_be64(sg_dma_address(sg));
  5335. last_ioadl64 = ioadl64;
  5336. ioadl64++;
  5337. }
  5338. if (likely(last_ioadl64))
  5339. last_ioadl64->flags |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  5340. }
  5341. /**
  5342. * ipr_build_ata_ioadl - Build an ATA scatter/gather list
  5343. * @ipr_cmd: ipr command struct
  5344. * @qc: ATA queued command
  5345. *
  5346. **/
  5347. static void ipr_build_ata_ioadl(struct ipr_cmnd *ipr_cmd,
  5348. struct ata_queued_cmd *qc)
  5349. {
  5350. u32 ioadl_flags = 0;
  5351. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5352. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  5353. struct ipr_ioadl_desc *last_ioadl = NULL;
  5354. int len = qc->nbytes;
  5355. struct scatterlist *sg;
  5356. unsigned int si;
  5357. if (len == 0)
  5358. return;
  5359. if (qc->dma_dir == DMA_TO_DEVICE) {
  5360. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  5361. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  5362. ioarcb->data_transfer_length = cpu_to_be32(len);
  5363. ioarcb->ioadl_len =
  5364. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  5365. } else if (qc->dma_dir == DMA_FROM_DEVICE) {
  5366. ioadl_flags = IPR_IOADL_FLAGS_READ;
  5367. ioarcb->read_data_transfer_length = cpu_to_be32(len);
  5368. ioarcb->read_ioadl_len =
  5369. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  5370. }
  5371. for_each_sg(qc->sg, sg, qc->n_elem, si) {
  5372. ioadl->flags_and_data_len = cpu_to_be32(ioadl_flags | sg_dma_len(sg));
  5373. ioadl->address = cpu_to_be32(sg_dma_address(sg));
  5374. last_ioadl = ioadl;
  5375. ioadl++;
  5376. }
  5377. if (likely(last_ioadl))
  5378. last_ioadl->flags_and_data_len |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  5379. }
  5380. /**
  5381. * ipr_qc_issue - Issue a SATA qc to a device
  5382. * @qc: queued command
  5383. *
  5384. * Return value:
  5385. * 0 if success
  5386. **/
  5387. static unsigned int ipr_qc_issue(struct ata_queued_cmd *qc)
  5388. {
  5389. struct ata_port *ap = qc->ap;
  5390. struct ipr_sata_port *sata_port = ap->private_data;
  5391. struct ipr_resource_entry *res = sata_port->res;
  5392. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  5393. struct ipr_cmnd *ipr_cmd;
  5394. struct ipr_ioarcb *ioarcb;
  5395. struct ipr_ioarcb_ata_regs *regs;
  5396. if (unlikely(!ioa_cfg->allow_cmds || ioa_cfg->ioa_is_dead))
  5397. return AC_ERR_SYSTEM;
  5398. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  5399. ioarcb = &ipr_cmd->ioarcb;
  5400. if (ioa_cfg->sis64) {
  5401. regs = &ipr_cmd->i.ata_ioadl.regs;
  5402. ioarcb->add_cmd_parms_offset = cpu_to_be16(sizeof(*ioarcb));
  5403. } else
  5404. regs = &ioarcb->u.add_data.u.regs;
  5405. memset(regs, 0, sizeof(*regs));
  5406. ioarcb->add_cmd_parms_len = cpu_to_be16(sizeof(*regs));
  5407. list_add_tail(&ipr_cmd->queue, &ioa_cfg->pending_q);
  5408. ipr_cmd->qc = qc;
  5409. ipr_cmd->done = ipr_sata_done;
  5410. ipr_cmd->ioarcb.res_handle = res->res_handle;
  5411. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_ATA_PASSTHRU;
  5412. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_LINK_DESC;
  5413. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_ULEN_CHK;
  5414. ipr_cmd->dma_use_sg = qc->n_elem;
  5415. if (ioa_cfg->sis64)
  5416. ipr_build_ata_ioadl64(ipr_cmd, qc);
  5417. else
  5418. ipr_build_ata_ioadl(ipr_cmd, qc);
  5419. regs->flags |= IPR_ATA_FLAG_STATUS_ON_GOOD_COMPLETION;
  5420. ipr_copy_sata_tf(regs, &qc->tf);
  5421. memcpy(ioarcb->cmd_pkt.cdb, qc->cdb, IPR_MAX_CDB_LEN);
  5422. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, IPR_GET_RES_PHYS_LOC(res));
  5423. switch (qc->tf.protocol) {
  5424. case ATA_PROT_NODATA:
  5425. case ATA_PROT_PIO:
  5426. break;
  5427. case ATA_PROT_DMA:
  5428. regs->flags |= IPR_ATA_FLAG_XFER_TYPE_DMA;
  5429. break;
  5430. case ATAPI_PROT_PIO:
  5431. case ATAPI_PROT_NODATA:
  5432. regs->flags |= IPR_ATA_FLAG_PACKET_CMD;
  5433. break;
  5434. case ATAPI_PROT_DMA:
  5435. regs->flags |= IPR_ATA_FLAG_PACKET_CMD;
  5436. regs->flags |= IPR_ATA_FLAG_XFER_TYPE_DMA;
  5437. break;
  5438. default:
  5439. WARN_ON(1);
  5440. return AC_ERR_INVALID;
  5441. }
  5442. mb();
  5443. ipr_send_command(ipr_cmd);
  5444. return 0;
  5445. }
  5446. /**
  5447. * ipr_qc_fill_rtf - Read result TF
  5448. * @qc: ATA queued command
  5449. *
  5450. * Return value:
  5451. * true
  5452. **/
  5453. static bool ipr_qc_fill_rtf(struct ata_queued_cmd *qc)
  5454. {
  5455. struct ipr_sata_port *sata_port = qc->ap->private_data;
  5456. struct ipr_ioasa_gata *g = &sata_port->ioasa;
  5457. struct ata_taskfile *tf = &qc->result_tf;
  5458. tf->feature = g->error;
  5459. tf->nsect = g->nsect;
  5460. tf->lbal = g->lbal;
  5461. tf->lbam = g->lbam;
  5462. tf->lbah = g->lbah;
  5463. tf->device = g->device;
  5464. tf->command = g->status;
  5465. tf->hob_nsect = g->hob_nsect;
  5466. tf->hob_lbal = g->hob_lbal;
  5467. tf->hob_lbam = g->hob_lbam;
  5468. tf->hob_lbah = g->hob_lbah;
  5469. tf->ctl = g->alt_status;
  5470. return true;
  5471. }
  5472. static struct ata_port_operations ipr_sata_ops = {
  5473. .phy_reset = ipr_ata_phy_reset,
  5474. .hardreset = ipr_sata_reset,
  5475. .post_internal_cmd = ipr_ata_post_internal,
  5476. .qc_prep = ata_noop_qc_prep,
  5477. .qc_issue = ipr_qc_issue,
  5478. .qc_fill_rtf = ipr_qc_fill_rtf,
  5479. .port_start = ata_sas_port_start,
  5480. .port_stop = ata_sas_port_stop
  5481. };
  5482. static struct ata_port_info sata_port_info = {
  5483. .flags = ATA_FLAG_SATA | ATA_FLAG_PIO_DMA,
  5484. .pio_mask = ATA_PIO4_ONLY,
  5485. .mwdma_mask = ATA_MWDMA2,
  5486. .udma_mask = ATA_UDMA6,
  5487. .port_ops = &ipr_sata_ops
  5488. };
  5489. #ifdef CONFIG_PPC_PSERIES
  5490. static const u16 ipr_blocked_processors[] = {
  5491. PV_NORTHSTAR,
  5492. PV_PULSAR,
  5493. PV_POWER4,
  5494. PV_ICESTAR,
  5495. PV_SSTAR,
  5496. PV_POWER4p,
  5497. PV_630,
  5498. PV_630p
  5499. };
  5500. /**
  5501. * ipr_invalid_adapter - Determine if this adapter is supported on this hardware
  5502. * @ioa_cfg: ioa cfg struct
  5503. *
  5504. * Adapters that use Gemstone revision < 3.1 do not work reliably on
  5505. * certain pSeries hardware. This function determines if the given
  5506. * adapter is in one of these confgurations or not.
  5507. *
  5508. * Return value:
  5509. * 1 if adapter is not supported / 0 if adapter is supported
  5510. **/
  5511. static int ipr_invalid_adapter(struct ipr_ioa_cfg *ioa_cfg)
  5512. {
  5513. int i;
  5514. if ((ioa_cfg->type == 0x5702) && (ioa_cfg->pdev->revision < 4)) {
  5515. for (i = 0; i < ARRAY_SIZE(ipr_blocked_processors); i++){
  5516. if (__is_processor(ipr_blocked_processors[i]))
  5517. return 1;
  5518. }
  5519. }
  5520. return 0;
  5521. }
  5522. #else
  5523. #define ipr_invalid_adapter(ioa_cfg) 0
  5524. #endif
  5525. /**
  5526. * ipr_ioa_bringdown_done - IOA bring down completion.
  5527. * @ipr_cmd: ipr command struct
  5528. *
  5529. * This function processes the completion of an adapter bring down.
  5530. * It wakes any reset sleepers.
  5531. *
  5532. * Return value:
  5533. * IPR_RC_JOB_RETURN
  5534. **/
  5535. static int ipr_ioa_bringdown_done(struct ipr_cmnd *ipr_cmd)
  5536. {
  5537. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5538. ENTER;
  5539. ioa_cfg->in_reset_reload = 0;
  5540. ioa_cfg->reset_retries = 0;
  5541. list_add_tail(&ipr_cmd->queue, &ioa_cfg->free_q);
  5542. wake_up_all(&ioa_cfg->reset_wait_q);
  5543. spin_unlock_irq(ioa_cfg->host->host_lock);
  5544. scsi_unblock_requests(ioa_cfg->host);
  5545. spin_lock_irq(ioa_cfg->host->host_lock);
  5546. LEAVE;
  5547. return IPR_RC_JOB_RETURN;
  5548. }
  5549. /**
  5550. * ipr_ioa_reset_done - IOA reset completion.
  5551. * @ipr_cmd: ipr command struct
  5552. *
  5553. * This function processes the completion of an adapter reset.
  5554. * It schedules any necessary mid-layer add/removes and
  5555. * wakes any reset sleepers.
  5556. *
  5557. * Return value:
  5558. * IPR_RC_JOB_RETURN
  5559. **/
  5560. static int ipr_ioa_reset_done(struct ipr_cmnd *ipr_cmd)
  5561. {
  5562. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5563. struct ipr_resource_entry *res;
  5564. struct ipr_hostrcb *hostrcb, *temp;
  5565. int i = 0;
  5566. ENTER;
  5567. ioa_cfg->in_reset_reload = 0;
  5568. ioa_cfg->allow_cmds = 1;
  5569. ioa_cfg->reset_cmd = NULL;
  5570. ioa_cfg->doorbell |= IPR_RUNTIME_RESET;
  5571. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  5572. if (ioa_cfg->allow_ml_add_del && (res->add_to_ml || res->del_from_ml)) {
  5573. ipr_trace;
  5574. break;
  5575. }
  5576. }
  5577. schedule_work(&ioa_cfg->work_q);
  5578. list_for_each_entry_safe(hostrcb, temp, &ioa_cfg->hostrcb_free_q, queue) {
  5579. list_del(&hostrcb->queue);
  5580. if (i++ < IPR_NUM_LOG_HCAMS)
  5581. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_LOG_DATA, hostrcb);
  5582. else
  5583. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE, hostrcb);
  5584. }
  5585. scsi_report_bus_reset(ioa_cfg->host, IPR_VSET_BUS);
  5586. dev_info(&ioa_cfg->pdev->dev, "IOA initialized.\n");
  5587. ioa_cfg->reset_retries = 0;
  5588. list_add_tail(&ipr_cmd->queue, &ioa_cfg->free_q);
  5589. wake_up_all(&ioa_cfg->reset_wait_q);
  5590. spin_unlock(ioa_cfg->host->host_lock);
  5591. scsi_unblock_requests(ioa_cfg->host);
  5592. spin_lock(ioa_cfg->host->host_lock);
  5593. if (!ioa_cfg->allow_cmds)
  5594. scsi_block_requests(ioa_cfg->host);
  5595. LEAVE;
  5596. return IPR_RC_JOB_RETURN;
  5597. }
  5598. /**
  5599. * ipr_set_sup_dev_dflt - Initialize a Set Supported Device buffer
  5600. * @supported_dev: supported device struct
  5601. * @vpids: vendor product id struct
  5602. *
  5603. * Return value:
  5604. * none
  5605. **/
  5606. static void ipr_set_sup_dev_dflt(struct ipr_supported_device *supported_dev,
  5607. struct ipr_std_inq_vpids *vpids)
  5608. {
  5609. memset(supported_dev, 0, sizeof(struct ipr_supported_device));
  5610. memcpy(&supported_dev->vpids, vpids, sizeof(struct ipr_std_inq_vpids));
  5611. supported_dev->num_records = 1;
  5612. supported_dev->data_length =
  5613. cpu_to_be16(sizeof(struct ipr_supported_device));
  5614. supported_dev->reserved = 0;
  5615. }
  5616. /**
  5617. * ipr_set_supported_devs - Send Set Supported Devices for a device
  5618. * @ipr_cmd: ipr command struct
  5619. *
  5620. * This function sends a Set Supported Devices to the adapter
  5621. *
  5622. * Return value:
  5623. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  5624. **/
  5625. static int ipr_set_supported_devs(struct ipr_cmnd *ipr_cmd)
  5626. {
  5627. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5628. struct ipr_supported_device *supp_dev = &ioa_cfg->vpd_cbs->supp_dev;
  5629. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5630. struct ipr_resource_entry *res = ipr_cmd->u.res;
  5631. ipr_cmd->job_step = ipr_ioa_reset_done;
  5632. list_for_each_entry_continue(res, &ioa_cfg->used_res_q, queue) {
  5633. if (!ipr_is_scsi_disk(res))
  5634. continue;
  5635. ipr_cmd->u.res = res;
  5636. ipr_set_sup_dev_dflt(supp_dev, &res->std_inq_data.vpids);
  5637. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  5638. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  5639. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  5640. ioarcb->cmd_pkt.cdb[0] = IPR_SET_SUPPORTED_DEVICES;
  5641. ioarcb->cmd_pkt.cdb[1] = IPR_SET_ALL_SUPPORTED_DEVICES;
  5642. ioarcb->cmd_pkt.cdb[7] = (sizeof(struct ipr_supported_device) >> 8) & 0xff;
  5643. ioarcb->cmd_pkt.cdb[8] = sizeof(struct ipr_supported_device) & 0xff;
  5644. ipr_init_ioadl(ipr_cmd,
  5645. ioa_cfg->vpd_cbs_dma +
  5646. offsetof(struct ipr_misc_cbs, supp_dev),
  5647. sizeof(struct ipr_supported_device),
  5648. IPR_IOADL_FLAGS_WRITE_LAST);
  5649. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  5650. IPR_SET_SUP_DEVICE_TIMEOUT);
  5651. if (!ioa_cfg->sis64)
  5652. ipr_cmd->job_step = ipr_set_supported_devs;
  5653. return IPR_RC_JOB_RETURN;
  5654. }
  5655. return IPR_RC_JOB_CONTINUE;
  5656. }
  5657. /**
  5658. * ipr_get_mode_page - Locate specified mode page
  5659. * @mode_pages: mode page buffer
  5660. * @page_code: page code to find
  5661. * @len: minimum required length for mode page
  5662. *
  5663. * Return value:
  5664. * pointer to mode page / NULL on failure
  5665. **/
  5666. static void *ipr_get_mode_page(struct ipr_mode_pages *mode_pages,
  5667. u32 page_code, u32 len)
  5668. {
  5669. struct ipr_mode_page_hdr *mode_hdr;
  5670. u32 page_length;
  5671. u32 length;
  5672. if (!mode_pages || (mode_pages->hdr.length == 0))
  5673. return NULL;
  5674. length = (mode_pages->hdr.length + 1) - 4 - mode_pages->hdr.block_desc_len;
  5675. mode_hdr = (struct ipr_mode_page_hdr *)
  5676. (mode_pages->data + mode_pages->hdr.block_desc_len);
  5677. while (length) {
  5678. if (IPR_GET_MODE_PAGE_CODE(mode_hdr) == page_code) {
  5679. if (mode_hdr->page_length >= (len - sizeof(struct ipr_mode_page_hdr)))
  5680. return mode_hdr;
  5681. break;
  5682. } else {
  5683. page_length = (sizeof(struct ipr_mode_page_hdr) +
  5684. mode_hdr->page_length);
  5685. length -= page_length;
  5686. mode_hdr = (struct ipr_mode_page_hdr *)
  5687. ((unsigned long)mode_hdr + page_length);
  5688. }
  5689. }
  5690. return NULL;
  5691. }
  5692. /**
  5693. * ipr_check_term_power - Check for term power errors
  5694. * @ioa_cfg: ioa config struct
  5695. * @mode_pages: IOAFP mode pages buffer
  5696. *
  5697. * Check the IOAFP's mode page 28 for term power errors
  5698. *
  5699. * Return value:
  5700. * nothing
  5701. **/
  5702. static void ipr_check_term_power(struct ipr_ioa_cfg *ioa_cfg,
  5703. struct ipr_mode_pages *mode_pages)
  5704. {
  5705. int i;
  5706. int entry_length;
  5707. struct ipr_dev_bus_entry *bus;
  5708. struct ipr_mode_page28 *mode_page;
  5709. mode_page = ipr_get_mode_page(mode_pages, 0x28,
  5710. sizeof(struct ipr_mode_page28));
  5711. entry_length = mode_page->entry_length;
  5712. bus = mode_page->bus;
  5713. for (i = 0; i < mode_page->num_entries; i++) {
  5714. if (bus->flags & IPR_SCSI_ATTR_NO_TERM_PWR) {
  5715. dev_err(&ioa_cfg->pdev->dev,
  5716. "Term power is absent on scsi bus %d\n",
  5717. bus->res_addr.bus);
  5718. }
  5719. bus = (struct ipr_dev_bus_entry *)((char *)bus + entry_length);
  5720. }
  5721. }
  5722. /**
  5723. * ipr_scsi_bus_speed_limit - Limit the SCSI speed based on SES table
  5724. * @ioa_cfg: ioa config struct
  5725. *
  5726. * Looks through the config table checking for SES devices. If
  5727. * the SES device is in the SES table indicating a maximum SCSI
  5728. * bus speed, the speed is limited for the bus.
  5729. *
  5730. * Return value:
  5731. * none
  5732. **/
  5733. static void ipr_scsi_bus_speed_limit(struct ipr_ioa_cfg *ioa_cfg)
  5734. {
  5735. u32 max_xfer_rate;
  5736. int i;
  5737. for (i = 0; i < IPR_MAX_NUM_BUSES; i++) {
  5738. max_xfer_rate = ipr_get_max_scsi_speed(ioa_cfg, i,
  5739. ioa_cfg->bus_attr[i].bus_width);
  5740. if (max_xfer_rate < ioa_cfg->bus_attr[i].max_xfer_rate)
  5741. ioa_cfg->bus_attr[i].max_xfer_rate = max_xfer_rate;
  5742. }
  5743. }
  5744. /**
  5745. * ipr_modify_ioafp_mode_page_28 - Modify IOAFP Mode Page 28
  5746. * @ioa_cfg: ioa config struct
  5747. * @mode_pages: mode page 28 buffer
  5748. *
  5749. * Updates mode page 28 based on driver configuration
  5750. *
  5751. * Return value:
  5752. * none
  5753. **/
  5754. static void ipr_modify_ioafp_mode_page_28(struct ipr_ioa_cfg *ioa_cfg,
  5755. struct ipr_mode_pages *mode_pages)
  5756. {
  5757. int i, entry_length;
  5758. struct ipr_dev_bus_entry *bus;
  5759. struct ipr_bus_attributes *bus_attr;
  5760. struct ipr_mode_page28 *mode_page;
  5761. mode_page = ipr_get_mode_page(mode_pages, 0x28,
  5762. sizeof(struct ipr_mode_page28));
  5763. entry_length = mode_page->entry_length;
  5764. /* Loop for each device bus entry */
  5765. for (i = 0, bus = mode_page->bus;
  5766. i < mode_page->num_entries;
  5767. i++, bus = (struct ipr_dev_bus_entry *)((u8 *)bus + entry_length)) {
  5768. if (bus->res_addr.bus > IPR_MAX_NUM_BUSES) {
  5769. dev_err(&ioa_cfg->pdev->dev,
  5770. "Invalid resource address reported: 0x%08X\n",
  5771. IPR_GET_PHYS_LOC(bus->res_addr));
  5772. continue;
  5773. }
  5774. bus_attr = &ioa_cfg->bus_attr[i];
  5775. bus->extended_reset_delay = IPR_EXTENDED_RESET_DELAY;
  5776. bus->bus_width = bus_attr->bus_width;
  5777. bus->max_xfer_rate = cpu_to_be32(bus_attr->max_xfer_rate);
  5778. bus->flags &= ~IPR_SCSI_ATTR_QAS_MASK;
  5779. if (bus_attr->qas_enabled)
  5780. bus->flags |= IPR_SCSI_ATTR_ENABLE_QAS;
  5781. else
  5782. bus->flags |= IPR_SCSI_ATTR_DISABLE_QAS;
  5783. }
  5784. }
  5785. /**
  5786. * ipr_build_mode_select - Build a mode select command
  5787. * @ipr_cmd: ipr command struct
  5788. * @res_handle: resource handle to send command to
  5789. * @parm: Byte 2 of Mode Sense command
  5790. * @dma_addr: DMA buffer address
  5791. * @xfer_len: data transfer length
  5792. *
  5793. * Return value:
  5794. * none
  5795. **/
  5796. static void ipr_build_mode_select(struct ipr_cmnd *ipr_cmd,
  5797. __be32 res_handle, u8 parm,
  5798. dma_addr_t dma_addr, u8 xfer_len)
  5799. {
  5800. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5801. ioarcb->res_handle = res_handle;
  5802. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  5803. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  5804. ioarcb->cmd_pkt.cdb[0] = MODE_SELECT;
  5805. ioarcb->cmd_pkt.cdb[1] = parm;
  5806. ioarcb->cmd_pkt.cdb[4] = xfer_len;
  5807. ipr_init_ioadl(ipr_cmd, dma_addr, xfer_len, IPR_IOADL_FLAGS_WRITE_LAST);
  5808. }
  5809. /**
  5810. * ipr_ioafp_mode_select_page28 - Issue Mode Select Page 28 to IOA
  5811. * @ipr_cmd: ipr command struct
  5812. *
  5813. * This function sets up the SCSI bus attributes and sends
  5814. * a Mode Select for Page 28 to activate them.
  5815. *
  5816. * Return value:
  5817. * IPR_RC_JOB_RETURN
  5818. **/
  5819. static int ipr_ioafp_mode_select_page28(struct ipr_cmnd *ipr_cmd)
  5820. {
  5821. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5822. struct ipr_mode_pages *mode_pages = &ioa_cfg->vpd_cbs->mode_pages;
  5823. int length;
  5824. ENTER;
  5825. ipr_scsi_bus_speed_limit(ioa_cfg);
  5826. ipr_check_term_power(ioa_cfg, mode_pages);
  5827. ipr_modify_ioafp_mode_page_28(ioa_cfg, mode_pages);
  5828. length = mode_pages->hdr.length + 1;
  5829. mode_pages->hdr.length = 0;
  5830. ipr_build_mode_select(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE), 0x11,
  5831. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, mode_pages),
  5832. length);
  5833. ipr_cmd->job_step = ipr_set_supported_devs;
  5834. ipr_cmd->u.res = list_entry(ioa_cfg->used_res_q.next,
  5835. struct ipr_resource_entry, queue);
  5836. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  5837. LEAVE;
  5838. return IPR_RC_JOB_RETURN;
  5839. }
  5840. /**
  5841. * ipr_build_mode_sense - Builds a mode sense command
  5842. * @ipr_cmd: ipr command struct
  5843. * @res: resource entry struct
  5844. * @parm: Byte 2 of mode sense command
  5845. * @dma_addr: DMA address of mode sense buffer
  5846. * @xfer_len: Size of DMA buffer
  5847. *
  5848. * Return value:
  5849. * none
  5850. **/
  5851. static void ipr_build_mode_sense(struct ipr_cmnd *ipr_cmd,
  5852. __be32 res_handle,
  5853. u8 parm, dma_addr_t dma_addr, u8 xfer_len)
  5854. {
  5855. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5856. ioarcb->res_handle = res_handle;
  5857. ioarcb->cmd_pkt.cdb[0] = MODE_SENSE;
  5858. ioarcb->cmd_pkt.cdb[2] = parm;
  5859. ioarcb->cmd_pkt.cdb[4] = xfer_len;
  5860. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  5861. ipr_init_ioadl(ipr_cmd, dma_addr, xfer_len, IPR_IOADL_FLAGS_READ_LAST);
  5862. }
  5863. /**
  5864. * ipr_reset_cmd_failed - Handle failure of IOA reset command
  5865. * @ipr_cmd: ipr command struct
  5866. *
  5867. * This function handles the failure of an IOA bringup command.
  5868. *
  5869. * Return value:
  5870. * IPR_RC_JOB_RETURN
  5871. **/
  5872. static int ipr_reset_cmd_failed(struct ipr_cmnd *ipr_cmd)
  5873. {
  5874. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5875. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5876. dev_err(&ioa_cfg->pdev->dev,
  5877. "0x%02X failed with IOASC: 0x%08X\n",
  5878. ipr_cmd->ioarcb.cmd_pkt.cdb[0], ioasc);
  5879. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  5880. list_add_tail(&ipr_cmd->queue, &ioa_cfg->free_q);
  5881. return IPR_RC_JOB_RETURN;
  5882. }
  5883. /**
  5884. * ipr_reset_mode_sense_failed - Handle failure of IOAFP mode sense
  5885. * @ipr_cmd: ipr command struct
  5886. *
  5887. * This function handles the failure of a Mode Sense to the IOAFP.
  5888. * Some adapters do not handle all mode pages.
  5889. *
  5890. * Return value:
  5891. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  5892. **/
  5893. static int ipr_reset_mode_sense_failed(struct ipr_cmnd *ipr_cmd)
  5894. {
  5895. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5896. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5897. if (ioasc == IPR_IOASC_IR_INVALID_REQ_TYPE_OR_PKT) {
  5898. ipr_cmd->job_step = ipr_set_supported_devs;
  5899. ipr_cmd->u.res = list_entry(ioa_cfg->used_res_q.next,
  5900. struct ipr_resource_entry, queue);
  5901. return IPR_RC_JOB_CONTINUE;
  5902. }
  5903. return ipr_reset_cmd_failed(ipr_cmd);
  5904. }
  5905. /**
  5906. * ipr_ioafp_mode_sense_page28 - Issue Mode Sense Page 28 to IOA
  5907. * @ipr_cmd: ipr command struct
  5908. *
  5909. * This function send a Page 28 mode sense to the IOA to
  5910. * retrieve SCSI bus attributes.
  5911. *
  5912. * Return value:
  5913. * IPR_RC_JOB_RETURN
  5914. **/
  5915. static int ipr_ioafp_mode_sense_page28(struct ipr_cmnd *ipr_cmd)
  5916. {
  5917. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5918. ENTER;
  5919. ipr_build_mode_sense(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE),
  5920. 0x28, ioa_cfg->vpd_cbs_dma +
  5921. offsetof(struct ipr_misc_cbs, mode_pages),
  5922. sizeof(struct ipr_mode_pages));
  5923. ipr_cmd->job_step = ipr_ioafp_mode_select_page28;
  5924. ipr_cmd->job_step_failed = ipr_reset_mode_sense_failed;
  5925. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  5926. LEAVE;
  5927. return IPR_RC_JOB_RETURN;
  5928. }
  5929. /**
  5930. * ipr_ioafp_mode_select_page24 - Issue Mode Select to IOA
  5931. * @ipr_cmd: ipr command struct
  5932. *
  5933. * This function enables dual IOA RAID support if possible.
  5934. *
  5935. * Return value:
  5936. * IPR_RC_JOB_RETURN
  5937. **/
  5938. static int ipr_ioafp_mode_select_page24(struct ipr_cmnd *ipr_cmd)
  5939. {
  5940. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5941. struct ipr_mode_pages *mode_pages = &ioa_cfg->vpd_cbs->mode_pages;
  5942. struct ipr_mode_page24 *mode_page;
  5943. int length;
  5944. ENTER;
  5945. mode_page = ipr_get_mode_page(mode_pages, 0x24,
  5946. sizeof(struct ipr_mode_page24));
  5947. if (mode_page)
  5948. mode_page->flags |= IPR_ENABLE_DUAL_IOA_AF;
  5949. length = mode_pages->hdr.length + 1;
  5950. mode_pages->hdr.length = 0;
  5951. ipr_build_mode_select(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE), 0x11,
  5952. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, mode_pages),
  5953. length);
  5954. ipr_cmd->job_step = ipr_ioafp_mode_sense_page28;
  5955. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  5956. LEAVE;
  5957. return IPR_RC_JOB_RETURN;
  5958. }
  5959. /**
  5960. * ipr_reset_mode_sense_page24_failed - Handle failure of IOAFP mode sense
  5961. * @ipr_cmd: ipr command struct
  5962. *
  5963. * This function handles the failure of a Mode Sense to the IOAFP.
  5964. * Some adapters do not handle all mode pages.
  5965. *
  5966. * Return value:
  5967. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  5968. **/
  5969. static int ipr_reset_mode_sense_page24_failed(struct ipr_cmnd *ipr_cmd)
  5970. {
  5971. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5972. if (ioasc == IPR_IOASC_IR_INVALID_REQ_TYPE_OR_PKT) {
  5973. ipr_cmd->job_step = ipr_ioafp_mode_sense_page28;
  5974. return IPR_RC_JOB_CONTINUE;
  5975. }
  5976. return ipr_reset_cmd_failed(ipr_cmd);
  5977. }
  5978. /**
  5979. * ipr_ioafp_mode_sense_page24 - Issue Page 24 Mode Sense to IOA
  5980. * @ipr_cmd: ipr command struct
  5981. *
  5982. * This function send a mode sense to the IOA to retrieve
  5983. * the IOA Advanced Function Control mode page.
  5984. *
  5985. * Return value:
  5986. * IPR_RC_JOB_RETURN
  5987. **/
  5988. static int ipr_ioafp_mode_sense_page24(struct ipr_cmnd *ipr_cmd)
  5989. {
  5990. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5991. ENTER;
  5992. ipr_build_mode_sense(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE),
  5993. 0x24, ioa_cfg->vpd_cbs_dma +
  5994. offsetof(struct ipr_misc_cbs, mode_pages),
  5995. sizeof(struct ipr_mode_pages));
  5996. ipr_cmd->job_step = ipr_ioafp_mode_select_page24;
  5997. ipr_cmd->job_step_failed = ipr_reset_mode_sense_page24_failed;
  5998. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  5999. LEAVE;
  6000. return IPR_RC_JOB_RETURN;
  6001. }
  6002. /**
  6003. * ipr_init_res_table - Initialize the resource table
  6004. * @ipr_cmd: ipr command struct
  6005. *
  6006. * This function looks through the existing resource table, comparing
  6007. * it with the config table. This function will take care of old/new
  6008. * devices and schedule adding/removing them from the mid-layer
  6009. * as appropriate.
  6010. *
  6011. * Return value:
  6012. * IPR_RC_JOB_CONTINUE
  6013. **/
  6014. static int ipr_init_res_table(struct ipr_cmnd *ipr_cmd)
  6015. {
  6016. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6017. struct ipr_resource_entry *res, *temp;
  6018. struct ipr_config_table_entry_wrapper cfgtew;
  6019. int entries, found, flag, i;
  6020. LIST_HEAD(old_res);
  6021. ENTER;
  6022. if (ioa_cfg->sis64)
  6023. flag = ioa_cfg->u.cfg_table64->hdr64.flags;
  6024. else
  6025. flag = ioa_cfg->u.cfg_table->hdr.flags;
  6026. if (flag & IPR_UCODE_DOWNLOAD_REQ)
  6027. dev_err(&ioa_cfg->pdev->dev, "Microcode download required\n");
  6028. list_for_each_entry_safe(res, temp, &ioa_cfg->used_res_q, queue)
  6029. list_move_tail(&res->queue, &old_res);
  6030. if (ioa_cfg->sis64)
  6031. entries = be16_to_cpu(ioa_cfg->u.cfg_table64->hdr64.num_entries);
  6032. else
  6033. entries = ioa_cfg->u.cfg_table->hdr.num_entries;
  6034. for (i = 0; i < entries; i++) {
  6035. if (ioa_cfg->sis64)
  6036. cfgtew.u.cfgte64 = &ioa_cfg->u.cfg_table64->dev[i];
  6037. else
  6038. cfgtew.u.cfgte = &ioa_cfg->u.cfg_table->dev[i];
  6039. found = 0;
  6040. list_for_each_entry_safe(res, temp, &old_res, queue) {
  6041. if (ipr_is_same_device(res, &cfgtew)) {
  6042. list_move_tail(&res->queue, &ioa_cfg->used_res_q);
  6043. found = 1;
  6044. break;
  6045. }
  6046. }
  6047. if (!found) {
  6048. if (list_empty(&ioa_cfg->free_res_q)) {
  6049. dev_err(&ioa_cfg->pdev->dev, "Too many devices attached\n");
  6050. break;
  6051. }
  6052. found = 1;
  6053. res = list_entry(ioa_cfg->free_res_q.next,
  6054. struct ipr_resource_entry, queue);
  6055. list_move_tail(&res->queue, &ioa_cfg->used_res_q);
  6056. ipr_init_res_entry(res, &cfgtew);
  6057. res->add_to_ml = 1;
  6058. } else if (res->sdev && (ipr_is_vset_device(res) || ipr_is_scsi_disk(res)))
  6059. res->sdev->allow_restart = 1;
  6060. if (found)
  6061. ipr_update_res_entry(res, &cfgtew);
  6062. }
  6063. list_for_each_entry_safe(res, temp, &old_res, queue) {
  6064. if (res->sdev) {
  6065. res->del_from_ml = 1;
  6066. res->res_handle = IPR_INVALID_RES_HANDLE;
  6067. list_move_tail(&res->queue, &ioa_cfg->used_res_q);
  6068. }
  6069. }
  6070. list_for_each_entry_safe(res, temp, &old_res, queue) {
  6071. ipr_clear_res_target(res);
  6072. list_move_tail(&res->queue, &ioa_cfg->free_res_q);
  6073. }
  6074. if (ioa_cfg->dual_raid && ipr_dual_ioa_raid)
  6075. ipr_cmd->job_step = ipr_ioafp_mode_sense_page24;
  6076. else
  6077. ipr_cmd->job_step = ipr_ioafp_mode_sense_page28;
  6078. LEAVE;
  6079. return IPR_RC_JOB_CONTINUE;
  6080. }
  6081. /**
  6082. * ipr_ioafp_query_ioa_cfg - Send a Query IOA Config to the adapter.
  6083. * @ipr_cmd: ipr command struct
  6084. *
  6085. * This function sends a Query IOA Configuration command
  6086. * to the adapter to retrieve the IOA configuration table.
  6087. *
  6088. * Return value:
  6089. * IPR_RC_JOB_RETURN
  6090. **/
  6091. static int ipr_ioafp_query_ioa_cfg(struct ipr_cmnd *ipr_cmd)
  6092. {
  6093. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6094. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6095. struct ipr_inquiry_page3 *ucode_vpd = &ioa_cfg->vpd_cbs->page3_data;
  6096. struct ipr_inquiry_cap *cap = &ioa_cfg->vpd_cbs->cap;
  6097. ENTER;
  6098. if (cap->cap & IPR_CAP_DUAL_IOA_RAID)
  6099. ioa_cfg->dual_raid = 1;
  6100. dev_info(&ioa_cfg->pdev->dev, "Adapter firmware version: %02X%02X%02X%02X\n",
  6101. ucode_vpd->major_release, ucode_vpd->card_type,
  6102. ucode_vpd->minor_release[0], ucode_vpd->minor_release[1]);
  6103. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  6104. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  6105. ioarcb->cmd_pkt.cdb[0] = IPR_QUERY_IOA_CONFIG;
  6106. ioarcb->cmd_pkt.cdb[6] = (ioa_cfg->cfg_table_size >> 16) & 0xff;
  6107. ioarcb->cmd_pkt.cdb[7] = (ioa_cfg->cfg_table_size >> 8) & 0xff;
  6108. ioarcb->cmd_pkt.cdb[8] = ioa_cfg->cfg_table_size & 0xff;
  6109. ipr_init_ioadl(ipr_cmd, ioa_cfg->cfg_table_dma, ioa_cfg->cfg_table_size,
  6110. IPR_IOADL_FLAGS_READ_LAST);
  6111. ipr_cmd->job_step = ipr_init_res_table;
  6112. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6113. LEAVE;
  6114. return IPR_RC_JOB_RETURN;
  6115. }
  6116. /**
  6117. * ipr_ioafp_inquiry - Send an Inquiry to the adapter.
  6118. * @ipr_cmd: ipr command struct
  6119. *
  6120. * This utility function sends an inquiry to the adapter.
  6121. *
  6122. * Return value:
  6123. * none
  6124. **/
  6125. static void ipr_ioafp_inquiry(struct ipr_cmnd *ipr_cmd, u8 flags, u8 page,
  6126. dma_addr_t dma_addr, u8 xfer_len)
  6127. {
  6128. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6129. ENTER;
  6130. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  6131. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  6132. ioarcb->cmd_pkt.cdb[0] = INQUIRY;
  6133. ioarcb->cmd_pkt.cdb[1] = flags;
  6134. ioarcb->cmd_pkt.cdb[2] = page;
  6135. ioarcb->cmd_pkt.cdb[4] = xfer_len;
  6136. ipr_init_ioadl(ipr_cmd, dma_addr, xfer_len, IPR_IOADL_FLAGS_READ_LAST);
  6137. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6138. LEAVE;
  6139. }
  6140. /**
  6141. * ipr_inquiry_page_supported - Is the given inquiry page supported
  6142. * @page0: inquiry page 0 buffer
  6143. * @page: page code.
  6144. *
  6145. * This function determines if the specified inquiry page is supported.
  6146. *
  6147. * Return value:
  6148. * 1 if page is supported / 0 if not
  6149. **/
  6150. static int ipr_inquiry_page_supported(struct ipr_inquiry_page0 *page0, u8 page)
  6151. {
  6152. int i;
  6153. for (i = 0; i < min_t(u8, page0->len, IPR_INQUIRY_PAGE0_ENTRIES); i++)
  6154. if (page0->page[i] == page)
  6155. return 1;
  6156. return 0;
  6157. }
  6158. /**
  6159. * ipr_ioafp_cap_inquiry - Send a Page 0xD0 Inquiry to the adapter.
  6160. * @ipr_cmd: ipr command struct
  6161. *
  6162. * This function sends a Page 0xD0 inquiry to the adapter
  6163. * to retrieve adapter capabilities.
  6164. *
  6165. * Return value:
  6166. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6167. **/
  6168. static int ipr_ioafp_cap_inquiry(struct ipr_cmnd *ipr_cmd)
  6169. {
  6170. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6171. struct ipr_inquiry_page0 *page0 = &ioa_cfg->vpd_cbs->page0_data;
  6172. struct ipr_inquiry_cap *cap = &ioa_cfg->vpd_cbs->cap;
  6173. ENTER;
  6174. ipr_cmd->job_step = ipr_ioafp_query_ioa_cfg;
  6175. memset(cap, 0, sizeof(*cap));
  6176. if (ipr_inquiry_page_supported(page0, 0xD0)) {
  6177. ipr_ioafp_inquiry(ipr_cmd, 1, 0xD0,
  6178. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, cap),
  6179. sizeof(struct ipr_inquiry_cap));
  6180. return IPR_RC_JOB_RETURN;
  6181. }
  6182. LEAVE;
  6183. return IPR_RC_JOB_CONTINUE;
  6184. }
  6185. /**
  6186. * ipr_ioafp_page3_inquiry - Send a Page 3 Inquiry to the adapter.
  6187. * @ipr_cmd: ipr command struct
  6188. *
  6189. * This function sends a Page 3 inquiry to the adapter
  6190. * to retrieve software VPD information.
  6191. *
  6192. * Return value:
  6193. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6194. **/
  6195. static int ipr_ioafp_page3_inquiry(struct ipr_cmnd *ipr_cmd)
  6196. {
  6197. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6198. ENTER;
  6199. ipr_cmd->job_step = ipr_ioafp_cap_inquiry;
  6200. ipr_ioafp_inquiry(ipr_cmd, 1, 3,
  6201. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, page3_data),
  6202. sizeof(struct ipr_inquiry_page3));
  6203. LEAVE;
  6204. return IPR_RC_JOB_RETURN;
  6205. }
  6206. /**
  6207. * ipr_ioafp_page0_inquiry - Send a Page 0 Inquiry to the adapter.
  6208. * @ipr_cmd: ipr command struct
  6209. *
  6210. * This function sends a Page 0 inquiry to the adapter
  6211. * to retrieve supported inquiry pages.
  6212. *
  6213. * Return value:
  6214. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6215. **/
  6216. static int ipr_ioafp_page0_inquiry(struct ipr_cmnd *ipr_cmd)
  6217. {
  6218. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6219. char type[5];
  6220. ENTER;
  6221. /* Grab the type out of the VPD and store it away */
  6222. memcpy(type, ioa_cfg->vpd_cbs->ioa_vpd.std_inq_data.vpids.product_id, 4);
  6223. type[4] = '\0';
  6224. ioa_cfg->type = simple_strtoul((char *)type, NULL, 16);
  6225. ipr_cmd->job_step = ipr_ioafp_page3_inquiry;
  6226. ipr_ioafp_inquiry(ipr_cmd, 1, 0,
  6227. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, page0_data),
  6228. sizeof(struct ipr_inquiry_page0));
  6229. LEAVE;
  6230. return IPR_RC_JOB_RETURN;
  6231. }
  6232. /**
  6233. * ipr_ioafp_std_inquiry - Send a Standard Inquiry to the adapter.
  6234. * @ipr_cmd: ipr command struct
  6235. *
  6236. * This function sends a standard inquiry to the adapter.
  6237. *
  6238. * Return value:
  6239. * IPR_RC_JOB_RETURN
  6240. **/
  6241. static int ipr_ioafp_std_inquiry(struct ipr_cmnd *ipr_cmd)
  6242. {
  6243. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6244. ENTER;
  6245. ipr_cmd->job_step = ipr_ioafp_page0_inquiry;
  6246. ipr_ioafp_inquiry(ipr_cmd, 0, 0,
  6247. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, ioa_vpd),
  6248. sizeof(struct ipr_ioa_vpd));
  6249. LEAVE;
  6250. return IPR_RC_JOB_RETURN;
  6251. }
  6252. /**
  6253. * ipr_ioafp_identify_hrrq - Send Identify Host RRQ.
  6254. * @ipr_cmd: ipr command struct
  6255. *
  6256. * This function send an Identify Host Request Response Queue
  6257. * command to establish the HRRQ with the adapter.
  6258. *
  6259. * Return value:
  6260. * IPR_RC_JOB_RETURN
  6261. **/
  6262. static int ipr_ioafp_identify_hrrq(struct ipr_cmnd *ipr_cmd)
  6263. {
  6264. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6265. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6266. ENTER;
  6267. dev_info(&ioa_cfg->pdev->dev, "Starting IOA initialization sequence.\n");
  6268. ioarcb->cmd_pkt.cdb[0] = IPR_ID_HOST_RR_Q;
  6269. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  6270. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  6271. if (ioa_cfg->sis64)
  6272. ioarcb->cmd_pkt.cdb[1] = 0x1;
  6273. ioarcb->cmd_pkt.cdb[2] =
  6274. ((u64) ioa_cfg->host_rrq_dma >> 24) & 0xff;
  6275. ioarcb->cmd_pkt.cdb[3] =
  6276. ((u64) ioa_cfg->host_rrq_dma >> 16) & 0xff;
  6277. ioarcb->cmd_pkt.cdb[4] =
  6278. ((u64) ioa_cfg->host_rrq_dma >> 8) & 0xff;
  6279. ioarcb->cmd_pkt.cdb[5] =
  6280. ((u64) ioa_cfg->host_rrq_dma) & 0xff;
  6281. ioarcb->cmd_pkt.cdb[7] =
  6282. ((sizeof(u32) * IPR_NUM_CMD_BLKS) >> 8) & 0xff;
  6283. ioarcb->cmd_pkt.cdb[8] =
  6284. (sizeof(u32) * IPR_NUM_CMD_BLKS) & 0xff;
  6285. if (ioa_cfg->sis64) {
  6286. ioarcb->cmd_pkt.cdb[10] =
  6287. ((u64) ioa_cfg->host_rrq_dma >> 56) & 0xff;
  6288. ioarcb->cmd_pkt.cdb[11] =
  6289. ((u64) ioa_cfg->host_rrq_dma >> 48) & 0xff;
  6290. ioarcb->cmd_pkt.cdb[12] =
  6291. ((u64) ioa_cfg->host_rrq_dma >> 40) & 0xff;
  6292. ioarcb->cmd_pkt.cdb[13] =
  6293. ((u64) ioa_cfg->host_rrq_dma >> 32) & 0xff;
  6294. }
  6295. ipr_cmd->job_step = ipr_ioafp_std_inquiry;
  6296. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6297. LEAVE;
  6298. return IPR_RC_JOB_RETURN;
  6299. }
  6300. /**
  6301. * ipr_reset_timer_done - Adapter reset timer function
  6302. * @ipr_cmd: ipr command struct
  6303. *
  6304. * Description: This function is used in adapter reset processing
  6305. * for timing events. If the reset_cmd pointer in the IOA
  6306. * config struct is not this adapter's we are doing nested
  6307. * resets and fail_all_ops will take care of freeing the
  6308. * command block.
  6309. *
  6310. * Return value:
  6311. * none
  6312. **/
  6313. static void ipr_reset_timer_done(struct ipr_cmnd *ipr_cmd)
  6314. {
  6315. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6316. unsigned long lock_flags = 0;
  6317. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  6318. if (ioa_cfg->reset_cmd == ipr_cmd) {
  6319. list_del(&ipr_cmd->queue);
  6320. ipr_cmd->done(ipr_cmd);
  6321. }
  6322. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  6323. }
  6324. /**
  6325. * ipr_reset_start_timer - Start a timer for adapter reset job
  6326. * @ipr_cmd: ipr command struct
  6327. * @timeout: timeout value
  6328. *
  6329. * Description: This function is used in adapter reset processing
  6330. * for timing events. If the reset_cmd pointer in the IOA
  6331. * config struct is not this adapter's we are doing nested
  6332. * resets and fail_all_ops will take care of freeing the
  6333. * command block.
  6334. *
  6335. * Return value:
  6336. * none
  6337. **/
  6338. static void ipr_reset_start_timer(struct ipr_cmnd *ipr_cmd,
  6339. unsigned long timeout)
  6340. {
  6341. list_add_tail(&ipr_cmd->queue, &ipr_cmd->ioa_cfg->pending_q);
  6342. ipr_cmd->done = ipr_reset_ioa_job;
  6343. ipr_cmd->timer.data = (unsigned long) ipr_cmd;
  6344. ipr_cmd->timer.expires = jiffies + timeout;
  6345. ipr_cmd->timer.function = (void (*)(unsigned long))ipr_reset_timer_done;
  6346. add_timer(&ipr_cmd->timer);
  6347. }
  6348. /**
  6349. * ipr_init_ioa_mem - Initialize ioa_cfg control block
  6350. * @ioa_cfg: ioa cfg struct
  6351. *
  6352. * Return value:
  6353. * nothing
  6354. **/
  6355. static void ipr_init_ioa_mem(struct ipr_ioa_cfg *ioa_cfg)
  6356. {
  6357. memset(ioa_cfg->host_rrq, 0, sizeof(u32) * IPR_NUM_CMD_BLKS);
  6358. /* Initialize Host RRQ pointers */
  6359. ioa_cfg->hrrq_start = ioa_cfg->host_rrq;
  6360. ioa_cfg->hrrq_end = &ioa_cfg->host_rrq[IPR_NUM_CMD_BLKS - 1];
  6361. ioa_cfg->hrrq_curr = ioa_cfg->hrrq_start;
  6362. ioa_cfg->toggle_bit = 1;
  6363. /* Zero out config table */
  6364. memset(ioa_cfg->u.cfg_table, 0, ioa_cfg->cfg_table_size);
  6365. }
  6366. /**
  6367. * ipr_reset_next_stage - Process IPL stage change based on feedback register.
  6368. * @ipr_cmd: ipr command struct
  6369. *
  6370. * Return value:
  6371. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6372. **/
  6373. static int ipr_reset_next_stage(struct ipr_cmnd *ipr_cmd)
  6374. {
  6375. unsigned long stage, stage_time;
  6376. u32 feedback;
  6377. volatile u32 int_reg;
  6378. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6379. u64 maskval = 0;
  6380. feedback = readl(ioa_cfg->regs.init_feedback_reg);
  6381. stage = feedback & IPR_IPL_INIT_STAGE_MASK;
  6382. stage_time = feedback & IPR_IPL_INIT_STAGE_TIME_MASK;
  6383. ipr_dbg("IPL stage = 0x%lx, IPL stage time = %ld\n", stage, stage_time);
  6384. /* sanity check the stage_time value */
  6385. if (stage_time == 0)
  6386. stage_time = IPR_IPL_INIT_DEFAULT_STAGE_TIME;
  6387. else if (stage_time < IPR_IPL_INIT_MIN_STAGE_TIME)
  6388. stage_time = IPR_IPL_INIT_MIN_STAGE_TIME;
  6389. else if (stage_time > IPR_LONG_OPERATIONAL_TIMEOUT)
  6390. stage_time = IPR_LONG_OPERATIONAL_TIMEOUT;
  6391. if (stage == IPR_IPL_INIT_STAGE_UNKNOWN) {
  6392. writel(IPR_PCII_IPL_STAGE_CHANGE, ioa_cfg->regs.set_interrupt_mask_reg);
  6393. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  6394. stage_time = ioa_cfg->transop_timeout;
  6395. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  6396. } else if (stage == IPR_IPL_INIT_STAGE_TRANSOP) {
  6397. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  6398. if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
  6399. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  6400. maskval = IPR_PCII_IPL_STAGE_CHANGE;
  6401. maskval = (maskval << 32) | IPR_PCII_IOA_TRANS_TO_OPER;
  6402. writeq(maskval, ioa_cfg->regs.set_interrupt_mask_reg);
  6403. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  6404. return IPR_RC_JOB_CONTINUE;
  6405. }
  6406. }
  6407. ipr_cmd->timer.data = (unsigned long) ipr_cmd;
  6408. ipr_cmd->timer.expires = jiffies + stage_time * HZ;
  6409. ipr_cmd->timer.function = (void (*)(unsigned long))ipr_oper_timeout;
  6410. ipr_cmd->done = ipr_reset_ioa_job;
  6411. add_timer(&ipr_cmd->timer);
  6412. list_add_tail(&ipr_cmd->queue, &ioa_cfg->pending_q);
  6413. return IPR_RC_JOB_RETURN;
  6414. }
  6415. /**
  6416. * ipr_reset_enable_ioa - Enable the IOA following a reset.
  6417. * @ipr_cmd: ipr command struct
  6418. *
  6419. * This function reinitializes some control blocks and
  6420. * enables destructive diagnostics on the adapter.
  6421. *
  6422. * Return value:
  6423. * IPR_RC_JOB_RETURN
  6424. **/
  6425. static int ipr_reset_enable_ioa(struct ipr_cmnd *ipr_cmd)
  6426. {
  6427. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6428. volatile u32 int_reg;
  6429. volatile u64 maskval;
  6430. ENTER;
  6431. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  6432. ipr_init_ioa_mem(ioa_cfg);
  6433. ioa_cfg->allow_interrupts = 1;
  6434. if (ioa_cfg->sis64) {
  6435. /* Set the adapter to the correct endian mode. */
  6436. writel(IPR_ENDIAN_SWAP_KEY, ioa_cfg->regs.endian_swap_reg);
  6437. int_reg = readl(ioa_cfg->regs.endian_swap_reg);
  6438. }
  6439. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  6440. if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
  6441. writel((IPR_PCII_ERROR_INTERRUPTS | IPR_PCII_HRRQ_UPDATED),
  6442. ioa_cfg->regs.clr_interrupt_mask_reg32);
  6443. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  6444. return IPR_RC_JOB_CONTINUE;
  6445. }
  6446. /* Enable destructive diagnostics on IOA */
  6447. writel(ioa_cfg->doorbell, ioa_cfg->regs.set_uproc_interrupt_reg32);
  6448. if (ioa_cfg->sis64) {
  6449. maskval = IPR_PCII_IPL_STAGE_CHANGE;
  6450. maskval = (maskval << 32) | IPR_PCII_OPER_INTERRUPTS;
  6451. writeq(maskval, ioa_cfg->regs.clr_interrupt_mask_reg);
  6452. } else
  6453. writel(IPR_PCII_OPER_INTERRUPTS, ioa_cfg->regs.clr_interrupt_mask_reg32);
  6454. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  6455. dev_info(&ioa_cfg->pdev->dev, "Initializing IOA.\n");
  6456. if (ioa_cfg->sis64) {
  6457. ipr_cmd->job_step = ipr_reset_next_stage;
  6458. return IPR_RC_JOB_CONTINUE;
  6459. }
  6460. ipr_cmd->timer.data = (unsigned long) ipr_cmd;
  6461. ipr_cmd->timer.expires = jiffies + (ioa_cfg->transop_timeout * HZ);
  6462. ipr_cmd->timer.function = (void (*)(unsigned long))ipr_oper_timeout;
  6463. ipr_cmd->done = ipr_reset_ioa_job;
  6464. add_timer(&ipr_cmd->timer);
  6465. list_add_tail(&ipr_cmd->queue, &ioa_cfg->pending_q);
  6466. LEAVE;
  6467. return IPR_RC_JOB_RETURN;
  6468. }
  6469. /**
  6470. * ipr_reset_wait_for_dump - Wait for a dump to timeout.
  6471. * @ipr_cmd: ipr command struct
  6472. *
  6473. * This function is invoked when an adapter dump has run out
  6474. * of processing time.
  6475. *
  6476. * Return value:
  6477. * IPR_RC_JOB_CONTINUE
  6478. **/
  6479. static int ipr_reset_wait_for_dump(struct ipr_cmnd *ipr_cmd)
  6480. {
  6481. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6482. if (ioa_cfg->sdt_state == GET_DUMP)
  6483. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  6484. else if (ioa_cfg->sdt_state == READ_DUMP)
  6485. ioa_cfg->sdt_state = ABORT_DUMP;
  6486. ioa_cfg->dump_timeout = 1;
  6487. ipr_cmd->job_step = ipr_reset_alert;
  6488. return IPR_RC_JOB_CONTINUE;
  6489. }
  6490. /**
  6491. * ipr_unit_check_no_data - Log a unit check/no data error log
  6492. * @ioa_cfg: ioa config struct
  6493. *
  6494. * Logs an error indicating the adapter unit checked, but for some
  6495. * reason, we were unable to fetch the unit check buffer.
  6496. *
  6497. * Return value:
  6498. * nothing
  6499. **/
  6500. static void ipr_unit_check_no_data(struct ipr_ioa_cfg *ioa_cfg)
  6501. {
  6502. ioa_cfg->errors_logged++;
  6503. dev_err(&ioa_cfg->pdev->dev, "IOA unit check with no data\n");
  6504. }
  6505. /**
  6506. * ipr_get_unit_check_buffer - Get the unit check buffer from the IOA
  6507. * @ioa_cfg: ioa config struct
  6508. *
  6509. * Fetches the unit check buffer from the adapter by clocking the data
  6510. * through the mailbox register.
  6511. *
  6512. * Return value:
  6513. * nothing
  6514. **/
  6515. static void ipr_get_unit_check_buffer(struct ipr_ioa_cfg *ioa_cfg)
  6516. {
  6517. unsigned long mailbox;
  6518. struct ipr_hostrcb *hostrcb;
  6519. struct ipr_uc_sdt sdt;
  6520. int rc, length;
  6521. u32 ioasc;
  6522. mailbox = readl(ioa_cfg->ioa_mailbox);
  6523. if (!ioa_cfg->sis64 && !ipr_sdt_is_fmt2(mailbox)) {
  6524. ipr_unit_check_no_data(ioa_cfg);
  6525. return;
  6526. }
  6527. memset(&sdt, 0, sizeof(struct ipr_uc_sdt));
  6528. rc = ipr_get_ldump_data_section(ioa_cfg, mailbox, (__be32 *) &sdt,
  6529. (sizeof(struct ipr_uc_sdt)) / sizeof(__be32));
  6530. if (rc || !(sdt.entry[0].flags & IPR_SDT_VALID_ENTRY) ||
  6531. ((be32_to_cpu(sdt.hdr.state) != IPR_FMT3_SDT_READY_TO_USE) &&
  6532. (be32_to_cpu(sdt.hdr.state) != IPR_FMT2_SDT_READY_TO_USE))) {
  6533. ipr_unit_check_no_data(ioa_cfg);
  6534. return;
  6535. }
  6536. /* Find length of the first sdt entry (UC buffer) */
  6537. if (be32_to_cpu(sdt.hdr.state) == IPR_FMT3_SDT_READY_TO_USE)
  6538. length = be32_to_cpu(sdt.entry[0].end_token);
  6539. else
  6540. length = (be32_to_cpu(sdt.entry[0].end_token) -
  6541. be32_to_cpu(sdt.entry[0].start_token)) &
  6542. IPR_FMT2_MBX_ADDR_MASK;
  6543. hostrcb = list_entry(ioa_cfg->hostrcb_free_q.next,
  6544. struct ipr_hostrcb, queue);
  6545. list_del(&hostrcb->queue);
  6546. memset(&hostrcb->hcam, 0, sizeof(hostrcb->hcam));
  6547. rc = ipr_get_ldump_data_section(ioa_cfg,
  6548. be32_to_cpu(sdt.entry[0].start_token),
  6549. (__be32 *)&hostrcb->hcam,
  6550. min(length, (int)sizeof(hostrcb->hcam)) / sizeof(__be32));
  6551. if (!rc) {
  6552. ipr_handle_log_data(ioa_cfg, hostrcb);
  6553. ioasc = be32_to_cpu(hostrcb->hcam.u.error.fd_ioasc);
  6554. if (ioasc == IPR_IOASC_NR_IOA_RESET_REQUIRED &&
  6555. ioa_cfg->sdt_state == GET_DUMP)
  6556. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  6557. } else
  6558. ipr_unit_check_no_data(ioa_cfg);
  6559. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_free_q);
  6560. }
  6561. /**
  6562. * ipr_reset_get_unit_check_job - Call to get the unit check buffer.
  6563. * @ipr_cmd: ipr command struct
  6564. *
  6565. * Description: This function will call to get the unit check buffer.
  6566. *
  6567. * Return value:
  6568. * IPR_RC_JOB_RETURN
  6569. **/
  6570. static int ipr_reset_get_unit_check_job(struct ipr_cmnd *ipr_cmd)
  6571. {
  6572. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6573. ENTER;
  6574. ioa_cfg->ioa_unit_checked = 0;
  6575. ipr_get_unit_check_buffer(ioa_cfg);
  6576. ipr_cmd->job_step = ipr_reset_alert;
  6577. ipr_reset_start_timer(ipr_cmd, 0);
  6578. LEAVE;
  6579. return IPR_RC_JOB_RETURN;
  6580. }
  6581. /**
  6582. * ipr_reset_restore_cfg_space - Restore PCI config space.
  6583. * @ipr_cmd: ipr command struct
  6584. *
  6585. * Description: This function restores the saved PCI config space of
  6586. * the adapter, fails all outstanding ops back to the callers, and
  6587. * fetches the dump/unit check if applicable to this reset.
  6588. *
  6589. * Return value:
  6590. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6591. **/
  6592. static int ipr_reset_restore_cfg_space(struct ipr_cmnd *ipr_cmd)
  6593. {
  6594. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6595. u32 int_reg;
  6596. ENTER;
  6597. ioa_cfg->pdev->state_saved = true;
  6598. pci_restore_state(ioa_cfg->pdev);
  6599. if (ipr_set_pcix_cmd_reg(ioa_cfg)) {
  6600. ipr_cmd->s.ioasa.hdr.ioasc = cpu_to_be32(IPR_IOASC_PCI_ACCESS_ERROR);
  6601. return IPR_RC_JOB_CONTINUE;
  6602. }
  6603. ipr_fail_all_ops(ioa_cfg);
  6604. if (ioa_cfg->sis64) {
  6605. /* Set the adapter to the correct endian mode. */
  6606. writel(IPR_ENDIAN_SWAP_KEY, ioa_cfg->regs.endian_swap_reg);
  6607. int_reg = readl(ioa_cfg->regs.endian_swap_reg);
  6608. }
  6609. if (ioa_cfg->ioa_unit_checked) {
  6610. if (ioa_cfg->sis64) {
  6611. ipr_cmd->job_step = ipr_reset_get_unit_check_job;
  6612. ipr_reset_start_timer(ipr_cmd, IPR_DUMP_DELAY_TIMEOUT);
  6613. return IPR_RC_JOB_RETURN;
  6614. } else {
  6615. ioa_cfg->ioa_unit_checked = 0;
  6616. ipr_get_unit_check_buffer(ioa_cfg);
  6617. ipr_cmd->job_step = ipr_reset_alert;
  6618. ipr_reset_start_timer(ipr_cmd, 0);
  6619. return IPR_RC_JOB_RETURN;
  6620. }
  6621. }
  6622. if (ioa_cfg->in_ioa_bringdown) {
  6623. ipr_cmd->job_step = ipr_ioa_bringdown_done;
  6624. } else {
  6625. ipr_cmd->job_step = ipr_reset_enable_ioa;
  6626. if (GET_DUMP == ioa_cfg->sdt_state) {
  6627. ioa_cfg->sdt_state = READ_DUMP;
  6628. ioa_cfg->dump_timeout = 0;
  6629. if (ioa_cfg->sis64)
  6630. ipr_reset_start_timer(ipr_cmd, IPR_SIS64_DUMP_TIMEOUT);
  6631. else
  6632. ipr_reset_start_timer(ipr_cmd, IPR_SIS32_DUMP_TIMEOUT);
  6633. ipr_cmd->job_step = ipr_reset_wait_for_dump;
  6634. schedule_work(&ioa_cfg->work_q);
  6635. return IPR_RC_JOB_RETURN;
  6636. }
  6637. }
  6638. LEAVE;
  6639. return IPR_RC_JOB_CONTINUE;
  6640. }
  6641. /**
  6642. * ipr_reset_bist_done - BIST has completed on the adapter.
  6643. * @ipr_cmd: ipr command struct
  6644. *
  6645. * Description: Unblock config space and resume the reset process.
  6646. *
  6647. * Return value:
  6648. * IPR_RC_JOB_CONTINUE
  6649. **/
  6650. static int ipr_reset_bist_done(struct ipr_cmnd *ipr_cmd)
  6651. {
  6652. ENTER;
  6653. pci_unblock_user_cfg_access(ipr_cmd->ioa_cfg->pdev);
  6654. ipr_cmd->job_step = ipr_reset_restore_cfg_space;
  6655. LEAVE;
  6656. return IPR_RC_JOB_CONTINUE;
  6657. }
  6658. /**
  6659. * ipr_reset_start_bist - Run BIST on the adapter.
  6660. * @ipr_cmd: ipr command struct
  6661. *
  6662. * Description: This function runs BIST on the adapter, then delays 2 seconds.
  6663. *
  6664. * Return value:
  6665. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6666. **/
  6667. static int ipr_reset_start_bist(struct ipr_cmnd *ipr_cmd)
  6668. {
  6669. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6670. int rc = PCIBIOS_SUCCESSFUL;
  6671. ENTER;
  6672. pci_block_user_cfg_access(ioa_cfg->pdev);
  6673. if (ioa_cfg->ipr_chip->bist_method == IPR_MMIO)
  6674. writel(IPR_UPROCI_SIS64_START_BIST,
  6675. ioa_cfg->regs.set_uproc_interrupt_reg32);
  6676. else
  6677. rc = pci_write_config_byte(ioa_cfg->pdev, PCI_BIST, PCI_BIST_START);
  6678. if (rc == PCIBIOS_SUCCESSFUL) {
  6679. ipr_cmd->job_step = ipr_reset_bist_done;
  6680. ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT);
  6681. rc = IPR_RC_JOB_RETURN;
  6682. } else {
  6683. pci_unblock_user_cfg_access(ipr_cmd->ioa_cfg->pdev);
  6684. ipr_cmd->s.ioasa.hdr.ioasc = cpu_to_be32(IPR_IOASC_PCI_ACCESS_ERROR);
  6685. rc = IPR_RC_JOB_CONTINUE;
  6686. }
  6687. LEAVE;
  6688. return rc;
  6689. }
  6690. /**
  6691. * ipr_reset_slot_reset_done - Clear PCI reset to the adapter
  6692. * @ipr_cmd: ipr command struct
  6693. *
  6694. * Description: This clears PCI reset to the adapter and delays two seconds.
  6695. *
  6696. * Return value:
  6697. * IPR_RC_JOB_RETURN
  6698. **/
  6699. static int ipr_reset_slot_reset_done(struct ipr_cmnd *ipr_cmd)
  6700. {
  6701. ENTER;
  6702. pci_set_pcie_reset_state(ipr_cmd->ioa_cfg->pdev, pcie_deassert_reset);
  6703. ipr_cmd->job_step = ipr_reset_bist_done;
  6704. ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT);
  6705. LEAVE;
  6706. return IPR_RC_JOB_RETURN;
  6707. }
  6708. /**
  6709. * ipr_reset_slot_reset - Reset the PCI slot of the adapter.
  6710. * @ipr_cmd: ipr command struct
  6711. *
  6712. * Description: This asserts PCI reset to the adapter.
  6713. *
  6714. * Return value:
  6715. * IPR_RC_JOB_RETURN
  6716. **/
  6717. static int ipr_reset_slot_reset(struct ipr_cmnd *ipr_cmd)
  6718. {
  6719. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6720. struct pci_dev *pdev = ioa_cfg->pdev;
  6721. ENTER;
  6722. pci_block_user_cfg_access(pdev);
  6723. pci_set_pcie_reset_state(pdev, pcie_warm_reset);
  6724. ipr_cmd->job_step = ipr_reset_slot_reset_done;
  6725. ipr_reset_start_timer(ipr_cmd, IPR_PCI_RESET_TIMEOUT);
  6726. LEAVE;
  6727. return IPR_RC_JOB_RETURN;
  6728. }
  6729. /**
  6730. * ipr_reset_allowed - Query whether or not IOA can be reset
  6731. * @ioa_cfg: ioa config struct
  6732. *
  6733. * Return value:
  6734. * 0 if reset not allowed / non-zero if reset is allowed
  6735. **/
  6736. static int ipr_reset_allowed(struct ipr_ioa_cfg *ioa_cfg)
  6737. {
  6738. volatile u32 temp_reg;
  6739. temp_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  6740. return ((temp_reg & IPR_PCII_CRITICAL_OPERATION) == 0);
  6741. }
  6742. /**
  6743. * ipr_reset_wait_to_start_bist - Wait for permission to reset IOA.
  6744. * @ipr_cmd: ipr command struct
  6745. *
  6746. * Description: This function waits for adapter permission to run BIST,
  6747. * then runs BIST. If the adapter does not give permission after a
  6748. * reasonable time, we will reset the adapter anyway. The impact of
  6749. * resetting the adapter without warning the adapter is the risk of
  6750. * losing the persistent error log on the adapter. If the adapter is
  6751. * reset while it is writing to the flash on the adapter, the flash
  6752. * segment will have bad ECC and be zeroed.
  6753. *
  6754. * Return value:
  6755. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6756. **/
  6757. static int ipr_reset_wait_to_start_bist(struct ipr_cmnd *ipr_cmd)
  6758. {
  6759. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6760. int rc = IPR_RC_JOB_RETURN;
  6761. if (!ipr_reset_allowed(ioa_cfg) && ipr_cmd->u.time_left) {
  6762. ipr_cmd->u.time_left -= IPR_CHECK_FOR_RESET_TIMEOUT;
  6763. ipr_reset_start_timer(ipr_cmd, IPR_CHECK_FOR_RESET_TIMEOUT);
  6764. } else {
  6765. ipr_cmd->job_step = ioa_cfg->reset;
  6766. rc = IPR_RC_JOB_CONTINUE;
  6767. }
  6768. return rc;
  6769. }
  6770. /**
  6771. * ipr_reset_alert - Alert the adapter of a pending reset
  6772. * @ipr_cmd: ipr command struct
  6773. *
  6774. * Description: This function alerts the adapter that it will be reset.
  6775. * If memory space is not currently enabled, proceed directly
  6776. * to running BIST on the adapter. The timer must always be started
  6777. * so we guarantee we do not run BIST from ipr_isr.
  6778. *
  6779. * Return value:
  6780. * IPR_RC_JOB_RETURN
  6781. **/
  6782. static int ipr_reset_alert(struct ipr_cmnd *ipr_cmd)
  6783. {
  6784. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6785. u16 cmd_reg;
  6786. int rc;
  6787. ENTER;
  6788. rc = pci_read_config_word(ioa_cfg->pdev, PCI_COMMAND, &cmd_reg);
  6789. if ((rc == PCIBIOS_SUCCESSFUL) && (cmd_reg & PCI_COMMAND_MEMORY)) {
  6790. ipr_mask_and_clear_interrupts(ioa_cfg, ~0);
  6791. writel(IPR_UPROCI_RESET_ALERT, ioa_cfg->regs.set_uproc_interrupt_reg32);
  6792. ipr_cmd->job_step = ipr_reset_wait_to_start_bist;
  6793. } else {
  6794. ipr_cmd->job_step = ioa_cfg->reset;
  6795. }
  6796. ipr_cmd->u.time_left = IPR_WAIT_FOR_RESET_TIMEOUT;
  6797. ipr_reset_start_timer(ipr_cmd, IPR_CHECK_FOR_RESET_TIMEOUT);
  6798. LEAVE;
  6799. return IPR_RC_JOB_RETURN;
  6800. }
  6801. /**
  6802. * ipr_reset_ucode_download_done - Microcode download completion
  6803. * @ipr_cmd: ipr command struct
  6804. *
  6805. * Description: This function unmaps the microcode download buffer.
  6806. *
  6807. * Return value:
  6808. * IPR_RC_JOB_CONTINUE
  6809. **/
  6810. static int ipr_reset_ucode_download_done(struct ipr_cmnd *ipr_cmd)
  6811. {
  6812. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6813. struct ipr_sglist *sglist = ioa_cfg->ucode_sglist;
  6814. pci_unmap_sg(ioa_cfg->pdev, sglist->scatterlist,
  6815. sglist->num_sg, DMA_TO_DEVICE);
  6816. ipr_cmd->job_step = ipr_reset_alert;
  6817. return IPR_RC_JOB_CONTINUE;
  6818. }
  6819. /**
  6820. * ipr_reset_ucode_download - Download microcode to the adapter
  6821. * @ipr_cmd: ipr command struct
  6822. *
  6823. * Description: This function checks to see if it there is microcode
  6824. * to download to the adapter. If there is, a download is performed.
  6825. *
  6826. * Return value:
  6827. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6828. **/
  6829. static int ipr_reset_ucode_download(struct ipr_cmnd *ipr_cmd)
  6830. {
  6831. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6832. struct ipr_sglist *sglist = ioa_cfg->ucode_sglist;
  6833. ENTER;
  6834. ipr_cmd->job_step = ipr_reset_alert;
  6835. if (!sglist)
  6836. return IPR_RC_JOB_CONTINUE;
  6837. ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  6838. ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  6839. ipr_cmd->ioarcb.cmd_pkt.cdb[0] = WRITE_BUFFER;
  6840. ipr_cmd->ioarcb.cmd_pkt.cdb[1] = IPR_WR_BUF_DOWNLOAD_AND_SAVE;
  6841. ipr_cmd->ioarcb.cmd_pkt.cdb[6] = (sglist->buffer_len & 0xff0000) >> 16;
  6842. ipr_cmd->ioarcb.cmd_pkt.cdb[7] = (sglist->buffer_len & 0x00ff00) >> 8;
  6843. ipr_cmd->ioarcb.cmd_pkt.cdb[8] = sglist->buffer_len & 0x0000ff;
  6844. if (ioa_cfg->sis64)
  6845. ipr_build_ucode_ioadl64(ipr_cmd, sglist);
  6846. else
  6847. ipr_build_ucode_ioadl(ipr_cmd, sglist);
  6848. ipr_cmd->job_step = ipr_reset_ucode_download_done;
  6849. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  6850. IPR_WRITE_BUFFER_TIMEOUT);
  6851. LEAVE;
  6852. return IPR_RC_JOB_RETURN;
  6853. }
  6854. /**
  6855. * ipr_reset_shutdown_ioa - Shutdown the adapter
  6856. * @ipr_cmd: ipr command struct
  6857. *
  6858. * Description: This function issues an adapter shutdown of the
  6859. * specified type to the specified adapter as part of the
  6860. * adapter reset job.
  6861. *
  6862. * Return value:
  6863. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6864. **/
  6865. static int ipr_reset_shutdown_ioa(struct ipr_cmnd *ipr_cmd)
  6866. {
  6867. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6868. enum ipr_shutdown_type shutdown_type = ipr_cmd->u.shutdown_type;
  6869. unsigned long timeout;
  6870. int rc = IPR_RC_JOB_CONTINUE;
  6871. ENTER;
  6872. if (shutdown_type != IPR_SHUTDOWN_NONE && !ioa_cfg->ioa_is_dead) {
  6873. ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  6874. ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  6875. ipr_cmd->ioarcb.cmd_pkt.cdb[0] = IPR_IOA_SHUTDOWN;
  6876. ipr_cmd->ioarcb.cmd_pkt.cdb[1] = shutdown_type;
  6877. if (shutdown_type == IPR_SHUTDOWN_NORMAL)
  6878. timeout = IPR_SHUTDOWN_TIMEOUT;
  6879. else if (shutdown_type == IPR_SHUTDOWN_PREPARE_FOR_NORMAL)
  6880. timeout = IPR_INTERNAL_TIMEOUT;
  6881. else if (ioa_cfg->dual_raid && ipr_dual_ioa_raid)
  6882. timeout = IPR_DUAL_IOA_ABBR_SHUTDOWN_TO;
  6883. else
  6884. timeout = IPR_ABBREV_SHUTDOWN_TIMEOUT;
  6885. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, timeout);
  6886. rc = IPR_RC_JOB_RETURN;
  6887. ipr_cmd->job_step = ipr_reset_ucode_download;
  6888. } else
  6889. ipr_cmd->job_step = ipr_reset_alert;
  6890. LEAVE;
  6891. return rc;
  6892. }
  6893. /**
  6894. * ipr_reset_ioa_job - Adapter reset job
  6895. * @ipr_cmd: ipr command struct
  6896. *
  6897. * Description: This function is the job router for the adapter reset job.
  6898. *
  6899. * Return value:
  6900. * none
  6901. **/
  6902. static void ipr_reset_ioa_job(struct ipr_cmnd *ipr_cmd)
  6903. {
  6904. u32 rc, ioasc;
  6905. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6906. do {
  6907. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  6908. if (ioa_cfg->reset_cmd != ipr_cmd) {
  6909. /*
  6910. * We are doing nested adapter resets and this is
  6911. * not the current reset job.
  6912. */
  6913. list_add_tail(&ipr_cmd->queue, &ioa_cfg->free_q);
  6914. return;
  6915. }
  6916. if (IPR_IOASC_SENSE_KEY(ioasc)) {
  6917. rc = ipr_cmd->job_step_failed(ipr_cmd);
  6918. if (rc == IPR_RC_JOB_RETURN)
  6919. return;
  6920. }
  6921. ipr_reinit_ipr_cmnd(ipr_cmd);
  6922. ipr_cmd->job_step_failed = ipr_reset_cmd_failed;
  6923. rc = ipr_cmd->job_step(ipr_cmd);
  6924. } while(rc == IPR_RC_JOB_CONTINUE);
  6925. }
  6926. /**
  6927. * _ipr_initiate_ioa_reset - Initiate an adapter reset
  6928. * @ioa_cfg: ioa config struct
  6929. * @job_step: first job step of reset job
  6930. * @shutdown_type: shutdown type
  6931. *
  6932. * Description: This function will initiate the reset of the given adapter
  6933. * starting at the selected job step.
  6934. * If the caller needs to wait on the completion of the reset,
  6935. * the caller must sleep on the reset_wait_q.
  6936. *
  6937. * Return value:
  6938. * none
  6939. **/
  6940. static void _ipr_initiate_ioa_reset(struct ipr_ioa_cfg *ioa_cfg,
  6941. int (*job_step) (struct ipr_cmnd *),
  6942. enum ipr_shutdown_type shutdown_type)
  6943. {
  6944. struct ipr_cmnd *ipr_cmd;
  6945. ioa_cfg->in_reset_reload = 1;
  6946. ioa_cfg->allow_cmds = 0;
  6947. scsi_block_requests(ioa_cfg->host);
  6948. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  6949. ioa_cfg->reset_cmd = ipr_cmd;
  6950. ipr_cmd->job_step = job_step;
  6951. ipr_cmd->u.shutdown_type = shutdown_type;
  6952. ipr_reset_ioa_job(ipr_cmd);
  6953. }
  6954. /**
  6955. * ipr_initiate_ioa_reset - Initiate an adapter reset
  6956. * @ioa_cfg: ioa config struct
  6957. * @shutdown_type: shutdown type
  6958. *
  6959. * Description: This function will initiate the reset of the given adapter.
  6960. * If the caller needs to wait on the completion of the reset,
  6961. * the caller must sleep on the reset_wait_q.
  6962. *
  6963. * Return value:
  6964. * none
  6965. **/
  6966. static void ipr_initiate_ioa_reset(struct ipr_ioa_cfg *ioa_cfg,
  6967. enum ipr_shutdown_type shutdown_type)
  6968. {
  6969. if (ioa_cfg->ioa_is_dead)
  6970. return;
  6971. if (ioa_cfg->in_reset_reload) {
  6972. if (ioa_cfg->sdt_state == GET_DUMP)
  6973. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  6974. else if (ioa_cfg->sdt_state == READ_DUMP)
  6975. ioa_cfg->sdt_state = ABORT_DUMP;
  6976. }
  6977. if (ioa_cfg->reset_retries++ >= IPR_NUM_RESET_RELOAD_RETRIES) {
  6978. dev_err(&ioa_cfg->pdev->dev,
  6979. "IOA taken offline - error recovery failed\n");
  6980. ioa_cfg->reset_retries = 0;
  6981. ioa_cfg->ioa_is_dead = 1;
  6982. if (ioa_cfg->in_ioa_bringdown) {
  6983. ioa_cfg->reset_cmd = NULL;
  6984. ioa_cfg->in_reset_reload = 0;
  6985. ipr_fail_all_ops(ioa_cfg);
  6986. wake_up_all(&ioa_cfg->reset_wait_q);
  6987. spin_unlock_irq(ioa_cfg->host->host_lock);
  6988. scsi_unblock_requests(ioa_cfg->host);
  6989. spin_lock_irq(ioa_cfg->host->host_lock);
  6990. return;
  6991. } else {
  6992. ioa_cfg->in_ioa_bringdown = 1;
  6993. shutdown_type = IPR_SHUTDOWN_NONE;
  6994. }
  6995. }
  6996. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_shutdown_ioa,
  6997. shutdown_type);
  6998. }
  6999. /**
  7000. * ipr_reset_freeze - Hold off all I/O activity
  7001. * @ipr_cmd: ipr command struct
  7002. *
  7003. * Description: If the PCI slot is frozen, hold off all I/O
  7004. * activity; then, as soon as the slot is available again,
  7005. * initiate an adapter reset.
  7006. */
  7007. static int ipr_reset_freeze(struct ipr_cmnd *ipr_cmd)
  7008. {
  7009. /* Disallow new interrupts, avoid loop */
  7010. ipr_cmd->ioa_cfg->allow_interrupts = 0;
  7011. list_add_tail(&ipr_cmd->queue, &ipr_cmd->ioa_cfg->pending_q);
  7012. ipr_cmd->done = ipr_reset_ioa_job;
  7013. return IPR_RC_JOB_RETURN;
  7014. }
  7015. /**
  7016. * ipr_pci_frozen - Called when slot has experienced a PCI bus error.
  7017. * @pdev: PCI device struct
  7018. *
  7019. * Description: This routine is called to tell us that the PCI bus
  7020. * is down. Can't do anything here, except put the device driver
  7021. * into a holding pattern, waiting for the PCI bus to come back.
  7022. */
  7023. static void ipr_pci_frozen(struct pci_dev *pdev)
  7024. {
  7025. unsigned long flags = 0;
  7026. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  7027. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  7028. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_freeze, IPR_SHUTDOWN_NONE);
  7029. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  7030. }
  7031. /**
  7032. * ipr_pci_slot_reset - Called when PCI slot has been reset.
  7033. * @pdev: PCI device struct
  7034. *
  7035. * Description: This routine is called by the pci error recovery
  7036. * code after the PCI slot has been reset, just before we
  7037. * should resume normal operations.
  7038. */
  7039. static pci_ers_result_t ipr_pci_slot_reset(struct pci_dev *pdev)
  7040. {
  7041. unsigned long flags = 0;
  7042. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  7043. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  7044. if (ioa_cfg->needs_warm_reset)
  7045. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  7046. else
  7047. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_restore_cfg_space,
  7048. IPR_SHUTDOWN_NONE);
  7049. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  7050. return PCI_ERS_RESULT_RECOVERED;
  7051. }
  7052. /**
  7053. * ipr_pci_perm_failure - Called when PCI slot is dead for good.
  7054. * @pdev: PCI device struct
  7055. *
  7056. * Description: This routine is called when the PCI bus has
  7057. * permanently failed.
  7058. */
  7059. static void ipr_pci_perm_failure(struct pci_dev *pdev)
  7060. {
  7061. unsigned long flags = 0;
  7062. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  7063. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  7064. if (ioa_cfg->sdt_state == WAIT_FOR_DUMP)
  7065. ioa_cfg->sdt_state = ABORT_DUMP;
  7066. ioa_cfg->reset_retries = IPR_NUM_RESET_RELOAD_RETRIES;
  7067. ioa_cfg->in_ioa_bringdown = 1;
  7068. ioa_cfg->allow_cmds = 0;
  7069. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  7070. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  7071. }
  7072. /**
  7073. * ipr_pci_error_detected - Called when a PCI error is detected.
  7074. * @pdev: PCI device struct
  7075. * @state: PCI channel state
  7076. *
  7077. * Description: Called when a PCI error is detected.
  7078. *
  7079. * Return value:
  7080. * PCI_ERS_RESULT_NEED_RESET or PCI_ERS_RESULT_DISCONNECT
  7081. */
  7082. static pci_ers_result_t ipr_pci_error_detected(struct pci_dev *pdev,
  7083. pci_channel_state_t state)
  7084. {
  7085. switch (state) {
  7086. case pci_channel_io_frozen:
  7087. ipr_pci_frozen(pdev);
  7088. return PCI_ERS_RESULT_NEED_RESET;
  7089. case pci_channel_io_perm_failure:
  7090. ipr_pci_perm_failure(pdev);
  7091. return PCI_ERS_RESULT_DISCONNECT;
  7092. break;
  7093. default:
  7094. break;
  7095. }
  7096. return PCI_ERS_RESULT_NEED_RESET;
  7097. }
  7098. /**
  7099. * ipr_probe_ioa_part2 - Initializes IOAs found in ipr_probe_ioa(..)
  7100. * @ioa_cfg: ioa cfg struct
  7101. *
  7102. * Description: This is the second phase of adapter intialization
  7103. * This function takes care of initilizing the adapter to the point
  7104. * where it can accept new commands.
  7105. * Return value:
  7106. * 0 on success / -EIO on failure
  7107. **/
  7108. static int __devinit ipr_probe_ioa_part2(struct ipr_ioa_cfg *ioa_cfg)
  7109. {
  7110. int rc = 0;
  7111. unsigned long host_lock_flags = 0;
  7112. ENTER;
  7113. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  7114. dev_dbg(&ioa_cfg->pdev->dev, "ioa_cfg adx: 0x%p\n", ioa_cfg);
  7115. if (ioa_cfg->needs_hard_reset) {
  7116. ioa_cfg->needs_hard_reset = 0;
  7117. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  7118. } else
  7119. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_enable_ioa,
  7120. IPR_SHUTDOWN_NONE);
  7121. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  7122. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  7123. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  7124. if (ioa_cfg->ioa_is_dead) {
  7125. rc = -EIO;
  7126. } else if (ipr_invalid_adapter(ioa_cfg)) {
  7127. if (!ipr_testmode)
  7128. rc = -EIO;
  7129. dev_err(&ioa_cfg->pdev->dev,
  7130. "Adapter not supported in this hardware configuration.\n");
  7131. }
  7132. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  7133. LEAVE;
  7134. return rc;
  7135. }
  7136. /**
  7137. * ipr_free_cmd_blks - Frees command blocks allocated for an adapter
  7138. * @ioa_cfg: ioa config struct
  7139. *
  7140. * Return value:
  7141. * none
  7142. **/
  7143. static void ipr_free_cmd_blks(struct ipr_ioa_cfg *ioa_cfg)
  7144. {
  7145. int i;
  7146. for (i = 0; i < IPR_NUM_CMD_BLKS; i++) {
  7147. if (ioa_cfg->ipr_cmnd_list[i])
  7148. pci_pool_free(ioa_cfg->ipr_cmd_pool,
  7149. ioa_cfg->ipr_cmnd_list[i],
  7150. ioa_cfg->ipr_cmnd_list_dma[i]);
  7151. ioa_cfg->ipr_cmnd_list[i] = NULL;
  7152. }
  7153. if (ioa_cfg->ipr_cmd_pool)
  7154. pci_pool_destroy (ioa_cfg->ipr_cmd_pool);
  7155. ioa_cfg->ipr_cmd_pool = NULL;
  7156. }
  7157. /**
  7158. * ipr_free_mem - Frees memory allocated for an adapter
  7159. * @ioa_cfg: ioa cfg struct
  7160. *
  7161. * Return value:
  7162. * nothing
  7163. **/
  7164. static void ipr_free_mem(struct ipr_ioa_cfg *ioa_cfg)
  7165. {
  7166. int i;
  7167. kfree(ioa_cfg->res_entries);
  7168. pci_free_consistent(ioa_cfg->pdev, sizeof(struct ipr_misc_cbs),
  7169. ioa_cfg->vpd_cbs, ioa_cfg->vpd_cbs_dma);
  7170. ipr_free_cmd_blks(ioa_cfg);
  7171. pci_free_consistent(ioa_cfg->pdev, sizeof(u32) * IPR_NUM_CMD_BLKS,
  7172. ioa_cfg->host_rrq, ioa_cfg->host_rrq_dma);
  7173. pci_free_consistent(ioa_cfg->pdev, ioa_cfg->cfg_table_size,
  7174. ioa_cfg->u.cfg_table,
  7175. ioa_cfg->cfg_table_dma);
  7176. for (i = 0; i < IPR_NUM_HCAMS; i++) {
  7177. pci_free_consistent(ioa_cfg->pdev,
  7178. sizeof(struct ipr_hostrcb),
  7179. ioa_cfg->hostrcb[i],
  7180. ioa_cfg->hostrcb_dma[i]);
  7181. }
  7182. ipr_free_dump(ioa_cfg);
  7183. kfree(ioa_cfg->trace);
  7184. }
  7185. /**
  7186. * ipr_free_all_resources - Free all allocated resources for an adapter.
  7187. * @ipr_cmd: ipr command struct
  7188. *
  7189. * This function frees all allocated resources for the
  7190. * specified adapter.
  7191. *
  7192. * Return value:
  7193. * none
  7194. **/
  7195. static void ipr_free_all_resources(struct ipr_ioa_cfg *ioa_cfg)
  7196. {
  7197. struct pci_dev *pdev = ioa_cfg->pdev;
  7198. ENTER;
  7199. free_irq(pdev->irq, ioa_cfg);
  7200. pci_disable_msi(pdev);
  7201. iounmap(ioa_cfg->hdw_dma_regs);
  7202. pci_release_regions(pdev);
  7203. ipr_free_mem(ioa_cfg);
  7204. scsi_host_put(ioa_cfg->host);
  7205. pci_disable_device(pdev);
  7206. LEAVE;
  7207. }
  7208. /**
  7209. * ipr_alloc_cmd_blks - Allocate command blocks for an adapter
  7210. * @ioa_cfg: ioa config struct
  7211. *
  7212. * Return value:
  7213. * 0 on success / -ENOMEM on allocation failure
  7214. **/
  7215. static int __devinit ipr_alloc_cmd_blks(struct ipr_ioa_cfg *ioa_cfg)
  7216. {
  7217. struct ipr_cmnd *ipr_cmd;
  7218. struct ipr_ioarcb *ioarcb;
  7219. dma_addr_t dma_addr;
  7220. int i;
  7221. ioa_cfg->ipr_cmd_pool = pci_pool_create (IPR_NAME, ioa_cfg->pdev,
  7222. sizeof(struct ipr_cmnd), 16, 0);
  7223. if (!ioa_cfg->ipr_cmd_pool)
  7224. return -ENOMEM;
  7225. for (i = 0; i < IPR_NUM_CMD_BLKS; i++) {
  7226. ipr_cmd = pci_pool_alloc (ioa_cfg->ipr_cmd_pool, GFP_KERNEL, &dma_addr);
  7227. if (!ipr_cmd) {
  7228. ipr_free_cmd_blks(ioa_cfg);
  7229. return -ENOMEM;
  7230. }
  7231. memset(ipr_cmd, 0, sizeof(*ipr_cmd));
  7232. ioa_cfg->ipr_cmnd_list[i] = ipr_cmd;
  7233. ioa_cfg->ipr_cmnd_list_dma[i] = dma_addr;
  7234. ioarcb = &ipr_cmd->ioarcb;
  7235. ipr_cmd->dma_addr = dma_addr;
  7236. if (ioa_cfg->sis64)
  7237. ioarcb->a.ioarcb_host_pci_addr64 = cpu_to_be64(dma_addr);
  7238. else
  7239. ioarcb->a.ioarcb_host_pci_addr = cpu_to_be32(dma_addr);
  7240. ioarcb->host_response_handle = cpu_to_be32(i << 2);
  7241. if (ioa_cfg->sis64) {
  7242. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  7243. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ioadl64));
  7244. ioarcb->u.sis64_addr_data.ioasa_host_pci_addr =
  7245. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, s.ioasa64));
  7246. } else {
  7247. ioarcb->write_ioadl_addr =
  7248. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, i.ioadl));
  7249. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  7250. ioarcb->ioasa_host_pci_addr =
  7251. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, s.ioasa));
  7252. }
  7253. ioarcb->ioasa_len = cpu_to_be16(sizeof(struct ipr_ioasa));
  7254. ipr_cmd->cmd_index = i;
  7255. ipr_cmd->ioa_cfg = ioa_cfg;
  7256. ipr_cmd->sense_buffer_dma = dma_addr +
  7257. offsetof(struct ipr_cmnd, sense_buffer);
  7258. list_add_tail(&ipr_cmd->queue, &ioa_cfg->free_q);
  7259. }
  7260. return 0;
  7261. }
  7262. /**
  7263. * ipr_alloc_mem - Allocate memory for an adapter
  7264. * @ioa_cfg: ioa config struct
  7265. *
  7266. * Return value:
  7267. * 0 on success / non-zero for error
  7268. **/
  7269. static int __devinit ipr_alloc_mem(struct ipr_ioa_cfg *ioa_cfg)
  7270. {
  7271. struct pci_dev *pdev = ioa_cfg->pdev;
  7272. int i, rc = -ENOMEM;
  7273. ENTER;
  7274. ioa_cfg->res_entries = kzalloc(sizeof(struct ipr_resource_entry) *
  7275. ioa_cfg->max_devs_supported, GFP_KERNEL);
  7276. if (!ioa_cfg->res_entries)
  7277. goto out;
  7278. if (ioa_cfg->sis64) {
  7279. ioa_cfg->target_ids = kzalloc(sizeof(unsigned long) *
  7280. BITS_TO_LONGS(ioa_cfg->max_devs_supported), GFP_KERNEL);
  7281. ioa_cfg->array_ids = kzalloc(sizeof(unsigned long) *
  7282. BITS_TO_LONGS(ioa_cfg->max_devs_supported), GFP_KERNEL);
  7283. ioa_cfg->vset_ids = kzalloc(sizeof(unsigned long) *
  7284. BITS_TO_LONGS(ioa_cfg->max_devs_supported), GFP_KERNEL);
  7285. }
  7286. for (i = 0; i < ioa_cfg->max_devs_supported; i++) {
  7287. list_add_tail(&ioa_cfg->res_entries[i].queue, &ioa_cfg->free_res_q);
  7288. ioa_cfg->res_entries[i].ioa_cfg = ioa_cfg;
  7289. }
  7290. ioa_cfg->vpd_cbs = pci_alloc_consistent(ioa_cfg->pdev,
  7291. sizeof(struct ipr_misc_cbs),
  7292. &ioa_cfg->vpd_cbs_dma);
  7293. if (!ioa_cfg->vpd_cbs)
  7294. goto out_free_res_entries;
  7295. if (ipr_alloc_cmd_blks(ioa_cfg))
  7296. goto out_free_vpd_cbs;
  7297. ioa_cfg->host_rrq = pci_alloc_consistent(ioa_cfg->pdev,
  7298. sizeof(u32) * IPR_NUM_CMD_BLKS,
  7299. &ioa_cfg->host_rrq_dma);
  7300. if (!ioa_cfg->host_rrq)
  7301. goto out_ipr_free_cmd_blocks;
  7302. ioa_cfg->u.cfg_table = pci_alloc_consistent(ioa_cfg->pdev,
  7303. ioa_cfg->cfg_table_size,
  7304. &ioa_cfg->cfg_table_dma);
  7305. if (!ioa_cfg->u.cfg_table)
  7306. goto out_free_host_rrq;
  7307. for (i = 0; i < IPR_NUM_HCAMS; i++) {
  7308. ioa_cfg->hostrcb[i] = pci_alloc_consistent(ioa_cfg->pdev,
  7309. sizeof(struct ipr_hostrcb),
  7310. &ioa_cfg->hostrcb_dma[i]);
  7311. if (!ioa_cfg->hostrcb[i])
  7312. goto out_free_hostrcb_dma;
  7313. ioa_cfg->hostrcb[i]->hostrcb_dma =
  7314. ioa_cfg->hostrcb_dma[i] + offsetof(struct ipr_hostrcb, hcam);
  7315. ioa_cfg->hostrcb[i]->ioa_cfg = ioa_cfg;
  7316. list_add_tail(&ioa_cfg->hostrcb[i]->queue, &ioa_cfg->hostrcb_free_q);
  7317. }
  7318. ioa_cfg->trace = kzalloc(sizeof(struct ipr_trace_entry) *
  7319. IPR_NUM_TRACE_ENTRIES, GFP_KERNEL);
  7320. if (!ioa_cfg->trace)
  7321. goto out_free_hostrcb_dma;
  7322. rc = 0;
  7323. out:
  7324. LEAVE;
  7325. return rc;
  7326. out_free_hostrcb_dma:
  7327. while (i-- > 0) {
  7328. pci_free_consistent(pdev, sizeof(struct ipr_hostrcb),
  7329. ioa_cfg->hostrcb[i],
  7330. ioa_cfg->hostrcb_dma[i]);
  7331. }
  7332. pci_free_consistent(pdev, ioa_cfg->cfg_table_size,
  7333. ioa_cfg->u.cfg_table,
  7334. ioa_cfg->cfg_table_dma);
  7335. out_free_host_rrq:
  7336. pci_free_consistent(pdev, sizeof(u32) * IPR_NUM_CMD_BLKS,
  7337. ioa_cfg->host_rrq, ioa_cfg->host_rrq_dma);
  7338. out_ipr_free_cmd_blocks:
  7339. ipr_free_cmd_blks(ioa_cfg);
  7340. out_free_vpd_cbs:
  7341. pci_free_consistent(pdev, sizeof(struct ipr_misc_cbs),
  7342. ioa_cfg->vpd_cbs, ioa_cfg->vpd_cbs_dma);
  7343. out_free_res_entries:
  7344. kfree(ioa_cfg->res_entries);
  7345. goto out;
  7346. }
  7347. /**
  7348. * ipr_initialize_bus_attr - Initialize SCSI bus attributes to default values
  7349. * @ioa_cfg: ioa config struct
  7350. *
  7351. * Return value:
  7352. * none
  7353. **/
  7354. static void __devinit ipr_initialize_bus_attr(struct ipr_ioa_cfg *ioa_cfg)
  7355. {
  7356. int i;
  7357. for (i = 0; i < IPR_MAX_NUM_BUSES; i++) {
  7358. ioa_cfg->bus_attr[i].bus = i;
  7359. ioa_cfg->bus_attr[i].qas_enabled = 0;
  7360. ioa_cfg->bus_attr[i].bus_width = IPR_DEFAULT_BUS_WIDTH;
  7361. if (ipr_max_speed < ARRAY_SIZE(ipr_max_bus_speeds))
  7362. ioa_cfg->bus_attr[i].max_xfer_rate = ipr_max_bus_speeds[ipr_max_speed];
  7363. else
  7364. ioa_cfg->bus_attr[i].max_xfer_rate = IPR_U160_SCSI_RATE;
  7365. }
  7366. }
  7367. /**
  7368. * ipr_init_ioa_cfg - Initialize IOA config struct
  7369. * @ioa_cfg: ioa config struct
  7370. * @host: scsi host struct
  7371. * @pdev: PCI dev struct
  7372. *
  7373. * Return value:
  7374. * none
  7375. **/
  7376. static void __devinit ipr_init_ioa_cfg(struct ipr_ioa_cfg *ioa_cfg,
  7377. struct Scsi_Host *host, struct pci_dev *pdev)
  7378. {
  7379. const struct ipr_interrupt_offsets *p;
  7380. struct ipr_interrupts *t;
  7381. void __iomem *base;
  7382. ioa_cfg->host = host;
  7383. ioa_cfg->pdev = pdev;
  7384. ioa_cfg->log_level = ipr_log_level;
  7385. ioa_cfg->doorbell = IPR_DOORBELL;
  7386. sprintf(ioa_cfg->eye_catcher, IPR_EYECATCHER);
  7387. sprintf(ioa_cfg->trace_start, IPR_TRACE_START_LABEL);
  7388. sprintf(ioa_cfg->ipr_free_label, IPR_FREEQ_LABEL);
  7389. sprintf(ioa_cfg->ipr_pending_label, IPR_PENDQ_LABEL);
  7390. sprintf(ioa_cfg->cfg_table_start, IPR_CFG_TBL_START);
  7391. sprintf(ioa_cfg->resource_table_label, IPR_RES_TABLE_LABEL);
  7392. sprintf(ioa_cfg->ipr_hcam_label, IPR_HCAM_LABEL);
  7393. sprintf(ioa_cfg->ipr_cmd_label, IPR_CMD_LABEL);
  7394. INIT_LIST_HEAD(&ioa_cfg->free_q);
  7395. INIT_LIST_HEAD(&ioa_cfg->pending_q);
  7396. INIT_LIST_HEAD(&ioa_cfg->hostrcb_free_q);
  7397. INIT_LIST_HEAD(&ioa_cfg->hostrcb_pending_q);
  7398. INIT_LIST_HEAD(&ioa_cfg->free_res_q);
  7399. INIT_LIST_HEAD(&ioa_cfg->used_res_q);
  7400. INIT_WORK(&ioa_cfg->work_q, ipr_worker_thread);
  7401. init_waitqueue_head(&ioa_cfg->reset_wait_q);
  7402. init_waitqueue_head(&ioa_cfg->msi_wait_q);
  7403. ioa_cfg->sdt_state = INACTIVE;
  7404. ipr_initialize_bus_attr(ioa_cfg);
  7405. ioa_cfg->max_devs_supported = ipr_max_devs;
  7406. if (ioa_cfg->sis64) {
  7407. host->max_id = IPR_MAX_SIS64_TARGETS_PER_BUS;
  7408. host->max_lun = IPR_MAX_SIS64_LUNS_PER_TARGET;
  7409. if (ipr_max_devs > IPR_MAX_SIS64_DEVS)
  7410. ioa_cfg->max_devs_supported = IPR_MAX_SIS64_DEVS;
  7411. } else {
  7412. host->max_id = IPR_MAX_NUM_TARGETS_PER_BUS;
  7413. host->max_lun = IPR_MAX_NUM_LUNS_PER_TARGET;
  7414. if (ipr_max_devs > IPR_MAX_PHYSICAL_DEVS)
  7415. ioa_cfg->max_devs_supported = IPR_MAX_PHYSICAL_DEVS;
  7416. }
  7417. host->max_channel = IPR_MAX_BUS_TO_SCAN;
  7418. host->unique_id = host->host_no;
  7419. host->max_cmd_len = IPR_MAX_CDB_LEN;
  7420. pci_set_drvdata(pdev, ioa_cfg);
  7421. p = &ioa_cfg->chip_cfg->regs;
  7422. t = &ioa_cfg->regs;
  7423. base = ioa_cfg->hdw_dma_regs;
  7424. t->set_interrupt_mask_reg = base + p->set_interrupt_mask_reg;
  7425. t->clr_interrupt_mask_reg = base + p->clr_interrupt_mask_reg;
  7426. t->clr_interrupt_mask_reg32 = base + p->clr_interrupt_mask_reg32;
  7427. t->sense_interrupt_mask_reg = base + p->sense_interrupt_mask_reg;
  7428. t->sense_interrupt_mask_reg32 = base + p->sense_interrupt_mask_reg32;
  7429. t->clr_interrupt_reg = base + p->clr_interrupt_reg;
  7430. t->clr_interrupt_reg32 = base + p->clr_interrupt_reg32;
  7431. t->sense_interrupt_reg = base + p->sense_interrupt_reg;
  7432. t->sense_interrupt_reg32 = base + p->sense_interrupt_reg32;
  7433. t->ioarrin_reg = base + p->ioarrin_reg;
  7434. t->sense_uproc_interrupt_reg = base + p->sense_uproc_interrupt_reg;
  7435. t->sense_uproc_interrupt_reg32 = base + p->sense_uproc_interrupt_reg32;
  7436. t->set_uproc_interrupt_reg = base + p->set_uproc_interrupt_reg;
  7437. t->set_uproc_interrupt_reg32 = base + p->set_uproc_interrupt_reg32;
  7438. t->clr_uproc_interrupt_reg = base + p->clr_uproc_interrupt_reg;
  7439. t->clr_uproc_interrupt_reg32 = base + p->clr_uproc_interrupt_reg32;
  7440. if (ioa_cfg->sis64) {
  7441. t->init_feedback_reg = base + p->init_feedback_reg;
  7442. t->dump_addr_reg = base + p->dump_addr_reg;
  7443. t->dump_data_reg = base + p->dump_data_reg;
  7444. t->endian_swap_reg = base + p->endian_swap_reg;
  7445. }
  7446. }
  7447. /**
  7448. * ipr_get_chip_info - Find adapter chip information
  7449. * @dev_id: PCI device id struct
  7450. *
  7451. * Return value:
  7452. * ptr to chip information on success / NULL on failure
  7453. **/
  7454. static const struct ipr_chip_t * __devinit
  7455. ipr_get_chip_info(const struct pci_device_id *dev_id)
  7456. {
  7457. int i;
  7458. for (i = 0; i < ARRAY_SIZE(ipr_chip); i++)
  7459. if (ipr_chip[i].vendor == dev_id->vendor &&
  7460. ipr_chip[i].device == dev_id->device)
  7461. return &ipr_chip[i];
  7462. return NULL;
  7463. }
  7464. /**
  7465. * ipr_test_intr - Handle the interrupt generated in ipr_test_msi().
  7466. * @pdev: PCI device struct
  7467. *
  7468. * Description: Simply set the msi_received flag to 1 indicating that
  7469. * Message Signaled Interrupts are supported.
  7470. *
  7471. * Return value:
  7472. * 0 on success / non-zero on failure
  7473. **/
  7474. static irqreturn_t __devinit ipr_test_intr(int irq, void *devp)
  7475. {
  7476. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)devp;
  7477. unsigned long lock_flags = 0;
  7478. irqreturn_t rc = IRQ_HANDLED;
  7479. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  7480. ioa_cfg->msi_received = 1;
  7481. wake_up(&ioa_cfg->msi_wait_q);
  7482. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  7483. return rc;
  7484. }
  7485. /**
  7486. * ipr_test_msi - Test for Message Signaled Interrupt (MSI) support.
  7487. * @pdev: PCI device struct
  7488. *
  7489. * Description: The return value from pci_enable_msi() can not always be
  7490. * trusted. This routine sets up and initiates a test interrupt to determine
  7491. * if the interrupt is received via the ipr_test_intr() service routine.
  7492. * If the tests fails, the driver will fall back to LSI.
  7493. *
  7494. * Return value:
  7495. * 0 on success / non-zero on failure
  7496. **/
  7497. static int __devinit ipr_test_msi(struct ipr_ioa_cfg *ioa_cfg,
  7498. struct pci_dev *pdev)
  7499. {
  7500. int rc;
  7501. volatile u32 int_reg;
  7502. unsigned long lock_flags = 0;
  7503. ENTER;
  7504. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  7505. init_waitqueue_head(&ioa_cfg->msi_wait_q);
  7506. ioa_cfg->msi_received = 0;
  7507. ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
  7508. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE, ioa_cfg->regs.clr_interrupt_mask_reg32);
  7509. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  7510. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  7511. rc = request_irq(pdev->irq, ipr_test_intr, 0, IPR_NAME, ioa_cfg);
  7512. if (rc) {
  7513. dev_err(&pdev->dev, "Can not assign irq %d\n", pdev->irq);
  7514. return rc;
  7515. } else if (ipr_debug)
  7516. dev_info(&pdev->dev, "IRQ assigned: %d\n", pdev->irq);
  7517. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE, ioa_cfg->regs.sense_interrupt_reg32);
  7518. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  7519. wait_event_timeout(ioa_cfg->msi_wait_q, ioa_cfg->msi_received, HZ);
  7520. ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
  7521. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  7522. if (!ioa_cfg->msi_received) {
  7523. /* MSI test failed */
  7524. dev_info(&pdev->dev, "MSI test failed. Falling back to LSI.\n");
  7525. rc = -EOPNOTSUPP;
  7526. } else if (ipr_debug)
  7527. dev_info(&pdev->dev, "MSI test succeeded.\n");
  7528. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  7529. free_irq(pdev->irq, ioa_cfg);
  7530. LEAVE;
  7531. return rc;
  7532. }
  7533. /**
  7534. * ipr_probe_ioa - Allocates memory and does first stage of initialization
  7535. * @pdev: PCI device struct
  7536. * @dev_id: PCI device id struct
  7537. *
  7538. * Return value:
  7539. * 0 on success / non-zero on failure
  7540. **/
  7541. static int __devinit ipr_probe_ioa(struct pci_dev *pdev,
  7542. const struct pci_device_id *dev_id)
  7543. {
  7544. struct ipr_ioa_cfg *ioa_cfg;
  7545. struct Scsi_Host *host;
  7546. unsigned long ipr_regs_pci;
  7547. void __iomem *ipr_regs;
  7548. int rc = PCIBIOS_SUCCESSFUL;
  7549. volatile u32 mask, uproc, interrupts;
  7550. ENTER;
  7551. if ((rc = pci_enable_device(pdev))) {
  7552. dev_err(&pdev->dev, "Cannot enable adapter\n");
  7553. goto out;
  7554. }
  7555. dev_info(&pdev->dev, "Found IOA with IRQ: %d\n", pdev->irq);
  7556. host = scsi_host_alloc(&driver_template, sizeof(*ioa_cfg));
  7557. if (!host) {
  7558. dev_err(&pdev->dev, "call to scsi_host_alloc failed!\n");
  7559. rc = -ENOMEM;
  7560. goto out_disable;
  7561. }
  7562. ioa_cfg = (struct ipr_ioa_cfg *)host->hostdata;
  7563. memset(ioa_cfg, 0, sizeof(struct ipr_ioa_cfg));
  7564. ata_host_init(&ioa_cfg->ata_host, &pdev->dev,
  7565. sata_port_info.flags, &ipr_sata_ops);
  7566. ioa_cfg->ipr_chip = ipr_get_chip_info(dev_id);
  7567. if (!ioa_cfg->ipr_chip) {
  7568. dev_err(&pdev->dev, "Unknown adapter chipset 0x%04X 0x%04X\n",
  7569. dev_id->vendor, dev_id->device);
  7570. goto out_scsi_host_put;
  7571. }
  7572. /* set SIS 32 or SIS 64 */
  7573. ioa_cfg->sis64 = ioa_cfg->ipr_chip->sis_type == IPR_SIS64 ? 1 : 0;
  7574. ioa_cfg->chip_cfg = ioa_cfg->ipr_chip->cfg;
  7575. if (ipr_transop_timeout)
  7576. ioa_cfg->transop_timeout = ipr_transop_timeout;
  7577. else if (dev_id->driver_data & IPR_USE_LONG_TRANSOP_TIMEOUT)
  7578. ioa_cfg->transop_timeout = IPR_LONG_OPERATIONAL_TIMEOUT;
  7579. else
  7580. ioa_cfg->transop_timeout = IPR_OPERATIONAL_TIMEOUT;
  7581. ioa_cfg->revid = pdev->revision;
  7582. ipr_regs_pci = pci_resource_start(pdev, 0);
  7583. rc = pci_request_regions(pdev, IPR_NAME);
  7584. if (rc < 0) {
  7585. dev_err(&pdev->dev,
  7586. "Couldn't register memory range of registers\n");
  7587. goto out_scsi_host_put;
  7588. }
  7589. ipr_regs = pci_ioremap_bar(pdev, 0);
  7590. if (!ipr_regs) {
  7591. dev_err(&pdev->dev,
  7592. "Couldn't map memory range of registers\n");
  7593. rc = -ENOMEM;
  7594. goto out_release_regions;
  7595. }
  7596. ioa_cfg->hdw_dma_regs = ipr_regs;
  7597. ioa_cfg->hdw_dma_regs_pci = ipr_regs_pci;
  7598. ioa_cfg->ioa_mailbox = ioa_cfg->chip_cfg->mailbox + ipr_regs;
  7599. ipr_init_ioa_cfg(ioa_cfg, host, pdev);
  7600. pci_set_master(pdev);
  7601. if (ioa_cfg->sis64) {
  7602. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  7603. if (rc < 0) {
  7604. dev_dbg(&pdev->dev, "Failed to set 64 bit PCI DMA mask\n");
  7605. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  7606. }
  7607. } else
  7608. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  7609. if (rc < 0) {
  7610. dev_err(&pdev->dev, "Failed to set PCI DMA mask\n");
  7611. goto cleanup_nomem;
  7612. }
  7613. rc = pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
  7614. ioa_cfg->chip_cfg->cache_line_size);
  7615. if (rc != PCIBIOS_SUCCESSFUL) {
  7616. dev_err(&pdev->dev, "Write of cache line size failed\n");
  7617. rc = -EIO;
  7618. goto cleanup_nomem;
  7619. }
  7620. /* Enable MSI style interrupts if they are supported. */
  7621. if (ioa_cfg->ipr_chip->intr_type == IPR_USE_MSI && !pci_enable_msi(pdev)) {
  7622. rc = ipr_test_msi(ioa_cfg, pdev);
  7623. if (rc == -EOPNOTSUPP)
  7624. pci_disable_msi(pdev);
  7625. else if (rc)
  7626. goto out_msi_disable;
  7627. else
  7628. dev_info(&pdev->dev, "MSI enabled with IRQ: %d\n", pdev->irq);
  7629. } else if (ipr_debug)
  7630. dev_info(&pdev->dev, "Cannot enable MSI.\n");
  7631. /* Save away PCI config space for use following IOA reset */
  7632. rc = pci_save_state(pdev);
  7633. if (rc != PCIBIOS_SUCCESSFUL) {
  7634. dev_err(&pdev->dev, "Failed to save PCI config space\n");
  7635. rc = -EIO;
  7636. goto out_msi_disable;
  7637. }
  7638. if ((rc = ipr_save_pcix_cmd_reg(ioa_cfg)))
  7639. goto out_msi_disable;
  7640. if ((rc = ipr_set_pcix_cmd_reg(ioa_cfg)))
  7641. goto out_msi_disable;
  7642. if (ioa_cfg->sis64)
  7643. ioa_cfg->cfg_table_size = (sizeof(struct ipr_config_table_hdr64)
  7644. + ((sizeof(struct ipr_config_table_entry64)
  7645. * ioa_cfg->max_devs_supported)));
  7646. else
  7647. ioa_cfg->cfg_table_size = (sizeof(struct ipr_config_table_hdr)
  7648. + ((sizeof(struct ipr_config_table_entry)
  7649. * ioa_cfg->max_devs_supported)));
  7650. rc = ipr_alloc_mem(ioa_cfg);
  7651. if (rc < 0) {
  7652. dev_err(&pdev->dev,
  7653. "Couldn't allocate enough memory for device driver!\n");
  7654. goto out_msi_disable;
  7655. }
  7656. /*
  7657. * If HRRQ updated interrupt is not masked, or reset alert is set,
  7658. * the card is in an unknown state and needs a hard reset
  7659. */
  7660. mask = readl(ioa_cfg->regs.sense_interrupt_mask_reg32);
  7661. interrupts = readl(ioa_cfg->regs.sense_interrupt_reg32);
  7662. uproc = readl(ioa_cfg->regs.sense_uproc_interrupt_reg32);
  7663. if ((mask & IPR_PCII_HRRQ_UPDATED) == 0 || (uproc & IPR_UPROCI_RESET_ALERT))
  7664. ioa_cfg->needs_hard_reset = 1;
  7665. if ((interrupts & IPR_PCII_ERROR_INTERRUPTS) || reset_devices)
  7666. ioa_cfg->needs_hard_reset = 1;
  7667. if (interrupts & IPR_PCII_IOA_UNIT_CHECKED)
  7668. ioa_cfg->ioa_unit_checked = 1;
  7669. ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
  7670. rc = request_irq(pdev->irq, ipr_isr,
  7671. ioa_cfg->msi_received ? 0 : IRQF_SHARED,
  7672. IPR_NAME, ioa_cfg);
  7673. if (rc) {
  7674. dev_err(&pdev->dev, "Couldn't register IRQ %d! rc=%d\n",
  7675. pdev->irq, rc);
  7676. goto cleanup_nolog;
  7677. }
  7678. if ((dev_id->driver_data & IPR_USE_PCI_WARM_RESET) ||
  7679. (dev_id->device == PCI_DEVICE_ID_IBM_OBSIDIAN_E && !ioa_cfg->revid)) {
  7680. ioa_cfg->needs_warm_reset = 1;
  7681. ioa_cfg->reset = ipr_reset_slot_reset;
  7682. } else
  7683. ioa_cfg->reset = ipr_reset_start_bist;
  7684. spin_lock(&ipr_driver_lock);
  7685. list_add_tail(&ioa_cfg->queue, &ipr_ioa_head);
  7686. spin_unlock(&ipr_driver_lock);
  7687. LEAVE;
  7688. out:
  7689. return rc;
  7690. cleanup_nolog:
  7691. ipr_free_mem(ioa_cfg);
  7692. out_msi_disable:
  7693. pci_disable_msi(pdev);
  7694. cleanup_nomem:
  7695. iounmap(ipr_regs);
  7696. out_release_regions:
  7697. pci_release_regions(pdev);
  7698. out_scsi_host_put:
  7699. scsi_host_put(host);
  7700. out_disable:
  7701. pci_disable_device(pdev);
  7702. goto out;
  7703. }
  7704. /**
  7705. * ipr_scan_vsets - Scans for VSET devices
  7706. * @ioa_cfg: ioa config struct
  7707. *
  7708. * Description: Since the VSET resources do not follow SAM in that we can have
  7709. * sparse LUNs with no LUN 0, we have to scan for these ourselves.
  7710. *
  7711. * Return value:
  7712. * none
  7713. **/
  7714. static void ipr_scan_vsets(struct ipr_ioa_cfg *ioa_cfg)
  7715. {
  7716. int target, lun;
  7717. for (target = 0; target < IPR_MAX_NUM_TARGETS_PER_BUS; target++)
  7718. for (lun = 0; lun < IPR_MAX_NUM_VSET_LUNS_PER_TARGET; lun++ )
  7719. scsi_add_device(ioa_cfg->host, IPR_VSET_BUS, target, lun);
  7720. }
  7721. /**
  7722. * ipr_initiate_ioa_bringdown - Bring down an adapter
  7723. * @ioa_cfg: ioa config struct
  7724. * @shutdown_type: shutdown type
  7725. *
  7726. * Description: This function will initiate bringing down the adapter.
  7727. * This consists of issuing an IOA shutdown to the adapter
  7728. * to flush the cache, and running BIST.
  7729. * If the caller needs to wait on the completion of the reset,
  7730. * the caller must sleep on the reset_wait_q.
  7731. *
  7732. * Return value:
  7733. * none
  7734. **/
  7735. static void ipr_initiate_ioa_bringdown(struct ipr_ioa_cfg *ioa_cfg,
  7736. enum ipr_shutdown_type shutdown_type)
  7737. {
  7738. ENTER;
  7739. if (ioa_cfg->sdt_state == WAIT_FOR_DUMP)
  7740. ioa_cfg->sdt_state = ABORT_DUMP;
  7741. ioa_cfg->reset_retries = 0;
  7742. ioa_cfg->in_ioa_bringdown = 1;
  7743. ipr_initiate_ioa_reset(ioa_cfg, shutdown_type);
  7744. LEAVE;
  7745. }
  7746. /**
  7747. * __ipr_remove - Remove a single adapter
  7748. * @pdev: pci device struct
  7749. *
  7750. * Adapter hot plug remove entry point.
  7751. *
  7752. * Return value:
  7753. * none
  7754. **/
  7755. static void __ipr_remove(struct pci_dev *pdev)
  7756. {
  7757. unsigned long host_lock_flags = 0;
  7758. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  7759. ENTER;
  7760. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  7761. while(ioa_cfg->in_reset_reload) {
  7762. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  7763. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  7764. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  7765. }
  7766. ipr_initiate_ioa_bringdown(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  7767. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  7768. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  7769. flush_work_sync(&ioa_cfg->work_q);
  7770. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  7771. spin_lock(&ipr_driver_lock);
  7772. list_del(&ioa_cfg->queue);
  7773. spin_unlock(&ipr_driver_lock);
  7774. if (ioa_cfg->sdt_state == ABORT_DUMP)
  7775. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  7776. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  7777. ipr_free_all_resources(ioa_cfg);
  7778. LEAVE;
  7779. }
  7780. /**
  7781. * ipr_remove - IOA hot plug remove entry point
  7782. * @pdev: pci device struct
  7783. *
  7784. * Adapter hot plug remove entry point.
  7785. *
  7786. * Return value:
  7787. * none
  7788. **/
  7789. static void __devexit ipr_remove(struct pci_dev *pdev)
  7790. {
  7791. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  7792. ENTER;
  7793. ipr_remove_trace_file(&ioa_cfg->host->shost_dev.kobj,
  7794. &ipr_trace_attr);
  7795. ipr_remove_dump_file(&ioa_cfg->host->shost_dev.kobj,
  7796. &ipr_dump_attr);
  7797. scsi_remove_host(ioa_cfg->host);
  7798. __ipr_remove(pdev);
  7799. LEAVE;
  7800. }
  7801. /**
  7802. * ipr_probe - Adapter hot plug add entry point
  7803. *
  7804. * Return value:
  7805. * 0 on success / non-zero on failure
  7806. **/
  7807. static int __devinit ipr_probe(struct pci_dev *pdev,
  7808. const struct pci_device_id *dev_id)
  7809. {
  7810. struct ipr_ioa_cfg *ioa_cfg;
  7811. int rc;
  7812. rc = ipr_probe_ioa(pdev, dev_id);
  7813. if (rc)
  7814. return rc;
  7815. ioa_cfg = pci_get_drvdata(pdev);
  7816. rc = ipr_probe_ioa_part2(ioa_cfg);
  7817. if (rc) {
  7818. __ipr_remove(pdev);
  7819. return rc;
  7820. }
  7821. rc = scsi_add_host(ioa_cfg->host, &pdev->dev);
  7822. if (rc) {
  7823. __ipr_remove(pdev);
  7824. return rc;
  7825. }
  7826. rc = ipr_create_trace_file(&ioa_cfg->host->shost_dev.kobj,
  7827. &ipr_trace_attr);
  7828. if (rc) {
  7829. scsi_remove_host(ioa_cfg->host);
  7830. __ipr_remove(pdev);
  7831. return rc;
  7832. }
  7833. rc = ipr_create_dump_file(&ioa_cfg->host->shost_dev.kobj,
  7834. &ipr_dump_attr);
  7835. if (rc) {
  7836. ipr_remove_trace_file(&ioa_cfg->host->shost_dev.kobj,
  7837. &ipr_trace_attr);
  7838. scsi_remove_host(ioa_cfg->host);
  7839. __ipr_remove(pdev);
  7840. return rc;
  7841. }
  7842. scsi_scan_host(ioa_cfg->host);
  7843. ipr_scan_vsets(ioa_cfg);
  7844. scsi_add_device(ioa_cfg->host, IPR_IOA_BUS, IPR_IOA_TARGET, IPR_IOA_LUN);
  7845. ioa_cfg->allow_ml_add_del = 1;
  7846. ioa_cfg->host->max_channel = IPR_VSET_BUS;
  7847. schedule_work(&ioa_cfg->work_q);
  7848. return 0;
  7849. }
  7850. /**
  7851. * ipr_shutdown - Shutdown handler.
  7852. * @pdev: pci device struct
  7853. *
  7854. * This function is invoked upon system shutdown/reboot. It will issue
  7855. * an adapter shutdown to the adapter to flush the write cache.
  7856. *
  7857. * Return value:
  7858. * none
  7859. **/
  7860. static void ipr_shutdown(struct pci_dev *pdev)
  7861. {
  7862. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  7863. unsigned long lock_flags = 0;
  7864. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  7865. while(ioa_cfg->in_reset_reload) {
  7866. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  7867. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  7868. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  7869. }
  7870. ipr_initiate_ioa_bringdown(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  7871. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  7872. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  7873. }
  7874. static struct pci_device_id ipr_pci_table[] __devinitdata = {
  7875. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  7876. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_5702, 0, 0, 0 },
  7877. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  7878. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_5703, 0, 0, 0 },
  7879. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  7880. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_573D, 0, 0, 0 },
  7881. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  7882. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_573E, 0, 0, 0 },
  7883. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  7884. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571B, 0, 0, 0 },
  7885. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  7886. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572E, 0, 0, 0 },
  7887. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  7888. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571A, 0, 0, 0 },
  7889. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  7890. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_575B, 0, 0,
  7891. IPR_USE_LONG_TRANSOP_TIMEOUT },
  7892. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN,
  7893. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572A, 0, 0, 0 },
  7894. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN,
  7895. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572B, 0, 0,
  7896. IPR_USE_LONG_TRANSOP_TIMEOUT },
  7897. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN,
  7898. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_575C, 0, 0,
  7899. IPR_USE_LONG_TRANSOP_TIMEOUT },
  7900. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN,
  7901. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572A, 0, 0, 0 },
  7902. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN,
  7903. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572B, 0, 0,
  7904. IPR_USE_LONG_TRANSOP_TIMEOUT},
  7905. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN,
  7906. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_575C, 0, 0,
  7907. IPR_USE_LONG_TRANSOP_TIMEOUT },
  7908. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  7909. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_574E, 0, 0,
  7910. IPR_USE_LONG_TRANSOP_TIMEOUT },
  7911. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  7912. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B3, 0, 0, 0 },
  7913. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  7914. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57CC, 0, 0, 0 },
  7915. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  7916. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B7, 0, 0,
  7917. IPR_USE_LONG_TRANSOP_TIMEOUT | IPR_USE_PCI_WARM_RESET },
  7918. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_SNIPE,
  7919. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2780, 0, 0, 0 },
  7920. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP,
  7921. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571E, 0, 0, 0 },
  7922. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP,
  7923. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571F, 0, 0,
  7924. IPR_USE_LONG_TRANSOP_TIMEOUT },
  7925. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP,
  7926. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572F, 0, 0,
  7927. IPR_USE_LONG_TRANSOP_TIMEOUT },
  7928. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  7929. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B5, 0, 0, 0 },
  7930. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  7931. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_574D, 0, 0, 0 },
  7932. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  7933. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B2, 0, 0, 0 },
  7934. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  7935. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C3, 0, 0, 0 },
  7936. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  7937. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C4, 0, 0, 0 },
  7938. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_ASIC_E2,
  7939. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B4, 0, 0, 0 },
  7940. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_ASIC_E2,
  7941. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B1, 0, 0, 0 },
  7942. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_ASIC_E2,
  7943. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C6, 0, 0, 0 },
  7944. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_ASIC_E2,
  7945. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_575D, 0, 0, 0 },
  7946. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_ASIC_E2,
  7947. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57CE, 0, 0, 0 },
  7948. { }
  7949. };
  7950. MODULE_DEVICE_TABLE(pci, ipr_pci_table);
  7951. static struct pci_error_handlers ipr_err_handler = {
  7952. .error_detected = ipr_pci_error_detected,
  7953. .slot_reset = ipr_pci_slot_reset,
  7954. };
  7955. static struct pci_driver ipr_driver = {
  7956. .name = IPR_NAME,
  7957. .id_table = ipr_pci_table,
  7958. .probe = ipr_probe,
  7959. .remove = __devexit_p(ipr_remove),
  7960. .shutdown = ipr_shutdown,
  7961. .err_handler = &ipr_err_handler,
  7962. };
  7963. /**
  7964. * ipr_halt_done - Shutdown prepare completion
  7965. *
  7966. * Return value:
  7967. * none
  7968. **/
  7969. static void ipr_halt_done(struct ipr_cmnd *ipr_cmd)
  7970. {
  7971. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7972. list_add_tail(&ipr_cmd->queue, &ioa_cfg->free_q);
  7973. }
  7974. /**
  7975. * ipr_halt - Issue shutdown prepare to all adapters
  7976. *
  7977. * Return value:
  7978. * NOTIFY_OK on success / NOTIFY_DONE on failure
  7979. **/
  7980. static int ipr_halt(struct notifier_block *nb, ulong event, void *buf)
  7981. {
  7982. struct ipr_cmnd *ipr_cmd;
  7983. struct ipr_ioa_cfg *ioa_cfg;
  7984. unsigned long flags = 0;
  7985. if (event != SYS_RESTART && event != SYS_HALT && event != SYS_POWER_OFF)
  7986. return NOTIFY_DONE;
  7987. spin_lock(&ipr_driver_lock);
  7988. list_for_each_entry(ioa_cfg, &ipr_ioa_head, queue) {
  7989. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  7990. if (!ioa_cfg->allow_cmds) {
  7991. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  7992. continue;
  7993. }
  7994. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  7995. ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  7996. ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  7997. ipr_cmd->ioarcb.cmd_pkt.cdb[0] = IPR_IOA_SHUTDOWN;
  7998. ipr_cmd->ioarcb.cmd_pkt.cdb[1] = IPR_SHUTDOWN_PREPARE_FOR_NORMAL;
  7999. ipr_do_req(ipr_cmd, ipr_halt_done, ipr_timeout, IPR_DEVICE_RESET_TIMEOUT);
  8000. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  8001. }
  8002. spin_unlock(&ipr_driver_lock);
  8003. return NOTIFY_OK;
  8004. }
  8005. static struct notifier_block ipr_notifier = {
  8006. ipr_halt, NULL, 0
  8007. };
  8008. /**
  8009. * ipr_init - Module entry point
  8010. *
  8011. * Return value:
  8012. * 0 on success / negative value on failure
  8013. **/
  8014. static int __init ipr_init(void)
  8015. {
  8016. ipr_info("IBM Power RAID SCSI Device Driver version: %s %s\n",
  8017. IPR_DRIVER_VERSION, IPR_DRIVER_DATE);
  8018. register_reboot_notifier(&ipr_notifier);
  8019. return pci_register_driver(&ipr_driver);
  8020. }
  8021. /**
  8022. * ipr_exit - Module unload
  8023. *
  8024. * Module unload entry point.
  8025. *
  8026. * Return value:
  8027. * none
  8028. **/
  8029. static void __exit ipr_exit(void)
  8030. {
  8031. unregister_reboot_notifier(&ipr_notifier);
  8032. pci_unregister_driver(&ipr_driver);
  8033. }
  8034. module_init(ipr_init);
  8035. module_exit(ipr_exit);