qdio_main.c 45 KB

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  1. /*
  2. * linux/drivers/s390/cio/qdio_main.c
  3. *
  4. * Linux for s390 qdio support, buffer handling, qdio API and module support.
  5. *
  6. * Copyright 2000,2008 IBM Corp.
  7. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
  8. * Jan Glauber <jang@linux.vnet.ibm.com>
  9. * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
  10. */
  11. #include <linux/module.h>
  12. #include <linux/init.h>
  13. #include <linux/kernel.h>
  14. #include <linux/timer.h>
  15. #include <linux/delay.h>
  16. #include <linux/gfp.h>
  17. #include <linux/io.h>
  18. #include <linux/atomic.h>
  19. #include <asm/debug.h>
  20. #include <asm/qdio.h>
  21. #include "cio.h"
  22. #include "css.h"
  23. #include "device.h"
  24. #include "qdio.h"
  25. #include "qdio_debug.h"
  26. MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\
  27. "Jan Glauber <jang@linux.vnet.ibm.com>");
  28. MODULE_DESCRIPTION("QDIO base support");
  29. MODULE_LICENSE("GPL");
  30. static inline int do_siga_sync(unsigned long schid,
  31. unsigned int out_mask, unsigned int in_mask,
  32. unsigned int fc)
  33. {
  34. register unsigned long __fc asm ("0") = fc;
  35. register unsigned long __schid asm ("1") = schid;
  36. register unsigned long out asm ("2") = out_mask;
  37. register unsigned long in asm ("3") = in_mask;
  38. int cc;
  39. asm volatile(
  40. " siga 0\n"
  41. " ipm %0\n"
  42. " srl %0,28\n"
  43. : "=d" (cc)
  44. : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc");
  45. return cc;
  46. }
  47. static inline int do_siga_input(unsigned long schid, unsigned int mask,
  48. unsigned int fc)
  49. {
  50. register unsigned long __fc asm ("0") = fc;
  51. register unsigned long __schid asm ("1") = schid;
  52. register unsigned long __mask asm ("2") = mask;
  53. int cc;
  54. asm volatile(
  55. " siga 0\n"
  56. " ipm %0\n"
  57. " srl %0,28\n"
  58. : "=d" (cc)
  59. : "d" (__fc), "d" (__schid), "d" (__mask) : "cc", "memory");
  60. return cc;
  61. }
  62. /**
  63. * do_siga_output - perform SIGA-w/wt function
  64. * @schid: subchannel id or in case of QEBSM the subchannel token
  65. * @mask: which output queues to process
  66. * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer
  67. * @fc: function code to perform
  68. *
  69. * Returns cc or QDIO_ERROR_SIGA_ACCESS_EXCEPTION.
  70. * Note: For IQDC unicast queues only the highest priority queue is processed.
  71. */
  72. static inline int do_siga_output(unsigned long schid, unsigned long mask,
  73. unsigned int *bb, unsigned int fc,
  74. unsigned long aob)
  75. {
  76. register unsigned long __fc asm("0") = fc;
  77. register unsigned long __schid asm("1") = schid;
  78. register unsigned long __mask asm("2") = mask;
  79. register unsigned long __aob asm("3") = aob;
  80. int cc = QDIO_ERROR_SIGA_ACCESS_EXCEPTION;
  81. asm volatile(
  82. " siga 0\n"
  83. "0: ipm %0\n"
  84. " srl %0,28\n"
  85. "1:\n"
  86. EX_TABLE(0b, 1b)
  87. : "+d" (cc), "+d" (__fc), "+d" (__schid), "+d" (__mask),
  88. "+d" (__aob)
  89. : : "cc", "memory");
  90. *bb = ((unsigned int) __fc) >> 31;
  91. return cc;
  92. }
  93. static inline int qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
  94. {
  95. /* all done or next buffer state different */
  96. if (ccq == 0 || ccq == 32)
  97. return 0;
  98. /* no buffer processed */
  99. if (ccq == 97)
  100. return 1;
  101. /* not all buffers processed */
  102. if (ccq == 96)
  103. return 2;
  104. /* notify devices immediately */
  105. DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
  106. return -EIO;
  107. }
  108. /**
  109. * qdio_do_eqbs - extract buffer states for QEBSM
  110. * @q: queue to manipulate
  111. * @state: state of the extracted buffers
  112. * @start: buffer number to start at
  113. * @count: count of buffers to examine
  114. * @auto_ack: automatically acknowledge buffers
  115. *
  116. * Returns the number of successfully extracted equal buffer states.
  117. * Stops processing if a state is different from the last buffers state.
  118. */
  119. static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
  120. int start, int count, int auto_ack)
  121. {
  122. int rc, tmp_count = count, tmp_start = start, nr = q->nr, retried = 0;
  123. unsigned int ccq = 0;
  124. BUG_ON(!q->irq_ptr->sch_token);
  125. qperf_inc(q, eqbs);
  126. if (!q->is_input_q)
  127. nr += q->irq_ptr->nr_input_qs;
  128. again:
  129. ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count,
  130. auto_ack);
  131. rc = qdio_check_ccq(q, ccq);
  132. if (!rc)
  133. return count - tmp_count;
  134. if (rc == 1) {
  135. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq);
  136. goto again;
  137. }
  138. if (rc == 2) {
  139. BUG_ON(tmp_count == count);
  140. qperf_inc(q, eqbs_partial);
  141. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS part:%02x",
  142. tmp_count);
  143. /*
  144. * Retry once, if that fails bail out and process the
  145. * extracted buffers before trying again.
  146. */
  147. if (!retried++)
  148. goto again;
  149. else
  150. return count - tmp_count;
  151. }
  152. DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));
  153. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  154. q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  155. 0, -1, -1, q->irq_ptr->int_parm);
  156. return 0;
  157. }
  158. /**
  159. * qdio_do_sqbs - set buffer states for QEBSM
  160. * @q: queue to manipulate
  161. * @state: new state of the buffers
  162. * @start: first buffer number to change
  163. * @count: how many buffers to change
  164. *
  165. * Returns the number of successfully changed buffers.
  166. * Does retrying until the specified count of buffer states is set or an
  167. * error occurs.
  168. */
  169. static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start,
  170. int count)
  171. {
  172. unsigned int ccq = 0;
  173. int tmp_count = count, tmp_start = start;
  174. int nr = q->nr;
  175. int rc;
  176. if (!count)
  177. return 0;
  178. BUG_ON(!q->irq_ptr->sch_token);
  179. qperf_inc(q, sqbs);
  180. if (!q->is_input_q)
  181. nr += q->irq_ptr->nr_input_qs;
  182. again:
  183. ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count);
  184. rc = qdio_check_ccq(q, ccq);
  185. if (!rc) {
  186. WARN_ON(tmp_count);
  187. return count - tmp_count;
  188. }
  189. if (rc == 1 || rc == 2) {
  190. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq);
  191. qperf_inc(q, sqbs_partial);
  192. goto again;
  193. }
  194. DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));
  195. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  196. q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  197. 0, -1, -1, q->irq_ptr->int_parm);
  198. return 0;
  199. }
  200. /* returns number of examined buffers and their common state in *state */
  201. static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr,
  202. unsigned char *state, unsigned int count,
  203. int auto_ack, int merge_pending)
  204. {
  205. unsigned char __state = 0;
  206. int i;
  207. BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
  208. BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
  209. if (is_qebsm(q))
  210. return qdio_do_eqbs(q, state, bufnr, count, auto_ack);
  211. for (i = 0; i < count; i++) {
  212. if (!__state) {
  213. __state = q->slsb.val[bufnr];
  214. if (merge_pending && __state == SLSB_P_OUTPUT_PENDING)
  215. __state = SLSB_P_OUTPUT_EMPTY;
  216. } else if (merge_pending) {
  217. if ((q->slsb.val[bufnr] & __state) != __state)
  218. break;
  219. } else if (q->slsb.val[bufnr] != __state)
  220. break;
  221. bufnr = next_buf(bufnr);
  222. }
  223. *state = __state;
  224. return i;
  225. }
  226. static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr,
  227. unsigned char *state, int auto_ack)
  228. {
  229. return get_buf_states(q, bufnr, state, 1, auto_ack, 0);
  230. }
  231. /* wrap-around safe setting of slsb states, returns number of changed buffers */
  232. static inline int set_buf_states(struct qdio_q *q, int bufnr,
  233. unsigned char state, int count)
  234. {
  235. int i;
  236. BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
  237. BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
  238. if (is_qebsm(q))
  239. return qdio_do_sqbs(q, state, bufnr, count);
  240. for (i = 0; i < count; i++) {
  241. xchg(&q->slsb.val[bufnr], state);
  242. bufnr = next_buf(bufnr);
  243. }
  244. return count;
  245. }
  246. static inline int set_buf_state(struct qdio_q *q, int bufnr,
  247. unsigned char state)
  248. {
  249. return set_buf_states(q, bufnr, state, 1);
  250. }
  251. /* set slsb states to initial state */
  252. static void qdio_init_buf_states(struct qdio_irq *irq_ptr)
  253. {
  254. struct qdio_q *q;
  255. int i;
  256. for_each_input_queue(irq_ptr, q, i)
  257. set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT,
  258. QDIO_MAX_BUFFERS_PER_Q);
  259. for_each_output_queue(irq_ptr, q, i)
  260. set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT,
  261. QDIO_MAX_BUFFERS_PER_Q);
  262. }
  263. static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,
  264. unsigned int input)
  265. {
  266. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  267. unsigned int fc = QDIO_SIGA_SYNC;
  268. int cc;
  269. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr);
  270. qperf_inc(q, siga_sync);
  271. if (is_qebsm(q)) {
  272. schid = q->irq_ptr->sch_token;
  273. fc |= QDIO_SIGA_QEBSM_FLAG;
  274. }
  275. cc = do_siga_sync(schid, output, input, fc);
  276. if (unlikely(cc))
  277. DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc);
  278. return cc;
  279. }
  280. static inline int qdio_siga_sync_q(struct qdio_q *q)
  281. {
  282. if (q->is_input_q)
  283. return qdio_siga_sync(q, 0, q->mask);
  284. else
  285. return qdio_siga_sync(q, q->mask, 0);
  286. }
  287. static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit,
  288. unsigned long aob)
  289. {
  290. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  291. unsigned int fc = QDIO_SIGA_WRITE;
  292. u64 start_time = 0;
  293. int retries = 0, cc;
  294. unsigned long laob = 0;
  295. if (q->u.out.use_cq && aob != 0) {
  296. fc = QDIO_SIGA_WRITEQ;
  297. laob = aob;
  298. }
  299. if (is_qebsm(q)) {
  300. schid = q->irq_ptr->sch_token;
  301. fc |= QDIO_SIGA_QEBSM_FLAG;
  302. }
  303. again:
  304. WARN_ON_ONCE((aob && queue_type(q) != QDIO_IQDIO_QFMT) ||
  305. (aob && fc != QDIO_SIGA_WRITEQ));
  306. cc = do_siga_output(schid, q->mask, busy_bit, fc, laob);
  307. /* hipersocket busy condition */
  308. if (unlikely(*busy_bit)) {
  309. WARN_ON(queue_type(q) != QDIO_IQDIO_QFMT || cc != 2);
  310. retries++;
  311. if (!start_time) {
  312. start_time = get_clock();
  313. goto again;
  314. }
  315. if ((get_clock() - start_time) < QDIO_BUSY_BIT_PATIENCE)
  316. goto again;
  317. }
  318. if (retries) {
  319. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr,
  320. "%4x cc2 BB1:%1d", SCH_NO(q), q->nr);
  321. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "count:%u", retries);
  322. }
  323. return cc;
  324. }
  325. static inline int qdio_siga_input(struct qdio_q *q)
  326. {
  327. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  328. unsigned int fc = QDIO_SIGA_READ;
  329. int cc;
  330. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr);
  331. qperf_inc(q, siga_read);
  332. if (is_qebsm(q)) {
  333. schid = q->irq_ptr->sch_token;
  334. fc |= QDIO_SIGA_QEBSM_FLAG;
  335. }
  336. cc = do_siga_input(schid, q->mask, fc);
  337. if (unlikely(cc))
  338. DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc);
  339. return cc;
  340. }
  341. #define qdio_siga_sync_out(q) qdio_siga_sync(q, ~0U, 0)
  342. #define qdio_siga_sync_all(q) qdio_siga_sync(q, ~0U, ~0U)
  343. static inline void qdio_sync_queues(struct qdio_q *q)
  344. {
  345. /* PCI capable outbound queues will also be scanned so sync them too */
  346. if (pci_out_supported(q))
  347. qdio_siga_sync_all(q);
  348. else
  349. qdio_siga_sync_q(q);
  350. }
  351. int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
  352. unsigned char *state)
  353. {
  354. if (need_siga_sync(q))
  355. qdio_siga_sync_q(q);
  356. return get_buf_states(q, bufnr, state, 1, 0, 0);
  357. }
  358. static inline void qdio_stop_polling(struct qdio_q *q)
  359. {
  360. if (!q->u.in.polling)
  361. return;
  362. q->u.in.polling = 0;
  363. qperf_inc(q, stop_polling);
  364. /* show the card that we are not polling anymore */
  365. if (is_qebsm(q)) {
  366. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  367. q->u.in.ack_count);
  368. q->u.in.ack_count = 0;
  369. } else
  370. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  371. }
  372. static inline void account_sbals(struct qdio_q *q, int count)
  373. {
  374. int pos = 0;
  375. q->q_stats.nr_sbal_total += count;
  376. if (count == QDIO_MAX_BUFFERS_MASK) {
  377. q->q_stats.nr_sbals[7]++;
  378. return;
  379. }
  380. while (count >>= 1)
  381. pos++;
  382. q->q_stats.nr_sbals[pos]++;
  383. }
  384. static void process_buffer_error(struct qdio_q *q, int count)
  385. {
  386. unsigned char state = (q->is_input_q) ? SLSB_P_INPUT_NOT_INIT :
  387. SLSB_P_OUTPUT_NOT_INIT;
  388. q->qdio_error |= QDIO_ERROR_SLSB_STATE;
  389. /* special handling for no target buffer empty */
  390. if ((!q->is_input_q &&
  391. (q->sbal[q->first_to_check]->element[15].sflags) == 0x10)) {
  392. qperf_inc(q, target_full);
  393. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x",
  394. q->first_to_check);
  395. goto set;
  396. }
  397. DBF_ERROR("%4x BUF ERROR", SCH_NO(q));
  398. DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr);
  399. DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count);
  400. DBF_ERROR("F14:%2x F15:%2x",
  401. q->sbal[q->first_to_check]->element[14].sflags,
  402. q->sbal[q->first_to_check]->element[15].sflags);
  403. set:
  404. /*
  405. * Interrupts may be avoided as long as the error is present
  406. * so change the buffer state immediately to avoid starvation.
  407. */
  408. set_buf_states(q, q->first_to_check, state, count);
  409. }
  410. static inline void inbound_primed(struct qdio_q *q, int count)
  411. {
  412. int new;
  413. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim: %02x", count);
  414. /* for QEBSM the ACK was already set by EQBS */
  415. if (is_qebsm(q)) {
  416. if (!q->u.in.polling) {
  417. q->u.in.polling = 1;
  418. q->u.in.ack_count = count;
  419. q->u.in.ack_start = q->first_to_check;
  420. return;
  421. }
  422. /* delete the previous ACK's */
  423. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  424. q->u.in.ack_count);
  425. q->u.in.ack_count = count;
  426. q->u.in.ack_start = q->first_to_check;
  427. return;
  428. }
  429. /*
  430. * ACK the newest buffer. The ACK will be removed in qdio_stop_polling
  431. * or by the next inbound run.
  432. */
  433. new = add_buf(q->first_to_check, count - 1);
  434. if (q->u.in.polling) {
  435. /* reset the previous ACK but first set the new one */
  436. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  437. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  438. } else {
  439. q->u.in.polling = 1;
  440. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  441. }
  442. q->u.in.ack_start = new;
  443. count--;
  444. if (!count)
  445. return;
  446. /* need to change ALL buffers to get more interrupts */
  447. set_buf_states(q, q->first_to_check, SLSB_P_INPUT_NOT_INIT, count);
  448. }
  449. static int get_inbound_buffer_frontier(struct qdio_q *q)
  450. {
  451. int count, stop;
  452. unsigned char state = 0;
  453. q->timestamp = get_clock_fast();
  454. /*
  455. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  456. * would return 0.
  457. */
  458. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  459. stop = add_buf(q->first_to_check, count);
  460. if (q->first_to_check == stop)
  461. goto out;
  462. /*
  463. * No siga sync here, as a PCI or we after a thin interrupt
  464. * already sync'ed the queues.
  465. */
  466. count = get_buf_states(q, q->first_to_check, &state, count, 1, 0);
  467. if (!count)
  468. goto out;
  469. switch (state) {
  470. case SLSB_P_INPUT_PRIMED:
  471. inbound_primed(q, count);
  472. q->first_to_check = add_buf(q->first_to_check, count);
  473. if (atomic_sub(count, &q->nr_buf_used) == 0)
  474. qperf_inc(q, inbound_queue_full);
  475. if (q->irq_ptr->perf_stat_enabled)
  476. account_sbals(q, count);
  477. break;
  478. case SLSB_P_INPUT_ERROR:
  479. process_buffer_error(q, count);
  480. q->first_to_check = add_buf(q->first_to_check, count);
  481. atomic_sub(count, &q->nr_buf_used);
  482. if (q->irq_ptr->perf_stat_enabled)
  483. account_sbals_error(q, count);
  484. break;
  485. case SLSB_CU_INPUT_EMPTY:
  486. case SLSB_P_INPUT_NOT_INIT:
  487. case SLSB_P_INPUT_ACK:
  488. if (q->irq_ptr->perf_stat_enabled)
  489. q->q_stats.nr_sbal_nop++;
  490. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop");
  491. break;
  492. default:
  493. BUG();
  494. }
  495. out:
  496. return q->first_to_check;
  497. }
  498. static int qdio_inbound_q_moved(struct qdio_q *q)
  499. {
  500. int bufnr;
  501. bufnr = get_inbound_buffer_frontier(q);
  502. if ((bufnr != q->last_move) || q->qdio_error) {
  503. q->last_move = bufnr;
  504. if (!is_thinint_irq(q->irq_ptr) && MACHINE_IS_LPAR)
  505. q->u.in.timestamp = get_clock();
  506. return 1;
  507. } else
  508. return 0;
  509. }
  510. static inline int qdio_inbound_q_done(struct qdio_q *q)
  511. {
  512. unsigned char state = 0;
  513. if (!atomic_read(&q->nr_buf_used))
  514. return 1;
  515. if (need_siga_sync(q))
  516. qdio_siga_sync_q(q);
  517. get_buf_state(q, q->first_to_check, &state, 0);
  518. if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR)
  519. /* more work coming */
  520. return 0;
  521. if (is_thinint_irq(q->irq_ptr))
  522. return 1;
  523. /* don't poll under z/VM */
  524. if (MACHINE_IS_VM)
  525. return 1;
  526. /*
  527. * At this point we know, that inbound first_to_check
  528. * has (probably) not moved (see qdio_inbound_processing).
  529. */
  530. if (get_clock() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) {
  531. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%02x",
  532. q->first_to_check);
  533. return 1;
  534. } else
  535. return 0;
  536. }
  537. static inline int contains_aobs(struct qdio_q *q)
  538. {
  539. return !q->is_input_q && q->u.out.use_cq;
  540. }
  541. static inline void qdio_trace_aob(struct qdio_irq *irq, struct qdio_q *q,
  542. int i, struct qaob *aob)
  543. {
  544. int tmp;
  545. DBF_DEV_EVENT(DBF_INFO, irq, "AOB%d:%lx", i,
  546. (unsigned long) virt_to_phys(aob));
  547. DBF_DEV_EVENT(DBF_INFO, irq, "RES00:%lx",
  548. (unsigned long) aob->res0[0]);
  549. DBF_DEV_EVENT(DBF_INFO, irq, "RES01:%lx",
  550. (unsigned long) aob->res0[1]);
  551. DBF_DEV_EVENT(DBF_INFO, irq, "RES02:%lx",
  552. (unsigned long) aob->res0[2]);
  553. DBF_DEV_EVENT(DBF_INFO, irq, "RES03:%lx",
  554. (unsigned long) aob->res0[3]);
  555. DBF_DEV_EVENT(DBF_INFO, irq, "RES04:%lx",
  556. (unsigned long) aob->res0[4]);
  557. DBF_DEV_EVENT(DBF_INFO, irq, "RES05:%lx",
  558. (unsigned long) aob->res0[5]);
  559. DBF_DEV_EVENT(DBF_INFO, irq, "RES1:%x", aob->res1);
  560. DBF_DEV_EVENT(DBF_INFO, irq, "RES2:%x", aob->res2);
  561. DBF_DEV_EVENT(DBF_INFO, irq, "RES3:%x", aob->res3);
  562. DBF_DEV_EVENT(DBF_INFO, irq, "AORC:%u", aob->aorc);
  563. DBF_DEV_EVENT(DBF_INFO, irq, "FLAGS:%u", aob->flags);
  564. DBF_DEV_EVENT(DBF_INFO, irq, "CBTBS:%u", aob->cbtbs);
  565. DBF_DEV_EVENT(DBF_INFO, irq, "SBC:%u", aob->sb_count);
  566. for (tmp = 0; tmp < QDIO_MAX_ELEMENTS_PER_BUFFER; ++tmp) {
  567. DBF_DEV_EVENT(DBF_INFO, irq, "SBA%d:%lx", tmp,
  568. (unsigned long) aob->sba[tmp]);
  569. DBF_DEV_EVENT(DBF_INFO, irq, "rSBA%d:%lx", tmp,
  570. (unsigned long) q->sbal[i]->element[tmp].addr);
  571. DBF_DEV_EVENT(DBF_INFO, irq, "DC%d:%u", tmp, aob->dcount[tmp]);
  572. DBF_DEV_EVENT(DBF_INFO, irq, "rDC%d:%u", tmp,
  573. q->sbal[i]->element[tmp].length);
  574. }
  575. DBF_DEV_EVENT(DBF_INFO, irq, "USER0:%lx", (unsigned long) aob->user0);
  576. for (tmp = 0; tmp < 2; ++tmp) {
  577. DBF_DEV_EVENT(DBF_INFO, irq, "RES4%d:%lx", tmp,
  578. (unsigned long) aob->res4[tmp]);
  579. }
  580. DBF_DEV_EVENT(DBF_INFO, irq, "USER1:%lx", (unsigned long) aob->user1);
  581. DBF_DEV_EVENT(DBF_INFO, irq, "USER2:%lx", (unsigned long) aob->user2);
  582. }
  583. static inline void qdio_handle_aobs(struct qdio_q *q, int start, int count)
  584. {
  585. unsigned char state = 0;
  586. int j, b = start;
  587. if (!contains_aobs(q))
  588. return;
  589. for (j = 0; j < count; ++j) {
  590. get_buf_state(q, b, &state, 0);
  591. if (state == SLSB_P_OUTPUT_PENDING) {
  592. struct qaob *aob = q->u.out.aobs[b];
  593. if (aob == NULL)
  594. continue;
  595. BUG_ON(q->u.out.sbal_state == NULL);
  596. q->u.out.sbal_state[b].flags |=
  597. QDIO_OUTBUF_STATE_FLAG_PENDING;
  598. q->u.out.aobs[b] = NULL;
  599. } else if (state == SLSB_P_OUTPUT_EMPTY) {
  600. BUG_ON(q->u.out.sbal_state == NULL);
  601. q->u.out.sbal_state[b].aob = NULL;
  602. }
  603. b = next_buf(b);
  604. }
  605. }
  606. static inline unsigned long qdio_aob_for_buffer(struct qdio_output_q *q,
  607. int bufnr)
  608. {
  609. unsigned long phys_aob = 0;
  610. if (!q->use_cq)
  611. goto out;
  612. if (!q->aobs[bufnr]) {
  613. struct qaob *aob = qdio_allocate_aob();
  614. q->aobs[bufnr] = aob;
  615. }
  616. if (q->aobs[bufnr]) {
  617. BUG_ON(q->sbal_state == NULL);
  618. q->sbal_state[bufnr].flags = QDIO_OUTBUF_STATE_FLAG_NONE;
  619. q->sbal_state[bufnr].aob = q->aobs[bufnr];
  620. q->aobs[bufnr]->user1 = (u64) q->sbal_state[bufnr].user;
  621. phys_aob = virt_to_phys(q->aobs[bufnr]);
  622. BUG_ON(phys_aob & 0xFF);
  623. }
  624. out:
  625. return phys_aob;
  626. }
  627. static void qdio_kick_handler(struct qdio_q *q)
  628. {
  629. int start = q->first_to_kick;
  630. int end = q->first_to_check;
  631. int count;
  632. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  633. return;
  634. count = sub_buf(end, start);
  635. if (q->is_input_q) {
  636. qperf_inc(q, inbound_handler);
  637. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count);
  638. } else {
  639. qperf_inc(q, outbound_handler);
  640. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x",
  641. start, count);
  642. }
  643. qdio_handle_aobs(q, start, count);
  644. q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count,
  645. q->irq_ptr->int_parm);
  646. /* for the next time */
  647. q->first_to_kick = end;
  648. q->qdio_error = 0;
  649. }
  650. static void __qdio_inbound_processing(struct qdio_q *q)
  651. {
  652. qperf_inc(q, tasklet_inbound);
  653. if (!qdio_inbound_q_moved(q))
  654. return;
  655. qdio_kick_handler(q);
  656. if (!qdio_inbound_q_done(q)) {
  657. /* means poll time is not yet over */
  658. qperf_inc(q, tasklet_inbound_resched);
  659. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
  660. tasklet_schedule(&q->tasklet);
  661. return;
  662. }
  663. }
  664. qdio_stop_polling(q);
  665. /*
  666. * We need to check again to not lose initiative after
  667. * resetting the ACK state.
  668. */
  669. if (!qdio_inbound_q_done(q)) {
  670. qperf_inc(q, tasklet_inbound_resched2);
  671. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
  672. tasklet_schedule(&q->tasklet);
  673. }
  674. }
  675. void qdio_inbound_processing(unsigned long data)
  676. {
  677. struct qdio_q *q = (struct qdio_q *)data;
  678. __qdio_inbound_processing(q);
  679. }
  680. static int get_outbound_buffer_frontier(struct qdio_q *q)
  681. {
  682. int count, stop;
  683. unsigned char state = 0;
  684. q->timestamp = get_clock_fast();
  685. if (need_siga_sync(q))
  686. if (((queue_type(q) != QDIO_IQDIO_QFMT) &&
  687. !pci_out_supported(q)) ||
  688. (queue_type(q) == QDIO_IQDIO_QFMT &&
  689. multicast_outbound(q)))
  690. qdio_siga_sync_q(q);
  691. /*
  692. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  693. * would return 0.
  694. */
  695. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  696. stop = add_buf(q->first_to_check, count);
  697. if (q->first_to_check == stop)
  698. goto out;
  699. count = get_buf_states(q, q->first_to_check, &state, count, 0, 1);
  700. if (!count)
  701. goto out;
  702. switch (state) {
  703. case SLSB_P_OUTPUT_PENDING:
  704. BUG();
  705. case SLSB_P_OUTPUT_EMPTY:
  706. /* the adapter got it */
  707. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr,
  708. "out empty:%1d %02x", q->nr, count);
  709. atomic_sub(count, &q->nr_buf_used);
  710. q->first_to_check = add_buf(q->first_to_check, count);
  711. if (q->irq_ptr->perf_stat_enabled)
  712. account_sbals(q, count);
  713. break;
  714. case SLSB_P_OUTPUT_ERROR:
  715. process_buffer_error(q, count);
  716. q->first_to_check = add_buf(q->first_to_check, count);
  717. atomic_sub(count, &q->nr_buf_used);
  718. if (q->irq_ptr->perf_stat_enabled)
  719. account_sbals_error(q, count);
  720. break;
  721. case SLSB_CU_OUTPUT_PRIMED:
  722. /* the adapter has not fetched the output yet */
  723. if (q->irq_ptr->perf_stat_enabled)
  724. q->q_stats.nr_sbal_nop++;
  725. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d",
  726. q->nr);
  727. break;
  728. case SLSB_P_OUTPUT_NOT_INIT:
  729. case SLSB_P_OUTPUT_HALTED:
  730. break;
  731. default:
  732. BUG();
  733. }
  734. out:
  735. return q->first_to_check;
  736. }
  737. /* all buffers processed? */
  738. static inline int qdio_outbound_q_done(struct qdio_q *q)
  739. {
  740. return atomic_read(&q->nr_buf_used) == 0;
  741. }
  742. static inline int qdio_outbound_q_moved(struct qdio_q *q)
  743. {
  744. int bufnr;
  745. bufnr = get_outbound_buffer_frontier(q);
  746. if ((bufnr != q->last_move) || q->qdio_error) {
  747. q->last_move = bufnr;
  748. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr);
  749. return 1;
  750. } else
  751. return 0;
  752. }
  753. static int qdio_kick_outbound_q(struct qdio_q *q, unsigned long aob)
  754. {
  755. int retries = 0, cc;
  756. unsigned int busy_bit;
  757. if (!need_siga_out(q))
  758. return 0;
  759. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr);
  760. retry:
  761. qperf_inc(q, siga_write);
  762. cc = qdio_siga_output(q, &busy_bit, aob);
  763. switch (cc) {
  764. case 0:
  765. break;
  766. case 2:
  767. if (busy_bit) {
  768. while (++retries < QDIO_BUSY_BIT_RETRIES) {
  769. mdelay(QDIO_BUSY_BIT_RETRY_DELAY);
  770. goto retry;
  771. }
  772. DBF_ERROR("%4x cc2 BBC:%1d", SCH_NO(q), q->nr);
  773. cc |= QDIO_ERROR_SIGA_BUSY;
  774. } else
  775. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr);
  776. break;
  777. case 1:
  778. case 3:
  779. DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc);
  780. break;
  781. }
  782. if (retries) {
  783. DBF_ERROR("%4x cc2 BB2:%1d", SCH_NO(q), q->nr);
  784. DBF_ERROR("count:%u", retries);
  785. }
  786. return cc;
  787. }
  788. static void __qdio_outbound_processing(struct qdio_q *q)
  789. {
  790. qperf_inc(q, tasklet_outbound);
  791. BUG_ON(atomic_read(&q->nr_buf_used) < 0);
  792. if (qdio_outbound_q_moved(q))
  793. qdio_kick_handler(q);
  794. if (queue_type(q) == QDIO_ZFCP_QFMT)
  795. if (!pci_out_supported(q) && !qdio_outbound_q_done(q))
  796. goto sched;
  797. if (q->u.out.pci_out_enabled)
  798. return;
  799. /*
  800. * Now we know that queue type is either qeth without pci enabled
  801. * or HiperSockets. Make sure buffer switch from PRIMED to EMPTY
  802. * is noticed and outbound_handler is called after some time.
  803. */
  804. if (qdio_outbound_q_done(q))
  805. del_timer(&q->u.out.timer);
  806. else
  807. if (!timer_pending(&q->u.out.timer))
  808. mod_timer(&q->u.out.timer, jiffies + 10 * HZ);
  809. return;
  810. sched:
  811. if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  812. return;
  813. tasklet_schedule(&q->tasklet);
  814. }
  815. /* outbound tasklet */
  816. void qdio_outbound_processing(unsigned long data)
  817. {
  818. struct qdio_q *q = (struct qdio_q *)data;
  819. __qdio_outbound_processing(q);
  820. }
  821. void qdio_outbound_timer(unsigned long data)
  822. {
  823. struct qdio_q *q = (struct qdio_q *)data;
  824. if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  825. return;
  826. tasklet_schedule(&q->tasklet);
  827. }
  828. static inline void qdio_check_outbound_after_thinint(struct qdio_q *q)
  829. {
  830. struct qdio_q *out;
  831. int i;
  832. if (!pci_out_supported(q))
  833. return;
  834. for_each_output_queue(q->irq_ptr, out, i)
  835. if (!qdio_outbound_q_done(out))
  836. tasklet_schedule(&out->tasklet);
  837. }
  838. static void __tiqdio_inbound_processing(struct qdio_q *q)
  839. {
  840. qperf_inc(q, tasklet_inbound);
  841. if (need_siga_sync(q) && need_siga_sync_after_ai(q))
  842. qdio_sync_queues(q);
  843. /*
  844. * The interrupt could be caused by a PCI request. Check the
  845. * PCI capable outbound queues.
  846. */
  847. qdio_check_outbound_after_thinint(q);
  848. if (!qdio_inbound_q_moved(q))
  849. return;
  850. qdio_kick_handler(q);
  851. if (!qdio_inbound_q_done(q)) {
  852. qperf_inc(q, tasklet_inbound_resched);
  853. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
  854. tasklet_schedule(&q->tasklet);
  855. return;
  856. }
  857. }
  858. qdio_stop_polling(q);
  859. /*
  860. * We need to check again to not lose initiative after
  861. * resetting the ACK state.
  862. */
  863. if (!qdio_inbound_q_done(q)) {
  864. qperf_inc(q, tasklet_inbound_resched2);
  865. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
  866. tasklet_schedule(&q->tasklet);
  867. }
  868. }
  869. void tiqdio_inbound_processing(unsigned long data)
  870. {
  871. struct qdio_q *q = (struct qdio_q *)data;
  872. __tiqdio_inbound_processing(q);
  873. }
  874. static inline void qdio_set_state(struct qdio_irq *irq_ptr,
  875. enum qdio_irq_states state)
  876. {
  877. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state);
  878. irq_ptr->state = state;
  879. mb();
  880. }
  881. static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb)
  882. {
  883. if (irb->esw.esw0.erw.cons) {
  884. DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no);
  885. DBF_ERROR_HEX(irb, 64);
  886. DBF_ERROR_HEX(irb->ecw, 64);
  887. }
  888. }
  889. /* PCI interrupt handler */
  890. static void qdio_int_handler_pci(struct qdio_irq *irq_ptr)
  891. {
  892. int i;
  893. struct qdio_q *q;
  894. if (unlikely(irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  895. return;
  896. for_each_input_queue(irq_ptr, q, i) {
  897. if (q->u.in.queue_start_poll) {
  898. /* skip if polling is enabled or already in work */
  899. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  900. &q->u.in.queue_irq_state)) {
  901. qperf_inc(q, int_discarded);
  902. continue;
  903. }
  904. q->u.in.queue_start_poll(q->irq_ptr->cdev, q->nr,
  905. q->irq_ptr->int_parm);
  906. } else {
  907. tasklet_schedule(&q->tasklet);
  908. }
  909. }
  910. if (!pci_out_supported(q))
  911. return;
  912. for_each_output_queue(irq_ptr, q, i) {
  913. if (qdio_outbound_q_done(q))
  914. continue;
  915. if (need_siga_sync(q) && need_siga_sync_out_after_pci(q))
  916. qdio_siga_sync_q(q);
  917. tasklet_schedule(&q->tasklet);
  918. }
  919. }
  920. static void qdio_handle_activate_check(struct ccw_device *cdev,
  921. unsigned long intparm, int cstat, int dstat)
  922. {
  923. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  924. struct qdio_q *q;
  925. int count;
  926. DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no);
  927. DBF_ERROR("intp :%lx", intparm);
  928. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  929. if (irq_ptr->nr_input_qs) {
  930. q = irq_ptr->input_qs[0];
  931. } else if (irq_ptr->nr_output_qs) {
  932. q = irq_ptr->output_qs[0];
  933. } else {
  934. dump_stack();
  935. goto no_handler;
  936. }
  937. count = sub_buf(q->first_to_check, q->first_to_kick);
  938. q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  939. q->nr, q->first_to_kick, count, irq_ptr->int_parm);
  940. no_handler:
  941. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  942. }
  943. static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat,
  944. int dstat)
  945. {
  946. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  947. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq");
  948. if (cstat)
  949. goto error;
  950. if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END))
  951. goto error;
  952. if (!(dstat & DEV_STAT_DEV_END))
  953. goto error;
  954. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED);
  955. return;
  956. error:
  957. DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no);
  958. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  959. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  960. }
  961. /* qdio interrupt handler */
  962. void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
  963. struct irb *irb)
  964. {
  965. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  966. int cstat, dstat;
  967. if (!intparm || !irq_ptr) {
  968. DBF_ERROR("qint:%4x", cdev->private->schid.sch_no);
  969. return;
  970. }
  971. if (irq_ptr->perf_stat_enabled)
  972. irq_ptr->perf_stat.qdio_int++;
  973. if (IS_ERR(irb)) {
  974. switch (PTR_ERR(irb)) {
  975. case -EIO:
  976. DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no);
  977. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  978. wake_up(&cdev->private->wait_q);
  979. return;
  980. default:
  981. WARN_ON(1);
  982. return;
  983. }
  984. }
  985. qdio_irq_check_sense(irq_ptr, irb);
  986. cstat = irb->scsw.cmd.cstat;
  987. dstat = irb->scsw.cmd.dstat;
  988. switch (irq_ptr->state) {
  989. case QDIO_IRQ_STATE_INACTIVE:
  990. qdio_establish_handle_irq(cdev, cstat, dstat);
  991. break;
  992. case QDIO_IRQ_STATE_CLEANUP:
  993. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  994. break;
  995. case QDIO_IRQ_STATE_ESTABLISHED:
  996. case QDIO_IRQ_STATE_ACTIVE:
  997. if (cstat & SCHN_STAT_PCI) {
  998. qdio_int_handler_pci(irq_ptr);
  999. return;
  1000. }
  1001. if (cstat || dstat)
  1002. qdio_handle_activate_check(cdev, intparm, cstat,
  1003. dstat);
  1004. break;
  1005. case QDIO_IRQ_STATE_STOPPED:
  1006. break;
  1007. default:
  1008. WARN_ON(1);
  1009. }
  1010. wake_up(&cdev->private->wait_q);
  1011. }
  1012. /**
  1013. * qdio_get_ssqd_desc - get qdio subchannel description
  1014. * @cdev: ccw device to get description for
  1015. * @data: where to store the ssqd
  1016. *
  1017. * Returns 0 or an error code. The results of the chsc are stored in the
  1018. * specified structure.
  1019. */
  1020. int qdio_get_ssqd_desc(struct ccw_device *cdev,
  1021. struct qdio_ssqd_desc *data)
  1022. {
  1023. if (!cdev || !cdev->private)
  1024. return -EINVAL;
  1025. DBF_EVENT("get ssqd:%4x", cdev->private->schid.sch_no);
  1026. return qdio_setup_get_ssqd(NULL, &cdev->private->schid, data);
  1027. }
  1028. EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc);
  1029. static void qdio_shutdown_queues(struct ccw_device *cdev)
  1030. {
  1031. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1032. struct qdio_q *q;
  1033. int i;
  1034. for_each_input_queue(irq_ptr, q, i)
  1035. tasklet_kill(&q->tasklet);
  1036. for_each_output_queue(irq_ptr, q, i) {
  1037. del_timer(&q->u.out.timer);
  1038. tasklet_kill(&q->tasklet);
  1039. }
  1040. }
  1041. /**
  1042. * qdio_shutdown - shut down a qdio subchannel
  1043. * @cdev: associated ccw device
  1044. * @how: use halt or clear to shutdown
  1045. */
  1046. int qdio_shutdown(struct ccw_device *cdev, int how)
  1047. {
  1048. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1049. int rc;
  1050. unsigned long flags;
  1051. if (!irq_ptr)
  1052. return -ENODEV;
  1053. BUG_ON(irqs_disabled());
  1054. DBF_EVENT("qshutdown:%4x", cdev->private->schid.sch_no);
  1055. mutex_lock(&irq_ptr->setup_mutex);
  1056. /*
  1057. * Subchannel was already shot down. We cannot prevent being called
  1058. * twice since cio may trigger a shutdown asynchronously.
  1059. */
  1060. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  1061. mutex_unlock(&irq_ptr->setup_mutex);
  1062. return 0;
  1063. }
  1064. /*
  1065. * Indicate that the device is going down. Scheduling the queue
  1066. * tasklets is forbidden from here on.
  1067. */
  1068. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  1069. tiqdio_remove_input_queues(irq_ptr);
  1070. qdio_shutdown_queues(cdev);
  1071. qdio_shutdown_debug_entries(irq_ptr, cdev);
  1072. /* cleanup subchannel */
  1073. spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
  1074. if (how & QDIO_FLAG_CLEANUP_USING_CLEAR)
  1075. rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
  1076. else
  1077. /* default behaviour is halt */
  1078. rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
  1079. if (rc) {
  1080. DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no);
  1081. DBF_ERROR("rc:%4d", rc);
  1082. goto no_cleanup;
  1083. }
  1084. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
  1085. spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
  1086. wait_event_interruptible_timeout(cdev->private->wait_q,
  1087. irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
  1088. irq_ptr->state == QDIO_IRQ_STATE_ERR,
  1089. 10 * HZ);
  1090. spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
  1091. no_cleanup:
  1092. qdio_shutdown_thinint(irq_ptr);
  1093. /* restore interrupt handler */
  1094. if ((void *)cdev->handler == (void *)qdio_int_handler)
  1095. cdev->handler = irq_ptr->orig_handler;
  1096. spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
  1097. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  1098. mutex_unlock(&irq_ptr->setup_mutex);
  1099. if (rc)
  1100. return rc;
  1101. return 0;
  1102. }
  1103. EXPORT_SYMBOL_GPL(qdio_shutdown);
  1104. /**
  1105. * qdio_free - free data structures for a qdio subchannel
  1106. * @cdev: associated ccw device
  1107. */
  1108. int qdio_free(struct ccw_device *cdev)
  1109. {
  1110. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1111. if (!irq_ptr)
  1112. return -ENODEV;
  1113. DBF_EVENT("qfree:%4x", cdev->private->schid.sch_no);
  1114. mutex_lock(&irq_ptr->setup_mutex);
  1115. if (irq_ptr->debug_area != NULL) {
  1116. debug_unregister(irq_ptr->debug_area);
  1117. irq_ptr->debug_area = NULL;
  1118. }
  1119. cdev->private->qdio_data = NULL;
  1120. mutex_unlock(&irq_ptr->setup_mutex);
  1121. qdio_release_memory(irq_ptr);
  1122. return 0;
  1123. }
  1124. EXPORT_SYMBOL_GPL(qdio_free);
  1125. /**
  1126. * qdio_allocate - allocate qdio queues and associated data
  1127. * @init_data: initialization data
  1128. */
  1129. int qdio_allocate(struct qdio_initialize *init_data)
  1130. {
  1131. struct qdio_irq *irq_ptr;
  1132. DBF_EVENT("qallocate:%4x", init_data->cdev->private->schid.sch_no);
  1133. if ((init_data->no_input_qs && !init_data->input_handler) ||
  1134. (init_data->no_output_qs && !init_data->output_handler))
  1135. return -EINVAL;
  1136. if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) ||
  1137. (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ))
  1138. return -EINVAL;
  1139. if ((!init_data->input_sbal_addr_array) ||
  1140. (!init_data->output_sbal_addr_array))
  1141. return -EINVAL;
  1142. /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */
  1143. irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1144. if (!irq_ptr)
  1145. goto out_err;
  1146. mutex_init(&irq_ptr->setup_mutex);
  1147. qdio_allocate_dbf(init_data, irq_ptr);
  1148. /*
  1149. * Allocate a page for the chsc calls in qdio_establish.
  1150. * Must be pre-allocated since a zfcp recovery will call
  1151. * qdio_establish. In case of low memory and swap on a zfcp disk
  1152. * we may not be able to allocate memory otherwise.
  1153. */
  1154. irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL);
  1155. if (!irq_ptr->chsc_page)
  1156. goto out_rel;
  1157. /* qdr is used in ccw1.cda which is u32 */
  1158. irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1159. if (!irq_ptr->qdr)
  1160. goto out_rel;
  1161. WARN_ON((unsigned long)irq_ptr->qdr & 0xfff);
  1162. if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs,
  1163. init_data->no_output_qs))
  1164. goto out_rel;
  1165. init_data->cdev->private->qdio_data = irq_ptr;
  1166. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  1167. return 0;
  1168. out_rel:
  1169. qdio_release_memory(irq_ptr);
  1170. out_err:
  1171. return -ENOMEM;
  1172. }
  1173. EXPORT_SYMBOL_GPL(qdio_allocate);
  1174. static void qdio_detect_hsicq(struct qdio_irq *irq_ptr)
  1175. {
  1176. struct qdio_q *q = irq_ptr->input_qs[0];
  1177. int i, use_cq = 0;
  1178. if (irq_ptr->nr_input_qs > 1 && queue_type(q) == QDIO_IQDIO_QFMT)
  1179. use_cq = 1;
  1180. for_each_output_queue(irq_ptr, q, i) {
  1181. if (use_cq) {
  1182. if (qdio_enable_async_operation(&q->u.out) < 0) {
  1183. use_cq = 0;
  1184. continue;
  1185. }
  1186. } else
  1187. qdio_disable_async_operation(&q->u.out);
  1188. }
  1189. DBF_EVENT("use_cq:%d", use_cq);
  1190. }
  1191. /**
  1192. * qdio_establish - establish queues on a qdio subchannel
  1193. * @init_data: initialization data
  1194. */
  1195. int qdio_establish(struct qdio_initialize *init_data)
  1196. {
  1197. struct qdio_irq *irq_ptr;
  1198. struct ccw_device *cdev = init_data->cdev;
  1199. unsigned long saveflags;
  1200. int rc;
  1201. DBF_EVENT("qestablish:%4x", cdev->private->schid.sch_no);
  1202. irq_ptr = cdev->private->qdio_data;
  1203. if (!irq_ptr)
  1204. return -ENODEV;
  1205. if (cdev->private->state != DEV_STATE_ONLINE)
  1206. return -EINVAL;
  1207. mutex_lock(&irq_ptr->setup_mutex);
  1208. qdio_setup_irq(init_data);
  1209. rc = qdio_establish_thinint(irq_ptr);
  1210. if (rc) {
  1211. mutex_unlock(&irq_ptr->setup_mutex);
  1212. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1213. return rc;
  1214. }
  1215. /* establish q */
  1216. irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd;
  1217. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1218. irq_ptr->ccw.count = irq_ptr->equeue.count;
  1219. irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr);
  1220. spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
  1221. ccw_device_set_options_mask(cdev, 0);
  1222. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0);
  1223. if (rc) {
  1224. DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no);
  1225. DBF_ERROR("rc:%4x", rc);
  1226. }
  1227. spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
  1228. if (rc) {
  1229. mutex_unlock(&irq_ptr->setup_mutex);
  1230. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1231. return rc;
  1232. }
  1233. wait_event_interruptible_timeout(cdev->private->wait_q,
  1234. irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
  1235. irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ);
  1236. if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) {
  1237. mutex_unlock(&irq_ptr->setup_mutex);
  1238. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1239. return -EIO;
  1240. }
  1241. qdio_setup_ssqd_info(irq_ptr);
  1242. DBF_EVENT("qib ac:%4x", irq_ptr->qib.ac);
  1243. qdio_detect_hsicq(irq_ptr);
  1244. /* qebsm is now setup if available, initialize buffer states */
  1245. qdio_init_buf_states(irq_ptr);
  1246. mutex_unlock(&irq_ptr->setup_mutex);
  1247. qdio_print_subchannel_info(irq_ptr, cdev);
  1248. qdio_setup_debug_entries(irq_ptr, cdev);
  1249. return 0;
  1250. }
  1251. EXPORT_SYMBOL_GPL(qdio_establish);
  1252. /**
  1253. * qdio_activate - activate queues on a qdio subchannel
  1254. * @cdev: associated cdev
  1255. */
  1256. int qdio_activate(struct ccw_device *cdev)
  1257. {
  1258. struct qdio_irq *irq_ptr;
  1259. int rc;
  1260. unsigned long saveflags;
  1261. DBF_EVENT("qactivate:%4x", cdev->private->schid.sch_no);
  1262. irq_ptr = cdev->private->qdio_data;
  1263. if (!irq_ptr)
  1264. return -ENODEV;
  1265. if (cdev->private->state != DEV_STATE_ONLINE)
  1266. return -EINVAL;
  1267. mutex_lock(&irq_ptr->setup_mutex);
  1268. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  1269. rc = -EBUSY;
  1270. goto out;
  1271. }
  1272. irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd;
  1273. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1274. irq_ptr->ccw.count = irq_ptr->aqueue.count;
  1275. irq_ptr->ccw.cda = 0;
  1276. spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
  1277. ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
  1278. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE,
  1279. 0, DOIO_DENY_PREFETCH);
  1280. if (rc) {
  1281. DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no);
  1282. DBF_ERROR("rc:%4x", rc);
  1283. }
  1284. spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
  1285. if (rc)
  1286. goto out;
  1287. if (is_thinint_irq(irq_ptr))
  1288. tiqdio_add_input_queues(irq_ptr);
  1289. /* wait for subchannel to become active */
  1290. msleep(5);
  1291. switch (irq_ptr->state) {
  1292. case QDIO_IRQ_STATE_STOPPED:
  1293. case QDIO_IRQ_STATE_ERR:
  1294. rc = -EIO;
  1295. break;
  1296. default:
  1297. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
  1298. rc = 0;
  1299. }
  1300. out:
  1301. mutex_unlock(&irq_ptr->setup_mutex);
  1302. return rc;
  1303. }
  1304. EXPORT_SYMBOL_GPL(qdio_activate);
  1305. static inline int buf_in_between(int bufnr, int start, int count)
  1306. {
  1307. int end = add_buf(start, count);
  1308. if (end > start) {
  1309. if (bufnr >= start && bufnr < end)
  1310. return 1;
  1311. else
  1312. return 0;
  1313. }
  1314. /* wrap-around case */
  1315. if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) ||
  1316. (bufnr < end))
  1317. return 1;
  1318. else
  1319. return 0;
  1320. }
  1321. /**
  1322. * handle_inbound - reset processed input buffers
  1323. * @q: queue containing the buffers
  1324. * @callflags: flags
  1325. * @bufnr: first buffer to process
  1326. * @count: how many buffers are emptied
  1327. */
  1328. static int handle_inbound(struct qdio_q *q, unsigned int callflags,
  1329. int bufnr, int count)
  1330. {
  1331. int used, diff;
  1332. qperf_inc(q, inbound_call);
  1333. if (!q->u.in.polling)
  1334. goto set;
  1335. /* protect against stop polling setting an ACK for an emptied slsb */
  1336. if (count == QDIO_MAX_BUFFERS_PER_Q) {
  1337. /* overwriting everything, just delete polling status */
  1338. q->u.in.polling = 0;
  1339. q->u.in.ack_count = 0;
  1340. goto set;
  1341. } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) {
  1342. if (is_qebsm(q)) {
  1343. /* partial overwrite, just update ack_start */
  1344. diff = add_buf(bufnr, count);
  1345. diff = sub_buf(diff, q->u.in.ack_start);
  1346. q->u.in.ack_count -= diff;
  1347. if (q->u.in.ack_count <= 0) {
  1348. q->u.in.polling = 0;
  1349. q->u.in.ack_count = 0;
  1350. goto set;
  1351. }
  1352. q->u.in.ack_start = add_buf(q->u.in.ack_start, diff);
  1353. }
  1354. else
  1355. /* the only ACK will be deleted, so stop polling */
  1356. q->u.in.polling = 0;
  1357. }
  1358. set:
  1359. count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count);
  1360. used = atomic_add_return(count, &q->nr_buf_used) - count;
  1361. BUG_ON(used + count > QDIO_MAX_BUFFERS_PER_Q);
  1362. if (need_siga_in(q))
  1363. return qdio_siga_input(q);
  1364. return 0;
  1365. }
  1366. /**
  1367. * handle_outbound - process filled outbound buffers
  1368. * @q: queue containing the buffers
  1369. * @callflags: flags
  1370. * @bufnr: first buffer to process
  1371. * @count: how many buffers are filled
  1372. */
  1373. static int handle_outbound(struct qdio_q *q, unsigned int callflags,
  1374. int bufnr, int count)
  1375. {
  1376. unsigned char state = 0;
  1377. int used, rc = 0;
  1378. qperf_inc(q, outbound_call);
  1379. count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count);
  1380. used = atomic_add_return(count, &q->nr_buf_used);
  1381. BUG_ON(used > QDIO_MAX_BUFFERS_PER_Q);
  1382. if (used == QDIO_MAX_BUFFERS_PER_Q)
  1383. qperf_inc(q, outbound_queue_full);
  1384. if (callflags & QDIO_FLAG_PCI_OUT) {
  1385. q->u.out.pci_out_enabled = 1;
  1386. qperf_inc(q, pci_request_int);
  1387. } else
  1388. q->u.out.pci_out_enabled = 0;
  1389. if (queue_type(q) == QDIO_IQDIO_QFMT) {
  1390. unsigned long phys_aob = 0;
  1391. /* One SIGA-W per buffer required for unicast HSI */
  1392. WARN_ON_ONCE(count > 1 && !multicast_outbound(q));
  1393. phys_aob = qdio_aob_for_buffer(&q->u.out, bufnr);
  1394. rc = qdio_kick_outbound_q(q, phys_aob);
  1395. } else if (need_siga_sync(q)) {
  1396. rc = qdio_siga_sync_q(q);
  1397. } else {
  1398. /* try to fast requeue buffers */
  1399. get_buf_state(q, prev_buf(bufnr), &state, 0);
  1400. if (state != SLSB_CU_OUTPUT_PRIMED)
  1401. rc = qdio_kick_outbound_q(q, 0);
  1402. else
  1403. qperf_inc(q, fast_requeue);
  1404. }
  1405. /* in case of SIGA errors we must process the error immediately */
  1406. if (used >= q->u.out.scan_threshold || rc)
  1407. tasklet_schedule(&q->tasklet);
  1408. else
  1409. /* free the SBALs in case of no further traffic */
  1410. if (!timer_pending(&q->u.out.timer))
  1411. mod_timer(&q->u.out.timer, jiffies + HZ);
  1412. return rc;
  1413. }
  1414. /**
  1415. * do_QDIO - process input or output buffers
  1416. * @cdev: associated ccw_device for the qdio subchannel
  1417. * @callflags: input or output and special flags from the program
  1418. * @q_nr: queue number
  1419. * @bufnr: buffer number
  1420. * @count: how many buffers to process
  1421. */
  1422. int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
  1423. int q_nr, unsigned int bufnr, unsigned int count)
  1424. {
  1425. struct qdio_irq *irq_ptr;
  1426. if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q)
  1427. return -EINVAL;
  1428. irq_ptr = cdev->private->qdio_data;
  1429. if (!irq_ptr)
  1430. return -ENODEV;
  1431. DBF_DEV_EVENT(DBF_INFO, irq_ptr,
  1432. "do%02x b:%02x c:%02x", callflags, bufnr, count);
  1433. if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)
  1434. return -EBUSY;
  1435. if (!count)
  1436. return 0;
  1437. if (callflags & QDIO_FLAG_SYNC_INPUT)
  1438. return handle_inbound(irq_ptr->input_qs[q_nr],
  1439. callflags, bufnr, count);
  1440. else if (callflags & QDIO_FLAG_SYNC_OUTPUT)
  1441. return handle_outbound(irq_ptr->output_qs[q_nr],
  1442. callflags, bufnr, count);
  1443. return -EINVAL;
  1444. }
  1445. EXPORT_SYMBOL_GPL(do_QDIO);
  1446. /**
  1447. * qdio_start_irq - process input buffers
  1448. * @cdev: associated ccw_device for the qdio subchannel
  1449. * @nr: input queue number
  1450. *
  1451. * Return codes
  1452. * 0 - success
  1453. * 1 - irqs not started since new data is available
  1454. */
  1455. int qdio_start_irq(struct ccw_device *cdev, int nr)
  1456. {
  1457. struct qdio_q *q;
  1458. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1459. if (!irq_ptr)
  1460. return -ENODEV;
  1461. q = irq_ptr->input_qs[nr];
  1462. WARN_ON(queue_irqs_enabled(q));
  1463. clear_nonshared_ind(irq_ptr);
  1464. qdio_stop_polling(q);
  1465. clear_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state);
  1466. /*
  1467. * We need to check again to not lose initiative after
  1468. * resetting the ACK state.
  1469. */
  1470. if (test_nonshared_ind(irq_ptr))
  1471. goto rescan;
  1472. if (!qdio_inbound_q_done(q))
  1473. goto rescan;
  1474. return 0;
  1475. rescan:
  1476. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  1477. &q->u.in.queue_irq_state))
  1478. return 0;
  1479. else
  1480. return 1;
  1481. }
  1482. EXPORT_SYMBOL(qdio_start_irq);
  1483. /**
  1484. * qdio_get_next_buffers - process input buffers
  1485. * @cdev: associated ccw_device for the qdio subchannel
  1486. * @nr: input queue number
  1487. * @bufnr: first filled buffer number
  1488. * @error: buffers are in error state
  1489. *
  1490. * Return codes
  1491. * < 0 - error
  1492. * = 0 - no new buffers found
  1493. * > 0 - number of processed buffers
  1494. */
  1495. int qdio_get_next_buffers(struct ccw_device *cdev, int nr, int *bufnr,
  1496. int *error)
  1497. {
  1498. struct qdio_q *q;
  1499. int start, end;
  1500. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1501. if (!irq_ptr)
  1502. return -ENODEV;
  1503. q = irq_ptr->input_qs[nr];
  1504. WARN_ON(queue_irqs_enabled(q));
  1505. /*
  1506. * Cannot rely on automatic sync after interrupt since queues may
  1507. * also be examined without interrupt.
  1508. */
  1509. if (need_siga_sync(q))
  1510. qdio_sync_queues(q);
  1511. /* check the PCI capable outbound queues. */
  1512. qdio_check_outbound_after_thinint(q);
  1513. if (!qdio_inbound_q_moved(q))
  1514. return 0;
  1515. /* Note: upper-layer MUST stop processing immediately here ... */
  1516. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  1517. return -EIO;
  1518. start = q->first_to_kick;
  1519. end = q->first_to_check;
  1520. *bufnr = start;
  1521. *error = q->qdio_error;
  1522. /* for the next time */
  1523. q->first_to_kick = end;
  1524. q->qdio_error = 0;
  1525. return sub_buf(end, start);
  1526. }
  1527. EXPORT_SYMBOL(qdio_get_next_buffers);
  1528. /**
  1529. * qdio_stop_irq - disable interrupt processing for the device
  1530. * @cdev: associated ccw_device for the qdio subchannel
  1531. * @nr: input queue number
  1532. *
  1533. * Return codes
  1534. * 0 - interrupts were already disabled
  1535. * 1 - interrupts successfully disabled
  1536. */
  1537. int qdio_stop_irq(struct ccw_device *cdev, int nr)
  1538. {
  1539. struct qdio_q *q;
  1540. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1541. if (!irq_ptr)
  1542. return -ENODEV;
  1543. q = irq_ptr->input_qs[nr];
  1544. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  1545. &q->u.in.queue_irq_state))
  1546. return 0;
  1547. else
  1548. return 1;
  1549. }
  1550. EXPORT_SYMBOL(qdio_stop_irq);
  1551. static int __init init_QDIO(void)
  1552. {
  1553. int rc;
  1554. rc = qdio_debug_init();
  1555. if (rc)
  1556. return rc;
  1557. rc = qdio_setup_init();
  1558. if (rc)
  1559. goto out_debug;
  1560. rc = tiqdio_allocate_memory();
  1561. if (rc)
  1562. goto out_cache;
  1563. rc = tiqdio_register_thinints();
  1564. if (rc)
  1565. goto out_ti;
  1566. return 0;
  1567. out_ti:
  1568. tiqdio_free_memory();
  1569. out_cache:
  1570. qdio_setup_exit();
  1571. out_debug:
  1572. qdio_debug_exit();
  1573. return rc;
  1574. }
  1575. static void __exit exit_QDIO(void)
  1576. {
  1577. tiqdio_unregister_thinints();
  1578. tiqdio_free_memory();
  1579. qdio_setup_exit();
  1580. qdio_debug_exit();
  1581. }
  1582. module_init(init_QDIO);
  1583. module_exit(exit_QDIO);