portdrv_core.c 15 KB

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  1. /*
  2. * File: portdrv_core.c
  3. * Purpose: PCI Express Port Bus Driver's Core Functions
  4. *
  5. * Copyright (C) 2004 Intel
  6. * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
  7. */
  8. #include <linux/module.h>
  9. #include <linux/pci.h>
  10. #include <linux/kernel.h>
  11. #include <linux/errno.h>
  12. #include <linux/pm.h>
  13. #include <linux/string.h>
  14. #include <linux/slab.h>
  15. #include <linux/pcieport_if.h>
  16. #include <linux/aer.h>
  17. #include "../pci.h"
  18. #include "portdrv.h"
  19. /**
  20. * release_pcie_device - free PCI Express port service device structure
  21. * @dev: Port service device to release
  22. *
  23. * Invoked automatically when device is being removed in response to
  24. * device_unregister(dev). Release all resources being claimed.
  25. */
  26. static void release_pcie_device(struct device *dev)
  27. {
  28. kfree(to_pcie_device(dev));
  29. }
  30. /**
  31. * pcie_port_msix_add_entry - add entry to given array of MSI-X entries
  32. * @entries: Array of MSI-X entries
  33. * @new_entry: Index of the entry to add to the array
  34. * @nr_entries: Number of entries aleady in the array
  35. *
  36. * Return value: Position of the added entry in the array
  37. */
  38. static int pcie_port_msix_add_entry(
  39. struct msix_entry *entries, int new_entry, int nr_entries)
  40. {
  41. int j;
  42. for (j = 0; j < nr_entries; j++)
  43. if (entries[j].entry == new_entry)
  44. return j;
  45. entries[j].entry = new_entry;
  46. return j;
  47. }
  48. /**
  49. * pcie_port_enable_msix - try to set up MSI-X as interrupt mode for given port
  50. * @dev: PCI Express port to handle
  51. * @vectors: Array of interrupt vectors to populate
  52. * @mask: Bitmask of port capabilities returned by get_port_device_capability()
  53. *
  54. * Return value: 0 on success, error code on failure
  55. */
  56. static int pcie_port_enable_msix(struct pci_dev *dev, int *vectors, int mask)
  57. {
  58. struct msix_entry *msix_entries;
  59. int idx[PCIE_PORT_DEVICE_MAXSERVICES];
  60. int nr_entries, status, pos, i, nvec;
  61. u16 reg16;
  62. u32 reg32;
  63. nr_entries = pci_msix_table_size(dev);
  64. if (!nr_entries)
  65. return -EINVAL;
  66. if (nr_entries > PCIE_PORT_MAX_MSIX_ENTRIES)
  67. nr_entries = PCIE_PORT_MAX_MSIX_ENTRIES;
  68. msix_entries = kzalloc(sizeof(*msix_entries) * nr_entries, GFP_KERNEL);
  69. if (!msix_entries)
  70. return -ENOMEM;
  71. /*
  72. * Allocate as many entries as the port wants, so that we can check
  73. * which of them will be useful. Moreover, if nr_entries is correctly
  74. * equal to the number of entries this port actually uses, we'll happily
  75. * go through without any tricks.
  76. */
  77. for (i = 0; i < nr_entries; i++)
  78. msix_entries[i].entry = i;
  79. status = pci_enable_msix(dev, msix_entries, nr_entries);
  80. if (status)
  81. goto Exit;
  82. for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
  83. idx[i] = -1;
  84. status = -EIO;
  85. nvec = 0;
  86. if (mask & (PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP)) {
  87. int entry;
  88. /*
  89. * The code below follows the PCI Express Base Specification 2.0
  90. * stating in Section 6.1.6 that "PME and Hot-Plug Event
  91. * interrupts (when both are implemented) always share the same
  92. * MSI or MSI-X vector, as indicated by the Interrupt Message
  93. * Number field in the PCI Express Capabilities register", where
  94. * according to Section 7.8.2 of the specification "For MSI-X,
  95. * the value in this field indicates which MSI-X Table entry is
  96. * used to generate the interrupt message."
  97. */
  98. pos = pci_pcie_cap(dev);
  99. pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &reg16);
  100. entry = (reg16 & PCI_EXP_FLAGS_IRQ) >> 9;
  101. if (entry >= nr_entries)
  102. goto Error;
  103. i = pcie_port_msix_add_entry(msix_entries, entry, nvec);
  104. if (i == nvec)
  105. nvec++;
  106. idx[PCIE_PORT_SERVICE_PME_SHIFT] = i;
  107. idx[PCIE_PORT_SERVICE_HP_SHIFT] = i;
  108. }
  109. if (mask & PCIE_PORT_SERVICE_AER) {
  110. int entry;
  111. /*
  112. * The code below follows Section 7.10.10 of the PCI Express
  113. * Base Specification 2.0 stating that bits 31-27 of the Root
  114. * Error Status Register contain a value indicating which of the
  115. * MSI/MSI-X vectors assigned to the port is going to be used
  116. * for AER, where "For MSI-X, the value in this register
  117. * indicates which MSI-X Table entry is used to generate the
  118. * interrupt message."
  119. */
  120. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  121. pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, &reg32);
  122. entry = reg32 >> 27;
  123. if (entry >= nr_entries)
  124. goto Error;
  125. i = pcie_port_msix_add_entry(msix_entries, entry, nvec);
  126. if (i == nvec)
  127. nvec++;
  128. idx[PCIE_PORT_SERVICE_AER_SHIFT] = i;
  129. }
  130. /*
  131. * If nvec is equal to the allocated number of entries, we can just use
  132. * what we have. Otherwise, the port has some extra entries not for the
  133. * services we know and we need to work around that.
  134. */
  135. if (nvec == nr_entries) {
  136. status = 0;
  137. } else {
  138. /* Drop the temporary MSI-X setup */
  139. pci_disable_msix(dev);
  140. /* Now allocate the MSI-X vectors for real */
  141. status = pci_enable_msix(dev, msix_entries, nvec);
  142. if (status)
  143. goto Exit;
  144. }
  145. for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
  146. vectors[i] = idx[i] >= 0 ? msix_entries[idx[i]].vector : -1;
  147. Exit:
  148. kfree(msix_entries);
  149. return status;
  150. Error:
  151. pci_disable_msix(dev);
  152. goto Exit;
  153. }
  154. /**
  155. * init_service_irqs - initialize irqs for PCI Express port services
  156. * @dev: PCI Express port to handle
  157. * @irqs: Array of irqs to populate
  158. * @mask: Bitmask of port capabilities returned by get_port_device_capability()
  159. *
  160. * Return value: Interrupt mode associated with the port
  161. */
  162. static int init_service_irqs(struct pci_dev *dev, int *irqs, int mask)
  163. {
  164. int i, irq = -1;
  165. /* We have to use INTx if MSI cannot be used for PCIe PME. */
  166. if ((mask & PCIE_PORT_SERVICE_PME) && pcie_pme_no_msi()) {
  167. if (dev->pin)
  168. irq = dev->irq;
  169. goto no_msi;
  170. }
  171. /* Try to use MSI-X if supported */
  172. if (!pcie_port_enable_msix(dev, irqs, mask))
  173. return 0;
  174. /* We're not going to use MSI-X, so try MSI and fall back to INTx */
  175. if (!pci_enable_msi(dev) || dev->pin)
  176. irq = dev->irq;
  177. no_msi:
  178. for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
  179. irqs[i] = irq;
  180. irqs[PCIE_PORT_SERVICE_VC_SHIFT] = -1;
  181. if (irq < 0)
  182. return -ENODEV;
  183. return 0;
  184. }
  185. static void cleanup_service_irqs(struct pci_dev *dev)
  186. {
  187. if (dev->msix_enabled)
  188. pci_disable_msix(dev);
  189. else if (dev->msi_enabled)
  190. pci_disable_msi(dev);
  191. }
  192. /**
  193. * get_port_device_capability - discover capabilities of a PCI Express port
  194. * @dev: PCI Express port to examine
  195. *
  196. * The capabilities are read from the port's PCI Express configuration registers
  197. * as described in PCI Express Base Specification 1.0a sections 7.8.2, 7.8.9 and
  198. * 7.9 - 7.11.
  199. *
  200. * Return value: Bitmask of discovered port capabilities
  201. */
  202. static int get_port_device_capability(struct pci_dev *dev)
  203. {
  204. int services = 0, pos;
  205. u16 reg16;
  206. u32 reg32;
  207. int cap_mask;
  208. int err;
  209. if (pcie_ports_disabled)
  210. return 0;
  211. err = pcie_port_platform_notify(dev, &cap_mask);
  212. if (!pcie_ports_auto) {
  213. cap_mask = PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP
  214. | PCIE_PORT_SERVICE_VC;
  215. if (pci_aer_available())
  216. cap_mask |= PCIE_PORT_SERVICE_AER;
  217. } else if (err) {
  218. return 0;
  219. }
  220. pos = pci_pcie_cap(dev);
  221. pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &reg16);
  222. /* Hot-Plug Capable */
  223. if ((cap_mask & PCIE_PORT_SERVICE_HP) && (reg16 & PCI_EXP_FLAGS_SLOT)) {
  224. pci_read_config_dword(dev, pos + PCI_EXP_SLTCAP, &reg32);
  225. if (reg32 & PCI_EXP_SLTCAP_HPC) {
  226. services |= PCIE_PORT_SERVICE_HP;
  227. /*
  228. * Disable hot-plug interrupts in case they have been
  229. * enabled by the BIOS and the hot-plug service driver
  230. * is not loaded.
  231. */
  232. pos += PCI_EXP_SLTCTL;
  233. pci_read_config_word(dev, pos, &reg16);
  234. reg16 &= ~(PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE);
  235. pci_write_config_word(dev, pos, reg16);
  236. }
  237. }
  238. /* AER capable */
  239. if ((cap_mask & PCIE_PORT_SERVICE_AER)
  240. && pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR)) {
  241. services |= PCIE_PORT_SERVICE_AER;
  242. /*
  243. * Disable AER on this port in case it's been enabled by the
  244. * BIOS (the AER service driver will enable it when necessary).
  245. */
  246. pci_disable_pcie_error_reporting(dev);
  247. }
  248. /* VC support */
  249. if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_VC))
  250. services |= PCIE_PORT_SERVICE_VC;
  251. /* Root ports are capable of generating PME too */
  252. if ((cap_mask & PCIE_PORT_SERVICE_PME)
  253. && dev->pcie_type == PCI_EXP_TYPE_ROOT_PORT) {
  254. services |= PCIE_PORT_SERVICE_PME;
  255. /*
  256. * Disable PME interrupt on this port in case it's been enabled
  257. * by the BIOS (the PME service driver will enable it when
  258. * necessary).
  259. */
  260. pcie_pme_interrupt_enable(dev, false);
  261. }
  262. return services;
  263. }
  264. /**
  265. * pcie_device_init - allocate and initialize PCI Express port service device
  266. * @pdev: PCI Express port to associate the service device with
  267. * @service: Type of service to associate with the service device
  268. * @irq: Interrupt vector to associate with the service device
  269. */
  270. static int pcie_device_init(struct pci_dev *pdev, int service, int irq)
  271. {
  272. int retval;
  273. struct pcie_device *pcie;
  274. struct device *device;
  275. pcie = kzalloc(sizeof(*pcie), GFP_KERNEL);
  276. if (!pcie)
  277. return -ENOMEM;
  278. pcie->port = pdev;
  279. pcie->irq = irq;
  280. pcie->service = service;
  281. /* Initialize generic device interface */
  282. device = &pcie->device;
  283. device->bus = &pcie_port_bus_type;
  284. device->release = release_pcie_device; /* callback to free pcie dev */
  285. dev_set_name(device, "%s:pcie%02x",
  286. pci_name(pdev),
  287. get_descriptor_id(pdev->pcie_type, service));
  288. device->parent = &pdev->dev;
  289. device_enable_async_suspend(device);
  290. retval = device_register(device);
  291. if (retval)
  292. kfree(pcie);
  293. else
  294. get_device(device);
  295. return retval;
  296. }
  297. /**
  298. * pcie_port_device_register - register PCI Express port
  299. * @dev: PCI Express port to register
  300. *
  301. * Allocate the port extension structure and register services associated with
  302. * the port.
  303. */
  304. int pcie_port_device_register(struct pci_dev *dev)
  305. {
  306. int status, capabilities, i, nr_service;
  307. int irqs[PCIE_PORT_DEVICE_MAXSERVICES];
  308. /* Enable PCI Express port device */
  309. status = pci_enable_device(dev);
  310. if (status)
  311. return status;
  312. /* Get and check PCI Express port services */
  313. capabilities = get_port_device_capability(dev);
  314. if (!capabilities)
  315. return 0;
  316. pci_set_master(dev);
  317. /*
  318. * Initialize service irqs. Don't use service devices that
  319. * require interrupts if there is no way to generate them.
  320. */
  321. status = init_service_irqs(dev, irqs, capabilities);
  322. if (status) {
  323. capabilities &= PCIE_PORT_SERVICE_VC;
  324. if (!capabilities)
  325. goto error_disable;
  326. }
  327. /* Allocate child services if any */
  328. status = -ENODEV;
  329. nr_service = 0;
  330. for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) {
  331. int service = 1 << i;
  332. if (!(capabilities & service))
  333. continue;
  334. if (!pcie_device_init(dev, service, irqs[i]))
  335. nr_service++;
  336. }
  337. if (!nr_service)
  338. goto error_cleanup_irqs;
  339. return 0;
  340. error_cleanup_irqs:
  341. cleanup_service_irqs(dev);
  342. error_disable:
  343. pci_disable_device(dev);
  344. return status;
  345. }
  346. #ifdef CONFIG_PM
  347. static int suspend_iter(struct device *dev, void *data)
  348. {
  349. struct pcie_port_service_driver *service_driver;
  350. if ((dev->bus == &pcie_port_bus_type) && dev->driver) {
  351. service_driver = to_service_driver(dev->driver);
  352. if (service_driver->suspend)
  353. service_driver->suspend(to_pcie_device(dev));
  354. }
  355. return 0;
  356. }
  357. /**
  358. * pcie_port_device_suspend - suspend port services associated with a PCIe port
  359. * @dev: PCI Express port to handle
  360. */
  361. int pcie_port_device_suspend(struct device *dev)
  362. {
  363. return device_for_each_child(dev, NULL, suspend_iter);
  364. }
  365. static int resume_iter(struct device *dev, void *data)
  366. {
  367. struct pcie_port_service_driver *service_driver;
  368. if ((dev->bus == &pcie_port_bus_type) &&
  369. (dev->driver)) {
  370. service_driver = to_service_driver(dev->driver);
  371. if (service_driver->resume)
  372. service_driver->resume(to_pcie_device(dev));
  373. }
  374. return 0;
  375. }
  376. /**
  377. * pcie_port_device_suspend - resume port services associated with a PCIe port
  378. * @dev: PCI Express port to handle
  379. */
  380. int pcie_port_device_resume(struct device *dev)
  381. {
  382. return device_for_each_child(dev, NULL, resume_iter);
  383. }
  384. #endif /* PM */
  385. static int remove_iter(struct device *dev, void *data)
  386. {
  387. if (dev->bus == &pcie_port_bus_type) {
  388. put_device(dev);
  389. device_unregister(dev);
  390. }
  391. return 0;
  392. }
  393. /**
  394. * pcie_port_device_remove - unregister PCI Express port service devices
  395. * @dev: PCI Express port the service devices to unregister are associated with
  396. *
  397. * Remove PCI Express port service devices associated with given port and
  398. * disable MSI-X or MSI for the port.
  399. */
  400. void pcie_port_device_remove(struct pci_dev *dev)
  401. {
  402. device_for_each_child(&dev->dev, NULL, remove_iter);
  403. cleanup_service_irqs(dev);
  404. pci_disable_device(dev);
  405. }
  406. /**
  407. * pcie_port_probe_service - probe driver for given PCI Express port service
  408. * @dev: PCI Express port service device to probe against
  409. *
  410. * If PCI Express port service driver is registered with
  411. * pcie_port_service_register(), this function will be called by the driver core
  412. * whenever match is found between the driver and a port service device.
  413. */
  414. static int pcie_port_probe_service(struct device *dev)
  415. {
  416. struct pcie_device *pciedev;
  417. struct pcie_port_service_driver *driver;
  418. int status;
  419. if (!dev || !dev->driver)
  420. return -ENODEV;
  421. driver = to_service_driver(dev->driver);
  422. if (!driver || !driver->probe)
  423. return -ENODEV;
  424. pciedev = to_pcie_device(dev);
  425. status = driver->probe(pciedev);
  426. if (!status) {
  427. dev_printk(KERN_DEBUG, dev, "service driver %s loaded\n",
  428. driver->name);
  429. get_device(dev);
  430. }
  431. return status;
  432. }
  433. /**
  434. * pcie_port_remove_service - detach driver from given PCI Express port service
  435. * @dev: PCI Express port service device to handle
  436. *
  437. * If PCI Express port service driver is registered with
  438. * pcie_port_service_register(), this function will be called by the driver core
  439. * when device_unregister() is called for the port service device associated
  440. * with the driver.
  441. */
  442. static int pcie_port_remove_service(struct device *dev)
  443. {
  444. struct pcie_device *pciedev;
  445. struct pcie_port_service_driver *driver;
  446. if (!dev || !dev->driver)
  447. return 0;
  448. pciedev = to_pcie_device(dev);
  449. driver = to_service_driver(dev->driver);
  450. if (driver && driver->remove) {
  451. dev_printk(KERN_DEBUG, dev, "unloading service driver %s\n",
  452. driver->name);
  453. driver->remove(pciedev);
  454. put_device(dev);
  455. }
  456. return 0;
  457. }
  458. /**
  459. * pcie_port_shutdown_service - shut down given PCI Express port service
  460. * @dev: PCI Express port service device to handle
  461. *
  462. * If PCI Express port service driver is registered with
  463. * pcie_port_service_register(), this function will be called by the driver core
  464. * when device_shutdown() is called for the port service device associated
  465. * with the driver.
  466. */
  467. static void pcie_port_shutdown_service(struct device *dev) {}
  468. /**
  469. * pcie_port_service_register - register PCI Express port service driver
  470. * @new: PCI Express port service driver to register
  471. */
  472. int pcie_port_service_register(struct pcie_port_service_driver *new)
  473. {
  474. if (pcie_ports_disabled)
  475. return -ENODEV;
  476. new->driver.name = (char *)new->name;
  477. new->driver.bus = &pcie_port_bus_type;
  478. new->driver.probe = pcie_port_probe_service;
  479. new->driver.remove = pcie_port_remove_service;
  480. new->driver.shutdown = pcie_port_shutdown_service;
  481. return driver_register(&new->driver);
  482. }
  483. EXPORT_SYMBOL(pcie_port_service_register);
  484. /**
  485. * pcie_port_service_unregister - unregister PCI Express port service driver
  486. * @drv: PCI Express port service driver to unregister
  487. */
  488. void pcie_port_service_unregister(struct pcie_port_service_driver *drv)
  489. {
  490. driver_unregister(&drv->driver);
  491. }
  492. EXPORT_SYMBOL(pcie_port_service_unregister);