aerdrv_core.c 22 KB

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  1. /*
  2. * drivers/pci/pcie/aer/aerdrv_core.c
  3. *
  4. * This file is subject to the terms and conditions of the GNU General Public
  5. * License. See the file "COPYING" in the main directory of this archive
  6. * for more details.
  7. *
  8. * This file implements the core part of PCI-Express AER. When an pci-express
  9. * error is delivered, an error message will be collected and printed to
  10. * console, then, an error recovery procedure will be executed by following
  11. * the pci error recovery rules.
  12. *
  13. * Copyright (C) 2006 Intel Corp.
  14. * Tom Long Nguyen (tom.l.nguyen@intel.com)
  15. * Zhang Yanmin (yanmin.zhang@intel.com)
  16. *
  17. */
  18. #include <linux/module.h>
  19. #include <linux/pci.h>
  20. #include <linux/kernel.h>
  21. #include <linux/errno.h>
  22. #include <linux/pm.h>
  23. #include <linux/suspend.h>
  24. #include <linux/delay.h>
  25. #include <linux/slab.h>
  26. #include <linux/kfifo.h>
  27. #include "aerdrv.h"
  28. static int forceload;
  29. static int nosourceid;
  30. module_param(forceload, bool, 0);
  31. module_param(nosourceid, bool, 0);
  32. int pci_enable_pcie_error_reporting(struct pci_dev *dev)
  33. {
  34. u16 reg16 = 0;
  35. int pos;
  36. if (pcie_aer_get_firmware_first(dev))
  37. return -EIO;
  38. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  39. if (!pos)
  40. return -EIO;
  41. pos = pci_pcie_cap(dev);
  42. if (!pos)
  43. return -EIO;
  44. pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &reg16);
  45. reg16 |= (PCI_EXP_DEVCTL_CERE |
  46. PCI_EXP_DEVCTL_NFERE |
  47. PCI_EXP_DEVCTL_FERE |
  48. PCI_EXP_DEVCTL_URRE);
  49. pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, reg16);
  50. return 0;
  51. }
  52. EXPORT_SYMBOL_GPL(pci_enable_pcie_error_reporting);
  53. int pci_disable_pcie_error_reporting(struct pci_dev *dev)
  54. {
  55. u16 reg16 = 0;
  56. int pos;
  57. if (pcie_aer_get_firmware_first(dev))
  58. return -EIO;
  59. pos = pci_pcie_cap(dev);
  60. if (!pos)
  61. return -EIO;
  62. pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &reg16);
  63. reg16 &= ~(PCI_EXP_DEVCTL_CERE |
  64. PCI_EXP_DEVCTL_NFERE |
  65. PCI_EXP_DEVCTL_FERE |
  66. PCI_EXP_DEVCTL_URRE);
  67. pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, reg16);
  68. return 0;
  69. }
  70. EXPORT_SYMBOL_GPL(pci_disable_pcie_error_reporting);
  71. int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev)
  72. {
  73. int pos;
  74. u32 status;
  75. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  76. if (!pos)
  77. return -EIO;
  78. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status);
  79. if (status)
  80. pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, status);
  81. return 0;
  82. }
  83. EXPORT_SYMBOL_GPL(pci_cleanup_aer_uncorrect_error_status);
  84. /**
  85. * add_error_device - list device to be handled
  86. * @e_info: pointer to error info
  87. * @dev: pointer to pci_dev to be added
  88. */
  89. static int add_error_device(struct aer_err_info *e_info, struct pci_dev *dev)
  90. {
  91. if (e_info->error_dev_num < AER_MAX_MULTI_ERR_DEVICES) {
  92. e_info->dev[e_info->error_dev_num] = dev;
  93. e_info->error_dev_num++;
  94. return 0;
  95. }
  96. return -ENOSPC;
  97. }
  98. #define PCI_BUS(x) (((x) >> 8) & 0xff)
  99. /**
  100. * is_error_source - check whether the device is source of reported error
  101. * @dev: pointer to pci_dev to be checked
  102. * @e_info: pointer to reported error info
  103. */
  104. static bool is_error_source(struct pci_dev *dev, struct aer_err_info *e_info)
  105. {
  106. int pos;
  107. u32 status, mask;
  108. u16 reg16;
  109. /*
  110. * When bus id is equal to 0, it might be a bad id
  111. * reported by root port.
  112. */
  113. if (!nosourceid && (PCI_BUS(e_info->id) != 0)) {
  114. /* Device ID match? */
  115. if (e_info->id == ((dev->bus->number << 8) | dev->devfn))
  116. return true;
  117. /* Continue id comparing if there is no multiple error */
  118. if (!e_info->multi_error_valid)
  119. return false;
  120. }
  121. /*
  122. * When either
  123. * 1) nosourceid==y;
  124. * 2) bus id is equal to 0. Some ports might lose the bus
  125. * id of error source id;
  126. * 3) There are multiple errors and prior id comparing fails;
  127. * We check AER status registers to find possible reporter.
  128. */
  129. if (atomic_read(&dev->enable_cnt) == 0)
  130. return false;
  131. pos = pci_pcie_cap(dev);
  132. if (!pos)
  133. return false;
  134. /* Check if AER is enabled */
  135. pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &reg16);
  136. if (!(reg16 & (
  137. PCI_EXP_DEVCTL_CERE |
  138. PCI_EXP_DEVCTL_NFERE |
  139. PCI_EXP_DEVCTL_FERE |
  140. PCI_EXP_DEVCTL_URRE)))
  141. return false;
  142. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  143. if (!pos)
  144. return false;
  145. /* Check if error is recorded */
  146. if (e_info->severity == AER_CORRECTABLE) {
  147. pci_read_config_dword(dev, pos + PCI_ERR_COR_STATUS, &status);
  148. pci_read_config_dword(dev, pos + PCI_ERR_COR_MASK, &mask);
  149. } else {
  150. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status);
  151. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, &mask);
  152. }
  153. if (status & ~mask)
  154. return true;
  155. return false;
  156. }
  157. static int find_device_iter(struct pci_dev *dev, void *data)
  158. {
  159. struct aer_err_info *e_info = (struct aer_err_info *)data;
  160. if (is_error_source(dev, e_info)) {
  161. /* List this device */
  162. if (add_error_device(e_info, dev)) {
  163. /* We cannot handle more... Stop iteration */
  164. /* TODO: Should print error message here? */
  165. return 1;
  166. }
  167. /* If there is only a single error, stop iteration */
  168. if (!e_info->multi_error_valid)
  169. return 1;
  170. }
  171. return 0;
  172. }
  173. /**
  174. * find_source_device - search through device hierarchy for source device
  175. * @parent: pointer to Root Port pci_dev data structure
  176. * @e_info: including detailed error information such like id
  177. *
  178. * Return true if found.
  179. *
  180. * Invoked by DPC when error is detected at the Root Port.
  181. * Caller of this function must set id, severity, and multi_error_valid of
  182. * struct aer_err_info pointed by @e_info properly. This function must fill
  183. * e_info->error_dev_num and e_info->dev[], based on the given information.
  184. */
  185. static bool find_source_device(struct pci_dev *parent,
  186. struct aer_err_info *e_info)
  187. {
  188. struct pci_dev *dev = parent;
  189. int result;
  190. /* Must reset in this function */
  191. e_info->error_dev_num = 0;
  192. /* Is Root Port an agent that sends error message? */
  193. result = find_device_iter(dev, e_info);
  194. if (result)
  195. return true;
  196. pci_walk_bus(parent->subordinate, find_device_iter, e_info);
  197. if (!e_info->error_dev_num) {
  198. dev_printk(KERN_DEBUG, &parent->dev,
  199. "can't find device of ID%04x\n",
  200. e_info->id);
  201. return false;
  202. }
  203. return true;
  204. }
  205. static int report_error_detected(struct pci_dev *dev, void *data)
  206. {
  207. pci_ers_result_t vote;
  208. struct pci_error_handlers *err_handler;
  209. struct aer_broadcast_data *result_data;
  210. result_data = (struct aer_broadcast_data *) data;
  211. dev->error_state = result_data->state;
  212. if (!dev->driver ||
  213. !dev->driver->err_handler ||
  214. !dev->driver->err_handler->error_detected) {
  215. if (result_data->state == pci_channel_io_frozen &&
  216. !(dev->hdr_type & PCI_HEADER_TYPE_BRIDGE)) {
  217. /*
  218. * In case of fatal recovery, if one of down-
  219. * stream device has no driver. We might be
  220. * unable to recover because a later insmod
  221. * of a driver for this device is unaware of
  222. * its hw state.
  223. */
  224. dev_printk(KERN_DEBUG, &dev->dev, "device has %s\n",
  225. dev->driver ?
  226. "no AER-aware driver" : "no driver");
  227. }
  228. return 0;
  229. }
  230. err_handler = dev->driver->err_handler;
  231. vote = err_handler->error_detected(dev, result_data->state);
  232. result_data->result = merge_result(result_data->result, vote);
  233. return 0;
  234. }
  235. static int report_mmio_enabled(struct pci_dev *dev, void *data)
  236. {
  237. pci_ers_result_t vote;
  238. struct pci_error_handlers *err_handler;
  239. struct aer_broadcast_data *result_data;
  240. result_data = (struct aer_broadcast_data *) data;
  241. if (!dev->driver ||
  242. !dev->driver->err_handler ||
  243. !dev->driver->err_handler->mmio_enabled)
  244. return 0;
  245. err_handler = dev->driver->err_handler;
  246. vote = err_handler->mmio_enabled(dev);
  247. result_data->result = merge_result(result_data->result, vote);
  248. return 0;
  249. }
  250. static int report_slot_reset(struct pci_dev *dev, void *data)
  251. {
  252. pci_ers_result_t vote;
  253. struct pci_error_handlers *err_handler;
  254. struct aer_broadcast_data *result_data;
  255. result_data = (struct aer_broadcast_data *) data;
  256. if (!dev->driver ||
  257. !dev->driver->err_handler ||
  258. !dev->driver->err_handler->slot_reset)
  259. return 0;
  260. err_handler = dev->driver->err_handler;
  261. vote = err_handler->slot_reset(dev);
  262. result_data->result = merge_result(result_data->result, vote);
  263. return 0;
  264. }
  265. static int report_resume(struct pci_dev *dev, void *data)
  266. {
  267. struct pci_error_handlers *err_handler;
  268. dev->error_state = pci_channel_io_normal;
  269. if (!dev->driver ||
  270. !dev->driver->err_handler ||
  271. !dev->driver->err_handler->resume)
  272. return 0;
  273. err_handler = dev->driver->err_handler;
  274. err_handler->resume(dev);
  275. return 0;
  276. }
  277. /**
  278. * broadcast_error_message - handle message broadcast to downstream drivers
  279. * @dev: pointer to from where in a hierarchy message is broadcasted down
  280. * @state: error state
  281. * @error_mesg: message to print
  282. * @cb: callback to be broadcasted
  283. *
  284. * Invoked during error recovery process. Once being invoked, the content
  285. * of error severity will be broadcasted to all downstream drivers in a
  286. * hierarchy in question.
  287. */
  288. static pci_ers_result_t broadcast_error_message(struct pci_dev *dev,
  289. enum pci_channel_state state,
  290. char *error_mesg,
  291. int (*cb)(struct pci_dev *, void *))
  292. {
  293. struct aer_broadcast_data result_data;
  294. dev_printk(KERN_DEBUG, &dev->dev, "broadcast %s message\n", error_mesg);
  295. result_data.state = state;
  296. if (cb == report_error_detected)
  297. result_data.result = PCI_ERS_RESULT_CAN_RECOVER;
  298. else
  299. result_data.result = PCI_ERS_RESULT_RECOVERED;
  300. if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE) {
  301. /*
  302. * If the error is reported by a bridge, we think this error
  303. * is related to the downstream link of the bridge, so we
  304. * do error recovery on all subordinates of the bridge instead
  305. * of the bridge and clear the error status of the bridge.
  306. */
  307. if (cb == report_error_detected)
  308. dev->error_state = state;
  309. pci_walk_bus(dev->subordinate, cb, &result_data);
  310. if (cb == report_resume) {
  311. pci_cleanup_aer_uncorrect_error_status(dev);
  312. dev->error_state = pci_channel_io_normal;
  313. }
  314. } else {
  315. /*
  316. * If the error is reported by an end point, we think this
  317. * error is related to the upstream link of the end point.
  318. */
  319. pci_walk_bus(dev->bus, cb, &result_data);
  320. }
  321. return result_data.result;
  322. }
  323. /**
  324. * aer_do_secondary_bus_reset - perform secondary bus reset
  325. * @dev: pointer to bridge's pci_dev data structure
  326. *
  327. * Invoked when performing link reset at Root Port or Downstream Port.
  328. */
  329. void aer_do_secondary_bus_reset(struct pci_dev *dev)
  330. {
  331. u16 p2p_ctrl;
  332. /* Assert Secondary Bus Reset */
  333. pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &p2p_ctrl);
  334. p2p_ctrl |= PCI_BRIDGE_CTL_BUS_RESET;
  335. pci_write_config_word(dev, PCI_BRIDGE_CONTROL, p2p_ctrl);
  336. /*
  337. * we should send hot reset message for 2ms to allow it time to
  338. * propagate to all downstream ports
  339. */
  340. msleep(2);
  341. /* De-assert Secondary Bus Reset */
  342. p2p_ctrl &= ~PCI_BRIDGE_CTL_BUS_RESET;
  343. pci_write_config_word(dev, PCI_BRIDGE_CONTROL, p2p_ctrl);
  344. /*
  345. * System software must wait for at least 100ms from the end
  346. * of a reset of one or more device before it is permitted
  347. * to issue Configuration Requests to those devices.
  348. */
  349. msleep(200);
  350. }
  351. /**
  352. * default_downstream_reset_link - default reset function for Downstream Port
  353. * @dev: pointer to downstream port's pci_dev data structure
  354. *
  355. * Invoked when performing link reset at Downstream Port w/ no aer driver.
  356. */
  357. static pci_ers_result_t default_downstream_reset_link(struct pci_dev *dev)
  358. {
  359. aer_do_secondary_bus_reset(dev);
  360. dev_printk(KERN_DEBUG, &dev->dev,
  361. "Downstream Port link has been reset\n");
  362. return PCI_ERS_RESULT_RECOVERED;
  363. }
  364. static int find_aer_service_iter(struct device *device, void *data)
  365. {
  366. struct pcie_port_service_driver *service_driver, **drv;
  367. drv = (struct pcie_port_service_driver **) data;
  368. if (device->bus == &pcie_port_bus_type && device->driver) {
  369. service_driver = to_service_driver(device->driver);
  370. if (service_driver->service == PCIE_PORT_SERVICE_AER) {
  371. *drv = service_driver;
  372. return 1;
  373. }
  374. }
  375. return 0;
  376. }
  377. static struct pcie_port_service_driver *find_aer_service(struct pci_dev *dev)
  378. {
  379. struct pcie_port_service_driver *drv = NULL;
  380. device_for_each_child(&dev->dev, &drv, find_aer_service_iter);
  381. return drv;
  382. }
  383. static pci_ers_result_t reset_link(struct pci_dev *dev)
  384. {
  385. struct pci_dev *udev;
  386. pci_ers_result_t status;
  387. struct pcie_port_service_driver *driver;
  388. if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE) {
  389. /* Reset this port for all subordinates */
  390. udev = dev;
  391. } else {
  392. /* Reset the upstream component (likely downstream port) */
  393. udev = dev->bus->self;
  394. }
  395. /* Use the aer driver of the component firstly */
  396. driver = find_aer_service(udev);
  397. if (driver && driver->reset_link) {
  398. status = driver->reset_link(udev);
  399. } else if (udev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM) {
  400. status = default_downstream_reset_link(udev);
  401. } else {
  402. dev_printk(KERN_DEBUG, &dev->dev,
  403. "no link-reset support at upstream device %s\n",
  404. pci_name(udev));
  405. return PCI_ERS_RESULT_DISCONNECT;
  406. }
  407. if (status != PCI_ERS_RESULT_RECOVERED) {
  408. dev_printk(KERN_DEBUG, &dev->dev,
  409. "link reset at upstream device %s failed\n",
  410. pci_name(udev));
  411. return PCI_ERS_RESULT_DISCONNECT;
  412. }
  413. return status;
  414. }
  415. /**
  416. * do_recovery - handle nonfatal/fatal error recovery process
  417. * @dev: pointer to a pci_dev data structure of agent detecting an error
  418. * @severity: error severity type
  419. *
  420. * Invoked when an error is nonfatal/fatal. Once being invoked, broadcast
  421. * error detected message to all downstream drivers within a hierarchy in
  422. * question and return the returned code.
  423. */
  424. static void do_recovery(struct pci_dev *dev, int severity)
  425. {
  426. pci_ers_result_t status, result = PCI_ERS_RESULT_RECOVERED;
  427. enum pci_channel_state state;
  428. if (severity == AER_FATAL)
  429. state = pci_channel_io_frozen;
  430. else
  431. state = pci_channel_io_normal;
  432. status = broadcast_error_message(dev,
  433. state,
  434. "error_detected",
  435. report_error_detected);
  436. if (severity == AER_FATAL) {
  437. result = reset_link(dev);
  438. if (result != PCI_ERS_RESULT_RECOVERED)
  439. goto failed;
  440. }
  441. if (status == PCI_ERS_RESULT_CAN_RECOVER)
  442. status = broadcast_error_message(dev,
  443. state,
  444. "mmio_enabled",
  445. report_mmio_enabled);
  446. if (status == PCI_ERS_RESULT_NEED_RESET) {
  447. /*
  448. * TODO: Should call platform-specific
  449. * functions to reset slot before calling
  450. * drivers' slot_reset callbacks?
  451. */
  452. status = broadcast_error_message(dev,
  453. state,
  454. "slot_reset",
  455. report_slot_reset);
  456. }
  457. if (status != PCI_ERS_RESULT_RECOVERED)
  458. goto failed;
  459. broadcast_error_message(dev,
  460. state,
  461. "resume",
  462. report_resume);
  463. dev_printk(KERN_DEBUG, &dev->dev,
  464. "AER driver successfully recovered\n");
  465. return;
  466. failed:
  467. /* TODO: Should kernel panic here? */
  468. dev_printk(KERN_DEBUG, &dev->dev,
  469. "AER driver didn't recover\n");
  470. }
  471. /**
  472. * handle_error_source - handle logging error into an event log
  473. * @aerdev: pointer to pcie_device data structure of the root port
  474. * @dev: pointer to pci_dev data structure of error source device
  475. * @info: comprehensive error information
  476. *
  477. * Invoked when an error being detected by Root Port.
  478. */
  479. static void handle_error_source(struct pcie_device *aerdev,
  480. struct pci_dev *dev,
  481. struct aer_err_info *info)
  482. {
  483. int pos;
  484. if (info->severity == AER_CORRECTABLE) {
  485. /*
  486. * Correctable error does not need software intevention.
  487. * No need to go through error recovery process.
  488. */
  489. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  490. if (pos)
  491. pci_write_config_dword(dev, pos + PCI_ERR_COR_STATUS,
  492. info->status);
  493. } else
  494. do_recovery(dev, info->severity);
  495. }
  496. #ifdef CONFIG_ACPI_APEI_PCIEAER
  497. static void aer_recover_work_func(struct work_struct *work);
  498. #define AER_RECOVER_RING_ORDER 4
  499. #define AER_RECOVER_RING_SIZE (1 << AER_RECOVER_RING_ORDER)
  500. struct aer_recover_entry
  501. {
  502. u8 bus;
  503. u8 devfn;
  504. u16 domain;
  505. int severity;
  506. };
  507. static DEFINE_KFIFO(aer_recover_ring, struct aer_recover_entry,
  508. AER_RECOVER_RING_SIZE);
  509. /*
  510. * Mutual exclusion for writers of aer_recover_ring, reader side don't
  511. * need lock, because there is only one reader and lock is not needed
  512. * between reader and writer.
  513. */
  514. static DEFINE_SPINLOCK(aer_recover_ring_lock);
  515. static DECLARE_WORK(aer_recover_work, aer_recover_work_func);
  516. void aer_recover_queue(int domain, unsigned int bus, unsigned int devfn,
  517. int severity)
  518. {
  519. unsigned long flags;
  520. struct aer_recover_entry entry = {
  521. .bus = bus,
  522. .devfn = devfn,
  523. .domain = domain,
  524. .severity = severity,
  525. };
  526. spin_lock_irqsave(&aer_recover_ring_lock, flags);
  527. if (kfifo_put(&aer_recover_ring, &entry))
  528. schedule_work(&aer_recover_work);
  529. else
  530. pr_err("AER recover: Buffer overflow when recovering AER for %04x:%02x:%02x:%x\n",
  531. domain, bus, PCI_SLOT(devfn), PCI_FUNC(devfn));
  532. spin_unlock_irqrestore(&aer_recover_ring_lock, flags);
  533. }
  534. EXPORT_SYMBOL_GPL(aer_recover_queue);
  535. static void aer_recover_work_func(struct work_struct *work)
  536. {
  537. struct aer_recover_entry entry;
  538. struct pci_dev *pdev;
  539. while (kfifo_get(&aer_recover_ring, &entry)) {
  540. pdev = pci_get_domain_bus_and_slot(entry.domain, entry.bus,
  541. entry.devfn);
  542. if (!pdev) {
  543. pr_err("AER recover: Can not find pci_dev for %04x:%02x:%02x:%x\n",
  544. entry.domain, entry.bus,
  545. PCI_SLOT(entry.devfn), PCI_FUNC(entry.devfn));
  546. continue;
  547. }
  548. do_recovery(pdev, entry.severity);
  549. }
  550. }
  551. #endif
  552. /**
  553. * get_device_error_info - read error status from dev and store it to info
  554. * @dev: pointer to the device expected to have a error record
  555. * @info: pointer to structure to store the error record
  556. *
  557. * Return 1 on success, 0 on error.
  558. *
  559. * Note that @info is reused among all error devices. Clear fields properly.
  560. */
  561. static int get_device_error_info(struct pci_dev *dev, struct aer_err_info *info)
  562. {
  563. int pos, temp;
  564. /* Must reset in this function */
  565. info->status = 0;
  566. info->tlp_header_valid = 0;
  567. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  568. /* The device might not support AER */
  569. if (!pos)
  570. return 1;
  571. if (info->severity == AER_CORRECTABLE) {
  572. pci_read_config_dword(dev, pos + PCI_ERR_COR_STATUS,
  573. &info->status);
  574. pci_read_config_dword(dev, pos + PCI_ERR_COR_MASK,
  575. &info->mask);
  576. if (!(info->status & ~info->mask))
  577. return 0;
  578. } else if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE ||
  579. info->severity == AER_NONFATAL) {
  580. /* Link is still healthy for IO reads */
  581. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS,
  582. &info->status);
  583. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_MASK,
  584. &info->mask);
  585. if (!(info->status & ~info->mask))
  586. return 0;
  587. /* Get First Error Pointer */
  588. pci_read_config_dword(dev, pos + PCI_ERR_CAP, &temp);
  589. info->first_error = PCI_ERR_CAP_FEP(temp);
  590. if (info->status & AER_LOG_TLP_MASKS) {
  591. info->tlp_header_valid = 1;
  592. pci_read_config_dword(dev,
  593. pos + PCI_ERR_HEADER_LOG, &info->tlp.dw0);
  594. pci_read_config_dword(dev,
  595. pos + PCI_ERR_HEADER_LOG + 4, &info->tlp.dw1);
  596. pci_read_config_dword(dev,
  597. pos + PCI_ERR_HEADER_LOG + 8, &info->tlp.dw2);
  598. pci_read_config_dword(dev,
  599. pos + PCI_ERR_HEADER_LOG + 12, &info->tlp.dw3);
  600. }
  601. }
  602. return 1;
  603. }
  604. static inline void aer_process_err_devices(struct pcie_device *p_device,
  605. struct aer_err_info *e_info)
  606. {
  607. int i;
  608. /* Report all before handle them, not to lost records by reset etc. */
  609. for (i = 0; i < e_info->error_dev_num && e_info->dev[i]; i++) {
  610. if (get_device_error_info(e_info->dev[i], e_info))
  611. aer_print_error(e_info->dev[i], e_info);
  612. }
  613. for (i = 0; i < e_info->error_dev_num && e_info->dev[i]; i++) {
  614. if (get_device_error_info(e_info->dev[i], e_info))
  615. handle_error_source(p_device, e_info->dev[i], e_info);
  616. }
  617. }
  618. /**
  619. * aer_isr_one_error - consume an error detected by root port
  620. * @p_device: pointer to error root port service device
  621. * @e_src: pointer to an error source
  622. */
  623. static void aer_isr_one_error(struct pcie_device *p_device,
  624. struct aer_err_source *e_src)
  625. {
  626. struct aer_err_info *e_info;
  627. /* struct aer_err_info might be big, so we allocate it with slab */
  628. e_info = kmalloc(sizeof(struct aer_err_info), GFP_KERNEL);
  629. if (!e_info) {
  630. dev_printk(KERN_DEBUG, &p_device->port->dev,
  631. "Can't allocate mem when processing AER errors\n");
  632. return;
  633. }
  634. /*
  635. * There is a possibility that both correctable error and
  636. * uncorrectable error being logged. Report correctable error first.
  637. */
  638. if (e_src->status & PCI_ERR_ROOT_COR_RCV) {
  639. e_info->id = ERR_COR_ID(e_src->id);
  640. e_info->severity = AER_CORRECTABLE;
  641. if (e_src->status & PCI_ERR_ROOT_MULTI_COR_RCV)
  642. e_info->multi_error_valid = 1;
  643. else
  644. e_info->multi_error_valid = 0;
  645. aer_print_port_info(p_device->port, e_info);
  646. if (find_source_device(p_device->port, e_info))
  647. aer_process_err_devices(p_device, e_info);
  648. }
  649. if (e_src->status & PCI_ERR_ROOT_UNCOR_RCV) {
  650. e_info->id = ERR_UNCOR_ID(e_src->id);
  651. if (e_src->status & PCI_ERR_ROOT_FATAL_RCV)
  652. e_info->severity = AER_FATAL;
  653. else
  654. e_info->severity = AER_NONFATAL;
  655. if (e_src->status & PCI_ERR_ROOT_MULTI_UNCOR_RCV)
  656. e_info->multi_error_valid = 1;
  657. else
  658. e_info->multi_error_valid = 0;
  659. aer_print_port_info(p_device->port, e_info);
  660. if (find_source_device(p_device->port, e_info))
  661. aer_process_err_devices(p_device, e_info);
  662. }
  663. kfree(e_info);
  664. }
  665. /**
  666. * get_e_source - retrieve an error source
  667. * @rpc: pointer to the root port which holds an error
  668. * @e_src: pointer to store retrieved error source
  669. *
  670. * Return 1 if an error source is retrieved, otherwise 0.
  671. *
  672. * Invoked by DPC handler to consume an error.
  673. */
  674. static int get_e_source(struct aer_rpc *rpc, struct aer_err_source *e_src)
  675. {
  676. unsigned long flags;
  677. /* Lock access to Root error producer/consumer index */
  678. spin_lock_irqsave(&rpc->e_lock, flags);
  679. if (rpc->prod_idx == rpc->cons_idx) {
  680. spin_unlock_irqrestore(&rpc->e_lock, flags);
  681. return 0;
  682. }
  683. *e_src = rpc->e_sources[rpc->cons_idx];
  684. rpc->cons_idx++;
  685. if (rpc->cons_idx == AER_ERROR_SOURCES_MAX)
  686. rpc->cons_idx = 0;
  687. spin_unlock_irqrestore(&rpc->e_lock, flags);
  688. return 1;
  689. }
  690. /**
  691. * aer_isr - consume errors detected by root port
  692. * @work: definition of this work item
  693. *
  694. * Invoked, as DPC, when root port records new detected error
  695. */
  696. void aer_isr(struct work_struct *work)
  697. {
  698. struct aer_rpc *rpc = container_of(work, struct aer_rpc, dpc_handler);
  699. struct pcie_device *p_device = rpc->rpd;
  700. struct aer_err_source uninitialized_var(e_src);
  701. mutex_lock(&rpc->rpc_mutex);
  702. while (get_e_source(rpc, &e_src))
  703. aer_isr_one_error(p_device, &e_src);
  704. mutex_unlock(&rpc->rpc_mutex);
  705. wake_up(&rpc->wait_release);
  706. }
  707. /**
  708. * aer_init - provide AER initialization
  709. * @dev: pointer to AER pcie device
  710. *
  711. * Invoked when AER service driver is loaded.
  712. */
  713. int aer_init(struct pcie_device *dev)
  714. {
  715. if (forceload) {
  716. dev_printk(KERN_DEBUG, &dev->device,
  717. "aerdrv forceload requested.\n");
  718. pcie_aer_force_firmware_first(dev->port, 0);
  719. }
  720. return 0;
  721. }