iov.c 16 KB

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  1. /*
  2. * drivers/pci/iov.c
  3. *
  4. * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
  5. *
  6. * PCI Express I/O Virtualization (IOV) support.
  7. * Single Root IOV 1.0
  8. * Address Translation Service 1.0
  9. */
  10. #include <linux/pci.h>
  11. #include <linux/slab.h>
  12. #include <linux/mutex.h>
  13. #include <linux/export.h>
  14. #include <linux/string.h>
  15. #include <linux/delay.h>
  16. #include <linux/pci-ats.h>
  17. #include "pci.h"
  18. #define VIRTFN_ID_LEN 16
  19. static inline u8 virtfn_bus(struct pci_dev *dev, int id)
  20. {
  21. return dev->bus->number + ((dev->devfn + dev->sriov->offset +
  22. dev->sriov->stride * id) >> 8);
  23. }
  24. static inline u8 virtfn_devfn(struct pci_dev *dev, int id)
  25. {
  26. return (dev->devfn + dev->sriov->offset +
  27. dev->sriov->stride * id) & 0xff;
  28. }
  29. static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
  30. {
  31. int rc;
  32. struct pci_bus *child;
  33. if (bus->number == busnr)
  34. return bus;
  35. child = pci_find_bus(pci_domain_nr(bus), busnr);
  36. if (child)
  37. return child;
  38. child = pci_add_new_bus(bus, NULL, busnr);
  39. if (!child)
  40. return NULL;
  41. child->subordinate = busnr;
  42. child->dev.parent = bus->bridge;
  43. rc = pci_bus_add_child(child);
  44. if (rc) {
  45. pci_remove_bus(child);
  46. return NULL;
  47. }
  48. return child;
  49. }
  50. static void virtfn_remove_bus(struct pci_bus *bus, int busnr)
  51. {
  52. struct pci_bus *child;
  53. if (bus->number == busnr)
  54. return;
  55. child = pci_find_bus(pci_domain_nr(bus), busnr);
  56. BUG_ON(!child);
  57. if (list_empty(&child->devices))
  58. pci_remove_bus(child);
  59. }
  60. static int virtfn_add(struct pci_dev *dev, int id, int reset)
  61. {
  62. int i;
  63. int rc;
  64. u64 size;
  65. char buf[VIRTFN_ID_LEN];
  66. struct pci_dev *virtfn;
  67. struct resource *res;
  68. struct pci_sriov *iov = dev->sriov;
  69. virtfn = alloc_pci_dev();
  70. if (!virtfn)
  71. return -ENOMEM;
  72. mutex_lock(&iov->dev->sriov->lock);
  73. virtfn->bus = virtfn_add_bus(dev->bus, virtfn_bus(dev, id));
  74. if (!virtfn->bus) {
  75. kfree(virtfn);
  76. mutex_unlock(&iov->dev->sriov->lock);
  77. return -ENOMEM;
  78. }
  79. virtfn->devfn = virtfn_devfn(dev, id);
  80. virtfn->vendor = dev->vendor;
  81. pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device);
  82. pci_setup_device(virtfn);
  83. virtfn->dev.parent = dev->dev.parent;
  84. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  85. res = dev->resource + PCI_IOV_RESOURCES + i;
  86. if (!res->parent)
  87. continue;
  88. virtfn->resource[i].name = pci_name(virtfn);
  89. virtfn->resource[i].flags = res->flags;
  90. size = resource_size(res);
  91. do_div(size, iov->total);
  92. virtfn->resource[i].start = res->start + size * id;
  93. virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
  94. rc = request_resource(res, &virtfn->resource[i]);
  95. BUG_ON(rc);
  96. }
  97. if (reset)
  98. __pci_reset_function(virtfn);
  99. pci_device_add(virtfn, virtfn->bus);
  100. mutex_unlock(&iov->dev->sriov->lock);
  101. virtfn->physfn = pci_dev_get(dev);
  102. virtfn->is_virtfn = 1;
  103. rc = pci_bus_add_device(virtfn);
  104. if (rc)
  105. goto failed1;
  106. sprintf(buf, "virtfn%u", id);
  107. rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
  108. if (rc)
  109. goto failed1;
  110. rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
  111. if (rc)
  112. goto failed2;
  113. kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);
  114. return 0;
  115. failed2:
  116. sysfs_remove_link(&dev->dev.kobj, buf);
  117. failed1:
  118. pci_dev_put(dev);
  119. mutex_lock(&iov->dev->sriov->lock);
  120. pci_remove_bus_device(virtfn);
  121. virtfn_remove_bus(dev->bus, virtfn_bus(dev, id));
  122. mutex_unlock(&iov->dev->sriov->lock);
  123. return rc;
  124. }
  125. static void virtfn_remove(struct pci_dev *dev, int id, int reset)
  126. {
  127. char buf[VIRTFN_ID_LEN];
  128. struct pci_bus *bus;
  129. struct pci_dev *virtfn;
  130. struct pci_sriov *iov = dev->sriov;
  131. bus = pci_find_bus(pci_domain_nr(dev->bus), virtfn_bus(dev, id));
  132. if (!bus)
  133. return;
  134. virtfn = pci_get_slot(bus, virtfn_devfn(dev, id));
  135. if (!virtfn)
  136. return;
  137. pci_dev_put(virtfn);
  138. if (reset) {
  139. device_release_driver(&virtfn->dev);
  140. __pci_reset_function(virtfn);
  141. }
  142. sprintf(buf, "virtfn%u", id);
  143. sysfs_remove_link(&dev->dev.kobj, buf);
  144. sysfs_remove_link(&virtfn->dev.kobj, "physfn");
  145. mutex_lock(&iov->dev->sriov->lock);
  146. pci_remove_bus_device(virtfn);
  147. virtfn_remove_bus(dev->bus, virtfn_bus(dev, id));
  148. mutex_unlock(&iov->dev->sriov->lock);
  149. pci_dev_put(dev);
  150. }
  151. static int sriov_migration(struct pci_dev *dev)
  152. {
  153. u16 status;
  154. struct pci_sriov *iov = dev->sriov;
  155. if (!iov->nr_virtfn)
  156. return 0;
  157. if (!(iov->cap & PCI_SRIOV_CAP_VFM))
  158. return 0;
  159. pci_read_config_word(dev, iov->pos + PCI_SRIOV_STATUS, &status);
  160. if (!(status & PCI_SRIOV_STATUS_VFM))
  161. return 0;
  162. schedule_work(&iov->mtask);
  163. return 1;
  164. }
  165. static void sriov_migration_task(struct work_struct *work)
  166. {
  167. int i;
  168. u8 state;
  169. u16 status;
  170. struct pci_sriov *iov = container_of(work, struct pci_sriov, mtask);
  171. for (i = iov->initial; i < iov->nr_virtfn; i++) {
  172. state = readb(iov->mstate + i);
  173. if (state == PCI_SRIOV_VFM_MI) {
  174. writeb(PCI_SRIOV_VFM_AV, iov->mstate + i);
  175. state = readb(iov->mstate + i);
  176. if (state == PCI_SRIOV_VFM_AV)
  177. virtfn_add(iov->self, i, 1);
  178. } else if (state == PCI_SRIOV_VFM_MO) {
  179. virtfn_remove(iov->self, i, 1);
  180. writeb(PCI_SRIOV_VFM_UA, iov->mstate + i);
  181. state = readb(iov->mstate + i);
  182. if (state == PCI_SRIOV_VFM_AV)
  183. virtfn_add(iov->self, i, 0);
  184. }
  185. }
  186. pci_read_config_word(iov->self, iov->pos + PCI_SRIOV_STATUS, &status);
  187. status &= ~PCI_SRIOV_STATUS_VFM;
  188. pci_write_config_word(iov->self, iov->pos + PCI_SRIOV_STATUS, status);
  189. }
  190. static int sriov_enable_migration(struct pci_dev *dev, int nr_virtfn)
  191. {
  192. int bir;
  193. u32 table;
  194. resource_size_t pa;
  195. struct pci_sriov *iov = dev->sriov;
  196. if (nr_virtfn <= iov->initial)
  197. return 0;
  198. pci_read_config_dword(dev, iov->pos + PCI_SRIOV_VFM, &table);
  199. bir = PCI_SRIOV_VFM_BIR(table);
  200. if (bir > PCI_STD_RESOURCE_END)
  201. return -EIO;
  202. table = PCI_SRIOV_VFM_OFFSET(table);
  203. if (table + nr_virtfn > pci_resource_len(dev, bir))
  204. return -EIO;
  205. pa = pci_resource_start(dev, bir) + table;
  206. iov->mstate = ioremap(pa, nr_virtfn);
  207. if (!iov->mstate)
  208. return -ENOMEM;
  209. INIT_WORK(&iov->mtask, sriov_migration_task);
  210. iov->ctrl |= PCI_SRIOV_CTRL_VFM | PCI_SRIOV_CTRL_INTR;
  211. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  212. return 0;
  213. }
  214. static void sriov_disable_migration(struct pci_dev *dev)
  215. {
  216. struct pci_sriov *iov = dev->sriov;
  217. iov->ctrl &= ~(PCI_SRIOV_CTRL_VFM | PCI_SRIOV_CTRL_INTR);
  218. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  219. cancel_work_sync(&iov->mtask);
  220. iounmap(iov->mstate);
  221. }
  222. static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
  223. {
  224. int rc;
  225. int i, j;
  226. int nres;
  227. u16 offset, stride, initial;
  228. struct resource *res;
  229. struct pci_dev *pdev;
  230. struct pci_sriov *iov = dev->sriov;
  231. if (!nr_virtfn)
  232. return 0;
  233. if (iov->nr_virtfn)
  234. return -EINVAL;
  235. pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
  236. if (initial > iov->total ||
  237. (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total)))
  238. return -EIO;
  239. if (nr_virtfn < 0 || nr_virtfn > iov->total ||
  240. (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
  241. return -EINVAL;
  242. pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
  243. pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &offset);
  244. pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &stride);
  245. if (!offset || (nr_virtfn > 1 && !stride))
  246. return -EIO;
  247. nres = 0;
  248. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  249. res = dev->resource + PCI_IOV_RESOURCES + i;
  250. if (res->parent)
  251. nres++;
  252. }
  253. if (nres != iov->nres) {
  254. dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
  255. return -ENOMEM;
  256. }
  257. iov->offset = offset;
  258. iov->stride = stride;
  259. if (virtfn_bus(dev, nr_virtfn - 1) > dev->bus->subordinate) {
  260. dev_err(&dev->dev, "SR-IOV: bus number out of range\n");
  261. return -ENOMEM;
  262. }
  263. if (iov->link != dev->devfn) {
  264. pdev = pci_get_slot(dev->bus, iov->link);
  265. if (!pdev)
  266. return -ENODEV;
  267. pci_dev_put(pdev);
  268. if (!pdev->is_physfn)
  269. return -ENODEV;
  270. rc = sysfs_create_link(&dev->dev.kobj,
  271. &pdev->dev.kobj, "dep_link");
  272. if (rc)
  273. return rc;
  274. }
  275. iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
  276. pci_block_user_cfg_access(dev);
  277. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  278. msleep(100);
  279. pci_unblock_user_cfg_access(dev);
  280. iov->initial = initial;
  281. if (nr_virtfn < initial)
  282. initial = nr_virtfn;
  283. for (i = 0; i < initial; i++) {
  284. rc = virtfn_add(dev, i, 0);
  285. if (rc)
  286. goto failed;
  287. }
  288. if (iov->cap & PCI_SRIOV_CAP_VFM) {
  289. rc = sriov_enable_migration(dev, nr_virtfn);
  290. if (rc)
  291. goto failed;
  292. }
  293. kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
  294. iov->nr_virtfn = nr_virtfn;
  295. return 0;
  296. failed:
  297. for (j = 0; j < i; j++)
  298. virtfn_remove(dev, j, 0);
  299. iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
  300. pci_block_user_cfg_access(dev);
  301. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  302. ssleep(1);
  303. pci_unblock_user_cfg_access(dev);
  304. if (iov->link != dev->devfn)
  305. sysfs_remove_link(&dev->dev.kobj, "dep_link");
  306. return rc;
  307. }
  308. static void sriov_disable(struct pci_dev *dev)
  309. {
  310. int i;
  311. struct pci_sriov *iov = dev->sriov;
  312. if (!iov->nr_virtfn)
  313. return;
  314. if (iov->cap & PCI_SRIOV_CAP_VFM)
  315. sriov_disable_migration(dev);
  316. for (i = 0; i < iov->nr_virtfn; i++)
  317. virtfn_remove(dev, i, 0);
  318. iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
  319. pci_block_user_cfg_access(dev);
  320. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  321. ssleep(1);
  322. pci_unblock_user_cfg_access(dev);
  323. if (iov->link != dev->devfn)
  324. sysfs_remove_link(&dev->dev.kobj, "dep_link");
  325. iov->nr_virtfn = 0;
  326. }
  327. static int sriov_init(struct pci_dev *dev, int pos)
  328. {
  329. int i;
  330. int rc;
  331. int nres;
  332. u32 pgsz;
  333. u16 ctrl, total, offset, stride;
  334. struct pci_sriov *iov;
  335. struct resource *res;
  336. struct pci_dev *pdev;
  337. if (dev->pcie_type != PCI_EXP_TYPE_RC_END &&
  338. dev->pcie_type != PCI_EXP_TYPE_ENDPOINT)
  339. return -ENODEV;
  340. pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
  341. if (ctrl & PCI_SRIOV_CTRL_VFE) {
  342. pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
  343. ssleep(1);
  344. }
  345. pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
  346. if (!total)
  347. return 0;
  348. ctrl = 0;
  349. list_for_each_entry(pdev, &dev->bus->devices, bus_list)
  350. if (pdev->is_physfn)
  351. goto found;
  352. pdev = NULL;
  353. if (pci_ari_enabled(dev->bus))
  354. ctrl |= PCI_SRIOV_CTRL_ARI;
  355. found:
  356. pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
  357. pci_write_config_word(dev, pos + PCI_SRIOV_NUM_VF, total);
  358. pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
  359. pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
  360. if (!offset || (total > 1 && !stride))
  361. return -EIO;
  362. pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
  363. i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
  364. pgsz &= ~((1 << i) - 1);
  365. if (!pgsz)
  366. return -EIO;
  367. pgsz &= ~(pgsz - 1);
  368. pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
  369. nres = 0;
  370. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  371. res = dev->resource + PCI_IOV_RESOURCES + i;
  372. i += __pci_read_base(dev, pci_bar_unknown, res,
  373. pos + PCI_SRIOV_BAR + i * 4);
  374. if (!res->flags)
  375. continue;
  376. if (resource_size(res) & (PAGE_SIZE - 1)) {
  377. rc = -EIO;
  378. goto failed;
  379. }
  380. res->end = res->start + resource_size(res) * total - 1;
  381. nres++;
  382. }
  383. iov = kzalloc(sizeof(*iov), GFP_KERNEL);
  384. if (!iov) {
  385. rc = -ENOMEM;
  386. goto failed;
  387. }
  388. iov->pos = pos;
  389. iov->nres = nres;
  390. iov->ctrl = ctrl;
  391. iov->total = total;
  392. iov->offset = offset;
  393. iov->stride = stride;
  394. iov->pgsz = pgsz;
  395. iov->self = dev;
  396. pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
  397. pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
  398. if (dev->pcie_type == PCI_EXP_TYPE_RC_END)
  399. iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
  400. if (pdev)
  401. iov->dev = pci_dev_get(pdev);
  402. else
  403. iov->dev = dev;
  404. mutex_init(&iov->lock);
  405. dev->sriov = iov;
  406. dev->is_physfn = 1;
  407. return 0;
  408. failed:
  409. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  410. res = dev->resource + PCI_IOV_RESOURCES + i;
  411. res->flags = 0;
  412. }
  413. return rc;
  414. }
  415. static void sriov_release(struct pci_dev *dev)
  416. {
  417. BUG_ON(dev->sriov->nr_virtfn);
  418. if (dev != dev->sriov->dev)
  419. pci_dev_put(dev->sriov->dev);
  420. mutex_destroy(&dev->sriov->lock);
  421. kfree(dev->sriov);
  422. dev->sriov = NULL;
  423. }
  424. static void sriov_restore_state(struct pci_dev *dev)
  425. {
  426. int i;
  427. u16 ctrl;
  428. struct pci_sriov *iov = dev->sriov;
  429. pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
  430. if (ctrl & PCI_SRIOV_CTRL_VFE)
  431. return;
  432. for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++)
  433. pci_update_resource(dev, i);
  434. pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
  435. pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, iov->nr_virtfn);
  436. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  437. if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
  438. msleep(100);
  439. }
  440. /**
  441. * pci_iov_init - initialize the IOV capability
  442. * @dev: the PCI device
  443. *
  444. * Returns 0 on success, or negative on failure.
  445. */
  446. int pci_iov_init(struct pci_dev *dev)
  447. {
  448. int pos;
  449. if (!pci_is_pcie(dev))
  450. return -ENODEV;
  451. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
  452. if (pos)
  453. return sriov_init(dev, pos);
  454. return -ENODEV;
  455. }
  456. /**
  457. * pci_iov_release - release resources used by the IOV capability
  458. * @dev: the PCI device
  459. */
  460. void pci_iov_release(struct pci_dev *dev)
  461. {
  462. if (dev->is_physfn)
  463. sriov_release(dev);
  464. }
  465. /**
  466. * pci_iov_resource_bar - get position of the SR-IOV BAR
  467. * @dev: the PCI device
  468. * @resno: the resource number
  469. * @type: the BAR type to be filled in
  470. *
  471. * Returns position of the BAR encapsulated in the SR-IOV capability.
  472. */
  473. int pci_iov_resource_bar(struct pci_dev *dev, int resno,
  474. enum pci_bar_type *type)
  475. {
  476. if (resno < PCI_IOV_RESOURCES || resno > PCI_IOV_RESOURCE_END)
  477. return 0;
  478. BUG_ON(!dev->is_physfn);
  479. *type = pci_bar_unknown;
  480. return dev->sriov->pos + PCI_SRIOV_BAR +
  481. 4 * (resno - PCI_IOV_RESOURCES);
  482. }
  483. /**
  484. * pci_sriov_resource_alignment - get resource alignment for VF BAR
  485. * @dev: the PCI device
  486. * @resno: the resource number
  487. *
  488. * Returns the alignment of the VF BAR found in the SR-IOV capability.
  489. * This is not the same as the resource size which is defined as
  490. * the VF BAR size multiplied by the number of VFs. The alignment
  491. * is just the VF BAR size.
  492. */
  493. resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
  494. {
  495. struct resource tmp;
  496. enum pci_bar_type type;
  497. int reg = pci_iov_resource_bar(dev, resno, &type);
  498. if (!reg)
  499. return 0;
  500. __pci_read_base(dev, type, &tmp, reg);
  501. return resource_alignment(&tmp);
  502. }
  503. /**
  504. * pci_restore_iov_state - restore the state of the IOV capability
  505. * @dev: the PCI device
  506. */
  507. void pci_restore_iov_state(struct pci_dev *dev)
  508. {
  509. if (dev->is_physfn)
  510. sriov_restore_state(dev);
  511. }
  512. /**
  513. * pci_iov_bus_range - find bus range used by Virtual Function
  514. * @bus: the PCI bus
  515. *
  516. * Returns max number of buses (exclude current one) used by Virtual
  517. * Functions.
  518. */
  519. int pci_iov_bus_range(struct pci_bus *bus)
  520. {
  521. int max = 0;
  522. u8 busnr;
  523. struct pci_dev *dev;
  524. list_for_each_entry(dev, &bus->devices, bus_list) {
  525. if (!dev->is_physfn)
  526. continue;
  527. busnr = virtfn_bus(dev, dev->sriov->total - 1);
  528. if (busnr > max)
  529. max = busnr;
  530. }
  531. return max ? max - bus->number : 0;
  532. }
  533. /**
  534. * pci_enable_sriov - enable the SR-IOV capability
  535. * @dev: the PCI device
  536. * @nr_virtfn: number of virtual functions to enable
  537. *
  538. * Returns 0 on success, or negative on failure.
  539. */
  540. int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
  541. {
  542. might_sleep();
  543. if (!dev->is_physfn)
  544. return -ENODEV;
  545. return sriov_enable(dev, nr_virtfn);
  546. }
  547. EXPORT_SYMBOL_GPL(pci_enable_sriov);
  548. /**
  549. * pci_disable_sriov - disable the SR-IOV capability
  550. * @dev: the PCI device
  551. */
  552. void pci_disable_sriov(struct pci_dev *dev)
  553. {
  554. might_sleep();
  555. if (!dev->is_physfn)
  556. return;
  557. sriov_disable(dev);
  558. }
  559. EXPORT_SYMBOL_GPL(pci_disable_sriov);
  560. /**
  561. * pci_sriov_migration - notify SR-IOV core of Virtual Function Migration
  562. * @dev: the PCI device
  563. *
  564. * Returns IRQ_HANDLED if the IRQ is handled, or IRQ_NONE if not.
  565. *
  566. * Physical Function driver is responsible to register IRQ handler using
  567. * VF Migration Interrupt Message Number, and call this function when the
  568. * interrupt is generated by the hardware.
  569. */
  570. irqreturn_t pci_sriov_migration(struct pci_dev *dev)
  571. {
  572. if (!dev->is_physfn)
  573. return IRQ_NONE;
  574. return sriov_migration(dev) ? IRQ_HANDLED : IRQ_NONE;
  575. }
  576. EXPORT_SYMBOL_GPL(pci_sriov_migration);
  577. /**
  578. * pci_num_vf - return number of VFs associated with a PF device_release_driver
  579. * @dev: the PCI device
  580. *
  581. * Returns number of VFs, or 0 if SR-IOV is not enabled.
  582. */
  583. int pci_num_vf(struct pci_dev *dev)
  584. {
  585. if (!dev || !dev->is_physfn)
  586. return 0;
  587. else
  588. return dev->sriov->nr_virtfn;
  589. }
  590. EXPORT_SYMBOL_GPL(pci_num_vf);