11n.c 22 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737
  1. /*
  2. * Marvell Wireless LAN device driver: 802.11n
  3. *
  4. * Copyright (C) 2011, Marvell International Ltd.
  5. *
  6. * This software file (the "File") is distributed by Marvell International
  7. * Ltd. under the terms of the GNU General Public License Version 2, June 1991
  8. * (the "License"). You may use, redistribute and/or modify this File in
  9. * accordance with the terms and conditions of the License, a copy of which
  10. * is available by writing to the Free Software Foundation, Inc.,
  11. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
  12. * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
  13. *
  14. * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
  15. * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
  16. * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
  17. * this warranty disclaimer.
  18. */
  19. #include "decl.h"
  20. #include "ioctl.h"
  21. #include "util.h"
  22. #include "fw.h"
  23. #include "main.h"
  24. #include "wmm.h"
  25. #include "11n.h"
  26. /*
  27. * Fills HT capability information field, AMPDU Parameters field, HT extended
  28. * capability field, and supported MCS set fields.
  29. *
  30. * HT capability information field, AMPDU Parameters field, supported MCS set
  31. * fields are retrieved from cfg80211 stack
  32. *
  33. * RD responder bit to set to clear in the extended capability header.
  34. */
  35. void
  36. mwifiex_fill_cap_info(struct mwifiex_private *priv, u8 radio_type,
  37. struct mwifiex_ie_types_htcap *ht_cap)
  38. {
  39. uint16_t ht_ext_cap = le16_to_cpu(ht_cap->ht_cap.extended_ht_cap_info);
  40. struct ieee80211_supported_band *sband =
  41. priv->wdev->wiphy->bands[radio_type];
  42. ht_cap->ht_cap.ampdu_params_info =
  43. (sband->ht_cap.ampdu_factor &
  44. IEEE80211_HT_AMPDU_PARM_FACTOR)|
  45. ((sband->ht_cap.ampdu_density <<
  46. IEEE80211_HT_AMPDU_PARM_DENSITY_SHIFT) &
  47. IEEE80211_HT_AMPDU_PARM_DENSITY);
  48. memcpy((u8 *) &ht_cap->ht_cap.mcs, &sband->ht_cap.mcs,
  49. sizeof(sband->ht_cap.mcs));
  50. if (priv->bss_mode == NL80211_IFTYPE_STATION ||
  51. (sband->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40))
  52. /* Set MCS32 for infra mode or ad-hoc mode with 40MHz support */
  53. SETHT_MCS32(ht_cap->ht_cap.mcs.rx_mask);
  54. /* Clear RD responder bit */
  55. ht_ext_cap &= ~IEEE80211_HT_EXT_CAP_RD_RESPONDER;
  56. ht_cap->ht_cap.cap_info = cpu_to_le16(sband->ht_cap.cap);
  57. ht_cap->ht_cap.extended_ht_cap_info = cpu_to_le16(ht_ext_cap);
  58. }
  59. /*
  60. * This function returns the pointer to an entry in BA Stream
  61. * table which matches the requested BA status.
  62. */
  63. static struct mwifiex_tx_ba_stream_tbl *
  64. mwifiex_11n_get_tx_ba_stream_status(struct mwifiex_private *priv,
  65. enum mwifiex_ba_status ba_status)
  66. {
  67. struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
  68. unsigned long flags;
  69. spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
  70. list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
  71. if (tx_ba_tsr_tbl->ba_status == ba_status) {
  72. spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock,
  73. flags);
  74. return tx_ba_tsr_tbl;
  75. }
  76. }
  77. spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
  78. return NULL;
  79. }
  80. /*
  81. * This function handles the command response of delete a block
  82. * ack request.
  83. *
  84. * The function checks the response success status and takes action
  85. * accordingly (send an add BA request in case of success, or recreate
  86. * the deleted stream in case of failure, if the add BA was also
  87. * initiated by us).
  88. */
  89. int mwifiex_ret_11n_delba(struct mwifiex_private *priv,
  90. struct host_cmd_ds_command *resp)
  91. {
  92. int tid;
  93. struct mwifiex_tx_ba_stream_tbl *tx_ba_tbl;
  94. struct host_cmd_ds_11n_delba *del_ba =
  95. (struct host_cmd_ds_11n_delba *) &resp->params.del_ba;
  96. uint16_t del_ba_param_set = le16_to_cpu(del_ba->del_ba_param_set);
  97. tid = del_ba_param_set >> DELBA_TID_POS;
  98. if (del_ba->del_result == BA_RESULT_SUCCESS) {
  99. mwifiex_11n_delete_ba_stream_tbl(priv, tid,
  100. del_ba->peer_mac_addr, TYPE_DELBA_SENT,
  101. INITIATOR_BIT(del_ba_param_set));
  102. tx_ba_tbl = mwifiex_11n_get_tx_ba_stream_status(priv,
  103. BA_STREAM_SETUP_INPROGRESS);
  104. if (tx_ba_tbl)
  105. mwifiex_send_addba(priv, tx_ba_tbl->tid,
  106. tx_ba_tbl->ra);
  107. } else { /*
  108. * In case of failure, recreate the deleted stream in case
  109. * we initiated the ADDBA
  110. */
  111. if (INITIATOR_BIT(del_ba_param_set)) {
  112. mwifiex_11n_create_tx_ba_stream_tbl(priv,
  113. del_ba->peer_mac_addr, tid,
  114. BA_STREAM_SETUP_INPROGRESS);
  115. tx_ba_tbl = mwifiex_11n_get_tx_ba_stream_status(priv,
  116. BA_STREAM_SETUP_INPROGRESS);
  117. if (tx_ba_tbl)
  118. mwifiex_11n_delete_ba_stream_tbl(priv,
  119. tx_ba_tbl->tid, tx_ba_tbl->ra,
  120. TYPE_DELBA_SENT, true);
  121. }
  122. }
  123. return 0;
  124. }
  125. /*
  126. * This function handles the command response of add a block
  127. * ack request.
  128. *
  129. * Handling includes changing the header fields to CPU formats, checking
  130. * the response success status and taking actions accordingly (delete the
  131. * BA stream table in case of failure).
  132. */
  133. int mwifiex_ret_11n_addba_req(struct mwifiex_private *priv,
  134. struct host_cmd_ds_command *resp)
  135. {
  136. int tid;
  137. struct host_cmd_ds_11n_addba_rsp *add_ba_rsp =
  138. (struct host_cmd_ds_11n_addba_rsp *) &resp->params.add_ba_rsp;
  139. struct mwifiex_tx_ba_stream_tbl *tx_ba_tbl;
  140. add_ba_rsp->ssn = cpu_to_le16((le16_to_cpu(add_ba_rsp->ssn))
  141. & SSN_MASK);
  142. tid = (le16_to_cpu(add_ba_rsp->block_ack_param_set)
  143. & IEEE80211_ADDBA_PARAM_TID_MASK)
  144. >> BLOCKACKPARAM_TID_POS;
  145. if (le16_to_cpu(add_ba_rsp->status_code) == BA_RESULT_SUCCESS) {
  146. tx_ba_tbl = mwifiex_11n_get_tx_ba_stream_tbl(priv, tid,
  147. add_ba_rsp->peer_mac_addr);
  148. if (tx_ba_tbl) {
  149. dev_dbg(priv->adapter->dev, "info: BA stream complete\n");
  150. tx_ba_tbl->ba_status = BA_STREAM_SETUP_COMPLETE;
  151. } else {
  152. dev_err(priv->adapter->dev, "BA stream not created\n");
  153. }
  154. } else {
  155. mwifiex_11n_delete_ba_stream_tbl(priv, tid,
  156. add_ba_rsp->peer_mac_addr,
  157. TYPE_DELBA_SENT, true);
  158. if (add_ba_rsp->add_rsp_result != BA_RESULT_TIMEOUT)
  159. priv->aggr_prio_tbl[tid].ampdu_ap =
  160. BA_STREAM_NOT_ALLOWED;
  161. }
  162. return 0;
  163. }
  164. /*
  165. * This function handles the command response of 11n configuration request.
  166. *
  167. * Handling includes changing the header fields into CPU format.
  168. */
  169. int mwifiex_ret_11n_cfg(struct host_cmd_ds_command *resp,
  170. struct mwifiex_ds_11n_tx_cfg *tx_cfg)
  171. {
  172. struct host_cmd_ds_11n_cfg *htcfg = &resp->params.htcfg;
  173. if (tx_cfg) {
  174. tx_cfg->tx_htcap = le16_to_cpu(htcfg->ht_tx_cap);
  175. tx_cfg->tx_htinfo = le16_to_cpu(htcfg->ht_tx_info);
  176. }
  177. return 0;
  178. }
  179. /*
  180. * This function prepares command of reconfigure Tx buffer.
  181. *
  182. * Preparation includes -
  183. * - Setting command ID, action and proper size
  184. * - Setting Tx buffer size (for SET only)
  185. * - Ensuring correct endian-ness
  186. */
  187. int mwifiex_cmd_recfg_tx_buf(struct mwifiex_private *priv,
  188. struct host_cmd_ds_command *cmd, int cmd_action,
  189. u16 *buf_size)
  190. {
  191. struct host_cmd_ds_txbuf_cfg *tx_buf = &cmd->params.tx_buf;
  192. u16 action = (u16) cmd_action;
  193. cmd->command = cpu_to_le16(HostCmd_CMD_RECONFIGURE_TX_BUFF);
  194. cmd->size =
  195. cpu_to_le16(sizeof(struct host_cmd_ds_txbuf_cfg) + S_DS_GEN);
  196. tx_buf->action = cpu_to_le16(action);
  197. switch (action) {
  198. case HostCmd_ACT_GEN_SET:
  199. dev_dbg(priv->adapter->dev, "cmd: set tx_buf=%d\n", *buf_size);
  200. tx_buf->buff_size = cpu_to_le16(*buf_size);
  201. break;
  202. case HostCmd_ACT_GEN_GET:
  203. default:
  204. tx_buf->buff_size = 0;
  205. break;
  206. }
  207. return 0;
  208. }
  209. /*
  210. * This function prepares command of AMSDU aggregation control.
  211. *
  212. * Preparation includes -
  213. * - Setting command ID, action and proper size
  214. * - Setting AMSDU control parameters (for SET only)
  215. * - Ensuring correct endian-ness
  216. */
  217. int mwifiex_cmd_amsdu_aggr_ctrl(struct host_cmd_ds_command *cmd,
  218. int cmd_action,
  219. struct mwifiex_ds_11n_amsdu_aggr_ctrl *aa_ctrl)
  220. {
  221. struct host_cmd_ds_amsdu_aggr_ctrl *amsdu_ctrl =
  222. &cmd->params.amsdu_aggr_ctrl;
  223. u16 action = (u16) cmd_action;
  224. cmd->command = cpu_to_le16(HostCmd_CMD_AMSDU_AGGR_CTRL);
  225. cmd->size = cpu_to_le16(sizeof(struct host_cmd_ds_amsdu_aggr_ctrl)
  226. + S_DS_GEN);
  227. amsdu_ctrl->action = cpu_to_le16(action);
  228. switch (action) {
  229. case HostCmd_ACT_GEN_SET:
  230. amsdu_ctrl->enable = cpu_to_le16(aa_ctrl->enable);
  231. amsdu_ctrl->curr_buf_size = 0;
  232. break;
  233. case HostCmd_ACT_GEN_GET:
  234. default:
  235. amsdu_ctrl->curr_buf_size = 0;
  236. break;
  237. }
  238. return 0;
  239. }
  240. /*
  241. * This function handles the command response of AMSDU aggregation
  242. * control request.
  243. *
  244. * Handling includes changing the header fields into CPU format.
  245. */
  246. int mwifiex_ret_amsdu_aggr_ctrl(struct host_cmd_ds_command *resp,
  247. struct mwifiex_ds_11n_amsdu_aggr_ctrl
  248. *amsdu_aggr_ctrl)
  249. {
  250. struct host_cmd_ds_amsdu_aggr_ctrl *amsdu_ctrl =
  251. &resp->params.amsdu_aggr_ctrl;
  252. if (amsdu_aggr_ctrl) {
  253. amsdu_aggr_ctrl->enable = le16_to_cpu(amsdu_ctrl->enable);
  254. amsdu_aggr_ctrl->curr_buf_size =
  255. le16_to_cpu(amsdu_ctrl->curr_buf_size);
  256. }
  257. return 0;
  258. }
  259. /*
  260. * This function prepares 11n configuration command.
  261. *
  262. * Preparation includes -
  263. * - Setting command ID, action and proper size
  264. * - Setting HT Tx capability and HT Tx information fields
  265. * - Ensuring correct endian-ness
  266. */
  267. int mwifiex_cmd_11n_cfg(struct host_cmd_ds_command *cmd, u16 cmd_action,
  268. struct mwifiex_ds_11n_tx_cfg *txcfg)
  269. {
  270. struct host_cmd_ds_11n_cfg *htcfg = &cmd->params.htcfg;
  271. cmd->command = cpu_to_le16(HostCmd_CMD_11N_CFG);
  272. cmd->size = cpu_to_le16(sizeof(struct host_cmd_ds_11n_cfg) + S_DS_GEN);
  273. htcfg->action = cpu_to_le16(cmd_action);
  274. htcfg->ht_tx_cap = cpu_to_le16(txcfg->tx_htcap);
  275. htcfg->ht_tx_info = cpu_to_le16(txcfg->tx_htinfo);
  276. return 0;
  277. }
  278. /*
  279. * This function appends an 11n TLV to a buffer.
  280. *
  281. * Buffer allocation is responsibility of the calling
  282. * function. No size validation is made here.
  283. *
  284. * The function fills up the following sections, if applicable -
  285. * - HT capability IE
  286. * - HT information IE (with channel list)
  287. * - 20/40 BSS Coexistence IE
  288. * - HT Extended Capabilities IE
  289. */
  290. int
  291. mwifiex_cmd_append_11n_tlv(struct mwifiex_private *priv,
  292. struct mwifiex_bssdescriptor *bss_desc,
  293. u8 **buffer)
  294. {
  295. struct mwifiex_ie_types_htcap *ht_cap;
  296. struct mwifiex_ie_types_htinfo *ht_info;
  297. struct mwifiex_ie_types_chan_list_param_set *chan_list;
  298. struct mwifiex_ie_types_2040bssco *bss_co_2040;
  299. struct mwifiex_ie_types_extcap *ext_cap;
  300. int ret_len = 0;
  301. struct ieee80211_supported_band *sband;
  302. u8 radio_type;
  303. if (!buffer || !*buffer)
  304. return ret_len;
  305. radio_type = mwifiex_band_to_radio_type((u8) bss_desc->bss_band);
  306. sband = priv->wdev->wiphy->bands[radio_type];
  307. if (bss_desc->bcn_ht_cap) {
  308. ht_cap = (struct mwifiex_ie_types_htcap *) *buffer;
  309. memset(ht_cap, 0, sizeof(struct mwifiex_ie_types_htcap));
  310. ht_cap->header.type = cpu_to_le16(WLAN_EID_HT_CAPABILITY);
  311. ht_cap->header.len =
  312. cpu_to_le16(sizeof(struct ieee80211_ht_cap));
  313. memcpy((u8 *) ht_cap + sizeof(struct mwifiex_ie_types_header),
  314. (u8 *) bss_desc->bcn_ht_cap +
  315. sizeof(struct ieee_types_header),
  316. le16_to_cpu(ht_cap->header.len));
  317. mwifiex_fill_cap_info(priv, radio_type, ht_cap);
  318. *buffer += sizeof(struct mwifiex_ie_types_htcap);
  319. ret_len += sizeof(struct mwifiex_ie_types_htcap);
  320. }
  321. if (bss_desc->bcn_ht_info) {
  322. if (priv->bss_mode == NL80211_IFTYPE_ADHOC) {
  323. ht_info = (struct mwifiex_ie_types_htinfo *) *buffer;
  324. memset(ht_info, 0,
  325. sizeof(struct mwifiex_ie_types_htinfo));
  326. ht_info->header.type =
  327. cpu_to_le16(WLAN_EID_HT_INFORMATION);
  328. ht_info->header.len =
  329. cpu_to_le16(sizeof(struct ieee80211_ht_info));
  330. memcpy((u8 *) ht_info +
  331. sizeof(struct mwifiex_ie_types_header),
  332. (u8 *) bss_desc->bcn_ht_info +
  333. sizeof(struct ieee_types_header),
  334. le16_to_cpu(ht_info->header.len));
  335. if (!(sband->ht_cap.cap &
  336. IEEE80211_HT_CAP_SUP_WIDTH_20_40))
  337. ht_info->ht_info.ht_param &=
  338. ~(IEEE80211_HT_PARAM_CHAN_WIDTH_ANY |
  339. IEEE80211_HT_PARAM_CHA_SEC_OFFSET);
  340. *buffer += sizeof(struct mwifiex_ie_types_htinfo);
  341. ret_len += sizeof(struct mwifiex_ie_types_htinfo);
  342. }
  343. chan_list =
  344. (struct mwifiex_ie_types_chan_list_param_set *) *buffer;
  345. memset(chan_list, 0,
  346. sizeof(struct mwifiex_ie_types_chan_list_param_set));
  347. chan_list->header.type = cpu_to_le16(TLV_TYPE_CHANLIST);
  348. chan_list->header.len = cpu_to_le16(
  349. sizeof(struct mwifiex_ie_types_chan_list_param_set) -
  350. sizeof(struct mwifiex_ie_types_header));
  351. chan_list->chan_scan_param[0].chan_number =
  352. bss_desc->bcn_ht_info->control_chan;
  353. chan_list->chan_scan_param[0].radio_type =
  354. mwifiex_band_to_radio_type((u8) bss_desc->bss_band);
  355. if ((sband->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40)
  356. && (bss_desc->bcn_ht_info->ht_param &
  357. IEEE80211_HT_PARAM_CHAN_WIDTH_ANY))
  358. SET_SECONDARYCHAN(chan_list->chan_scan_param[0].
  359. radio_type,
  360. (bss_desc->bcn_ht_info->ht_param &
  361. IEEE80211_HT_PARAM_CHA_SEC_OFFSET));
  362. *buffer += sizeof(struct mwifiex_ie_types_chan_list_param_set);
  363. ret_len += sizeof(struct mwifiex_ie_types_chan_list_param_set);
  364. }
  365. if (bss_desc->bcn_bss_co_2040) {
  366. bss_co_2040 = (struct mwifiex_ie_types_2040bssco *) *buffer;
  367. memset(bss_co_2040, 0,
  368. sizeof(struct mwifiex_ie_types_2040bssco));
  369. bss_co_2040->header.type = cpu_to_le16(WLAN_EID_BSS_COEX_2040);
  370. bss_co_2040->header.len =
  371. cpu_to_le16(sizeof(bss_co_2040->bss_co_2040));
  372. memcpy((u8 *) bss_co_2040 +
  373. sizeof(struct mwifiex_ie_types_header),
  374. (u8 *) bss_desc->bcn_bss_co_2040 +
  375. sizeof(struct ieee_types_header),
  376. le16_to_cpu(bss_co_2040->header.len));
  377. *buffer += sizeof(struct mwifiex_ie_types_2040bssco);
  378. ret_len += sizeof(struct mwifiex_ie_types_2040bssco);
  379. }
  380. if (bss_desc->bcn_ext_cap) {
  381. ext_cap = (struct mwifiex_ie_types_extcap *) *buffer;
  382. memset(ext_cap, 0, sizeof(struct mwifiex_ie_types_extcap));
  383. ext_cap->header.type = cpu_to_le16(WLAN_EID_EXT_CAPABILITY);
  384. ext_cap->header.len = cpu_to_le16(sizeof(ext_cap->ext_cap));
  385. memcpy((u8 *) ext_cap +
  386. sizeof(struct mwifiex_ie_types_header),
  387. (u8 *) bss_desc->bcn_ext_cap +
  388. sizeof(struct ieee_types_header),
  389. le16_to_cpu(ext_cap->header.len));
  390. *buffer += sizeof(struct mwifiex_ie_types_extcap);
  391. ret_len += sizeof(struct mwifiex_ie_types_extcap);
  392. }
  393. return ret_len;
  394. }
  395. /*
  396. * This function reconfigures the Tx buffer size in firmware.
  397. *
  398. * This function prepares a firmware command and issues it, if
  399. * the current Tx buffer size is different from the one requested.
  400. * Maximum configurable Tx buffer size is limited by the HT capability
  401. * field value.
  402. */
  403. void
  404. mwifiex_cfg_tx_buf(struct mwifiex_private *priv,
  405. struct mwifiex_bssdescriptor *bss_desc)
  406. {
  407. u16 max_amsdu = MWIFIEX_TX_DATA_BUF_SIZE_2K;
  408. u16 tx_buf, curr_tx_buf_size = 0;
  409. if (bss_desc->bcn_ht_cap) {
  410. if (le16_to_cpu(bss_desc->bcn_ht_cap->cap_info) &
  411. IEEE80211_HT_CAP_MAX_AMSDU)
  412. max_amsdu = MWIFIEX_TX_DATA_BUF_SIZE_8K;
  413. else
  414. max_amsdu = MWIFIEX_TX_DATA_BUF_SIZE_4K;
  415. }
  416. tx_buf = min(priv->adapter->max_tx_buf_size, max_amsdu);
  417. dev_dbg(priv->adapter->dev, "info: max_amsdu=%d, max_tx_buf=%d\n",
  418. max_amsdu, priv->adapter->max_tx_buf_size);
  419. if (priv->adapter->curr_tx_buf_size <= MWIFIEX_TX_DATA_BUF_SIZE_2K)
  420. curr_tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K;
  421. else if (priv->adapter->curr_tx_buf_size <= MWIFIEX_TX_DATA_BUF_SIZE_4K)
  422. curr_tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K;
  423. else if (priv->adapter->curr_tx_buf_size <= MWIFIEX_TX_DATA_BUF_SIZE_8K)
  424. curr_tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_8K;
  425. if (curr_tx_buf_size != tx_buf)
  426. mwifiex_send_cmd_async(priv, HostCmd_CMD_RECONFIGURE_TX_BUFF,
  427. HostCmd_ACT_GEN_SET, 0, &tx_buf);
  428. }
  429. /*
  430. * This function checks if the given pointer is valid entry of
  431. * Tx BA Stream table.
  432. */
  433. static int mwifiex_is_tx_ba_stream_ptr_valid(struct mwifiex_private *priv,
  434. struct mwifiex_tx_ba_stream_tbl *tx_tbl_ptr)
  435. {
  436. struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
  437. list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
  438. if (tx_ba_tsr_tbl == tx_tbl_ptr)
  439. return true;
  440. }
  441. return false;
  442. }
  443. /*
  444. * This function deletes the given entry in Tx BA Stream table.
  445. *
  446. * The function also performs a validity check on the supplied
  447. * pointer before trying to delete.
  448. */
  449. void mwifiex_11n_delete_tx_ba_stream_tbl_entry(struct mwifiex_private *priv,
  450. struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl)
  451. {
  452. if (!tx_ba_tsr_tbl &&
  453. mwifiex_is_tx_ba_stream_ptr_valid(priv, tx_ba_tsr_tbl))
  454. return;
  455. dev_dbg(priv->adapter->dev, "info: tx_ba_tsr_tbl %p\n", tx_ba_tsr_tbl);
  456. list_del(&tx_ba_tsr_tbl->list);
  457. kfree(tx_ba_tsr_tbl);
  458. }
  459. /*
  460. * This function deletes all the entries in Tx BA Stream table.
  461. */
  462. void mwifiex_11n_delete_all_tx_ba_stream_tbl(struct mwifiex_private *priv)
  463. {
  464. int i;
  465. struct mwifiex_tx_ba_stream_tbl *del_tbl_ptr, *tmp_node;
  466. unsigned long flags;
  467. spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
  468. list_for_each_entry_safe(del_tbl_ptr, tmp_node,
  469. &priv->tx_ba_stream_tbl_ptr, list)
  470. mwifiex_11n_delete_tx_ba_stream_tbl_entry(priv, del_tbl_ptr);
  471. spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
  472. INIT_LIST_HEAD(&priv->tx_ba_stream_tbl_ptr);
  473. for (i = 0; i < MAX_NUM_TID; ++i)
  474. priv->aggr_prio_tbl[i].ampdu_ap =
  475. priv->aggr_prio_tbl[i].ampdu_user;
  476. }
  477. /*
  478. * This function returns the pointer to an entry in BA Stream
  479. * table which matches the given RA/TID pair.
  480. */
  481. struct mwifiex_tx_ba_stream_tbl *
  482. mwifiex_11n_get_tx_ba_stream_tbl(struct mwifiex_private *priv,
  483. int tid, u8 *ra)
  484. {
  485. struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
  486. unsigned long flags;
  487. spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
  488. list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
  489. if ((!memcmp(tx_ba_tsr_tbl->ra, ra, ETH_ALEN))
  490. && (tx_ba_tsr_tbl->tid == tid)) {
  491. spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock,
  492. flags);
  493. return tx_ba_tsr_tbl;
  494. }
  495. }
  496. spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
  497. return NULL;
  498. }
  499. /*
  500. * This function creates an entry in Tx BA stream table for the
  501. * given RA/TID pair.
  502. */
  503. void mwifiex_11n_create_tx_ba_stream_tbl(struct mwifiex_private *priv,
  504. u8 *ra, int tid,
  505. enum mwifiex_ba_status ba_status)
  506. {
  507. struct mwifiex_tx_ba_stream_tbl *new_node;
  508. unsigned long flags;
  509. if (!mwifiex_11n_get_tx_ba_stream_tbl(priv, tid, ra)) {
  510. new_node = kzalloc(sizeof(struct mwifiex_tx_ba_stream_tbl),
  511. GFP_ATOMIC);
  512. if (!new_node) {
  513. dev_err(priv->adapter->dev,
  514. "%s: failed to alloc new_node\n", __func__);
  515. return;
  516. }
  517. INIT_LIST_HEAD(&new_node->list);
  518. new_node->tid = tid;
  519. new_node->ba_status = ba_status;
  520. memcpy(new_node->ra, ra, ETH_ALEN);
  521. spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
  522. list_add_tail(&new_node->list, &priv->tx_ba_stream_tbl_ptr);
  523. spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
  524. }
  525. }
  526. /*
  527. * This function sends an add BA request to the given TID/RA pair.
  528. */
  529. int mwifiex_send_addba(struct mwifiex_private *priv, int tid, u8 *peer_mac)
  530. {
  531. struct host_cmd_ds_11n_addba_req add_ba_req;
  532. static u8 dialog_tok;
  533. int ret;
  534. dev_dbg(priv->adapter->dev, "cmd: %s: tid %d\n", __func__, tid);
  535. add_ba_req.block_ack_param_set = cpu_to_le16(
  536. (u16) ((tid << BLOCKACKPARAM_TID_POS) |
  537. (priv->add_ba_param.
  538. tx_win_size << BLOCKACKPARAM_WINSIZE_POS) |
  539. IMMEDIATE_BLOCK_ACK));
  540. add_ba_req.block_ack_tmo = cpu_to_le16((u16)priv->add_ba_param.timeout);
  541. ++dialog_tok;
  542. if (dialog_tok == 0)
  543. dialog_tok = 1;
  544. add_ba_req.dialog_token = dialog_tok;
  545. memcpy(&add_ba_req.peer_mac_addr, peer_mac, ETH_ALEN);
  546. /* We don't wait for the response of this command */
  547. ret = mwifiex_send_cmd_async(priv, HostCmd_CMD_11N_ADDBA_REQ,
  548. 0, 0, &add_ba_req);
  549. return ret;
  550. }
  551. /*
  552. * This function sends a delete BA request to the given TID/RA pair.
  553. */
  554. int mwifiex_send_delba(struct mwifiex_private *priv, int tid, u8 *peer_mac,
  555. int initiator)
  556. {
  557. struct host_cmd_ds_11n_delba delba;
  558. int ret;
  559. uint16_t del_ba_param_set;
  560. memset(&delba, 0, sizeof(delba));
  561. delba.del_ba_param_set = cpu_to_le16(tid << DELBA_TID_POS);
  562. del_ba_param_set = le16_to_cpu(delba.del_ba_param_set);
  563. if (initiator)
  564. del_ba_param_set |= IEEE80211_DELBA_PARAM_INITIATOR_MASK;
  565. else
  566. del_ba_param_set &= ~IEEE80211_DELBA_PARAM_INITIATOR_MASK;
  567. memcpy(&delba.peer_mac_addr, peer_mac, ETH_ALEN);
  568. /* We don't wait for the response of this command */
  569. ret = mwifiex_send_cmd_async(priv, HostCmd_CMD_11N_DELBA,
  570. HostCmd_ACT_GEN_SET, 0, &delba);
  571. return ret;
  572. }
  573. /*
  574. * This function handles the command response of a delete BA request.
  575. */
  576. void mwifiex_11n_delete_ba_stream(struct mwifiex_private *priv, u8 *del_ba)
  577. {
  578. struct host_cmd_ds_11n_delba *cmd_del_ba =
  579. (struct host_cmd_ds_11n_delba *) del_ba;
  580. uint16_t del_ba_param_set = le16_to_cpu(cmd_del_ba->del_ba_param_set);
  581. int tid;
  582. tid = del_ba_param_set >> DELBA_TID_POS;
  583. mwifiex_11n_delete_ba_stream_tbl(priv, tid, cmd_del_ba->peer_mac_addr,
  584. TYPE_DELBA_RECEIVE,
  585. INITIATOR_BIT(del_ba_param_set));
  586. }
  587. /*
  588. * This function retrieves the Rx reordering table.
  589. */
  590. int mwifiex_get_rx_reorder_tbl(struct mwifiex_private *priv,
  591. struct mwifiex_ds_rx_reorder_tbl *buf)
  592. {
  593. int i;
  594. struct mwifiex_ds_rx_reorder_tbl *rx_reo_tbl = buf;
  595. struct mwifiex_rx_reorder_tbl *rx_reorder_tbl_ptr;
  596. int count = 0;
  597. unsigned long flags;
  598. spin_lock_irqsave(&priv->rx_reorder_tbl_lock, flags);
  599. list_for_each_entry(rx_reorder_tbl_ptr, &priv->rx_reorder_tbl_ptr,
  600. list) {
  601. rx_reo_tbl->tid = (u16) rx_reorder_tbl_ptr->tid;
  602. memcpy(rx_reo_tbl->ta, rx_reorder_tbl_ptr->ta, ETH_ALEN);
  603. rx_reo_tbl->start_win = rx_reorder_tbl_ptr->start_win;
  604. rx_reo_tbl->win_size = rx_reorder_tbl_ptr->win_size;
  605. for (i = 0; i < rx_reorder_tbl_ptr->win_size; ++i) {
  606. if (rx_reorder_tbl_ptr->rx_reorder_ptr[i])
  607. rx_reo_tbl->buffer[i] = true;
  608. else
  609. rx_reo_tbl->buffer[i] = false;
  610. }
  611. rx_reo_tbl++;
  612. count++;
  613. if (count >= MWIFIEX_MAX_RX_BASTREAM_SUPPORTED)
  614. break;
  615. }
  616. spin_unlock_irqrestore(&priv->rx_reorder_tbl_lock, flags);
  617. return count;
  618. }
  619. /*
  620. * This function retrieves the Tx BA stream table.
  621. */
  622. int mwifiex_get_tx_ba_stream_tbl(struct mwifiex_private *priv,
  623. struct mwifiex_ds_tx_ba_stream_tbl *buf)
  624. {
  625. struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
  626. struct mwifiex_ds_tx_ba_stream_tbl *rx_reo_tbl = buf;
  627. int count = 0;
  628. unsigned long flags;
  629. spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
  630. list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
  631. rx_reo_tbl->tid = (u16) tx_ba_tsr_tbl->tid;
  632. dev_dbg(priv->adapter->dev, "data: %s tid=%d\n",
  633. __func__, rx_reo_tbl->tid);
  634. memcpy(rx_reo_tbl->ra, tx_ba_tsr_tbl->ra, ETH_ALEN);
  635. rx_reo_tbl++;
  636. count++;
  637. if (count >= MWIFIEX_MAX_TX_BASTREAM_SUPPORTED)
  638. break;
  639. }
  640. spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
  641. return count;
  642. }