iwl-4965.c 62 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183
  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * Intel Linux Wireless <ilw@linux.intel.com>
  23. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24. *
  25. *****************************************************************************/
  26. #include <linux/kernel.h>
  27. #include <linux/module.h>
  28. #include <linux/init.h>
  29. #include <linux/pci.h>
  30. #include <linux/dma-mapping.h>
  31. #include <linux/delay.h>
  32. #include <linux/sched.h>
  33. #include <linux/skbuff.h>
  34. #include <linux/netdevice.h>
  35. #include <net/mac80211.h>
  36. #include <linux/etherdevice.h>
  37. #include <asm/unaligned.h>
  38. #include "iwl-eeprom.h"
  39. #include "iwl-dev.h"
  40. #include "iwl-core.h"
  41. #include "iwl-io.h"
  42. #include "iwl-helpers.h"
  43. #include "iwl-4965-calib.h"
  44. #include "iwl-sta.h"
  45. #include "iwl-4965-led.h"
  46. #include "iwl-4965.h"
  47. #include "iwl-4965-debugfs.h"
  48. static int iwl4965_send_tx_power(struct iwl_priv *priv);
  49. static int iwl4965_hw_get_temperature(struct iwl_priv *priv);
  50. /* Highest firmware API version supported */
  51. #define IWL4965_UCODE_API_MAX 2
  52. /* Lowest firmware API version supported */
  53. #define IWL4965_UCODE_API_MIN 2
  54. #define IWL4965_FW_PRE "iwlwifi-4965-"
  55. #define _IWL4965_MODULE_FIRMWARE(api) IWL4965_FW_PRE #api ".ucode"
  56. #define IWL4965_MODULE_FIRMWARE(api) _IWL4965_MODULE_FIRMWARE(api)
  57. /* check contents of special bootstrap uCode SRAM */
  58. static int iwl4965_verify_bsm(struct iwl_priv *priv)
  59. {
  60. __le32 *image = priv->ucode_boot.v_addr;
  61. u32 len = priv->ucode_boot.len;
  62. u32 reg;
  63. u32 val;
  64. IWL_DEBUG_INFO(priv, "Begin verify bsm\n");
  65. /* verify BSM SRAM contents */
  66. val = iwl_legacy_read_prph(priv, BSM_WR_DWCOUNT_REG);
  67. for (reg = BSM_SRAM_LOWER_BOUND;
  68. reg < BSM_SRAM_LOWER_BOUND + len;
  69. reg += sizeof(u32), image++) {
  70. val = iwl_legacy_read_prph(priv, reg);
  71. if (val != le32_to_cpu(*image)) {
  72. IWL_ERR(priv, "BSM uCode verification failed at "
  73. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  74. BSM_SRAM_LOWER_BOUND,
  75. reg - BSM_SRAM_LOWER_BOUND, len,
  76. val, le32_to_cpu(*image));
  77. return -EIO;
  78. }
  79. }
  80. IWL_DEBUG_INFO(priv, "BSM bootstrap uCode image OK\n");
  81. return 0;
  82. }
  83. /**
  84. * iwl4965_load_bsm - Load bootstrap instructions
  85. *
  86. * BSM operation:
  87. *
  88. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  89. * in special SRAM that does not power down during RFKILL. When powering back
  90. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  91. * the bootstrap program into the on-board processor, and starts it.
  92. *
  93. * The bootstrap program loads (via DMA) instructions and data for a new
  94. * program from host DRAM locations indicated by the host driver in the
  95. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  96. * automatically.
  97. *
  98. * When initializing the NIC, the host driver points the BSM to the
  99. * "initialize" uCode image. This uCode sets up some internal data, then
  100. * notifies host via "initialize alive" that it is complete.
  101. *
  102. * The host then replaces the BSM_DRAM_* pointer values to point to the
  103. * normal runtime uCode instructions and a backup uCode data cache buffer
  104. * (filled initially with starting data values for the on-board processor),
  105. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  106. * which begins normal operation.
  107. *
  108. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  109. * the backup data cache in DRAM before SRAM is powered down.
  110. *
  111. * When powering back up, the BSM loads the bootstrap program. This reloads
  112. * the runtime uCode instructions and the backup data cache into SRAM,
  113. * and re-launches the runtime uCode from where it left off.
  114. */
  115. static int iwl4965_load_bsm(struct iwl_priv *priv)
  116. {
  117. __le32 *image = priv->ucode_boot.v_addr;
  118. u32 len = priv->ucode_boot.len;
  119. dma_addr_t pinst;
  120. dma_addr_t pdata;
  121. u32 inst_len;
  122. u32 data_len;
  123. int i;
  124. u32 done;
  125. u32 reg_offset;
  126. int ret;
  127. IWL_DEBUG_INFO(priv, "Begin load bsm\n");
  128. priv->ucode_type = UCODE_RT;
  129. /* make sure bootstrap program is no larger than BSM's SRAM size */
  130. if (len > IWL49_MAX_BSM_SIZE)
  131. return -EINVAL;
  132. /* Tell bootstrap uCode where to find the "Initialize" uCode
  133. * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
  134. * NOTE: iwl_init_alive_start() will replace these values,
  135. * after the "initialize" uCode has run, to point to
  136. * runtime/protocol instructions and backup data cache.
  137. */
  138. pinst = priv->ucode_init.p_addr >> 4;
  139. pdata = priv->ucode_init_data.p_addr >> 4;
  140. inst_len = priv->ucode_init.len;
  141. data_len = priv->ucode_init_data.len;
  142. iwl_legacy_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  143. iwl_legacy_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  144. iwl_legacy_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  145. iwl_legacy_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  146. /* Fill BSM memory with bootstrap instructions */
  147. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  148. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  149. reg_offset += sizeof(u32), image++)
  150. _iwl_legacy_write_prph(priv, reg_offset, le32_to_cpu(*image));
  151. ret = iwl4965_verify_bsm(priv);
  152. if (ret)
  153. return ret;
  154. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  155. iwl_legacy_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
  156. iwl_legacy_write_prph(priv,
  157. BSM_WR_MEM_DST_REG, IWL49_RTC_INST_LOWER_BOUND);
  158. iwl_legacy_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  159. /* Load bootstrap code into instruction SRAM now,
  160. * to prepare to load "initialize" uCode */
  161. iwl_legacy_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
  162. /* Wait for load of bootstrap uCode to finish */
  163. for (i = 0; i < 100; i++) {
  164. done = iwl_legacy_read_prph(priv, BSM_WR_CTRL_REG);
  165. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  166. break;
  167. udelay(10);
  168. }
  169. if (i < 100)
  170. IWL_DEBUG_INFO(priv, "BSM write complete, poll %d iterations\n", i);
  171. else {
  172. IWL_ERR(priv, "BSM write did not complete!\n");
  173. return -EIO;
  174. }
  175. /* Enable future boot loads whenever power management unit triggers it
  176. * (e.g. when powering back up after power-save shutdown) */
  177. iwl_legacy_write_prph(priv,
  178. BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
  179. return 0;
  180. }
  181. /**
  182. * iwl4965_set_ucode_ptrs - Set uCode address location
  183. *
  184. * Tell initialization uCode where to find runtime uCode.
  185. *
  186. * BSM registers initially contain pointers to initialization uCode.
  187. * We need to replace them to load runtime uCode inst and data,
  188. * and to save runtime data when powering down.
  189. */
  190. static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
  191. {
  192. dma_addr_t pinst;
  193. dma_addr_t pdata;
  194. int ret = 0;
  195. /* bits 35:4 for 4965 */
  196. pinst = priv->ucode_code.p_addr >> 4;
  197. pdata = priv->ucode_data_backup.p_addr >> 4;
  198. /* Tell bootstrap uCode where to find image to load */
  199. iwl_legacy_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  200. iwl_legacy_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  201. iwl_legacy_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  202. priv->ucode_data.len);
  203. /* Inst byte count must be last to set up, bit 31 signals uCode
  204. * that all new ptr/size info is in place */
  205. iwl_legacy_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  206. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  207. IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
  208. return ret;
  209. }
  210. /**
  211. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  212. *
  213. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  214. *
  215. * The 4965 "initialize" ALIVE reply contains calibration data for:
  216. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  217. * (3945 does not contain this data).
  218. *
  219. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  220. */
  221. static void iwl4965_init_alive_start(struct iwl_priv *priv)
  222. {
  223. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  224. * This is a paranoid check, because we would not have gotten the
  225. * "initialize" alive if code weren't properly loaded. */
  226. if (iwl4965_verify_ucode(priv)) {
  227. /* Runtime instruction load was bad;
  228. * take it all the way back down so we can try again */
  229. IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
  230. goto restart;
  231. }
  232. /* Calculate temperature */
  233. priv->temperature = iwl4965_hw_get_temperature(priv);
  234. /* Send pointers to protocol/runtime uCode image ... init code will
  235. * load and launch runtime uCode, which will send us another "Alive"
  236. * notification. */
  237. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  238. if (iwl4965_set_ucode_ptrs(priv)) {
  239. /* Runtime instruction load won't happen;
  240. * take it all the way back down so we can try again */
  241. IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
  242. goto restart;
  243. }
  244. return;
  245. restart:
  246. queue_work(priv->workqueue, &priv->restart);
  247. }
  248. static bool iw4965_is_ht40_channel(__le32 rxon_flags)
  249. {
  250. int chan_mod = le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK)
  251. >> RXON_FLG_CHANNEL_MODE_POS;
  252. return ((chan_mod == CHANNEL_MODE_PURE_40) ||
  253. (chan_mod == CHANNEL_MODE_MIXED));
  254. }
  255. static void iwl4965_nic_config(struct iwl_priv *priv)
  256. {
  257. unsigned long flags;
  258. u16 radio_cfg;
  259. spin_lock_irqsave(&priv->lock, flags);
  260. radio_cfg = iwl_legacy_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
  261. /* write radio config values to register */
  262. if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
  263. iwl_legacy_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  264. EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
  265. EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
  266. EEPROM_RF_CFG_DASH_MSK(radio_cfg));
  267. /* set CSR_HW_CONFIG_REG for uCode use */
  268. iwl_legacy_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  269. CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
  270. CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
  271. priv->calib_info = (struct iwl_eeprom_calib_info *)
  272. iwl_legacy_eeprom_query_addr(priv,
  273. EEPROM_4965_CALIB_TXPOWER_OFFSET);
  274. spin_unlock_irqrestore(&priv->lock, flags);
  275. }
  276. /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
  277. * Called after every association, but this runs only once!
  278. * ... once chain noise is calibrated the first time, it's good forever. */
  279. static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
  280. {
  281. struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
  282. if ((data->state == IWL_CHAIN_NOISE_ALIVE) &&
  283. iwl_legacy_is_any_associated(priv)) {
  284. struct iwl_calib_diff_gain_cmd cmd;
  285. /* clear data for chain noise calibration algorithm */
  286. data->chain_noise_a = 0;
  287. data->chain_noise_b = 0;
  288. data->chain_noise_c = 0;
  289. data->chain_signal_a = 0;
  290. data->chain_signal_b = 0;
  291. data->chain_signal_c = 0;
  292. data->beacon_count = 0;
  293. memset(&cmd, 0, sizeof(cmd));
  294. cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
  295. cmd.diff_gain_a = 0;
  296. cmd.diff_gain_b = 0;
  297. cmd.diff_gain_c = 0;
  298. if (iwl_legacy_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
  299. sizeof(cmd), &cmd))
  300. IWL_ERR(priv,
  301. "Could not send REPLY_PHY_CALIBRATION_CMD\n");
  302. data->state = IWL_CHAIN_NOISE_ACCUMULATE;
  303. IWL_DEBUG_CALIB(priv, "Run chain_noise_calibrate\n");
  304. }
  305. }
  306. static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
  307. .min_nrg_cck = 97,
  308. .max_nrg_cck = 0, /* not used, set to 0 */
  309. .auto_corr_min_ofdm = 85,
  310. .auto_corr_min_ofdm_mrc = 170,
  311. .auto_corr_min_ofdm_x1 = 105,
  312. .auto_corr_min_ofdm_mrc_x1 = 220,
  313. .auto_corr_max_ofdm = 120,
  314. .auto_corr_max_ofdm_mrc = 210,
  315. .auto_corr_max_ofdm_x1 = 140,
  316. .auto_corr_max_ofdm_mrc_x1 = 270,
  317. .auto_corr_min_cck = 125,
  318. .auto_corr_max_cck = 200,
  319. .auto_corr_min_cck_mrc = 200,
  320. .auto_corr_max_cck_mrc = 400,
  321. .nrg_th_cck = 100,
  322. .nrg_th_ofdm = 100,
  323. .barker_corr_th_min = 190,
  324. .barker_corr_th_min_mrc = 390,
  325. .nrg_th_cca = 62,
  326. };
  327. static void iwl4965_set_ct_threshold(struct iwl_priv *priv)
  328. {
  329. /* want Kelvin */
  330. priv->hw_params.ct_kill_threshold =
  331. CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY);
  332. }
  333. /**
  334. * iwl4965_hw_set_hw_params
  335. *
  336. * Called when initializing driver
  337. */
  338. static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
  339. {
  340. if (priv->cfg->mod_params->num_of_queues >= IWL_MIN_NUM_QUEUES &&
  341. priv->cfg->mod_params->num_of_queues <= IWL49_NUM_QUEUES)
  342. priv->cfg->base_params->num_of_queues =
  343. priv->cfg->mod_params->num_of_queues;
  344. priv->hw_params.max_txq_num = priv->cfg->base_params->num_of_queues;
  345. priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
  346. priv->hw_params.scd_bc_tbls_size =
  347. priv->cfg->base_params->num_of_queues *
  348. sizeof(struct iwl4965_scd_bc_tbl);
  349. priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
  350. priv->hw_params.max_stations = IWL4965_STATION_COUNT;
  351. priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id = IWL4965_BROADCAST_ID;
  352. priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
  353. priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
  354. priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
  355. priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_5GHZ);
  356. priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
  357. priv->hw_params.tx_chains_num = iwl4965_num_of_ant(priv->cfg->valid_tx_ant);
  358. priv->hw_params.rx_chains_num = iwl4965_num_of_ant(priv->cfg->valid_rx_ant);
  359. priv->hw_params.valid_tx_ant = priv->cfg->valid_tx_ant;
  360. priv->hw_params.valid_rx_ant = priv->cfg->valid_rx_ant;
  361. iwl4965_set_ct_threshold(priv);
  362. priv->hw_params.sens = &iwl4965_sensitivity;
  363. priv->hw_params.beacon_time_tsf_bits = IWL4965_EXT_BEACON_TIME_POS;
  364. return 0;
  365. }
  366. static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
  367. {
  368. s32 sign = 1;
  369. if (num < 0) {
  370. sign = -sign;
  371. num = -num;
  372. }
  373. if (denom < 0) {
  374. sign = -sign;
  375. denom = -denom;
  376. }
  377. *res = 1;
  378. *res = ((num * 2 + denom) / (denom * 2)) * sign;
  379. return 1;
  380. }
  381. /**
  382. * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
  383. *
  384. * Determines power supply voltage compensation for txpower calculations.
  385. * Returns number of 1/2-dB steps to subtract from gain table index,
  386. * to compensate for difference between power supply voltage during
  387. * factory measurements, vs. current power supply voltage.
  388. *
  389. * Voltage indication is higher for lower voltage.
  390. * Lower voltage requires more gain (lower gain table index).
  391. */
  392. static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
  393. s32 current_voltage)
  394. {
  395. s32 comp = 0;
  396. if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
  397. (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
  398. return 0;
  399. iwl4965_math_div_round(current_voltage - eeprom_voltage,
  400. TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
  401. if (current_voltage > eeprom_voltage)
  402. comp *= 2;
  403. if ((comp < -2) || (comp > 2))
  404. comp = 0;
  405. return comp;
  406. }
  407. static s32 iwl4965_get_tx_atten_grp(u16 channel)
  408. {
  409. if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
  410. channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
  411. return CALIB_CH_GROUP_5;
  412. if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
  413. channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
  414. return CALIB_CH_GROUP_1;
  415. if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
  416. channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
  417. return CALIB_CH_GROUP_2;
  418. if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
  419. channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
  420. return CALIB_CH_GROUP_3;
  421. if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
  422. channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
  423. return CALIB_CH_GROUP_4;
  424. return -EINVAL;
  425. }
  426. static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
  427. {
  428. s32 b = -1;
  429. for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
  430. if (priv->calib_info->band_info[b].ch_from == 0)
  431. continue;
  432. if ((channel >= priv->calib_info->band_info[b].ch_from)
  433. && (channel <= priv->calib_info->band_info[b].ch_to))
  434. break;
  435. }
  436. return b;
  437. }
  438. static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
  439. {
  440. s32 val;
  441. if (x2 == x1)
  442. return y1;
  443. else {
  444. iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
  445. return val + y2;
  446. }
  447. }
  448. /**
  449. * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
  450. *
  451. * Interpolates factory measurements from the two sample channels within a
  452. * sub-band, to apply to channel of interest. Interpolation is proportional to
  453. * differences in channel frequencies, which is proportional to differences
  454. * in channel number.
  455. */
  456. static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
  457. struct iwl_eeprom_calib_ch_info *chan_info)
  458. {
  459. s32 s = -1;
  460. u32 c;
  461. u32 m;
  462. const struct iwl_eeprom_calib_measure *m1;
  463. const struct iwl_eeprom_calib_measure *m2;
  464. struct iwl_eeprom_calib_measure *omeas;
  465. u32 ch_i1;
  466. u32 ch_i2;
  467. s = iwl4965_get_sub_band(priv, channel);
  468. if (s >= EEPROM_TX_POWER_BANDS) {
  469. IWL_ERR(priv, "Tx Power can not find channel %d\n", channel);
  470. return -1;
  471. }
  472. ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
  473. ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
  474. chan_info->ch_num = (u8) channel;
  475. IWL_DEBUG_TXPOWER(priv, "channel %d subband %d factory cal ch %d & %d\n",
  476. channel, s, ch_i1, ch_i2);
  477. for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
  478. for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
  479. m1 = &(priv->calib_info->band_info[s].ch1.
  480. measurements[c][m]);
  481. m2 = &(priv->calib_info->band_info[s].ch2.
  482. measurements[c][m]);
  483. omeas = &(chan_info->measurements[c][m]);
  484. omeas->actual_pow =
  485. (u8) iwl4965_interpolate_value(channel, ch_i1,
  486. m1->actual_pow,
  487. ch_i2,
  488. m2->actual_pow);
  489. omeas->gain_idx =
  490. (u8) iwl4965_interpolate_value(channel, ch_i1,
  491. m1->gain_idx, ch_i2,
  492. m2->gain_idx);
  493. omeas->temperature =
  494. (u8) iwl4965_interpolate_value(channel, ch_i1,
  495. m1->temperature,
  496. ch_i2,
  497. m2->temperature);
  498. omeas->pa_det =
  499. (s8) iwl4965_interpolate_value(channel, ch_i1,
  500. m1->pa_det, ch_i2,
  501. m2->pa_det);
  502. IWL_DEBUG_TXPOWER(priv,
  503. "chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
  504. m1->actual_pow, m2->actual_pow, omeas->actual_pow);
  505. IWL_DEBUG_TXPOWER(priv,
  506. "chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
  507. m1->gain_idx, m2->gain_idx, omeas->gain_idx);
  508. IWL_DEBUG_TXPOWER(priv,
  509. "chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
  510. m1->pa_det, m2->pa_det, omeas->pa_det);
  511. IWL_DEBUG_TXPOWER(priv,
  512. "chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
  513. m1->temperature, m2->temperature,
  514. omeas->temperature);
  515. }
  516. }
  517. return 0;
  518. }
  519. /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
  520. * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
  521. static s32 back_off_table[] = {
  522. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
  523. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
  524. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
  525. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
  526. 10 /* CCK */
  527. };
  528. /* Thermal compensation values for txpower for various frequency ranges ...
  529. * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
  530. static struct iwl4965_txpower_comp_entry {
  531. s32 degrees_per_05db_a;
  532. s32 degrees_per_05db_a_denom;
  533. } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
  534. {9, 2}, /* group 0 5.2, ch 34-43 */
  535. {4, 1}, /* group 1 5.2, ch 44-70 */
  536. {4, 1}, /* group 2 5.2, ch 71-124 */
  537. {4, 1}, /* group 3 5.2, ch 125-200 */
  538. {3, 1} /* group 4 2.4, ch all */
  539. };
  540. static s32 get_min_power_index(s32 rate_power_index, u32 band)
  541. {
  542. if (!band) {
  543. if ((rate_power_index & 7) <= 4)
  544. return MIN_TX_GAIN_INDEX_52GHZ_EXT;
  545. }
  546. return MIN_TX_GAIN_INDEX;
  547. }
  548. struct gain_entry {
  549. u8 dsp;
  550. u8 radio;
  551. };
  552. static const struct gain_entry gain_table[2][108] = {
  553. /* 5.2GHz power gain index table */
  554. {
  555. {123, 0x3F}, /* highest txpower */
  556. {117, 0x3F},
  557. {110, 0x3F},
  558. {104, 0x3F},
  559. {98, 0x3F},
  560. {110, 0x3E},
  561. {104, 0x3E},
  562. {98, 0x3E},
  563. {110, 0x3D},
  564. {104, 0x3D},
  565. {98, 0x3D},
  566. {110, 0x3C},
  567. {104, 0x3C},
  568. {98, 0x3C},
  569. {110, 0x3B},
  570. {104, 0x3B},
  571. {98, 0x3B},
  572. {110, 0x3A},
  573. {104, 0x3A},
  574. {98, 0x3A},
  575. {110, 0x39},
  576. {104, 0x39},
  577. {98, 0x39},
  578. {110, 0x38},
  579. {104, 0x38},
  580. {98, 0x38},
  581. {110, 0x37},
  582. {104, 0x37},
  583. {98, 0x37},
  584. {110, 0x36},
  585. {104, 0x36},
  586. {98, 0x36},
  587. {110, 0x35},
  588. {104, 0x35},
  589. {98, 0x35},
  590. {110, 0x34},
  591. {104, 0x34},
  592. {98, 0x34},
  593. {110, 0x33},
  594. {104, 0x33},
  595. {98, 0x33},
  596. {110, 0x32},
  597. {104, 0x32},
  598. {98, 0x32},
  599. {110, 0x31},
  600. {104, 0x31},
  601. {98, 0x31},
  602. {110, 0x30},
  603. {104, 0x30},
  604. {98, 0x30},
  605. {110, 0x25},
  606. {104, 0x25},
  607. {98, 0x25},
  608. {110, 0x24},
  609. {104, 0x24},
  610. {98, 0x24},
  611. {110, 0x23},
  612. {104, 0x23},
  613. {98, 0x23},
  614. {110, 0x22},
  615. {104, 0x18},
  616. {98, 0x18},
  617. {110, 0x17},
  618. {104, 0x17},
  619. {98, 0x17},
  620. {110, 0x16},
  621. {104, 0x16},
  622. {98, 0x16},
  623. {110, 0x15},
  624. {104, 0x15},
  625. {98, 0x15},
  626. {110, 0x14},
  627. {104, 0x14},
  628. {98, 0x14},
  629. {110, 0x13},
  630. {104, 0x13},
  631. {98, 0x13},
  632. {110, 0x12},
  633. {104, 0x08},
  634. {98, 0x08},
  635. {110, 0x07},
  636. {104, 0x07},
  637. {98, 0x07},
  638. {110, 0x06},
  639. {104, 0x06},
  640. {98, 0x06},
  641. {110, 0x05},
  642. {104, 0x05},
  643. {98, 0x05},
  644. {110, 0x04},
  645. {104, 0x04},
  646. {98, 0x04},
  647. {110, 0x03},
  648. {104, 0x03},
  649. {98, 0x03},
  650. {110, 0x02},
  651. {104, 0x02},
  652. {98, 0x02},
  653. {110, 0x01},
  654. {104, 0x01},
  655. {98, 0x01},
  656. {110, 0x00},
  657. {104, 0x00},
  658. {98, 0x00},
  659. {93, 0x00},
  660. {88, 0x00},
  661. {83, 0x00},
  662. {78, 0x00},
  663. },
  664. /* 2.4GHz power gain index table */
  665. {
  666. {110, 0x3f}, /* highest txpower */
  667. {104, 0x3f},
  668. {98, 0x3f},
  669. {110, 0x3e},
  670. {104, 0x3e},
  671. {98, 0x3e},
  672. {110, 0x3d},
  673. {104, 0x3d},
  674. {98, 0x3d},
  675. {110, 0x3c},
  676. {104, 0x3c},
  677. {98, 0x3c},
  678. {110, 0x3b},
  679. {104, 0x3b},
  680. {98, 0x3b},
  681. {110, 0x3a},
  682. {104, 0x3a},
  683. {98, 0x3a},
  684. {110, 0x39},
  685. {104, 0x39},
  686. {98, 0x39},
  687. {110, 0x38},
  688. {104, 0x38},
  689. {98, 0x38},
  690. {110, 0x37},
  691. {104, 0x37},
  692. {98, 0x37},
  693. {110, 0x36},
  694. {104, 0x36},
  695. {98, 0x36},
  696. {110, 0x35},
  697. {104, 0x35},
  698. {98, 0x35},
  699. {110, 0x34},
  700. {104, 0x34},
  701. {98, 0x34},
  702. {110, 0x33},
  703. {104, 0x33},
  704. {98, 0x33},
  705. {110, 0x32},
  706. {104, 0x32},
  707. {98, 0x32},
  708. {110, 0x31},
  709. {104, 0x31},
  710. {98, 0x31},
  711. {110, 0x30},
  712. {104, 0x30},
  713. {98, 0x30},
  714. {110, 0x6},
  715. {104, 0x6},
  716. {98, 0x6},
  717. {110, 0x5},
  718. {104, 0x5},
  719. {98, 0x5},
  720. {110, 0x4},
  721. {104, 0x4},
  722. {98, 0x4},
  723. {110, 0x3},
  724. {104, 0x3},
  725. {98, 0x3},
  726. {110, 0x2},
  727. {104, 0x2},
  728. {98, 0x2},
  729. {110, 0x1},
  730. {104, 0x1},
  731. {98, 0x1},
  732. {110, 0x0},
  733. {104, 0x0},
  734. {98, 0x0},
  735. {97, 0},
  736. {96, 0},
  737. {95, 0},
  738. {94, 0},
  739. {93, 0},
  740. {92, 0},
  741. {91, 0},
  742. {90, 0},
  743. {89, 0},
  744. {88, 0},
  745. {87, 0},
  746. {86, 0},
  747. {85, 0},
  748. {84, 0},
  749. {83, 0},
  750. {82, 0},
  751. {81, 0},
  752. {80, 0},
  753. {79, 0},
  754. {78, 0},
  755. {77, 0},
  756. {76, 0},
  757. {75, 0},
  758. {74, 0},
  759. {73, 0},
  760. {72, 0},
  761. {71, 0},
  762. {70, 0},
  763. {69, 0},
  764. {68, 0},
  765. {67, 0},
  766. {66, 0},
  767. {65, 0},
  768. {64, 0},
  769. {63, 0},
  770. {62, 0},
  771. {61, 0},
  772. {60, 0},
  773. {59, 0},
  774. }
  775. };
  776. static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
  777. u8 is_ht40, u8 ctrl_chan_high,
  778. struct iwl4965_tx_power_db *tx_power_tbl)
  779. {
  780. u8 saturation_power;
  781. s32 target_power;
  782. s32 user_target_power;
  783. s32 power_limit;
  784. s32 current_temp;
  785. s32 reg_limit;
  786. s32 current_regulatory;
  787. s32 txatten_grp = CALIB_CH_GROUP_MAX;
  788. int i;
  789. int c;
  790. const struct iwl_channel_info *ch_info = NULL;
  791. struct iwl_eeprom_calib_ch_info ch_eeprom_info;
  792. const struct iwl_eeprom_calib_measure *measurement;
  793. s16 voltage;
  794. s32 init_voltage;
  795. s32 voltage_compensation;
  796. s32 degrees_per_05db_num;
  797. s32 degrees_per_05db_denom;
  798. s32 factory_temp;
  799. s32 temperature_comp[2];
  800. s32 factory_gain_index[2];
  801. s32 factory_actual_pwr[2];
  802. s32 power_index;
  803. /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
  804. * are used for indexing into txpower table) */
  805. user_target_power = 2 * priv->tx_power_user_lmt;
  806. /* Get current (RXON) channel, band, width */
  807. IWL_DEBUG_TXPOWER(priv, "chan %d band %d is_ht40 %d\n", channel, band,
  808. is_ht40);
  809. ch_info = iwl_legacy_get_channel_info(priv, priv->band, channel);
  810. if (!iwl_legacy_is_channel_valid(ch_info))
  811. return -EINVAL;
  812. /* get txatten group, used to select 1) thermal txpower adjustment
  813. * and 2) mimo txpower balance between Tx chains. */
  814. txatten_grp = iwl4965_get_tx_atten_grp(channel);
  815. if (txatten_grp < 0) {
  816. IWL_ERR(priv, "Can't find txatten group for channel %d.\n",
  817. channel);
  818. return txatten_grp;
  819. }
  820. IWL_DEBUG_TXPOWER(priv, "channel %d belongs to txatten group %d\n",
  821. channel, txatten_grp);
  822. if (is_ht40) {
  823. if (ctrl_chan_high)
  824. channel -= 2;
  825. else
  826. channel += 2;
  827. }
  828. /* hardware txpower limits ...
  829. * saturation (clipping distortion) txpowers are in half-dBm */
  830. if (band)
  831. saturation_power = priv->calib_info->saturation_power24;
  832. else
  833. saturation_power = priv->calib_info->saturation_power52;
  834. if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
  835. saturation_power > IWL_TX_POWER_SATURATION_MAX) {
  836. if (band)
  837. saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
  838. else
  839. saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
  840. }
  841. /* regulatory txpower limits ... reg_limit values are in half-dBm,
  842. * max_power_avg values are in dBm, convert * 2 */
  843. if (is_ht40)
  844. reg_limit = ch_info->ht40_max_power_avg * 2;
  845. else
  846. reg_limit = ch_info->max_power_avg * 2;
  847. if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
  848. (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
  849. if (band)
  850. reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
  851. else
  852. reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
  853. }
  854. /* Interpolate txpower calibration values for this channel,
  855. * based on factory calibration tests on spaced channels. */
  856. iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
  857. /* calculate tx gain adjustment based on power supply voltage */
  858. voltage = le16_to_cpu(priv->calib_info->voltage);
  859. init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
  860. voltage_compensation =
  861. iwl4965_get_voltage_compensation(voltage, init_voltage);
  862. IWL_DEBUG_TXPOWER(priv, "curr volt %d eeprom volt %d volt comp %d\n",
  863. init_voltage,
  864. voltage, voltage_compensation);
  865. /* get current temperature (Celsius) */
  866. current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
  867. current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
  868. current_temp = KELVIN_TO_CELSIUS(current_temp);
  869. /* select thermal txpower adjustment params, based on channel group
  870. * (same frequency group used for mimo txatten adjustment) */
  871. degrees_per_05db_num =
  872. tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
  873. degrees_per_05db_denom =
  874. tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
  875. /* get per-chain txpower values from factory measurements */
  876. for (c = 0; c < 2; c++) {
  877. measurement = &ch_eeprom_info.measurements[c][1];
  878. /* txgain adjustment (in half-dB steps) based on difference
  879. * between factory and current temperature */
  880. factory_temp = measurement->temperature;
  881. iwl4965_math_div_round((current_temp - factory_temp) *
  882. degrees_per_05db_denom,
  883. degrees_per_05db_num,
  884. &temperature_comp[c]);
  885. factory_gain_index[c] = measurement->gain_idx;
  886. factory_actual_pwr[c] = measurement->actual_pow;
  887. IWL_DEBUG_TXPOWER(priv, "chain = %d\n", c);
  888. IWL_DEBUG_TXPOWER(priv, "fctry tmp %d, "
  889. "curr tmp %d, comp %d steps\n",
  890. factory_temp, current_temp,
  891. temperature_comp[c]);
  892. IWL_DEBUG_TXPOWER(priv, "fctry idx %d, fctry pwr %d\n",
  893. factory_gain_index[c],
  894. factory_actual_pwr[c]);
  895. }
  896. /* for each of 33 bit-rates (including 1 for CCK) */
  897. for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
  898. u8 is_mimo_rate;
  899. union iwl4965_tx_power_dual_stream tx_power;
  900. /* for mimo, reduce each chain's txpower by half
  901. * (3dB, 6 steps), so total output power is regulatory
  902. * compliant. */
  903. if (i & 0x8) {
  904. current_regulatory = reg_limit -
  905. IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
  906. is_mimo_rate = 1;
  907. } else {
  908. current_regulatory = reg_limit;
  909. is_mimo_rate = 0;
  910. }
  911. /* find txpower limit, either hardware or regulatory */
  912. power_limit = saturation_power - back_off_table[i];
  913. if (power_limit > current_regulatory)
  914. power_limit = current_regulatory;
  915. /* reduce user's txpower request if necessary
  916. * for this rate on this channel */
  917. target_power = user_target_power;
  918. if (target_power > power_limit)
  919. target_power = power_limit;
  920. IWL_DEBUG_TXPOWER(priv, "rate %d sat %d reg %d usr %d tgt %d\n",
  921. i, saturation_power - back_off_table[i],
  922. current_regulatory, user_target_power,
  923. target_power);
  924. /* for each of 2 Tx chains (radio transmitters) */
  925. for (c = 0; c < 2; c++) {
  926. s32 atten_value;
  927. if (is_mimo_rate)
  928. atten_value =
  929. (s32)le32_to_cpu(priv->card_alive_init.
  930. tx_atten[txatten_grp][c]);
  931. else
  932. atten_value = 0;
  933. /* calculate index; higher index means lower txpower */
  934. power_index = (u8) (factory_gain_index[c] -
  935. (target_power -
  936. factory_actual_pwr[c]) -
  937. temperature_comp[c] -
  938. voltage_compensation +
  939. atten_value);
  940. /* IWL_DEBUG_TXPOWER(priv, "calculated txpower index %d\n",
  941. power_index); */
  942. if (power_index < get_min_power_index(i, band))
  943. power_index = get_min_power_index(i, band);
  944. /* adjust 5 GHz index to support negative indexes */
  945. if (!band)
  946. power_index += 9;
  947. /* CCK, rate 32, reduce txpower for CCK */
  948. if (i == POWER_TABLE_CCK_ENTRY)
  949. power_index +=
  950. IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
  951. /* stay within the table! */
  952. if (power_index > 107) {
  953. IWL_WARN(priv, "txpower index %d > 107\n",
  954. power_index);
  955. power_index = 107;
  956. }
  957. if (power_index < 0) {
  958. IWL_WARN(priv, "txpower index %d < 0\n",
  959. power_index);
  960. power_index = 0;
  961. }
  962. /* fill txpower command for this rate/chain */
  963. tx_power.s.radio_tx_gain[c] =
  964. gain_table[band][power_index].radio;
  965. tx_power.s.dsp_predis_atten[c] =
  966. gain_table[band][power_index].dsp;
  967. IWL_DEBUG_TXPOWER(priv, "chain %d mimo %d index %d "
  968. "gain 0x%02x dsp %d\n",
  969. c, atten_value, power_index,
  970. tx_power.s.radio_tx_gain[c],
  971. tx_power.s.dsp_predis_atten[c]);
  972. } /* for each chain */
  973. tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
  974. } /* for each rate */
  975. return 0;
  976. }
  977. /**
  978. * iwl4965_send_tx_power - Configure the TXPOWER level user limit
  979. *
  980. * Uses the active RXON for channel, band, and characteristics (ht40, high)
  981. * The power limit is taken from priv->tx_power_user_lmt.
  982. */
  983. static int iwl4965_send_tx_power(struct iwl_priv *priv)
  984. {
  985. struct iwl4965_txpowertable_cmd cmd = { 0 };
  986. int ret;
  987. u8 band = 0;
  988. bool is_ht40 = false;
  989. u8 ctrl_chan_high = 0;
  990. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  991. if (WARN_ONCE(test_bit(STATUS_SCAN_HW, &priv->status),
  992. "TX Power requested while scanning!\n"))
  993. return -EAGAIN;
  994. band = priv->band == IEEE80211_BAND_2GHZ;
  995. is_ht40 = iw4965_is_ht40_channel(ctx->active.flags);
  996. if (is_ht40 && (ctx->active.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
  997. ctrl_chan_high = 1;
  998. cmd.band = band;
  999. cmd.channel = ctx->active.channel;
  1000. ret = iwl4965_fill_txpower_tbl(priv, band,
  1001. le16_to_cpu(ctx->active.channel),
  1002. is_ht40, ctrl_chan_high, &cmd.tx_power);
  1003. if (ret)
  1004. goto out;
  1005. ret = iwl_legacy_send_cmd_pdu(priv,
  1006. REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
  1007. out:
  1008. return ret;
  1009. }
  1010. static int iwl4965_send_rxon_assoc(struct iwl_priv *priv,
  1011. struct iwl_rxon_context *ctx)
  1012. {
  1013. int ret = 0;
  1014. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  1015. const struct iwl_legacy_rxon_cmd *rxon1 = &ctx->staging;
  1016. const struct iwl_legacy_rxon_cmd *rxon2 = &ctx->active;
  1017. if ((rxon1->flags == rxon2->flags) &&
  1018. (rxon1->filter_flags == rxon2->filter_flags) &&
  1019. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  1020. (rxon1->ofdm_ht_single_stream_basic_rates ==
  1021. rxon2->ofdm_ht_single_stream_basic_rates) &&
  1022. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  1023. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  1024. (rxon1->rx_chain == rxon2->rx_chain) &&
  1025. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  1026. IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC. Not resending.\n");
  1027. return 0;
  1028. }
  1029. rxon_assoc.flags = ctx->staging.flags;
  1030. rxon_assoc.filter_flags = ctx->staging.filter_flags;
  1031. rxon_assoc.ofdm_basic_rates = ctx->staging.ofdm_basic_rates;
  1032. rxon_assoc.cck_basic_rates = ctx->staging.cck_basic_rates;
  1033. rxon_assoc.reserved = 0;
  1034. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  1035. ctx->staging.ofdm_ht_single_stream_basic_rates;
  1036. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  1037. ctx->staging.ofdm_ht_dual_stream_basic_rates;
  1038. rxon_assoc.rx_chain_select_flags = ctx->staging.rx_chain;
  1039. ret = iwl_legacy_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
  1040. sizeof(rxon_assoc), &rxon_assoc, NULL);
  1041. return ret;
  1042. }
  1043. static int iwl4965_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
  1044. {
  1045. /* cast away the const for active_rxon in this function */
  1046. struct iwl_legacy_rxon_cmd *active_rxon = (void *)&ctx->active;
  1047. int ret;
  1048. bool new_assoc =
  1049. !!(ctx->staging.filter_flags & RXON_FILTER_ASSOC_MSK);
  1050. if (!iwl_legacy_is_alive(priv))
  1051. return -EBUSY;
  1052. if (!ctx->is_active)
  1053. return 0;
  1054. /* always get timestamp with Rx frame */
  1055. ctx->staging.flags |= RXON_FLG_TSF2HOST_MSK;
  1056. ret = iwl_legacy_check_rxon_cmd(priv, ctx);
  1057. if (ret) {
  1058. IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
  1059. return -EINVAL;
  1060. }
  1061. /*
  1062. * receive commit_rxon request
  1063. * abort any previous channel switch if still in process
  1064. */
  1065. if (test_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status) &&
  1066. (priv->switch_channel != ctx->staging.channel)) {
  1067. IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
  1068. le16_to_cpu(priv->switch_channel));
  1069. iwl_legacy_chswitch_done(priv, false);
  1070. }
  1071. /* If we don't need to send a full RXON, we can use
  1072. * iwl_rxon_assoc_cmd which is used to reconfigure filter
  1073. * and other flags for the current radio configuration. */
  1074. if (!iwl_legacy_full_rxon_required(priv, ctx)) {
  1075. ret = iwl_legacy_send_rxon_assoc(priv, ctx);
  1076. if (ret) {
  1077. IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
  1078. return ret;
  1079. }
  1080. memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
  1081. iwl_legacy_print_rx_config_cmd(priv, ctx);
  1082. /*
  1083. * We do not commit tx power settings while channel changing,
  1084. * do it now if tx power changed.
  1085. */
  1086. iwl_legacy_set_tx_power(priv, priv->tx_power_next, false);
  1087. return 0;
  1088. }
  1089. /* If we are currently associated and the new config requires
  1090. * an RXON_ASSOC and the new config wants the associated mask enabled,
  1091. * we must clear the associated from the active configuration
  1092. * before we apply the new config */
  1093. if (iwl_legacy_is_associated_ctx(ctx) && new_assoc) {
  1094. IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
  1095. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1096. ret = iwl_legacy_send_cmd_pdu(priv, ctx->rxon_cmd,
  1097. sizeof(struct iwl_legacy_rxon_cmd),
  1098. active_rxon);
  1099. /* If the mask clearing failed then we set
  1100. * active_rxon back to what it was previously */
  1101. if (ret) {
  1102. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  1103. IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
  1104. return ret;
  1105. }
  1106. iwl_legacy_clear_ucode_stations(priv, ctx);
  1107. iwl_legacy_restore_stations(priv, ctx);
  1108. ret = iwl4965_restore_default_wep_keys(priv, ctx);
  1109. if (ret) {
  1110. IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
  1111. return ret;
  1112. }
  1113. }
  1114. IWL_DEBUG_INFO(priv, "Sending RXON\n"
  1115. "* with%s RXON_FILTER_ASSOC_MSK\n"
  1116. "* channel = %d\n"
  1117. "* bssid = %pM\n",
  1118. (new_assoc ? "" : "out"),
  1119. le16_to_cpu(ctx->staging.channel),
  1120. ctx->staging.bssid_addr);
  1121. iwl_legacy_set_rxon_hwcrypto(priv, ctx,
  1122. !priv->cfg->mod_params->sw_crypto);
  1123. /* Apply the new configuration
  1124. * RXON unassoc clears the station table in uCode so restoration of
  1125. * stations is needed after it (the RXON command) completes
  1126. */
  1127. if (!new_assoc) {
  1128. ret = iwl_legacy_send_cmd_pdu(priv, ctx->rxon_cmd,
  1129. sizeof(struct iwl_legacy_rxon_cmd), &ctx->staging);
  1130. if (ret) {
  1131. IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
  1132. return ret;
  1133. }
  1134. IWL_DEBUG_INFO(priv, "Return from !new_assoc RXON.\n");
  1135. memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
  1136. iwl_legacy_clear_ucode_stations(priv, ctx);
  1137. iwl_legacy_restore_stations(priv, ctx);
  1138. ret = iwl4965_restore_default_wep_keys(priv, ctx);
  1139. if (ret) {
  1140. IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
  1141. return ret;
  1142. }
  1143. }
  1144. if (new_assoc) {
  1145. priv->start_calib = 0;
  1146. /* Apply the new configuration
  1147. * RXON assoc doesn't clear the station table in uCode,
  1148. */
  1149. ret = iwl_legacy_send_cmd_pdu(priv, ctx->rxon_cmd,
  1150. sizeof(struct iwl_legacy_rxon_cmd), &ctx->staging);
  1151. if (ret) {
  1152. IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
  1153. return ret;
  1154. }
  1155. memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
  1156. }
  1157. iwl_legacy_print_rx_config_cmd(priv, ctx);
  1158. iwl4965_init_sensitivity(priv);
  1159. /* If we issue a new RXON command which required a tune then we must
  1160. * send a new TXPOWER command or we won't be able to Tx any frames */
  1161. ret = iwl_legacy_set_tx_power(priv, priv->tx_power_next, true);
  1162. if (ret) {
  1163. IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
  1164. return ret;
  1165. }
  1166. return 0;
  1167. }
  1168. static int iwl4965_hw_channel_switch(struct iwl_priv *priv,
  1169. struct ieee80211_channel_switch *ch_switch)
  1170. {
  1171. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  1172. int rc;
  1173. u8 band = 0;
  1174. bool is_ht40 = false;
  1175. u8 ctrl_chan_high = 0;
  1176. struct iwl4965_channel_switch_cmd cmd;
  1177. const struct iwl_channel_info *ch_info;
  1178. u32 switch_time_in_usec, ucode_switch_time;
  1179. u16 ch;
  1180. u32 tsf_low;
  1181. u8 switch_count;
  1182. u16 beacon_interval = le16_to_cpu(ctx->timing.beacon_interval);
  1183. struct ieee80211_vif *vif = ctx->vif;
  1184. band = priv->band == IEEE80211_BAND_2GHZ;
  1185. is_ht40 = iw4965_is_ht40_channel(ctx->staging.flags);
  1186. if (is_ht40 &&
  1187. (ctx->staging.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
  1188. ctrl_chan_high = 1;
  1189. cmd.band = band;
  1190. cmd.expect_beacon = 0;
  1191. ch = ch_switch->channel->hw_value;
  1192. cmd.channel = cpu_to_le16(ch);
  1193. cmd.rxon_flags = ctx->staging.flags;
  1194. cmd.rxon_filter_flags = ctx->staging.filter_flags;
  1195. switch_count = ch_switch->count;
  1196. tsf_low = ch_switch->timestamp & 0x0ffffffff;
  1197. /*
  1198. * calculate the ucode channel switch time
  1199. * adding TSF as one of the factor for when to switch
  1200. */
  1201. if ((priv->ucode_beacon_time > tsf_low) && beacon_interval) {
  1202. if (switch_count > ((priv->ucode_beacon_time - tsf_low) /
  1203. beacon_interval)) {
  1204. switch_count -= (priv->ucode_beacon_time -
  1205. tsf_low) / beacon_interval;
  1206. } else
  1207. switch_count = 0;
  1208. }
  1209. if (switch_count <= 1)
  1210. cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
  1211. else {
  1212. switch_time_in_usec =
  1213. vif->bss_conf.beacon_int * switch_count * TIME_UNIT;
  1214. ucode_switch_time = iwl_legacy_usecs_to_beacons(priv,
  1215. switch_time_in_usec,
  1216. beacon_interval);
  1217. cmd.switch_time = iwl_legacy_add_beacon_time(priv,
  1218. priv->ucode_beacon_time,
  1219. ucode_switch_time,
  1220. beacon_interval);
  1221. }
  1222. IWL_DEBUG_11H(priv, "uCode time for the switch is 0x%x\n",
  1223. cmd.switch_time);
  1224. ch_info = iwl_legacy_get_channel_info(priv, priv->band, ch);
  1225. if (ch_info)
  1226. cmd.expect_beacon = iwl_legacy_is_channel_radar(ch_info);
  1227. else {
  1228. IWL_ERR(priv, "invalid channel switch from %u to %u\n",
  1229. ctx->active.channel, ch);
  1230. return -EFAULT;
  1231. }
  1232. rc = iwl4965_fill_txpower_tbl(priv, band, ch, is_ht40,
  1233. ctrl_chan_high, &cmd.tx_power);
  1234. if (rc) {
  1235. IWL_DEBUG_11H(priv, "error:%d fill txpower_tbl\n", rc);
  1236. return rc;
  1237. }
  1238. return iwl_legacy_send_cmd_pdu(priv,
  1239. REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
  1240. }
  1241. /**
  1242. * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
  1243. */
  1244. static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
  1245. struct iwl_tx_queue *txq,
  1246. u16 byte_cnt)
  1247. {
  1248. struct iwl4965_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
  1249. int txq_id = txq->q.id;
  1250. int write_ptr = txq->q.write_ptr;
  1251. int len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
  1252. __le16 bc_ent;
  1253. WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
  1254. bc_ent = cpu_to_le16(len & 0xFFF);
  1255. /* Set up byte count within first 256 entries */
  1256. scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
  1257. /* If within first 64 entries, duplicate at end */
  1258. if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
  1259. scd_bc_tbl[txq_id].
  1260. tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
  1261. }
  1262. /**
  1263. * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
  1264. * @statistics: Provides the temperature reading from the uCode
  1265. *
  1266. * A return of <0 indicates bogus data in the statistics
  1267. */
  1268. static int iwl4965_hw_get_temperature(struct iwl_priv *priv)
  1269. {
  1270. s32 temperature;
  1271. s32 vt;
  1272. s32 R1, R2, R3;
  1273. u32 R4;
  1274. if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
  1275. (priv->_4965.statistics.flag &
  1276. STATISTICS_REPLY_FLG_HT40_MODE_MSK)) {
  1277. IWL_DEBUG_TEMP(priv, "Running HT40 temperature calibration\n");
  1278. R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
  1279. R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
  1280. R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
  1281. R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
  1282. } else {
  1283. IWL_DEBUG_TEMP(priv, "Running temperature calibration\n");
  1284. R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
  1285. R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
  1286. R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
  1287. R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
  1288. }
  1289. /*
  1290. * Temperature is only 23 bits, so sign extend out to 32.
  1291. *
  1292. * NOTE If we haven't received a statistics notification yet
  1293. * with an updated temperature, use R4 provided to us in the
  1294. * "initialize" ALIVE response.
  1295. */
  1296. if (!test_bit(STATUS_TEMPERATURE, &priv->status))
  1297. vt = sign_extend32(R4, 23);
  1298. else
  1299. vt = sign_extend32(le32_to_cpu(priv->_4965.statistics.
  1300. general.common.temperature), 23);
  1301. IWL_DEBUG_TEMP(priv, "Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
  1302. if (R3 == R1) {
  1303. IWL_ERR(priv, "Calibration conflict R1 == R3\n");
  1304. return -1;
  1305. }
  1306. /* Calculate temperature in degrees Kelvin, adjust by 97%.
  1307. * Add offset to center the adjustment around 0 degrees Centigrade. */
  1308. temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
  1309. temperature /= (R3 - R1);
  1310. temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
  1311. IWL_DEBUG_TEMP(priv, "Calibrated temperature: %dK, %dC\n",
  1312. temperature, KELVIN_TO_CELSIUS(temperature));
  1313. return temperature;
  1314. }
  1315. /* Adjust Txpower only if temperature variance is greater than threshold. */
  1316. #define IWL_TEMPERATURE_THRESHOLD 3
  1317. /**
  1318. * iwl4965_is_temp_calib_needed - determines if new calibration is needed
  1319. *
  1320. * If the temperature changed has changed sufficiently, then a recalibration
  1321. * is needed.
  1322. *
  1323. * Assumes caller will replace priv->last_temperature once calibration
  1324. * executed.
  1325. */
  1326. static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
  1327. {
  1328. int temp_diff;
  1329. if (!test_bit(STATUS_STATISTICS, &priv->status)) {
  1330. IWL_DEBUG_TEMP(priv, "Temperature not updated -- no statistics.\n");
  1331. return 0;
  1332. }
  1333. temp_diff = priv->temperature - priv->last_temperature;
  1334. /* get absolute value */
  1335. if (temp_diff < 0) {
  1336. IWL_DEBUG_POWER(priv, "Getting cooler, delta %d\n", temp_diff);
  1337. temp_diff = -temp_diff;
  1338. } else if (temp_diff == 0)
  1339. IWL_DEBUG_POWER(priv, "Temperature unchanged\n");
  1340. else
  1341. IWL_DEBUG_POWER(priv, "Getting warmer, delta %d\n", temp_diff);
  1342. if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
  1343. IWL_DEBUG_POWER(priv, " => thermal txpower calib not needed\n");
  1344. return 0;
  1345. }
  1346. IWL_DEBUG_POWER(priv, " => thermal txpower calib needed\n");
  1347. return 1;
  1348. }
  1349. static void iwl4965_temperature_calib(struct iwl_priv *priv)
  1350. {
  1351. s32 temp;
  1352. temp = iwl4965_hw_get_temperature(priv);
  1353. if (IWL_TX_POWER_TEMPERATURE_OUT_OF_RANGE(temp))
  1354. return;
  1355. if (priv->temperature != temp) {
  1356. if (priv->temperature)
  1357. IWL_DEBUG_TEMP(priv, "Temperature changed "
  1358. "from %dC to %dC\n",
  1359. KELVIN_TO_CELSIUS(priv->temperature),
  1360. KELVIN_TO_CELSIUS(temp));
  1361. else
  1362. IWL_DEBUG_TEMP(priv, "Temperature "
  1363. "initialized to %dC\n",
  1364. KELVIN_TO_CELSIUS(temp));
  1365. }
  1366. priv->temperature = temp;
  1367. set_bit(STATUS_TEMPERATURE, &priv->status);
  1368. if (!priv->disable_tx_power_cal &&
  1369. unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
  1370. iwl4965_is_temp_calib_needed(priv))
  1371. queue_work(priv->workqueue, &priv->txpower_work);
  1372. }
  1373. static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
  1374. {
  1375. switch (cmd_id) {
  1376. case REPLY_RXON:
  1377. return (u16) sizeof(struct iwl4965_rxon_cmd);
  1378. default:
  1379. return len;
  1380. }
  1381. }
  1382. static u16 iwl4965_build_addsta_hcmd(const struct iwl_legacy_addsta_cmd *cmd,
  1383. u8 *data)
  1384. {
  1385. struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
  1386. addsta->mode = cmd->mode;
  1387. memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
  1388. memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
  1389. addsta->station_flags = cmd->station_flags;
  1390. addsta->station_flags_msk = cmd->station_flags_msk;
  1391. addsta->tid_disable_tx = cmd->tid_disable_tx;
  1392. addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
  1393. addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
  1394. addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
  1395. addsta->sleep_tx_count = cmd->sleep_tx_count;
  1396. addsta->reserved1 = cpu_to_le16(0);
  1397. addsta->reserved2 = cpu_to_le16(0);
  1398. return (u16)sizeof(struct iwl4965_addsta_cmd);
  1399. }
  1400. static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
  1401. {
  1402. return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
  1403. }
  1404. /**
  1405. * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
  1406. */
  1407. static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
  1408. struct iwl_ht_agg *agg,
  1409. struct iwl4965_tx_resp *tx_resp,
  1410. int txq_id, u16 start_idx)
  1411. {
  1412. u16 status;
  1413. struct agg_tx_status *frame_status = tx_resp->u.agg_status;
  1414. struct ieee80211_tx_info *info = NULL;
  1415. struct ieee80211_hdr *hdr = NULL;
  1416. u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  1417. int i, sh, idx;
  1418. u16 seq;
  1419. if (agg->wait_for_ba)
  1420. IWL_DEBUG_TX_REPLY(priv, "got tx response w/o block-ack\n");
  1421. agg->frame_count = tx_resp->frame_count;
  1422. agg->start_idx = start_idx;
  1423. agg->rate_n_flags = rate_n_flags;
  1424. agg->bitmap = 0;
  1425. /* num frames attempted by Tx command */
  1426. if (agg->frame_count == 1) {
  1427. /* Only one frame was attempted; no block-ack will arrive */
  1428. status = le16_to_cpu(frame_status[0].status);
  1429. idx = start_idx;
  1430. IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n",
  1431. agg->frame_count, agg->start_idx, idx);
  1432. info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb);
  1433. info->status.rates[0].count = tx_resp->failure_frame + 1;
  1434. info->flags &= ~IEEE80211_TX_CTL_AMPDU;
  1435. info->flags |= iwl4965_tx_status_to_mac80211(status);
  1436. iwl4965_hwrate_to_tx_control(priv, rate_n_flags, info);
  1437. IWL_DEBUG_TX_REPLY(priv, "1 Frame 0x%x failure :%d\n",
  1438. status & 0xff, tx_resp->failure_frame);
  1439. IWL_DEBUG_TX_REPLY(priv, "Rate Info rate_n_flags=%x\n", rate_n_flags);
  1440. agg->wait_for_ba = 0;
  1441. } else {
  1442. /* Two or more frames were attempted; expect block-ack */
  1443. u64 bitmap = 0;
  1444. int start = agg->start_idx;
  1445. /* Construct bit-map of pending frames within Tx window */
  1446. for (i = 0; i < agg->frame_count; i++) {
  1447. u16 sc;
  1448. status = le16_to_cpu(frame_status[i].status);
  1449. seq = le16_to_cpu(frame_status[i].sequence);
  1450. idx = SEQ_TO_INDEX(seq);
  1451. txq_id = SEQ_TO_QUEUE(seq);
  1452. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  1453. AGG_TX_STATE_ABORT_MSK))
  1454. continue;
  1455. IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, txq_id=%d idx=%d\n",
  1456. agg->frame_count, txq_id, idx);
  1457. hdr = iwl_legacy_tx_queue_get_hdr(priv, txq_id, idx);
  1458. if (!hdr) {
  1459. IWL_ERR(priv,
  1460. "BUG_ON idx doesn't point to valid skb"
  1461. " idx=%d, txq_id=%d\n", idx, txq_id);
  1462. return -1;
  1463. }
  1464. sc = le16_to_cpu(hdr->seq_ctrl);
  1465. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  1466. IWL_ERR(priv,
  1467. "BUG_ON idx doesn't match seq control"
  1468. " idx=%d, seq_idx=%d, seq=%d\n",
  1469. idx, SEQ_TO_SN(sc), hdr->seq_ctrl);
  1470. return -1;
  1471. }
  1472. IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n",
  1473. i, idx, SEQ_TO_SN(sc));
  1474. sh = idx - start;
  1475. if (sh > 64) {
  1476. sh = (start - idx) + 0xff;
  1477. bitmap = bitmap << sh;
  1478. sh = 0;
  1479. start = idx;
  1480. } else if (sh < -64)
  1481. sh = 0xff - (start - idx);
  1482. else if (sh < 0) {
  1483. sh = start - idx;
  1484. start = idx;
  1485. bitmap = bitmap << sh;
  1486. sh = 0;
  1487. }
  1488. bitmap |= 1ULL << sh;
  1489. IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n",
  1490. start, (unsigned long long)bitmap);
  1491. }
  1492. agg->bitmap = bitmap;
  1493. agg->start_idx = start;
  1494. IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n",
  1495. agg->frame_count, agg->start_idx,
  1496. (unsigned long long)agg->bitmap);
  1497. if (bitmap)
  1498. agg->wait_for_ba = 1;
  1499. }
  1500. return 0;
  1501. }
  1502. static u8 iwl4965_find_station(struct iwl_priv *priv, const u8 *addr)
  1503. {
  1504. int i;
  1505. int start = 0;
  1506. int ret = IWL_INVALID_STATION;
  1507. unsigned long flags;
  1508. if ((priv->iw_mode == NL80211_IFTYPE_ADHOC))
  1509. start = IWL_STA_ID;
  1510. if (is_broadcast_ether_addr(addr))
  1511. return priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id;
  1512. spin_lock_irqsave(&priv->sta_lock, flags);
  1513. for (i = start; i < priv->hw_params.max_stations; i++)
  1514. if (priv->stations[i].used &&
  1515. (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  1516. addr))) {
  1517. ret = i;
  1518. goto out;
  1519. }
  1520. IWL_DEBUG_ASSOC_LIMIT(priv, "can not find STA %pM total %d\n",
  1521. addr, priv->num_stations);
  1522. out:
  1523. /*
  1524. * It may be possible that more commands interacting with stations
  1525. * arrive before we completed processing the adding of
  1526. * station
  1527. */
  1528. if (ret != IWL_INVALID_STATION &&
  1529. (!(priv->stations[ret].used & IWL_STA_UCODE_ACTIVE) ||
  1530. ((priv->stations[ret].used & IWL_STA_UCODE_ACTIVE) &&
  1531. (priv->stations[ret].used & IWL_STA_UCODE_INPROGRESS)))) {
  1532. IWL_ERR(priv, "Requested station info for sta %d before ready.\n",
  1533. ret);
  1534. ret = IWL_INVALID_STATION;
  1535. }
  1536. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1537. return ret;
  1538. }
  1539. static int iwl4965_get_ra_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
  1540. {
  1541. if (priv->iw_mode == NL80211_IFTYPE_STATION) {
  1542. return IWL_AP_ID;
  1543. } else {
  1544. u8 *da = ieee80211_get_DA(hdr);
  1545. return iwl4965_find_station(priv, da);
  1546. }
  1547. }
  1548. /**
  1549. * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
  1550. */
  1551. static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
  1552. struct iwl_rx_mem_buffer *rxb)
  1553. {
  1554. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1555. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  1556. int txq_id = SEQ_TO_QUEUE(sequence);
  1557. int index = SEQ_TO_INDEX(sequence);
  1558. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  1559. struct ieee80211_hdr *hdr;
  1560. struct ieee80211_tx_info *info;
  1561. struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  1562. u32 status = le32_to_cpu(tx_resp->u.status);
  1563. int uninitialized_var(tid);
  1564. int sta_id;
  1565. int freed;
  1566. u8 *qc = NULL;
  1567. unsigned long flags;
  1568. if ((index >= txq->q.n_bd) || (iwl_legacy_queue_used(&txq->q, index) == 0)) {
  1569. IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
  1570. "is out of range [0-%d] %d %d\n", txq_id,
  1571. index, txq->q.n_bd, txq->q.write_ptr,
  1572. txq->q.read_ptr);
  1573. return;
  1574. }
  1575. txq->time_stamp = jiffies;
  1576. info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb);
  1577. memset(&info->status, 0, sizeof(info->status));
  1578. hdr = iwl_legacy_tx_queue_get_hdr(priv, txq_id, index);
  1579. if (ieee80211_is_data_qos(hdr->frame_control)) {
  1580. qc = ieee80211_get_qos_ctl(hdr);
  1581. tid = qc[0] & 0xf;
  1582. }
  1583. sta_id = iwl4965_get_ra_sta_id(priv, hdr);
  1584. if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
  1585. IWL_ERR(priv, "Station not known\n");
  1586. return;
  1587. }
  1588. spin_lock_irqsave(&priv->sta_lock, flags);
  1589. if (txq->sched_retry) {
  1590. const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
  1591. struct iwl_ht_agg *agg = NULL;
  1592. WARN_ON(!qc);
  1593. agg = &priv->stations[sta_id].tid[tid].agg;
  1594. iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
  1595. /* check if BAR is needed */
  1596. if ((tx_resp->frame_count == 1) && !iwl4965_is_tx_success(status))
  1597. info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
  1598. if (txq->q.read_ptr != (scd_ssn & 0xff)) {
  1599. index = iwl_legacy_queue_dec_wrap(scd_ssn & 0xff,
  1600. txq->q.n_bd);
  1601. IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn "
  1602. "%d index %d\n", scd_ssn , index);
  1603. freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  1604. if (qc)
  1605. iwl4965_free_tfds_in_queue(priv, sta_id,
  1606. tid, freed);
  1607. if (priv->mac80211_registered &&
  1608. (iwl_legacy_queue_space(&txq->q) > txq->q.low_mark)
  1609. && (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA))
  1610. iwl_legacy_wake_queue(priv, txq);
  1611. }
  1612. } else {
  1613. info->status.rates[0].count = tx_resp->failure_frame + 1;
  1614. info->flags |= iwl4965_tx_status_to_mac80211(status);
  1615. iwl4965_hwrate_to_tx_control(priv,
  1616. le32_to_cpu(tx_resp->rate_n_flags),
  1617. info);
  1618. IWL_DEBUG_TX_REPLY(priv, "TXQ %d status %s (0x%08x) "
  1619. "rate_n_flags 0x%x retries %d\n",
  1620. txq_id,
  1621. iwl4965_get_tx_fail_reason(status), status,
  1622. le32_to_cpu(tx_resp->rate_n_flags),
  1623. tx_resp->failure_frame);
  1624. freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  1625. if (qc && likely(sta_id != IWL_INVALID_STATION))
  1626. iwl4965_free_tfds_in_queue(priv, sta_id, tid, freed);
  1627. else if (sta_id == IWL_INVALID_STATION)
  1628. IWL_DEBUG_TX_REPLY(priv, "Station not known\n");
  1629. if (priv->mac80211_registered &&
  1630. (iwl_legacy_queue_space(&txq->q) > txq->q.low_mark))
  1631. iwl_legacy_wake_queue(priv, txq);
  1632. }
  1633. if (qc && likely(sta_id != IWL_INVALID_STATION))
  1634. iwl4965_txq_check_empty(priv, sta_id, tid, txq_id);
  1635. iwl4965_check_abort_status(priv, tx_resp->frame_count, status);
  1636. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1637. }
  1638. static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
  1639. struct iwl_rx_mem_buffer *rxb)
  1640. {
  1641. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1642. struct iwl4965_beacon_notif *beacon = (void *)pkt->u.raw;
  1643. u8 rate __maybe_unused =
  1644. iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  1645. IWL_DEBUG_RX(priv, "beacon status %#x, retries:%d ibssmgr:%d "
  1646. "tsf:0x%.8x%.8x rate:%d\n",
  1647. le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
  1648. beacon->beacon_notify_hdr.failure_frame,
  1649. le32_to_cpu(beacon->ibss_mgr_status),
  1650. le32_to_cpu(beacon->high_tsf),
  1651. le32_to_cpu(beacon->low_tsf), rate);
  1652. priv->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
  1653. }
  1654. /* Set up 4965-specific Rx frame reply handlers */
  1655. static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
  1656. {
  1657. /* Legacy Rx frames */
  1658. priv->rx_handlers[REPLY_RX] = iwl4965_rx_reply_rx;
  1659. /* Tx response */
  1660. priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
  1661. priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
  1662. }
  1663. static struct iwl_hcmd_ops iwl4965_hcmd = {
  1664. .rxon_assoc = iwl4965_send_rxon_assoc,
  1665. .commit_rxon = iwl4965_commit_rxon,
  1666. .set_rxon_chain = iwl4965_set_rxon_chain,
  1667. };
  1668. static void iwl4965_post_scan(struct iwl_priv *priv)
  1669. {
  1670. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  1671. /*
  1672. * Since setting the RXON may have been deferred while
  1673. * performing the scan, fire one off if needed
  1674. */
  1675. if (memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging)))
  1676. iwl_legacy_commit_rxon(priv, ctx);
  1677. }
  1678. static void iwl4965_post_associate(struct iwl_priv *priv)
  1679. {
  1680. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  1681. struct ieee80211_vif *vif = ctx->vif;
  1682. struct ieee80211_conf *conf = NULL;
  1683. int ret = 0;
  1684. if (!vif || !priv->is_open)
  1685. return;
  1686. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1687. return;
  1688. iwl_legacy_scan_cancel_timeout(priv, 200);
  1689. conf = iwl_legacy_ieee80211_get_hw_conf(priv->hw);
  1690. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1691. iwl_legacy_commit_rxon(priv, ctx);
  1692. ret = iwl_legacy_send_rxon_timing(priv, ctx);
  1693. if (ret)
  1694. IWL_WARN(priv, "RXON timing - "
  1695. "Attempting to continue.\n");
  1696. ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  1697. iwl_legacy_set_rxon_ht(priv, &priv->current_ht_config);
  1698. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1699. priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
  1700. ctx->staging.assoc_id = cpu_to_le16(vif->bss_conf.aid);
  1701. IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
  1702. vif->bss_conf.aid, vif->bss_conf.beacon_int);
  1703. if (vif->bss_conf.use_short_preamble)
  1704. ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1705. else
  1706. ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1707. if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
  1708. if (vif->bss_conf.use_short_slot)
  1709. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1710. else
  1711. ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1712. }
  1713. iwl_legacy_commit_rxon(priv, ctx);
  1714. IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
  1715. vif->bss_conf.aid, ctx->active.bssid_addr);
  1716. switch (vif->type) {
  1717. case NL80211_IFTYPE_STATION:
  1718. break;
  1719. case NL80211_IFTYPE_ADHOC:
  1720. iwl4965_send_beacon_cmd(priv);
  1721. break;
  1722. default:
  1723. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  1724. __func__, vif->type);
  1725. break;
  1726. }
  1727. /* the chain noise calibration will enabled PM upon completion
  1728. * If chain noise has already been run, then we need to enable
  1729. * power management here */
  1730. if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
  1731. iwl_legacy_power_update_mode(priv, false);
  1732. /* Enable Rx differential gain and sensitivity calibrations */
  1733. iwl4965_chain_noise_reset(priv);
  1734. priv->start_calib = 1;
  1735. }
  1736. static void iwl4965_config_ap(struct iwl_priv *priv)
  1737. {
  1738. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  1739. struct ieee80211_vif *vif = ctx->vif;
  1740. int ret = 0;
  1741. lockdep_assert_held(&priv->mutex);
  1742. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1743. return;
  1744. /* The following should be done only at AP bring up */
  1745. if (!iwl_legacy_is_associated_ctx(ctx)) {
  1746. /* RXON - unassoc (to set timing command) */
  1747. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1748. iwl_legacy_commit_rxon(priv, ctx);
  1749. /* RXON Timing */
  1750. ret = iwl_legacy_send_rxon_timing(priv, ctx);
  1751. if (ret)
  1752. IWL_WARN(priv, "RXON timing failed - "
  1753. "Attempting to continue.\n");
  1754. /* AP has all antennas */
  1755. priv->chain_noise_data.active_chains =
  1756. priv->hw_params.valid_rx_ant;
  1757. iwl_legacy_set_rxon_ht(priv, &priv->current_ht_config);
  1758. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1759. priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
  1760. ctx->staging.assoc_id = 0;
  1761. if (vif->bss_conf.use_short_preamble)
  1762. ctx->staging.flags |=
  1763. RXON_FLG_SHORT_PREAMBLE_MSK;
  1764. else
  1765. ctx->staging.flags &=
  1766. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1767. if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
  1768. if (vif->bss_conf.use_short_slot)
  1769. ctx->staging.flags |=
  1770. RXON_FLG_SHORT_SLOT_MSK;
  1771. else
  1772. ctx->staging.flags &=
  1773. ~RXON_FLG_SHORT_SLOT_MSK;
  1774. }
  1775. /* need to send beacon cmd before committing assoc RXON! */
  1776. iwl4965_send_beacon_cmd(priv);
  1777. /* restore RXON assoc */
  1778. ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  1779. iwl_legacy_commit_rxon(priv, ctx);
  1780. }
  1781. iwl4965_send_beacon_cmd(priv);
  1782. }
  1783. static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
  1784. .get_hcmd_size = iwl4965_get_hcmd_size,
  1785. .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
  1786. .request_scan = iwl4965_request_scan,
  1787. .post_scan = iwl4965_post_scan,
  1788. };
  1789. static struct iwl_lib_ops iwl4965_lib = {
  1790. .set_hw_params = iwl4965_hw_set_hw_params,
  1791. .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
  1792. .txq_attach_buf_to_tfd = iwl4965_hw_txq_attach_buf_to_tfd,
  1793. .txq_free_tfd = iwl4965_hw_txq_free_tfd,
  1794. .txq_init = iwl4965_hw_tx_queue_init,
  1795. .rx_handler_setup = iwl4965_rx_handler_setup,
  1796. .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
  1797. .init_alive_start = iwl4965_init_alive_start,
  1798. .load_ucode = iwl4965_load_bsm,
  1799. .dump_nic_error_log = iwl4965_dump_nic_error_log,
  1800. .dump_fh = iwl4965_dump_fh,
  1801. .set_channel_switch = iwl4965_hw_channel_switch,
  1802. .apm_ops = {
  1803. .init = iwl_legacy_apm_init,
  1804. .config = iwl4965_nic_config,
  1805. },
  1806. .eeprom_ops = {
  1807. .regulatory_bands = {
  1808. EEPROM_REGULATORY_BAND_1_CHANNELS,
  1809. EEPROM_REGULATORY_BAND_2_CHANNELS,
  1810. EEPROM_REGULATORY_BAND_3_CHANNELS,
  1811. EEPROM_REGULATORY_BAND_4_CHANNELS,
  1812. EEPROM_REGULATORY_BAND_5_CHANNELS,
  1813. EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS,
  1814. EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS
  1815. },
  1816. .acquire_semaphore = iwl4965_eeprom_acquire_semaphore,
  1817. .release_semaphore = iwl4965_eeprom_release_semaphore,
  1818. },
  1819. .send_tx_power = iwl4965_send_tx_power,
  1820. .update_chain_flags = iwl4965_update_chain_flags,
  1821. .temp_ops = {
  1822. .temperature = iwl4965_temperature_calib,
  1823. },
  1824. .debugfs_ops = {
  1825. .rx_stats_read = iwl4965_ucode_rx_stats_read,
  1826. .tx_stats_read = iwl4965_ucode_tx_stats_read,
  1827. .general_stats_read = iwl4965_ucode_general_stats_read,
  1828. },
  1829. };
  1830. static const struct iwl_legacy_ops iwl4965_legacy_ops = {
  1831. .post_associate = iwl4965_post_associate,
  1832. .config_ap = iwl4965_config_ap,
  1833. .manage_ibss_station = iwl4965_manage_ibss_station,
  1834. .update_bcast_stations = iwl4965_update_bcast_stations,
  1835. };
  1836. struct ieee80211_ops iwl4965_hw_ops = {
  1837. .tx = iwl4965_mac_tx,
  1838. .start = iwl4965_mac_start,
  1839. .stop = iwl4965_mac_stop,
  1840. .add_interface = iwl_legacy_mac_add_interface,
  1841. .remove_interface = iwl_legacy_mac_remove_interface,
  1842. .change_interface = iwl_legacy_mac_change_interface,
  1843. .config = iwl_legacy_mac_config,
  1844. .configure_filter = iwl4965_configure_filter,
  1845. .set_key = iwl4965_mac_set_key,
  1846. .update_tkip_key = iwl4965_mac_update_tkip_key,
  1847. .conf_tx = iwl_legacy_mac_conf_tx,
  1848. .reset_tsf = iwl_legacy_mac_reset_tsf,
  1849. .bss_info_changed = iwl_legacy_mac_bss_info_changed,
  1850. .ampdu_action = iwl4965_mac_ampdu_action,
  1851. .hw_scan = iwl_legacy_mac_hw_scan,
  1852. .sta_add = iwl4965_mac_sta_add,
  1853. .sta_remove = iwl_legacy_mac_sta_remove,
  1854. .channel_switch = iwl4965_mac_channel_switch,
  1855. .tx_last_beacon = iwl_legacy_mac_tx_last_beacon,
  1856. };
  1857. static const struct iwl_ops iwl4965_ops = {
  1858. .lib = &iwl4965_lib,
  1859. .hcmd = &iwl4965_hcmd,
  1860. .utils = &iwl4965_hcmd_utils,
  1861. .led = &iwl4965_led_ops,
  1862. .legacy = &iwl4965_legacy_ops,
  1863. .ieee80211_ops = &iwl4965_hw_ops,
  1864. };
  1865. static struct iwl_base_params iwl4965_base_params = {
  1866. .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
  1867. .num_of_queues = IWL49_NUM_QUEUES,
  1868. .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
  1869. .pll_cfg_val = 0,
  1870. .set_l0s = true,
  1871. .use_bsm = true,
  1872. .led_compensation = 61,
  1873. .chain_noise_num_beacons = IWL4965_CAL_NUM_BEACONS,
  1874. .wd_timeout = IWL_DEF_WD_TIMEOUT,
  1875. .temperature_kelvin = true,
  1876. .ucode_tracing = true,
  1877. .sensitivity_calib_by_driver = true,
  1878. .chain_noise_calib_by_driver = true,
  1879. };
  1880. struct iwl_cfg iwl4965_cfg = {
  1881. .name = "Intel(R) Wireless WiFi Link 4965AGN",
  1882. .fw_name_pre = IWL4965_FW_PRE,
  1883. .ucode_api_max = IWL4965_UCODE_API_MAX,
  1884. .ucode_api_min = IWL4965_UCODE_API_MIN,
  1885. .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
  1886. .valid_tx_ant = ANT_AB,
  1887. .valid_rx_ant = ANT_ABC,
  1888. .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
  1889. .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
  1890. .ops = &iwl4965_ops,
  1891. .mod_params = &iwl4965_mod_params,
  1892. .base_params = &iwl4965_base_params,
  1893. .led_mode = IWL_LED_BLINK,
  1894. /*
  1895. * Force use of chains B and C for scan RX on 5 GHz band
  1896. * because the device has off-channel reception on chain A.
  1897. */
  1898. .scan_rx_antennas[IEEE80211_BAND_5GHZ] = ANT_BC,
  1899. };
  1900. /* Module firmware */
  1901. MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX));