calib.c 12 KB

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  1. /*
  2. * Copyright (c) 2008-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include "hw.h"
  17. #include "hw-ops.h"
  18. #include <linux/export.h>
  19. /* Common calibration code */
  20. #define ATH9K_NF_TOO_HIGH -60
  21. static int16_t ath9k_hw_get_nf_hist_mid(int16_t *nfCalBuffer)
  22. {
  23. int16_t nfval;
  24. int16_t sort[ATH9K_NF_CAL_HIST_MAX];
  25. int i, j;
  26. for (i = 0; i < ATH9K_NF_CAL_HIST_MAX; i++)
  27. sort[i] = nfCalBuffer[i];
  28. for (i = 0; i < ATH9K_NF_CAL_HIST_MAX - 1; i++) {
  29. for (j = 1; j < ATH9K_NF_CAL_HIST_MAX - i; j++) {
  30. if (sort[j] > sort[j - 1]) {
  31. nfval = sort[j];
  32. sort[j] = sort[j - 1];
  33. sort[j - 1] = nfval;
  34. }
  35. }
  36. }
  37. nfval = sort[(ATH9K_NF_CAL_HIST_MAX - 1) >> 1];
  38. return nfval;
  39. }
  40. static struct ath_nf_limits *ath9k_hw_get_nf_limits(struct ath_hw *ah,
  41. struct ath9k_channel *chan)
  42. {
  43. struct ath_nf_limits *limit;
  44. if (!chan || IS_CHAN_2GHZ(chan))
  45. limit = &ah->nf_2g;
  46. else
  47. limit = &ah->nf_5g;
  48. return limit;
  49. }
  50. static s16 ath9k_hw_get_default_nf(struct ath_hw *ah,
  51. struct ath9k_channel *chan)
  52. {
  53. return ath9k_hw_get_nf_limits(ah, chan)->nominal;
  54. }
  55. s16 ath9k_hw_getchan_noise(struct ath_hw *ah, struct ath9k_channel *chan)
  56. {
  57. s8 noise = ATH_DEFAULT_NOISE_FLOOR;
  58. if (chan && chan->noisefloor) {
  59. s8 delta = chan->noisefloor -
  60. ath9k_hw_get_default_nf(ah, chan);
  61. if (delta > 0)
  62. noise += delta;
  63. }
  64. return noise;
  65. }
  66. EXPORT_SYMBOL(ath9k_hw_getchan_noise);
  67. static void ath9k_hw_update_nfcal_hist_buffer(struct ath_hw *ah,
  68. struct ath9k_hw_cal_data *cal,
  69. int16_t *nfarray)
  70. {
  71. struct ath_common *common = ath9k_hw_common(ah);
  72. struct ath_nf_limits *limit;
  73. struct ath9k_nfcal_hist *h;
  74. bool high_nf_mid = false;
  75. u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask;
  76. int i;
  77. h = cal->nfCalHist;
  78. limit = ath9k_hw_get_nf_limits(ah, ah->curchan);
  79. for (i = 0; i < NUM_NF_READINGS; i++) {
  80. if (!(chainmask & (1 << i)) ||
  81. ((i >= AR5416_MAX_CHAINS) && !IS_CHAN_HT40(ah->curchan)))
  82. continue;
  83. h[i].nfCalBuffer[h[i].currIndex] = nfarray[i];
  84. if (++h[i].currIndex >= ATH9K_NF_CAL_HIST_MAX)
  85. h[i].currIndex = 0;
  86. if (h[i].invalidNFcount > 0) {
  87. h[i].invalidNFcount--;
  88. h[i].privNF = nfarray[i];
  89. } else {
  90. h[i].privNF =
  91. ath9k_hw_get_nf_hist_mid(h[i].nfCalBuffer);
  92. }
  93. if (!h[i].privNF)
  94. continue;
  95. if (h[i].privNF > limit->max) {
  96. high_nf_mid = true;
  97. ath_dbg(common, ATH_DBG_CALIBRATE,
  98. "NFmid[%d] (%d) > MAX (%d), %s\n",
  99. i, h[i].privNF, limit->max,
  100. (cal->nfcal_interference ?
  101. "not corrected (due to interference)" :
  102. "correcting to MAX"));
  103. /*
  104. * Normally we limit the average noise floor by the
  105. * hardware specific maximum here. However if we have
  106. * encountered stuck beacons because of interference,
  107. * we bypass this limit here in order to better deal
  108. * with our environment.
  109. */
  110. if (!cal->nfcal_interference)
  111. h[i].privNF = limit->max;
  112. }
  113. }
  114. /*
  115. * If the noise floor seems normal for all chains, assume that
  116. * there is no significant interference in the environment anymore.
  117. * Re-enable the enforcement of the NF maximum again.
  118. */
  119. if (!high_nf_mid)
  120. cal->nfcal_interference = false;
  121. }
  122. static bool ath9k_hw_get_nf_thresh(struct ath_hw *ah,
  123. enum ieee80211_band band,
  124. int16_t *nft)
  125. {
  126. switch (band) {
  127. case IEEE80211_BAND_5GHZ:
  128. *nft = (int8_t)ah->eep_ops->get_eeprom(ah, EEP_NFTHRESH_5);
  129. break;
  130. case IEEE80211_BAND_2GHZ:
  131. *nft = (int8_t)ah->eep_ops->get_eeprom(ah, EEP_NFTHRESH_2);
  132. break;
  133. default:
  134. BUG_ON(1);
  135. return false;
  136. }
  137. return true;
  138. }
  139. void ath9k_hw_reset_calibration(struct ath_hw *ah,
  140. struct ath9k_cal_list *currCal)
  141. {
  142. int i;
  143. ath9k_hw_setup_calibration(ah, currCal);
  144. currCal->calState = CAL_RUNNING;
  145. for (i = 0; i < AR5416_MAX_CHAINS; i++) {
  146. ah->meas0.sign[i] = 0;
  147. ah->meas1.sign[i] = 0;
  148. ah->meas2.sign[i] = 0;
  149. ah->meas3.sign[i] = 0;
  150. }
  151. ah->cal_samples = 0;
  152. }
  153. /* This is done for the currently configured channel */
  154. bool ath9k_hw_reset_calvalid(struct ath_hw *ah)
  155. {
  156. struct ath_common *common = ath9k_hw_common(ah);
  157. struct ieee80211_conf *conf = &common->hw->conf;
  158. struct ath9k_cal_list *currCal = ah->cal_list_curr;
  159. if (!ah->caldata)
  160. return true;
  161. if (!AR_SREV_9100(ah) && !AR_SREV_9160_10_OR_LATER(ah))
  162. return true;
  163. if (currCal == NULL)
  164. return true;
  165. if (currCal->calState != CAL_DONE) {
  166. ath_dbg(common, ATH_DBG_CALIBRATE,
  167. "Calibration state incorrect, %d\n",
  168. currCal->calState);
  169. return true;
  170. }
  171. if (!(ah->supp_cals & currCal->calData->calType))
  172. return true;
  173. ath_dbg(common, ATH_DBG_CALIBRATE,
  174. "Resetting Cal %d state for channel %u\n",
  175. currCal->calData->calType, conf->channel->center_freq);
  176. ah->caldata->CalValid &= ~currCal->calData->calType;
  177. currCal->calState = CAL_WAITING;
  178. return false;
  179. }
  180. EXPORT_SYMBOL(ath9k_hw_reset_calvalid);
  181. void ath9k_hw_start_nfcal(struct ath_hw *ah, bool update)
  182. {
  183. if (ah->caldata)
  184. ah->caldata->nfcal_pending = true;
  185. REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
  186. AR_PHY_AGC_CONTROL_ENABLE_NF);
  187. if (update)
  188. REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
  189. AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
  190. else
  191. REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
  192. AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
  193. REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
  194. }
  195. void ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan)
  196. {
  197. struct ath9k_nfcal_hist *h = NULL;
  198. unsigned i, j;
  199. int32_t val;
  200. u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask;
  201. struct ath_common *common = ath9k_hw_common(ah);
  202. struct ieee80211_conf *conf = &common->hw->conf;
  203. s16 default_nf = ath9k_hw_get_default_nf(ah, chan);
  204. if (ah->caldata)
  205. h = ah->caldata->nfCalHist;
  206. for (i = 0; i < NUM_NF_READINGS; i++) {
  207. if (chainmask & (1 << i)) {
  208. s16 nfval;
  209. if ((i >= AR5416_MAX_CHAINS) && !conf_is_ht40(conf))
  210. continue;
  211. if (h)
  212. nfval = h[i].privNF;
  213. else
  214. nfval = default_nf;
  215. val = REG_READ(ah, ah->nf_regs[i]);
  216. val &= 0xFFFFFE00;
  217. val |= (((u32) nfval << 1) & 0x1ff);
  218. REG_WRITE(ah, ah->nf_regs[i], val);
  219. }
  220. }
  221. /*
  222. * Load software filtered NF value into baseband internal minCCApwr
  223. * variable.
  224. */
  225. REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
  226. AR_PHY_AGC_CONTROL_ENABLE_NF);
  227. REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
  228. AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
  229. REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
  230. /*
  231. * Wait for load to complete, should be fast, a few 10s of us.
  232. * The max delay was changed from an original 250us to 10000us
  233. * since 250us often results in NF load timeout and causes deaf
  234. * condition during stress testing 12/12/2009
  235. */
  236. for (j = 0; j < 10000; j++) {
  237. if ((REG_READ(ah, AR_PHY_AGC_CONTROL) &
  238. AR_PHY_AGC_CONTROL_NF) == 0)
  239. break;
  240. udelay(10);
  241. }
  242. /*
  243. * We timed out waiting for the noisefloor to load, probably due to an
  244. * in-progress rx. Simply return here and allow the load plenty of time
  245. * to complete before the next calibration interval. We need to avoid
  246. * trying to load -50 (which happens below) while the previous load is
  247. * still in progress as this can cause rx deafness. Instead by returning
  248. * here, the baseband nf cal will just be capped by our present
  249. * noisefloor until the next calibration timer.
  250. */
  251. if (j == 10000) {
  252. ath_dbg(common, ATH_DBG_ANY,
  253. "Timeout while waiting for nf to load: AR_PHY_AGC_CONTROL=0x%x\n",
  254. REG_READ(ah, AR_PHY_AGC_CONTROL));
  255. return;
  256. }
  257. /*
  258. * Restore maxCCAPower register parameter again so that we're not capped
  259. * by the median we just loaded. This will be initial (and max) value
  260. * of next noise floor calibration the baseband does.
  261. */
  262. ENABLE_REGWRITE_BUFFER(ah);
  263. for (i = 0; i < NUM_NF_READINGS; i++) {
  264. if (chainmask & (1 << i)) {
  265. if ((i >= AR5416_MAX_CHAINS) && !conf_is_ht40(conf))
  266. continue;
  267. val = REG_READ(ah, ah->nf_regs[i]);
  268. val &= 0xFFFFFE00;
  269. val |= (((u32) (-50) << 1) & 0x1ff);
  270. REG_WRITE(ah, ah->nf_regs[i], val);
  271. }
  272. }
  273. REGWRITE_BUFFER_FLUSH(ah);
  274. }
  275. static void ath9k_hw_nf_sanitize(struct ath_hw *ah, s16 *nf)
  276. {
  277. struct ath_common *common = ath9k_hw_common(ah);
  278. struct ath_nf_limits *limit;
  279. int i;
  280. if (IS_CHAN_2GHZ(ah->curchan))
  281. limit = &ah->nf_2g;
  282. else
  283. limit = &ah->nf_5g;
  284. for (i = 0; i < NUM_NF_READINGS; i++) {
  285. if (!nf[i])
  286. continue;
  287. ath_dbg(common, ATH_DBG_CALIBRATE,
  288. "NF calibrated [%s] [chain %d] is %d\n",
  289. (i >= 3 ? "ext" : "ctl"), i % 3, nf[i]);
  290. if (nf[i] > ATH9K_NF_TOO_HIGH) {
  291. ath_dbg(common, ATH_DBG_CALIBRATE,
  292. "NF[%d] (%d) > MAX (%d), correcting to MAX\n",
  293. i, nf[i], ATH9K_NF_TOO_HIGH);
  294. nf[i] = limit->max;
  295. } else if (nf[i] < limit->min) {
  296. ath_dbg(common, ATH_DBG_CALIBRATE,
  297. "NF[%d] (%d) < MIN (%d), correcting to NOM\n",
  298. i, nf[i], limit->min);
  299. nf[i] = limit->nominal;
  300. }
  301. }
  302. }
  303. bool ath9k_hw_getnf(struct ath_hw *ah, struct ath9k_channel *chan)
  304. {
  305. struct ath_common *common = ath9k_hw_common(ah);
  306. int16_t nf, nfThresh;
  307. int16_t nfarray[NUM_NF_READINGS] = { 0 };
  308. struct ath9k_nfcal_hist *h;
  309. struct ieee80211_channel *c = chan->chan;
  310. struct ath9k_hw_cal_data *caldata = ah->caldata;
  311. chan->channelFlags &= (~CHANNEL_CW_INT);
  312. if (REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF) {
  313. ath_dbg(common, ATH_DBG_CALIBRATE,
  314. "NF did not complete in calibration window\n");
  315. return false;
  316. }
  317. ath9k_hw_do_getnf(ah, nfarray);
  318. ath9k_hw_nf_sanitize(ah, nfarray);
  319. nf = nfarray[0];
  320. if (ath9k_hw_get_nf_thresh(ah, c->band, &nfThresh)
  321. && nf > nfThresh) {
  322. ath_dbg(common, ATH_DBG_CALIBRATE,
  323. "noise floor failed detected; detected %d, threshold %d\n",
  324. nf, nfThresh);
  325. chan->channelFlags |= CHANNEL_CW_INT;
  326. }
  327. if (!caldata) {
  328. chan->noisefloor = nf;
  329. ah->noise = ath9k_hw_getchan_noise(ah, chan);
  330. return false;
  331. }
  332. h = caldata->nfCalHist;
  333. caldata->nfcal_pending = false;
  334. ath9k_hw_update_nfcal_hist_buffer(ah, caldata, nfarray);
  335. chan->noisefloor = h[0].privNF;
  336. ah->noise = ath9k_hw_getchan_noise(ah, chan);
  337. return true;
  338. }
  339. void ath9k_init_nfcal_hist_buffer(struct ath_hw *ah,
  340. struct ath9k_channel *chan)
  341. {
  342. struct ath9k_nfcal_hist *h;
  343. s16 default_nf;
  344. int i, j;
  345. ah->caldata->channel = chan->channel;
  346. ah->caldata->channelFlags = chan->channelFlags & ~CHANNEL_CW_INT;
  347. h = ah->caldata->nfCalHist;
  348. default_nf = ath9k_hw_get_default_nf(ah, chan);
  349. for (i = 0; i < NUM_NF_READINGS; i++) {
  350. h[i].currIndex = 0;
  351. h[i].privNF = default_nf;
  352. h[i].invalidNFcount = AR_PHY_CCA_FILTERWINDOW_LENGTH;
  353. for (j = 0; j < ATH9K_NF_CAL_HIST_MAX; j++) {
  354. h[i].nfCalBuffer[j] = default_nf;
  355. }
  356. }
  357. }
  358. void ath9k_hw_bstuck_nfcal(struct ath_hw *ah)
  359. {
  360. struct ath9k_hw_cal_data *caldata = ah->caldata;
  361. if (unlikely(!caldata))
  362. return;
  363. /*
  364. * If beacons are stuck, the most likely cause is interference.
  365. * Triggering a noise floor calibration at this point helps the
  366. * hardware adapt to a noisy environment much faster.
  367. * To ensure that we recover from stuck beacons quickly, let
  368. * the baseband update the internal NF value itself, similar to
  369. * what is being done after a full reset.
  370. */
  371. if (!caldata->nfcal_pending)
  372. ath9k_hw_start_nfcal(ah, true);
  373. else if (!(REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF))
  374. ath9k_hw_getnf(ah, ah->curchan);
  375. caldata->nfcal_interference = true;
  376. }
  377. EXPORT_SYMBOL(ath9k_hw_bstuck_nfcal);