init.c 41 KB

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  1. /*
  2. * Copyright (c) 2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/moduleparam.h>
  17. #include <linux/of.h>
  18. #include <linux/mmc/sdio_func.h>
  19. #include "core.h"
  20. #include "cfg80211.h"
  21. #include "target.h"
  22. #include "debug.h"
  23. #include "hif-ops.h"
  24. unsigned int debug_mask;
  25. static unsigned int testmode;
  26. module_param(debug_mask, uint, 0644);
  27. module_param(testmode, uint, 0644);
  28. /*
  29. * Include definitions here that can be used to tune the WLAN module
  30. * behavior. Different customers can tune the behavior as per their needs,
  31. * here.
  32. */
  33. /*
  34. * This configuration item enable/disable keepalive support.
  35. * Keepalive support: In the absence of any data traffic to AP, null
  36. * frames will be sent to the AP at periodic interval, to keep the association
  37. * active. This configuration item defines the periodic interval.
  38. * Use value of zero to disable keepalive support
  39. * Default: 60 seconds
  40. */
  41. #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
  42. /*
  43. * This configuration item sets the value of disconnect timeout
  44. * Firmware delays sending the disconnec event to the host for this
  45. * timeout after is gets disconnected from the current AP.
  46. * If the firmware successly roams within the disconnect timeout
  47. * it sends a new connect event
  48. */
  49. #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
  50. #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8
  51. #define ATH6KL_DATA_OFFSET 64
  52. struct sk_buff *ath6kl_buf_alloc(int size)
  53. {
  54. struct sk_buff *skb;
  55. u16 reserved;
  56. /* Add chacheline space at front and back of buffer */
  57. reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
  58. sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
  59. skb = dev_alloc_skb(size + reserved);
  60. if (skb)
  61. skb_reserve(skb, reserved - L1_CACHE_BYTES);
  62. return skb;
  63. }
  64. void ath6kl_init_profile_info(struct ath6kl *ar)
  65. {
  66. ar->ssid_len = 0;
  67. memset(ar->ssid, 0, sizeof(ar->ssid));
  68. ar->dot11_auth_mode = OPEN_AUTH;
  69. ar->auth_mode = NONE_AUTH;
  70. ar->prwise_crypto = NONE_CRYPT;
  71. ar->prwise_crypto_len = 0;
  72. ar->grp_crypto = NONE_CRYPT;
  73. ar->grp_crypto_len = 0;
  74. memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list));
  75. memset(ar->req_bssid, 0, sizeof(ar->req_bssid));
  76. memset(ar->bssid, 0, sizeof(ar->bssid));
  77. ar->bss_ch = 0;
  78. ar->nw_type = ar->next_mode = INFRA_NETWORK;
  79. }
  80. static u8 ath6kl_get_fw_iftype(struct ath6kl *ar)
  81. {
  82. switch (ar->nw_type) {
  83. case INFRA_NETWORK:
  84. return HI_OPTION_FW_MODE_BSS_STA;
  85. case ADHOC_NETWORK:
  86. return HI_OPTION_FW_MODE_IBSS;
  87. case AP_NETWORK:
  88. return HI_OPTION_FW_MODE_AP;
  89. default:
  90. ath6kl_err("Unsupported interface type :%d\n", ar->nw_type);
  91. return 0xff;
  92. }
  93. }
  94. static int ath6kl_set_host_app_area(struct ath6kl *ar)
  95. {
  96. u32 address, data;
  97. struct host_app_area host_app_area;
  98. /* Fetch the address of the host_app_area_s
  99. * instance in the host interest area */
  100. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
  101. address = TARG_VTOP(ar->target_type, address);
  102. if (ath6kl_diag_read32(ar, address, &data))
  103. return -EIO;
  104. address = TARG_VTOP(ar->target_type, data);
  105. host_app_area.wmi_protocol_ver = WMI_PROTOCOL_VERSION;
  106. if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
  107. sizeof(struct host_app_area)))
  108. return -EIO;
  109. return 0;
  110. }
  111. static inline void set_ac2_ep_map(struct ath6kl *ar,
  112. u8 ac,
  113. enum htc_endpoint_id ep)
  114. {
  115. ar->ac2ep_map[ac] = ep;
  116. ar->ep2ac_map[ep] = ac;
  117. }
  118. /* connect to a service */
  119. static int ath6kl_connectservice(struct ath6kl *ar,
  120. struct htc_service_connect_req *con_req,
  121. char *desc)
  122. {
  123. int status;
  124. struct htc_service_connect_resp response;
  125. memset(&response, 0, sizeof(response));
  126. status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
  127. if (status) {
  128. ath6kl_err("failed to connect to %s service status:%d\n",
  129. desc, status);
  130. return status;
  131. }
  132. switch (con_req->svc_id) {
  133. case WMI_CONTROL_SVC:
  134. if (test_bit(WMI_ENABLED, &ar->flag))
  135. ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
  136. ar->ctrl_ep = response.endpoint;
  137. break;
  138. case WMI_DATA_BE_SVC:
  139. set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
  140. break;
  141. case WMI_DATA_BK_SVC:
  142. set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
  143. break;
  144. case WMI_DATA_VI_SVC:
  145. set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
  146. break;
  147. case WMI_DATA_VO_SVC:
  148. set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
  149. break;
  150. default:
  151. ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
  152. return -EINVAL;
  153. }
  154. return 0;
  155. }
  156. static int ath6kl_init_service_ep(struct ath6kl *ar)
  157. {
  158. struct htc_service_connect_req connect;
  159. memset(&connect, 0, sizeof(connect));
  160. /* these fields are the same for all service endpoints */
  161. connect.ep_cb.rx = ath6kl_rx;
  162. connect.ep_cb.rx_refill = ath6kl_rx_refill;
  163. connect.ep_cb.tx_full = ath6kl_tx_queue_full;
  164. /*
  165. * Set the max queue depth so that our ath6kl_tx_queue_full handler
  166. * gets called.
  167. */
  168. connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
  169. connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
  170. if (!connect.ep_cb.rx_refill_thresh)
  171. connect.ep_cb.rx_refill_thresh++;
  172. /* connect to control service */
  173. connect.svc_id = WMI_CONTROL_SVC;
  174. if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
  175. return -EIO;
  176. connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
  177. /*
  178. * Limit the HTC message size on the send path, although e can
  179. * receive A-MSDU frames of 4K, we will only send ethernet-sized
  180. * (802.3) frames on the send path.
  181. */
  182. connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
  183. /*
  184. * To reduce the amount of committed memory for larger A_MSDU
  185. * frames, use the recv-alloc threshold mechanism for larger
  186. * packets.
  187. */
  188. connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
  189. connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
  190. /*
  191. * For the remaining data services set the connection flag to
  192. * reduce dribbling, if configured to do so.
  193. */
  194. connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
  195. connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
  196. connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
  197. connect.svc_id = WMI_DATA_BE_SVC;
  198. if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
  199. return -EIO;
  200. /* connect to back-ground map this to WMI LOW_PRI */
  201. connect.svc_id = WMI_DATA_BK_SVC;
  202. if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
  203. return -EIO;
  204. /* connect to Video service, map this to to HI PRI */
  205. connect.svc_id = WMI_DATA_VI_SVC;
  206. if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
  207. return -EIO;
  208. /*
  209. * Connect to VO service, this is currently not mapped to a WMI
  210. * priority stream due to historical reasons. WMI originally
  211. * defined 3 priorities over 3 mailboxes We can change this when
  212. * WMI is reworked so that priorities are not dependent on
  213. * mailboxes.
  214. */
  215. connect.svc_id = WMI_DATA_VO_SVC;
  216. if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
  217. return -EIO;
  218. return 0;
  219. }
  220. static void ath6kl_init_control_info(struct ath6kl *ar)
  221. {
  222. u8 ctr;
  223. clear_bit(WMI_ENABLED, &ar->flag);
  224. ath6kl_init_profile_info(ar);
  225. ar->def_txkey_index = 0;
  226. memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list));
  227. ar->ch_hint = 0;
  228. ar->listen_intvl_t = A_DEFAULT_LISTEN_INTERVAL;
  229. ar->listen_intvl_b = 0;
  230. ar->tx_pwr = 0;
  231. clear_bit(SKIP_SCAN, &ar->flag);
  232. set_bit(WMM_ENABLED, &ar->flag);
  233. ar->intra_bss = 1;
  234. memset(&ar->sc_params, 0, sizeof(ar->sc_params));
  235. ar->sc_params.short_scan_ratio = WMI_SHORTSCANRATIO_DEFAULT;
  236. ar->sc_params.scan_ctrl_flags = DEFAULT_SCAN_CTRL_FLAGS;
  237. ar->lrssi_roam_threshold = DEF_LRSSI_ROAM_THRESHOLD;
  238. memset((u8 *)ar->sta_list, 0,
  239. AP_MAX_NUM_STA * sizeof(struct ath6kl_sta));
  240. spin_lock_init(&ar->mcastpsq_lock);
  241. /* Init the PS queues */
  242. for (ctr = 0; ctr < AP_MAX_NUM_STA; ctr++) {
  243. spin_lock_init(&ar->sta_list[ctr].psq_lock);
  244. skb_queue_head_init(&ar->sta_list[ctr].psq);
  245. }
  246. skb_queue_head_init(&ar->mcastpsq);
  247. memcpy(ar->ap_country_code, DEF_AP_COUNTRY_CODE, 3);
  248. }
  249. /*
  250. * Set HTC/Mbox operational parameters, this can only be called when the
  251. * target is in the BMI phase.
  252. */
  253. static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
  254. u8 htc_ctrl_buf)
  255. {
  256. int status;
  257. u32 blk_size;
  258. blk_size = ar->mbox_info.block_size;
  259. if (htc_ctrl_buf)
  260. blk_size |= ((u32)htc_ctrl_buf) << 16;
  261. /* set the host interest area for the block size */
  262. status = ath6kl_bmi_write(ar,
  263. ath6kl_get_hi_item_addr(ar,
  264. HI_ITEM(hi_mbox_io_block_sz)),
  265. (u8 *)&blk_size,
  266. 4);
  267. if (status) {
  268. ath6kl_err("bmi_write_memory for IO block size failed\n");
  269. goto out;
  270. }
  271. ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
  272. blk_size,
  273. ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
  274. if (mbox_isr_yield_val) {
  275. /* set the host interest area for the mbox ISR yield limit */
  276. status = ath6kl_bmi_write(ar,
  277. ath6kl_get_hi_item_addr(ar,
  278. HI_ITEM(hi_mbox_isr_yield_limit)),
  279. (u8 *)&mbox_isr_yield_val,
  280. 4);
  281. if (status) {
  282. ath6kl_err("bmi_write_memory for yield limit failed\n");
  283. goto out;
  284. }
  285. }
  286. out:
  287. return status;
  288. }
  289. #define REG_DUMP_COUNT_AR6003 60
  290. #define REGISTER_DUMP_LEN_MAX 60
  291. static void ath6kl_dump_target_assert_info(struct ath6kl *ar)
  292. {
  293. u32 address;
  294. u32 regdump_loc = 0;
  295. int status;
  296. u32 regdump_val[REGISTER_DUMP_LEN_MAX];
  297. u32 i;
  298. if (ar->target_type != TARGET_TYPE_AR6003)
  299. return;
  300. /* the reg dump pointer is copied to the host interest area */
  301. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_failure_state));
  302. address = TARG_VTOP(ar->target_type, address);
  303. /* read RAM location through diagnostic window */
  304. status = ath6kl_diag_read32(ar, address, &regdump_loc);
  305. if (status || !regdump_loc) {
  306. ath6kl_err("failed to get ptr to register dump area\n");
  307. return;
  308. }
  309. ath6kl_dbg(ATH6KL_DBG_TRC, "location of register dump data: 0x%X\n",
  310. regdump_loc);
  311. regdump_loc = TARG_VTOP(ar->target_type, regdump_loc);
  312. /* fetch register dump data */
  313. status = ath6kl_diag_read(ar, regdump_loc, (u8 *)&regdump_val[0],
  314. REG_DUMP_COUNT_AR6003 * (sizeof(u32)));
  315. if (status) {
  316. ath6kl_err("failed to get register dump\n");
  317. return;
  318. }
  319. ath6kl_dbg(ATH6KL_DBG_TRC, "Register Dump:\n");
  320. for (i = 0; i < REG_DUMP_COUNT_AR6003; i++)
  321. ath6kl_dbg(ATH6KL_DBG_TRC, " %d : 0x%8.8X\n",
  322. i, regdump_val[i]);
  323. }
  324. void ath6kl_target_failure(struct ath6kl *ar)
  325. {
  326. ath6kl_err("target asserted\n");
  327. /* try dumping target assertion information (if any) */
  328. ath6kl_dump_target_assert_info(ar);
  329. }
  330. static int ath6kl_target_config_wlan_params(struct ath6kl *ar)
  331. {
  332. int status = 0;
  333. int ret;
  334. /*
  335. * Configure the device for rx dot11 header rules. "0,0" are the
  336. * default values. Required if checksum offload is needed. Set
  337. * RxMetaVersion to 2.
  338. */
  339. if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi,
  340. ar->rx_meta_ver, 0, 0)) {
  341. ath6kl_err("unable to set the rx frame format\n");
  342. status = -EIO;
  343. }
  344. if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
  345. if ((ath6kl_wmi_pmparams_cmd(ar->wmi, 0, 1, 0, 0, 1,
  346. IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
  347. ath6kl_err("unable to set power save fail event policy\n");
  348. status = -EIO;
  349. }
  350. if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
  351. if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, 0,
  352. WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
  353. ath6kl_err("unable to set barker preamble policy\n");
  354. status = -EIO;
  355. }
  356. if (ath6kl_wmi_set_keepalive_cmd(ar->wmi,
  357. WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
  358. ath6kl_err("unable to set keep alive interval\n");
  359. status = -EIO;
  360. }
  361. if (ath6kl_wmi_disctimeout_cmd(ar->wmi,
  362. WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
  363. ath6kl_err("unable to set disconnect timeout\n");
  364. status = -EIO;
  365. }
  366. if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
  367. if (ath6kl_wmi_set_wmm_txop(ar->wmi, WMI_TXOP_DISABLED)) {
  368. ath6kl_err("unable to set txop bursting\n");
  369. status = -EIO;
  370. }
  371. if (ar->p2p) {
  372. ret = ath6kl_wmi_info_req_cmd(ar->wmi,
  373. P2P_FLAG_CAPABILITIES_REQ |
  374. P2P_FLAG_MACADDR_REQ |
  375. P2P_FLAG_HMODEL_REQ);
  376. if (ret) {
  377. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
  378. "capabilities (%d) - assuming P2P not "
  379. "supported\n", ret);
  380. ar->p2p = 0;
  381. }
  382. }
  383. if (ar->p2p) {
  384. /* Enable Probe Request reporting for P2P */
  385. ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, true);
  386. if (ret) {
  387. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
  388. "Request reporting (%d)\n", ret);
  389. }
  390. }
  391. return status;
  392. }
  393. int ath6kl_configure_target(struct ath6kl *ar)
  394. {
  395. u32 param, ram_reserved_size;
  396. u8 fw_iftype;
  397. fw_iftype = ath6kl_get_fw_iftype(ar);
  398. if (fw_iftype == 0xff)
  399. return -EINVAL;
  400. /* Tell target which HTC version it is used*/
  401. param = HTC_PROTOCOL_VERSION;
  402. if (ath6kl_bmi_write(ar,
  403. ath6kl_get_hi_item_addr(ar,
  404. HI_ITEM(hi_app_host_interest)),
  405. (u8 *)&param, 4) != 0) {
  406. ath6kl_err("bmi_write_memory for htc version failed\n");
  407. return -EIO;
  408. }
  409. /* set the firmware mode to STA/IBSS/AP */
  410. param = 0;
  411. if (ath6kl_bmi_read(ar,
  412. ath6kl_get_hi_item_addr(ar,
  413. HI_ITEM(hi_option_flag)),
  414. (u8 *)&param, 4) != 0) {
  415. ath6kl_err("bmi_read_memory for setting fwmode failed\n");
  416. return -EIO;
  417. }
  418. param |= (1 << HI_OPTION_NUM_DEV_SHIFT);
  419. param |= (fw_iftype << HI_OPTION_FW_MODE_SHIFT);
  420. if (ar->p2p && fw_iftype == HI_OPTION_FW_MODE_BSS_STA) {
  421. param |= HI_OPTION_FW_SUBMODE_P2PDEV <<
  422. HI_OPTION_FW_SUBMODE_SHIFT;
  423. }
  424. param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  425. param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  426. if (ath6kl_bmi_write(ar,
  427. ath6kl_get_hi_item_addr(ar,
  428. HI_ITEM(hi_option_flag)),
  429. (u8 *)&param,
  430. 4) != 0) {
  431. ath6kl_err("bmi_write_memory for setting fwmode failed\n");
  432. return -EIO;
  433. }
  434. ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
  435. /*
  436. * Hardcode the address use for the extended board data
  437. * Ideally this should be pre-allocate by the OS at boot time
  438. * But since it is a new feature and board data is loaded
  439. * at init time, we have to workaround this from host.
  440. * It is difficult to patch the firmware boot code,
  441. * but possible in theory.
  442. */
  443. param = ar->hw.board_ext_data_addr;
  444. ram_reserved_size = ar->hw.reserved_ram_size;
  445. if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
  446. HI_ITEM(hi_board_ext_data)),
  447. (u8 *)&param, 4) != 0) {
  448. ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
  449. return -EIO;
  450. }
  451. if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
  452. HI_ITEM(hi_end_ram_reserve_sz)),
  453. (u8 *)&ram_reserved_size, 4) != 0) {
  454. ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
  455. return -EIO;
  456. }
  457. /* set the block size for the target */
  458. if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
  459. /* use default number of control buffers */
  460. return -EIO;
  461. return 0;
  462. }
  463. struct ath6kl *ath6kl_core_alloc(struct device *sdev)
  464. {
  465. struct net_device *dev;
  466. struct ath6kl *ar;
  467. struct wireless_dev *wdev;
  468. wdev = ath6kl_cfg80211_init(sdev);
  469. if (!wdev) {
  470. ath6kl_err("ath6kl_cfg80211_init failed\n");
  471. return NULL;
  472. }
  473. ar = wdev_priv(wdev);
  474. ar->dev = sdev;
  475. ar->wdev = wdev;
  476. wdev->iftype = NL80211_IFTYPE_STATION;
  477. if (ath6kl_debug_init(ar)) {
  478. ath6kl_err("Failed to initialize debugfs\n");
  479. ath6kl_cfg80211_deinit(ar);
  480. return NULL;
  481. }
  482. dev = alloc_netdev(0, "wlan%d", ether_setup);
  483. if (!dev) {
  484. ath6kl_err("no memory for network device instance\n");
  485. ath6kl_cfg80211_deinit(ar);
  486. return NULL;
  487. }
  488. dev->ieee80211_ptr = wdev;
  489. SET_NETDEV_DEV(dev, wiphy_dev(wdev->wiphy));
  490. wdev->netdev = dev;
  491. ar->sme_state = SME_DISCONNECTED;
  492. init_netdev(dev);
  493. ar->net_dev = dev;
  494. set_bit(WLAN_ENABLED, &ar->flag);
  495. ar->wlan_pwr_state = WLAN_POWER_STATE_ON;
  496. spin_lock_init(&ar->lock);
  497. ath6kl_init_control_info(ar);
  498. init_waitqueue_head(&ar->event_wq);
  499. sema_init(&ar->sem, 1);
  500. clear_bit(DESTROY_IN_PROGRESS, &ar->flag);
  501. INIT_LIST_HEAD(&ar->amsdu_rx_buffer_queue);
  502. setup_timer(&ar->disconnect_timer, disconnect_timer_handler,
  503. (unsigned long) dev);
  504. return ar;
  505. }
  506. int ath6kl_unavail_ev(struct ath6kl *ar)
  507. {
  508. ath6kl_destroy(ar->net_dev, 1);
  509. return 0;
  510. }
  511. /* firmware upload */
  512. static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
  513. u8 **fw, size_t *fw_len)
  514. {
  515. const struct firmware *fw_entry;
  516. int ret;
  517. ret = request_firmware(&fw_entry, filename, ar->dev);
  518. if (ret)
  519. return ret;
  520. *fw_len = fw_entry->size;
  521. *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
  522. if (*fw == NULL)
  523. ret = -ENOMEM;
  524. release_firmware(fw_entry);
  525. return ret;
  526. }
  527. #ifdef CONFIG_OF
  528. static const char *get_target_ver_dir(const struct ath6kl *ar)
  529. {
  530. switch (ar->version.target_ver) {
  531. case AR6003_REV1_VERSION:
  532. return "ath6k/AR6003/hw1.0";
  533. case AR6003_REV2_VERSION:
  534. return "ath6k/AR6003/hw2.0";
  535. case AR6003_REV3_VERSION:
  536. return "ath6k/AR6003/hw2.1.1";
  537. }
  538. ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__,
  539. ar->version.target_ver);
  540. return NULL;
  541. }
  542. /*
  543. * Check the device tree for a board-id and use it to construct
  544. * the pathname to the firmware file. Used (for now) to find a
  545. * fallback to the "bdata.bin" file--typically a symlink to the
  546. * appropriate board-specific file.
  547. */
  548. static bool check_device_tree(struct ath6kl *ar)
  549. {
  550. static const char *board_id_prop = "atheros,board-id";
  551. struct device_node *node;
  552. char board_filename[64];
  553. const char *board_id;
  554. int ret;
  555. for_each_compatible_node(node, NULL, "atheros,ath6kl") {
  556. board_id = of_get_property(node, board_id_prop, NULL);
  557. if (board_id == NULL) {
  558. ath6kl_warn("No \"%s\" property on %s node.\n",
  559. board_id_prop, node->name);
  560. continue;
  561. }
  562. snprintf(board_filename, sizeof(board_filename),
  563. "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id);
  564. ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
  565. &ar->fw_board_len);
  566. if (ret) {
  567. ath6kl_err("Failed to get DT board file %s: %d\n",
  568. board_filename, ret);
  569. continue;
  570. }
  571. return true;
  572. }
  573. return false;
  574. }
  575. #else
  576. static bool check_device_tree(struct ath6kl *ar)
  577. {
  578. return false;
  579. }
  580. #endif /* CONFIG_OF */
  581. static int ath6kl_fetch_board_file(struct ath6kl *ar)
  582. {
  583. const char *filename;
  584. int ret;
  585. if (ar->fw_board != NULL)
  586. return 0;
  587. switch (ar->version.target_ver) {
  588. case AR6003_REV2_VERSION:
  589. filename = AR6003_REV2_BOARD_DATA_FILE;
  590. break;
  591. case AR6004_REV1_VERSION:
  592. filename = AR6004_REV1_BOARD_DATA_FILE;
  593. break;
  594. default:
  595. filename = AR6003_REV3_BOARD_DATA_FILE;
  596. break;
  597. }
  598. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  599. &ar->fw_board_len);
  600. if (ret == 0) {
  601. /* managed to get proper board file */
  602. return 0;
  603. }
  604. if (check_device_tree(ar)) {
  605. /* got board file from device tree */
  606. return 0;
  607. }
  608. /* there was no proper board file, try to use default instead */
  609. ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
  610. filename, ret);
  611. switch (ar->version.target_ver) {
  612. case AR6003_REV2_VERSION:
  613. filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE;
  614. break;
  615. case AR6004_REV1_VERSION:
  616. filename = AR6004_REV1_DEFAULT_BOARD_DATA_FILE;
  617. break;
  618. default:
  619. filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE;
  620. break;
  621. }
  622. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  623. &ar->fw_board_len);
  624. if (ret) {
  625. ath6kl_err("Failed to get default board file %s: %d\n",
  626. filename, ret);
  627. return ret;
  628. }
  629. ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
  630. ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
  631. return 0;
  632. }
  633. static int ath6kl_fetch_otp_file(struct ath6kl *ar)
  634. {
  635. const char *filename;
  636. int ret;
  637. if (ar->fw_otp != NULL)
  638. return 0;
  639. switch (ar->version.target_ver) {
  640. case AR6003_REV2_VERSION:
  641. filename = AR6003_REV2_OTP_FILE;
  642. break;
  643. case AR6004_REV1_VERSION:
  644. ath6kl_dbg(ATH6KL_DBG_TRC, "AR6004 doesn't need OTP file\n");
  645. return 0;
  646. break;
  647. default:
  648. filename = AR6003_REV3_OTP_FILE;
  649. break;
  650. }
  651. ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
  652. &ar->fw_otp_len);
  653. if (ret) {
  654. ath6kl_err("Failed to get OTP file %s: %d\n",
  655. filename, ret);
  656. return ret;
  657. }
  658. return 0;
  659. }
  660. static int ath6kl_fetch_fw_file(struct ath6kl *ar)
  661. {
  662. const char *filename;
  663. int ret;
  664. if (ar->fw != NULL)
  665. return 0;
  666. if (testmode) {
  667. switch (ar->version.target_ver) {
  668. case AR6003_REV2_VERSION:
  669. filename = AR6003_REV2_TCMD_FIRMWARE_FILE;
  670. break;
  671. case AR6003_REV3_VERSION:
  672. filename = AR6003_REV3_TCMD_FIRMWARE_FILE;
  673. break;
  674. case AR6004_REV1_VERSION:
  675. ath6kl_warn("testmode not supported with ar6004\n");
  676. return -EOPNOTSUPP;
  677. default:
  678. ath6kl_warn("unknown target version: 0x%x\n",
  679. ar->version.target_ver);
  680. return -EINVAL;
  681. }
  682. set_bit(TESTMODE, &ar->flag);
  683. goto get_fw;
  684. }
  685. switch (ar->version.target_ver) {
  686. case AR6003_REV2_VERSION:
  687. filename = AR6003_REV2_FIRMWARE_FILE;
  688. break;
  689. case AR6004_REV1_VERSION:
  690. filename = AR6004_REV1_FIRMWARE_FILE;
  691. break;
  692. default:
  693. filename = AR6003_REV3_FIRMWARE_FILE;
  694. break;
  695. }
  696. get_fw:
  697. ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
  698. if (ret) {
  699. ath6kl_err("Failed to get firmware file %s: %d\n",
  700. filename, ret);
  701. return ret;
  702. }
  703. return 0;
  704. }
  705. static int ath6kl_fetch_patch_file(struct ath6kl *ar)
  706. {
  707. const char *filename;
  708. int ret;
  709. switch (ar->version.target_ver) {
  710. case AR6003_REV2_VERSION:
  711. filename = AR6003_REV2_PATCH_FILE;
  712. break;
  713. case AR6004_REV1_VERSION:
  714. /* FIXME: implement for AR6004 */
  715. return 0;
  716. break;
  717. default:
  718. filename = AR6003_REV3_PATCH_FILE;
  719. break;
  720. }
  721. if (ar->fw_patch == NULL) {
  722. ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
  723. &ar->fw_patch_len);
  724. if (ret) {
  725. ath6kl_err("Failed to get patch file %s: %d\n",
  726. filename, ret);
  727. return ret;
  728. }
  729. }
  730. return 0;
  731. }
  732. static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
  733. {
  734. int ret;
  735. ret = ath6kl_fetch_otp_file(ar);
  736. if (ret)
  737. return ret;
  738. ret = ath6kl_fetch_fw_file(ar);
  739. if (ret)
  740. return ret;
  741. ret = ath6kl_fetch_patch_file(ar);
  742. if (ret)
  743. return ret;
  744. return 0;
  745. }
  746. static int ath6kl_fetch_fw_api2(struct ath6kl *ar)
  747. {
  748. size_t magic_len, len, ie_len;
  749. const struct firmware *fw;
  750. struct ath6kl_fw_ie *hdr;
  751. const char *filename;
  752. const u8 *data;
  753. int ret, ie_id, i, index, bit;
  754. __le32 *val;
  755. switch (ar->version.target_ver) {
  756. case AR6003_REV2_VERSION:
  757. filename = AR6003_REV2_FIRMWARE_2_FILE;
  758. break;
  759. case AR6003_REV3_VERSION:
  760. filename = AR6003_REV3_FIRMWARE_2_FILE;
  761. break;
  762. case AR6004_REV1_VERSION:
  763. filename = AR6004_REV1_FIRMWARE_2_FILE;
  764. break;
  765. default:
  766. return -EOPNOTSUPP;
  767. }
  768. ret = request_firmware(&fw, filename, ar->dev);
  769. if (ret)
  770. return ret;
  771. data = fw->data;
  772. len = fw->size;
  773. /* magic also includes the null byte, check that as well */
  774. magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
  775. if (len < magic_len) {
  776. ret = -EINVAL;
  777. goto out;
  778. }
  779. if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
  780. ret = -EINVAL;
  781. goto out;
  782. }
  783. len -= magic_len;
  784. data += magic_len;
  785. /* loop elements */
  786. while (len > sizeof(struct ath6kl_fw_ie)) {
  787. /* hdr is unaligned! */
  788. hdr = (struct ath6kl_fw_ie *) data;
  789. ie_id = le32_to_cpup(&hdr->id);
  790. ie_len = le32_to_cpup(&hdr->len);
  791. len -= sizeof(*hdr);
  792. data += sizeof(*hdr);
  793. if (len < ie_len) {
  794. ret = -EINVAL;
  795. goto out;
  796. }
  797. switch (ie_id) {
  798. case ATH6KL_FW_IE_OTP_IMAGE:
  799. ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
  800. ie_len);
  801. ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
  802. if (ar->fw_otp == NULL) {
  803. ret = -ENOMEM;
  804. goto out;
  805. }
  806. ar->fw_otp_len = ie_len;
  807. break;
  808. case ATH6KL_FW_IE_FW_IMAGE:
  809. ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
  810. ie_len);
  811. ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
  812. if (ar->fw == NULL) {
  813. ret = -ENOMEM;
  814. goto out;
  815. }
  816. ar->fw_len = ie_len;
  817. break;
  818. case ATH6KL_FW_IE_PATCH_IMAGE:
  819. ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
  820. ie_len);
  821. ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
  822. if (ar->fw_patch == NULL) {
  823. ret = -ENOMEM;
  824. goto out;
  825. }
  826. ar->fw_patch_len = ie_len;
  827. break;
  828. case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
  829. val = (__le32 *) data;
  830. ar->hw.reserved_ram_size = le32_to_cpup(val);
  831. ath6kl_dbg(ATH6KL_DBG_BOOT,
  832. "found reserved ram size ie 0x%d\n",
  833. ar->hw.reserved_ram_size);
  834. break;
  835. case ATH6KL_FW_IE_CAPABILITIES:
  836. ath6kl_dbg(ATH6KL_DBG_BOOT,
  837. "found firmware capabilities ie (%zd B)\n",
  838. ie_len);
  839. for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
  840. index = ALIGN(i, 8) / 8;
  841. bit = i % 8;
  842. if (data[index] & (1 << bit))
  843. __set_bit(i, ar->fw_capabilities);
  844. }
  845. ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
  846. ar->fw_capabilities,
  847. sizeof(ar->fw_capabilities));
  848. break;
  849. case ATH6KL_FW_IE_PATCH_ADDR:
  850. if (ie_len != sizeof(*val))
  851. break;
  852. val = (__le32 *) data;
  853. ar->hw.dataset_patch_addr = le32_to_cpup(val);
  854. ath6kl_dbg(ATH6KL_DBG_BOOT,
  855. "found patch address ie 0x%d\n",
  856. ar->hw.dataset_patch_addr);
  857. break;
  858. default:
  859. ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
  860. le32_to_cpup(&hdr->id));
  861. break;
  862. }
  863. len -= ie_len;
  864. data += ie_len;
  865. };
  866. ret = 0;
  867. out:
  868. release_firmware(fw);
  869. return ret;
  870. }
  871. static int ath6kl_fetch_firmwares(struct ath6kl *ar)
  872. {
  873. int ret;
  874. ret = ath6kl_fetch_board_file(ar);
  875. if (ret)
  876. return ret;
  877. ret = ath6kl_fetch_fw_api2(ar);
  878. if (ret == 0) {
  879. ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n");
  880. return 0;
  881. }
  882. ret = ath6kl_fetch_fw_api1(ar);
  883. if (ret)
  884. return ret;
  885. ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n");
  886. return 0;
  887. }
  888. static int ath6kl_upload_board_file(struct ath6kl *ar)
  889. {
  890. u32 board_address, board_ext_address, param;
  891. u32 board_data_size, board_ext_data_size;
  892. int ret;
  893. if (WARN_ON(ar->fw_board == NULL))
  894. return -ENOENT;
  895. /*
  896. * Determine where in Target RAM to write Board Data.
  897. * For AR6004, host determine Target RAM address for
  898. * writing board data.
  899. */
  900. if (ar->target_type == TARGET_TYPE_AR6004) {
  901. board_address = AR6004_REV1_BOARD_DATA_ADDRESS;
  902. ath6kl_bmi_write(ar,
  903. ath6kl_get_hi_item_addr(ar,
  904. HI_ITEM(hi_board_data)),
  905. (u8 *) &board_address, 4);
  906. } else {
  907. ath6kl_bmi_read(ar,
  908. ath6kl_get_hi_item_addr(ar,
  909. HI_ITEM(hi_board_data)),
  910. (u8 *) &board_address, 4);
  911. }
  912. /* determine where in target ram to write extended board data */
  913. ath6kl_bmi_read(ar,
  914. ath6kl_get_hi_item_addr(ar,
  915. HI_ITEM(hi_board_ext_data)),
  916. (u8 *) &board_ext_address, 4);
  917. if (board_ext_address == 0) {
  918. ath6kl_err("Failed to get board file target address.\n");
  919. return -EINVAL;
  920. }
  921. switch (ar->target_type) {
  922. case TARGET_TYPE_AR6003:
  923. board_data_size = AR6003_BOARD_DATA_SZ;
  924. board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
  925. break;
  926. case TARGET_TYPE_AR6004:
  927. board_data_size = AR6004_BOARD_DATA_SZ;
  928. board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
  929. break;
  930. default:
  931. WARN_ON(1);
  932. return -EINVAL;
  933. break;
  934. }
  935. if (ar->fw_board_len == (board_data_size +
  936. board_ext_data_size)) {
  937. /* write extended board data */
  938. ath6kl_dbg(ATH6KL_DBG_BOOT,
  939. "writing extended board data to 0x%x (%d B)\n",
  940. board_ext_address, board_ext_data_size);
  941. ret = ath6kl_bmi_write(ar, board_ext_address,
  942. ar->fw_board + board_data_size,
  943. board_ext_data_size);
  944. if (ret) {
  945. ath6kl_err("Failed to write extended board data: %d\n",
  946. ret);
  947. return ret;
  948. }
  949. /* record that extended board data is initialized */
  950. param = (board_ext_data_size << 16) | 1;
  951. ath6kl_bmi_write(ar,
  952. ath6kl_get_hi_item_addr(ar,
  953. HI_ITEM(hi_board_ext_data_config)),
  954. (unsigned char *) &param, 4);
  955. }
  956. if (ar->fw_board_len < board_data_size) {
  957. ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
  958. ret = -EINVAL;
  959. return ret;
  960. }
  961. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
  962. board_address, board_data_size);
  963. ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
  964. board_data_size);
  965. if (ret) {
  966. ath6kl_err("Board file bmi write failed: %d\n", ret);
  967. return ret;
  968. }
  969. /* record the fact that Board Data IS initialized */
  970. param = 1;
  971. ath6kl_bmi_write(ar,
  972. ath6kl_get_hi_item_addr(ar,
  973. HI_ITEM(hi_board_data_initialized)),
  974. (u8 *)&param, 4);
  975. return ret;
  976. }
  977. static int ath6kl_upload_otp(struct ath6kl *ar)
  978. {
  979. u32 address, param;
  980. int ret;
  981. if (WARN_ON(ar->fw_otp == NULL))
  982. return -ENOENT;
  983. address = ar->hw.app_load_addr;
  984. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
  985. ar->fw_otp_len);
  986. ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
  987. ar->fw_otp_len);
  988. if (ret) {
  989. ath6kl_err("Failed to upload OTP file: %d\n", ret);
  990. return ret;
  991. }
  992. /* read firmware start address */
  993. ret = ath6kl_bmi_read(ar,
  994. ath6kl_get_hi_item_addr(ar,
  995. HI_ITEM(hi_app_start)),
  996. (u8 *) &address, sizeof(address));
  997. if (ret) {
  998. ath6kl_err("Failed to read hi_app_start: %d\n", ret);
  999. return ret;
  1000. }
  1001. ar->hw.app_start_override_addr = address;
  1002. ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr 0x%x\n",
  1003. ar->hw.app_start_override_addr);
  1004. /* execute the OTP code */
  1005. ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n", address);
  1006. param = 0;
  1007. ath6kl_bmi_execute(ar, address, &param);
  1008. return ret;
  1009. }
  1010. static int ath6kl_upload_firmware(struct ath6kl *ar)
  1011. {
  1012. u32 address;
  1013. int ret;
  1014. if (WARN_ON(ar->fw == NULL))
  1015. return -ENOENT;
  1016. address = ar->hw.app_load_addr;
  1017. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
  1018. address, ar->fw_len);
  1019. ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
  1020. if (ret) {
  1021. ath6kl_err("Failed to write firmware: %d\n", ret);
  1022. return ret;
  1023. }
  1024. /*
  1025. * Set starting address for firmware
  1026. * Don't need to setup app_start override addr on AR6004
  1027. */
  1028. if (ar->target_type != TARGET_TYPE_AR6004) {
  1029. address = ar->hw.app_start_override_addr;
  1030. ath6kl_bmi_set_app_start(ar, address);
  1031. }
  1032. return ret;
  1033. }
  1034. static int ath6kl_upload_patch(struct ath6kl *ar)
  1035. {
  1036. u32 address, param;
  1037. int ret;
  1038. if (WARN_ON(ar->fw_patch == NULL))
  1039. return -ENOENT;
  1040. address = ar->hw.dataset_patch_addr;
  1041. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
  1042. address, ar->fw_patch_len);
  1043. ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
  1044. if (ret) {
  1045. ath6kl_err("Failed to write patch file: %d\n", ret);
  1046. return ret;
  1047. }
  1048. param = address;
  1049. ath6kl_bmi_write(ar,
  1050. ath6kl_get_hi_item_addr(ar,
  1051. HI_ITEM(hi_dset_list_head)),
  1052. (unsigned char *) &param, 4);
  1053. return 0;
  1054. }
  1055. static int ath6kl_init_upload(struct ath6kl *ar)
  1056. {
  1057. u32 param, options, sleep, address;
  1058. int status = 0;
  1059. if (ar->target_type != TARGET_TYPE_AR6003 &&
  1060. ar->target_type != TARGET_TYPE_AR6004)
  1061. return -EINVAL;
  1062. /* temporarily disable system sleep */
  1063. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  1064. status = ath6kl_bmi_reg_read(ar, address, &param);
  1065. if (status)
  1066. return status;
  1067. options = param;
  1068. param |= ATH6KL_OPTION_SLEEP_DISABLE;
  1069. status = ath6kl_bmi_reg_write(ar, address, param);
  1070. if (status)
  1071. return status;
  1072. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  1073. status = ath6kl_bmi_reg_read(ar, address, &param);
  1074. if (status)
  1075. return status;
  1076. sleep = param;
  1077. param |= SM(SYSTEM_SLEEP_DISABLE, 1);
  1078. status = ath6kl_bmi_reg_write(ar, address, param);
  1079. if (status)
  1080. return status;
  1081. ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
  1082. options, sleep);
  1083. /* program analog PLL register */
  1084. /* no need to control 40/44MHz clock on AR6004 */
  1085. if (ar->target_type != TARGET_TYPE_AR6004) {
  1086. status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
  1087. 0xF9104001);
  1088. if (status)
  1089. return status;
  1090. /* Run at 80/88MHz by default */
  1091. param = SM(CPU_CLOCK_STANDARD, 1);
  1092. address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
  1093. status = ath6kl_bmi_reg_write(ar, address, param);
  1094. if (status)
  1095. return status;
  1096. }
  1097. param = 0;
  1098. address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
  1099. param = SM(LPO_CAL_ENABLE, 1);
  1100. status = ath6kl_bmi_reg_write(ar, address, param);
  1101. if (status)
  1102. return status;
  1103. /* WAR to avoid SDIO CRC err */
  1104. if (ar->version.target_ver == AR6003_REV2_VERSION) {
  1105. ath6kl_err("temporary war to avoid sdio crc error\n");
  1106. param = 0x20;
  1107. address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
  1108. status = ath6kl_bmi_reg_write(ar, address, param);
  1109. if (status)
  1110. return status;
  1111. address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
  1112. status = ath6kl_bmi_reg_write(ar, address, param);
  1113. if (status)
  1114. return status;
  1115. address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
  1116. status = ath6kl_bmi_reg_write(ar, address, param);
  1117. if (status)
  1118. return status;
  1119. address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
  1120. status = ath6kl_bmi_reg_write(ar, address, param);
  1121. if (status)
  1122. return status;
  1123. }
  1124. /* write EEPROM data to Target RAM */
  1125. status = ath6kl_upload_board_file(ar);
  1126. if (status)
  1127. return status;
  1128. /* transfer One time Programmable data */
  1129. status = ath6kl_upload_otp(ar);
  1130. if (status)
  1131. return status;
  1132. /* Download Target firmware */
  1133. status = ath6kl_upload_firmware(ar);
  1134. if (status)
  1135. return status;
  1136. status = ath6kl_upload_patch(ar);
  1137. if (status)
  1138. return status;
  1139. /* Restore system sleep */
  1140. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  1141. status = ath6kl_bmi_reg_write(ar, address, sleep);
  1142. if (status)
  1143. return status;
  1144. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  1145. param = options | 0x20;
  1146. status = ath6kl_bmi_reg_write(ar, address, param);
  1147. if (status)
  1148. return status;
  1149. /* Configure GPIO AR6003 UART */
  1150. param = CONFIG_AR600x_DEBUG_UART_TX_PIN;
  1151. status = ath6kl_bmi_write(ar,
  1152. ath6kl_get_hi_item_addr(ar,
  1153. HI_ITEM(hi_dbg_uart_txpin)),
  1154. (u8 *)&param, 4);
  1155. return status;
  1156. }
  1157. static int ath6kl_init_hw_params(struct ath6kl *ar)
  1158. {
  1159. switch (ar->version.target_ver) {
  1160. case AR6003_REV2_VERSION:
  1161. ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS;
  1162. ar->hw.app_load_addr = AR6003_REV2_APP_LOAD_ADDRESS;
  1163. ar->hw.board_ext_data_addr = AR6003_REV2_BOARD_EXT_DATA_ADDRESS;
  1164. ar->hw.reserved_ram_size = AR6003_REV2_RAM_RESERVE_SIZE;
  1165. break;
  1166. case AR6003_REV3_VERSION:
  1167. ar->hw.dataset_patch_addr = AR6003_REV3_DATASET_PATCH_ADDRESS;
  1168. ar->hw.app_load_addr = 0x1234;
  1169. ar->hw.board_ext_data_addr = AR6003_REV3_BOARD_EXT_DATA_ADDRESS;
  1170. ar->hw.reserved_ram_size = AR6003_REV3_RAM_RESERVE_SIZE;
  1171. break;
  1172. case AR6004_REV1_VERSION:
  1173. ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS;
  1174. ar->hw.app_load_addr = AR6003_REV3_APP_LOAD_ADDRESS;
  1175. ar->hw.board_ext_data_addr = AR6004_REV1_BOARD_EXT_DATA_ADDRESS;
  1176. ar->hw.reserved_ram_size = AR6004_REV1_RAM_RESERVE_SIZE;
  1177. break;
  1178. default:
  1179. ath6kl_err("Unsupported hardware version: 0x%x\n",
  1180. ar->version.target_ver);
  1181. return -EINVAL;
  1182. }
  1183. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1184. "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
  1185. ar->version.target_ver, ar->target_type,
  1186. ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
  1187. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1188. "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
  1189. ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
  1190. ar->hw.reserved_ram_size);
  1191. return 0;
  1192. }
  1193. static int ath6kl_init(struct net_device *dev)
  1194. {
  1195. struct ath6kl *ar = ath6kl_priv(dev);
  1196. int status = 0;
  1197. s32 timeleft;
  1198. if (!ar)
  1199. return -EIO;
  1200. /* Do we need to finish the BMI phase */
  1201. if (ath6kl_bmi_done(ar)) {
  1202. status = -EIO;
  1203. goto ath6kl_init_done;
  1204. }
  1205. /* Indicate that WMI is enabled (although not ready yet) */
  1206. set_bit(WMI_ENABLED, &ar->flag);
  1207. ar->wmi = ath6kl_wmi_init(ar);
  1208. if (!ar->wmi) {
  1209. ath6kl_err("failed to initialize wmi\n");
  1210. status = -EIO;
  1211. goto ath6kl_init_done;
  1212. }
  1213. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi);
  1214. /*
  1215. * The reason we have to wait for the target here is that the
  1216. * driver layer has to init BMI in order to set the host block
  1217. * size.
  1218. */
  1219. if (ath6kl_htc_wait_target(ar->htc_target)) {
  1220. status = -EIO;
  1221. goto err_node_cleanup;
  1222. }
  1223. if (ath6kl_init_service_ep(ar)) {
  1224. status = -EIO;
  1225. goto err_cleanup_scatter;
  1226. }
  1227. /* setup access class priority mappings */
  1228. ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */
  1229. ar->ac_stream_pri_map[WMM_AC_BE] = 1;
  1230. ar->ac_stream_pri_map[WMM_AC_VI] = 2;
  1231. ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */
  1232. /* give our connected endpoints some buffers */
  1233. ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep);
  1234. ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]);
  1235. /* allocate some buffers that handle larger AMSDU frames */
  1236. ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS);
  1237. /* setup credit distribution */
  1238. ath6k_setup_credit_dist(ar->htc_target, &ar->credit_state_info);
  1239. ath6kl_cookie_init(ar);
  1240. /* start HTC */
  1241. status = ath6kl_htc_start(ar->htc_target);
  1242. if (status) {
  1243. ath6kl_cookie_cleanup(ar);
  1244. goto err_rxbuf_cleanup;
  1245. }
  1246. /* Wait for Wmi event to be ready */
  1247. timeleft = wait_event_interruptible_timeout(ar->event_wq,
  1248. test_bit(WMI_READY,
  1249. &ar->flag),
  1250. WMI_TIMEOUT);
  1251. ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
  1252. if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
  1253. ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
  1254. ATH6KL_ABI_VERSION, ar->version.abi_ver);
  1255. status = -EIO;
  1256. goto err_htc_stop;
  1257. }
  1258. if (!timeleft || signal_pending(current)) {
  1259. ath6kl_err("wmi is not ready or wait was interrupted\n");
  1260. status = -EIO;
  1261. goto err_htc_stop;
  1262. }
  1263. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
  1264. /* communicate the wmi protocol verision to the target */
  1265. if ((ath6kl_set_host_app_area(ar)) != 0)
  1266. ath6kl_err("unable to set the host app area\n");
  1267. ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER |
  1268. ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST;
  1269. ar->wdev->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM;
  1270. status = ath6kl_target_config_wlan_params(ar);
  1271. if (!status)
  1272. goto ath6kl_init_done;
  1273. err_htc_stop:
  1274. ath6kl_htc_stop(ar->htc_target);
  1275. err_rxbuf_cleanup:
  1276. ath6kl_htc_flush_rx_buf(ar->htc_target);
  1277. ath6kl_cleanup_amsdu_rxbufs(ar);
  1278. err_cleanup_scatter:
  1279. ath6kl_hif_cleanup_scatter(ar);
  1280. err_node_cleanup:
  1281. ath6kl_wmi_shutdown(ar->wmi);
  1282. clear_bit(WMI_ENABLED, &ar->flag);
  1283. ar->wmi = NULL;
  1284. ath6kl_init_done:
  1285. return status;
  1286. }
  1287. int ath6kl_core_init(struct ath6kl *ar)
  1288. {
  1289. int ret = 0;
  1290. struct ath6kl_bmi_target_info targ_info;
  1291. ar->ath6kl_wq = create_singlethread_workqueue("ath6kl");
  1292. if (!ar->ath6kl_wq)
  1293. return -ENOMEM;
  1294. ret = ath6kl_bmi_init(ar);
  1295. if (ret)
  1296. goto err_wq;
  1297. ret = ath6kl_bmi_get_target_info(ar, &targ_info);
  1298. if (ret)
  1299. goto err_bmi_cleanup;
  1300. ar->version.target_ver = le32_to_cpu(targ_info.version);
  1301. ar->target_type = le32_to_cpu(targ_info.type);
  1302. ar->wdev->wiphy->hw_version = le32_to_cpu(targ_info.version);
  1303. ret = ath6kl_init_hw_params(ar);
  1304. if (ret)
  1305. goto err_bmi_cleanup;
  1306. ret = ath6kl_configure_target(ar);
  1307. if (ret)
  1308. goto err_bmi_cleanup;
  1309. ar->htc_target = ath6kl_htc_create(ar);
  1310. if (!ar->htc_target) {
  1311. ret = -ENOMEM;
  1312. goto err_bmi_cleanup;
  1313. }
  1314. ar->aggr_cntxt = aggr_init(ar->net_dev);
  1315. if (!ar->aggr_cntxt) {
  1316. ath6kl_err("failed to initialize aggr\n");
  1317. ret = -ENOMEM;
  1318. goto err_htc_cleanup;
  1319. }
  1320. ret = ath6kl_fetch_firmwares(ar);
  1321. if (ret)
  1322. goto err_htc_cleanup;
  1323. ret = ath6kl_init_upload(ar);
  1324. if (ret)
  1325. goto err_htc_cleanup;
  1326. ret = ath6kl_init(ar->net_dev);
  1327. if (ret)
  1328. goto err_htc_cleanup;
  1329. /* This runs the init function if registered */
  1330. ret = register_netdev(ar->net_dev);
  1331. if (ret) {
  1332. ath6kl_err("register_netdev failed\n");
  1333. ath6kl_destroy(ar->net_dev, 0);
  1334. return ret;
  1335. }
  1336. set_bit(NETDEV_REGISTERED, &ar->flag);
  1337. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n",
  1338. __func__, ar->net_dev->name, ar->net_dev, ar);
  1339. return ret;
  1340. err_htc_cleanup:
  1341. ath6kl_htc_cleanup(ar->htc_target);
  1342. err_bmi_cleanup:
  1343. ath6kl_bmi_cleanup(ar);
  1344. err_wq:
  1345. destroy_workqueue(ar->ath6kl_wq);
  1346. return ret;
  1347. }
  1348. void ath6kl_stop_txrx(struct ath6kl *ar)
  1349. {
  1350. struct net_device *ndev = ar->net_dev;
  1351. if (!ndev)
  1352. return;
  1353. set_bit(DESTROY_IN_PROGRESS, &ar->flag);
  1354. if (down_interruptible(&ar->sem)) {
  1355. ath6kl_err("down_interruptible failed\n");
  1356. return;
  1357. }
  1358. if (ar->wlan_pwr_state != WLAN_POWER_STATE_CUT_PWR)
  1359. ath6kl_stop_endpoint(ndev, false, true);
  1360. clear_bit(WLAN_ENABLED, &ar->flag);
  1361. }
  1362. /*
  1363. * We need to differentiate between the surprise and planned removal of the
  1364. * device because of the following consideration:
  1365. *
  1366. * - In case of surprise removal, the hcd already frees up the pending
  1367. * for the device and hence there is no need to unregister the function
  1368. * driver inorder to get these requests. For planned removal, the function
  1369. * driver has to explicitly unregister itself to have the hcd return all the
  1370. * pending requests before the data structures for the devices are freed up.
  1371. * Note that as per the current implementation, the function driver will
  1372. * end up releasing all the devices since there is no API to selectively
  1373. * release a particular device.
  1374. *
  1375. * - Certain commands issued to the target can be skipped for surprise
  1376. * removal since they will anyway not go through.
  1377. */
  1378. void ath6kl_destroy(struct net_device *dev, unsigned int unregister)
  1379. {
  1380. struct ath6kl *ar;
  1381. if (!dev || !ath6kl_priv(dev)) {
  1382. ath6kl_err("failed to get device structure\n");
  1383. return;
  1384. }
  1385. ar = ath6kl_priv(dev);
  1386. destroy_workqueue(ar->ath6kl_wq);
  1387. if (ar->htc_target)
  1388. ath6kl_htc_cleanup(ar->htc_target);
  1389. aggr_module_destroy(ar->aggr_cntxt);
  1390. ath6kl_cookie_cleanup(ar);
  1391. ath6kl_cleanup_amsdu_rxbufs(ar);
  1392. ath6kl_bmi_cleanup(ar);
  1393. ath6kl_debug_cleanup(ar);
  1394. if (unregister && test_bit(NETDEV_REGISTERED, &ar->flag)) {
  1395. unregister_netdev(dev);
  1396. clear_bit(NETDEV_REGISTERED, &ar->flag);
  1397. }
  1398. free_netdev(dev);
  1399. kfree(ar->fw_board);
  1400. kfree(ar->fw_otp);
  1401. kfree(ar->fw);
  1402. kfree(ar->fw_patch);
  1403. ath6kl_cfg80211_deinit(ar);
  1404. }