bmi.c 17 KB

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  1. /*
  2. * Copyright (c) 2004-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include "core.h"
  17. #include "hif-ops.h"
  18. #include "target.h"
  19. #include "debug.h"
  20. static int ath6kl_get_bmi_cmd_credits(struct ath6kl *ar)
  21. {
  22. u32 addr;
  23. unsigned long timeout;
  24. int ret;
  25. ar->bmi.cmd_credits = 0;
  26. /* Read the counter register to get the command credits */
  27. addr = COUNT_DEC_ADDRESS + (HTC_MAILBOX_NUM_MAX + ENDPOINT1) * 4;
  28. timeout = jiffies + msecs_to_jiffies(BMI_COMMUNICATION_TIMEOUT);
  29. while (time_before(jiffies, timeout) && !ar->bmi.cmd_credits) {
  30. /*
  31. * Hit the credit counter with a 4-byte access, the first byte
  32. * read will hit the counter and cause a decrement, while the
  33. * remaining 3 bytes has no effect. The rationale behind this
  34. * is to make all HIF accesses 4-byte aligned.
  35. */
  36. ret = hif_read_write_sync(ar, addr,
  37. (u8 *)&ar->bmi.cmd_credits, 4,
  38. HIF_RD_SYNC_BYTE_INC);
  39. if (ret) {
  40. ath6kl_err("Unable to decrement the command credit count register: %d\n",
  41. ret);
  42. return ret;
  43. }
  44. /* The counter is only 8 bits.
  45. * Ignore anything in the upper 3 bytes
  46. */
  47. ar->bmi.cmd_credits &= 0xFF;
  48. }
  49. if (!ar->bmi.cmd_credits) {
  50. ath6kl_err("bmi communication timeout\n");
  51. return -ETIMEDOUT;
  52. }
  53. return 0;
  54. }
  55. static int ath6kl_bmi_get_rx_lkahd(struct ath6kl *ar)
  56. {
  57. unsigned long timeout;
  58. u32 rx_word = 0;
  59. int ret = 0;
  60. timeout = jiffies + msecs_to_jiffies(BMI_COMMUNICATION_TIMEOUT);
  61. while (time_before(jiffies, timeout) && !rx_word) {
  62. ret = hif_read_write_sync(ar, RX_LOOKAHEAD_VALID_ADDRESS,
  63. (u8 *)&rx_word, sizeof(rx_word),
  64. HIF_RD_SYNC_BYTE_INC);
  65. if (ret) {
  66. ath6kl_err("unable to read RX_LOOKAHEAD_VALID\n");
  67. return ret;
  68. }
  69. /* all we really want is one bit */
  70. rx_word &= (1 << ENDPOINT1);
  71. }
  72. if (!rx_word) {
  73. ath6kl_err("bmi_recv_buf FIFO empty\n");
  74. return -EINVAL;
  75. }
  76. return ret;
  77. }
  78. static int ath6kl_bmi_send_buf(struct ath6kl *ar, u8 *buf, u32 len)
  79. {
  80. int ret;
  81. u32 addr;
  82. ret = ath6kl_get_bmi_cmd_credits(ar);
  83. if (ret)
  84. return ret;
  85. addr = ar->mbox_info.htc_addr;
  86. ret = hif_read_write_sync(ar, addr, buf, len,
  87. HIF_WR_SYNC_BYTE_INC);
  88. if (ret)
  89. ath6kl_err("unable to send the bmi data to the device\n");
  90. return ret;
  91. }
  92. static int ath6kl_bmi_recv_buf(struct ath6kl *ar, u8 *buf, u32 len)
  93. {
  94. int ret;
  95. u32 addr;
  96. /*
  97. * During normal bootup, small reads may be required.
  98. * Rather than issue an HIF Read and then wait as the Target
  99. * adds successive bytes to the FIFO, we wait here until
  100. * we know that response data is available.
  101. *
  102. * This allows us to cleanly timeout on an unexpected
  103. * Target failure rather than risk problems at the HIF level.
  104. * In particular, this avoids SDIO timeouts and possibly garbage
  105. * data on some host controllers. And on an interconnect
  106. * such as Compact Flash (as well as some SDIO masters) which
  107. * does not provide any indication on data timeout, it avoids
  108. * a potential hang or garbage response.
  109. *
  110. * Synchronization is more difficult for reads larger than the
  111. * size of the MBOX FIFO (128B), because the Target is unable
  112. * to push the 129th byte of data until AFTER the Host posts an
  113. * HIF Read and removes some FIFO data. So for large reads the
  114. * Host proceeds to post an HIF Read BEFORE all the data is
  115. * actually available to read. Fortunately, large BMI reads do
  116. * not occur in practice -- they're supported for debug/development.
  117. *
  118. * So Host/Target BMI synchronization is divided into these cases:
  119. * CASE 1: length < 4
  120. * Should not happen
  121. *
  122. * CASE 2: 4 <= length <= 128
  123. * Wait for first 4 bytes to be in FIFO
  124. * If CONSERVATIVE_BMI_READ is enabled, also wait for
  125. * a BMI command credit, which indicates that the ENTIRE
  126. * response is available in the the FIFO
  127. *
  128. * CASE 3: length > 128
  129. * Wait for the first 4 bytes to be in FIFO
  130. *
  131. * For most uses, a small timeout should be sufficient and we will
  132. * usually see a response quickly; but there may be some unusual
  133. * (debug) cases of BMI_EXECUTE where we want an larger timeout.
  134. * For now, we use an unbounded busy loop while waiting for
  135. * BMI_EXECUTE.
  136. *
  137. * If BMI_EXECUTE ever needs to support longer-latency execution,
  138. * especially in production, this code needs to be enhanced to sleep
  139. * and yield. Also note that BMI_COMMUNICATION_TIMEOUT is currently
  140. * a function of Host processor speed.
  141. */
  142. if (len >= 4) { /* NB: Currently, always true */
  143. ret = ath6kl_bmi_get_rx_lkahd(ar);
  144. if (ret)
  145. return ret;
  146. }
  147. addr = ar->mbox_info.htc_addr;
  148. ret = hif_read_write_sync(ar, addr, buf, len,
  149. HIF_RD_SYNC_BYTE_INC);
  150. if (ret) {
  151. ath6kl_err("Unable to read the bmi data from the device: %d\n",
  152. ret);
  153. return ret;
  154. }
  155. return 0;
  156. }
  157. int ath6kl_bmi_done(struct ath6kl *ar)
  158. {
  159. int ret;
  160. u32 cid = BMI_DONE;
  161. if (ar->bmi.done_sent) {
  162. ath6kl_dbg(ATH6KL_DBG_BMI, "bmi done skipped\n");
  163. return 0;
  164. }
  165. ar->bmi.done_sent = true;
  166. ret = ath6kl_bmi_send_buf(ar, (u8 *)&cid, sizeof(cid));
  167. if (ret) {
  168. ath6kl_err("Unable to send bmi done: %d\n", ret);
  169. return ret;
  170. }
  171. ath6kl_bmi_cleanup(ar);
  172. return 0;
  173. }
  174. int ath6kl_bmi_get_target_info(struct ath6kl *ar,
  175. struct ath6kl_bmi_target_info *targ_info)
  176. {
  177. int ret;
  178. u32 cid = BMI_GET_TARGET_INFO;
  179. if (ar->bmi.done_sent) {
  180. ath6kl_err("bmi done sent already, cmd %d disallowed\n", cid);
  181. return -EACCES;
  182. }
  183. ret = ath6kl_bmi_send_buf(ar, (u8 *)&cid, sizeof(cid));
  184. if (ret) {
  185. ath6kl_err("Unable to send get target info: %d\n", ret);
  186. return ret;
  187. }
  188. ret = ath6kl_bmi_recv_buf(ar, (u8 *)&targ_info->version,
  189. sizeof(targ_info->version));
  190. if (ret) {
  191. ath6kl_err("Unable to recv target info: %d\n", ret);
  192. return ret;
  193. }
  194. if (le32_to_cpu(targ_info->version) == TARGET_VERSION_SENTINAL) {
  195. /* Determine how many bytes are in the Target's targ_info */
  196. ret = ath6kl_bmi_recv_buf(ar,
  197. (u8 *)&targ_info->byte_count,
  198. sizeof(targ_info->byte_count));
  199. if (ret) {
  200. ath6kl_err("unable to read target info byte count: %d\n",
  201. ret);
  202. return ret;
  203. }
  204. /*
  205. * The target's targ_info doesn't match the host's targ_info.
  206. * We need to do some backwards compatibility to make this work.
  207. */
  208. if (le32_to_cpu(targ_info->byte_count) != sizeof(*targ_info)) {
  209. WARN_ON(1);
  210. return -EINVAL;
  211. }
  212. /* Read the remainder of the targ_info */
  213. ret = ath6kl_bmi_recv_buf(ar,
  214. ((u8 *)targ_info) +
  215. sizeof(targ_info->byte_count),
  216. sizeof(*targ_info) -
  217. sizeof(targ_info->byte_count));
  218. if (ret) {
  219. ath6kl_err("Unable to read target info (%d bytes): %d\n",
  220. targ_info->byte_count, ret);
  221. return ret;
  222. }
  223. }
  224. ath6kl_dbg(ATH6KL_DBG_BMI, "target info (ver: 0x%x type: 0x%x)\n",
  225. targ_info->version, targ_info->type);
  226. return 0;
  227. }
  228. int ath6kl_bmi_read(struct ath6kl *ar, u32 addr, u8 *buf, u32 len)
  229. {
  230. u32 cid = BMI_READ_MEMORY;
  231. int ret;
  232. u32 offset;
  233. u32 len_remain, rx_len;
  234. u16 size;
  235. if (ar->bmi.done_sent) {
  236. ath6kl_err("bmi done sent already, cmd %d disallowed\n", cid);
  237. return -EACCES;
  238. }
  239. size = BMI_DATASZ_MAX + sizeof(cid) + sizeof(addr) + sizeof(len);
  240. if (size > MAX_BMI_CMDBUF_SZ) {
  241. WARN_ON(1);
  242. return -EINVAL;
  243. }
  244. memset(ar->bmi.cmd_buf, 0, size);
  245. ath6kl_dbg(ATH6KL_DBG_BMI,
  246. "bmi read memory: device: addr: 0x%x, len: %d\n",
  247. addr, len);
  248. len_remain = len;
  249. while (len_remain) {
  250. rx_len = (len_remain < BMI_DATASZ_MAX) ?
  251. len_remain : BMI_DATASZ_MAX;
  252. offset = 0;
  253. memcpy(&(ar->bmi.cmd_buf[offset]), &cid, sizeof(cid));
  254. offset += sizeof(cid);
  255. memcpy(&(ar->bmi.cmd_buf[offset]), &addr, sizeof(addr));
  256. offset += sizeof(addr);
  257. memcpy(&(ar->bmi.cmd_buf[offset]), &rx_len, sizeof(rx_len));
  258. offset += sizeof(len);
  259. ret = ath6kl_bmi_send_buf(ar, ar->bmi.cmd_buf, offset);
  260. if (ret) {
  261. ath6kl_err("Unable to write to the device: %d\n",
  262. ret);
  263. return ret;
  264. }
  265. ret = ath6kl_bmi_recv_buf(ar, ar->bmi.cmd_buf, rx_len);
  266. if (ret) {
  267. ath6kl_err("Unable to read from the device: %d\n",
  268. ret);
  269. return ret;
  270. }
  271. memcpy(&buf[len - len_remain], ar->bmi.cmd_buf, rx_len);
  272. len_remain -= rx_len; addr += rx_len;
  273. }
  274. return 0;
  275. }
  276. int ath6kl_bmi_write(struct ath6kl *ar, u32 addr, u8 *buf, u32 len)
  277. {
  278. u32 cid = BMI_WRITE_MEMORY;
  279. int ret;
  280. u32 offset;
  281. u32 len_remain, tx_len;
  282. const u32 header = sizeof(cid) + sizeof(addr) + sizeof(len);
  283. u8 aligned_buf[BMI_DATASZ_MAX];
  284. u8 *src;
  285. if (ar->bmi.done_sent) {
  286. ath6kl_err("bmi done sent already, cmd %d disallowed\n", cid);
  287. return -EACCES;
  288. }
  289. if ((BMI_DATASZ_MAX + header) > MAX_BMI_CMDBUF_SZ) {
  290. WARN_ON(1);
  291. return -EINVAL;
  292. }
  293. memset(ar->bmi.cmd_buf, 0, BMI_DATASZ_MAX + header);
  294. ath6kl_dbg(ATH6KL_DBG_BMI,
  295. "bmi write memory: addr: 0x%x, len: %d\n", addr, len);
  296. len_remain = len;
  297. while (len_remain) {
  298. src = &buf[len - len_remain];
  299. if (len_remain < (BMI_DATASZ_MAX - header)) {
  300. if (len_remain & 3) {
  301. /* align it with 4 bytes */
  302. len_remain = len_remain +
  303. (4 - (len_remain & 3));
  304. memcpy(aligned_buf, src, len_remain);
  305. src = aligned_buf;
  306. }
  307. tx_len = len_remain;
  308. } else {
  309. tx_len = (BMI_DATASZ_MAX - header);
  310. }
  311. offset = 0;
  312. memcpy(&(ar->bmi.cmd_buf[offset]), &cid, sizeof(cid));
  313. offset += sizeof(cid);
  314. memcpy(&(ar->bmi.cmd_buf[offset]), &addr, sizeof(addr));
  315. offset += sizeof(addr);
  316. memcpy(&(ar->bmi.cmd_buf[offset]), &tx_len, sizeof(tx_len));
  317. offset += sizeof(tx_len);
  318. memcpy(&(ar->bmi.cmd_buf[offset]), src, tx_len);
  319. offset += tx_len;
  320. ret = ath6kl_bmi_send_buf(ar, ar->bmi.cmd_buf, offset);
  321. if (ret) {
  322. ath6kl_err("Unable to write to the device: %d\n",
  323. ret);
  324. return ret;
  325. }
  326. len_remain -= tx_len; addr += tx_len;
  327. }
  328. return 0;
  329. }
  330. int ath6kl_bmi_execute(struct ath6kl *ar, u32 addr, u32 *param)
  331. {
  332. u32 cid = BMI_EXECUTE;
  333. int ret;
  334. u32 offset;
  335. u16 size;
  336. if (ar->bmi.done_sent) {
  337. ath6kl_err("bmi done sent already, cmd %d disallowed\n", cid);
  338. return -EACCES;
  339. }
  340. size = sizeof(cid) + sizeof(addr) + sizeof(param);
  341. if (size > MAX_BMI_CMDBUF_SZ) {
  342. WARN_ON(1);
  343. return -EINVAL;
  344. }
  345. memset(ar->bmi.cmd_buf, 0, size);
  346. ath6kl_dbg(ATH6KL_DBG_BMI, "bmi execute: addr: 0x%x, param: %d)\n",
  347. addr, *param);
  348. offset = 0;
  349. memcpy(&(ar->bmi.cmd_buf[offset]), &cid, sizeof(cid));
  350. offset += sizeof(cid);
  351. memcpy(&(ar->bmi.cmd_buf[offset]), &addr, sizeof(addr));
  352. offset += sizeof(addr);
  353. memcpy(&(ar->bmi.cmd_buf[offset]), param, sizeof(*param));
  354. offset += sizeof(*param);
  355. ret = ath6kl_bmi_send_buf(ar, ar->bmi.cmd_buf, offset);
  356. if (ret) {
  357. ath6kl_err("Unable to write to the device: %d\n", ret);
  358. return ret;
  359. }
  360. ret = ath6kl_bmi_recv_buf(ar, ar->bmi.cmd_buf, sizeof(*param));
  361. if (ret) {
  362. ath6kl_err("Unable to read from the device: %d\n", ret);
  363. return ret;
  364. }
  365. memcpy(param, ar->bmi.cmd_buf, sizeof(*param));
  366. return 0;
  367. }
  368. int ath6kl_bmi_set_app_start(struct ath6kl *ar, u32 addr)
  369. {
  370. u32 cid = BMI_SET_APP_START;
  371. int ret;
  372. u32 offset;
  373. u16 size;
  374. if (ar->bmi.done_sent) {
  375. ath6kl_err("bmi done sent already, cmd %d disallowed\n", cid);
  376. return -EACCES;
  377. }
  378. size = sizeof(cid) + sizeof(addr);
  379. if (size > MAX_BMI_CMDBUF_SZ) {
  380. WARN_ON(1);
  381. return -EINVAL;
  382. }
  383. memset(ar->bmi.cmd_buf, 0, size);
  384. ath6kl_dbg(ATH6KL_DBG_BMI, "bmi set app start: addr: 0x%x\n", addr);
  385. offset = 0;
  386. memcpy(&(ar->bmi.cmd_buf[offset]), &cid, sizeof(cid));
  387. offset += sizeof(cid);
  388. memcpy(&(ar->bmi.cmd_buf[offset]), &addr, sizeof(addr));
  389. offset += sizeof(addr);
  390. ret = ath6kl_bmi_send_buf(ar, ar->bmi.cmd_buf, offset);
  391. if (ret) {
  392. ath6kl_err("Unable to write to the device: %d\n", ret);
  393. return ret;
  394. }
  395. return 0;
  396. }
  397. int ath6kl_bmi_reg_read(struct ath6kl *ar, u32 addr, u32 *param)
  398. {
  399. u32 cid = BMI_READ_SOC_REGISTER;
  400. int ret;
  401. u32 offset;
  402. u16 size;
  403. if (ar->bmi.done_sent) {
  404. ath6kl_err("bmi done sent already, cmd %d disallowed\n", cid);
  405. return -EACCES;
  406. }
  407. size = sizeof(cid) + sizeof(addr);
  408. if (size > MAX_BMI_CMDBUF_SZ) {
  409. WARN_ON(1);
  410. return -EINVAL;
  411. }
  412. memset(ar->bmi.cmd_buf, 0, size);
  413. ath6kl_dbg(ATH6KL_DBG_BMI, "bmi read SOC reg: addr: 0x%x\n", addr);
  414. offset = 0;
  415. memcpy(&(ar->bmi.cmd_buf[offset]), &cid, sizeof(cid));
  416. offset += sizeof(cid);
  417. memcpy(&(ar->bmi.cmd_buf[offset]), &addr, sizeof(addr));
  418. offset += sizeof(addr);
  419. ret = ath6kl_bmi_send_buf(ar, ar->bmi.cmd_buf, offset);
  420. if (ret) {
  421. ath6kl_err("Unable to write to the device: %d\n", ret);
  422. return ret;
  423. }
  424. ret = ath6kl_bmi_recv_buf(ar, ar->bmi.cmd_buf, sizeof(*param));
  425. if (ret) {
  426. ath6kl_err("Unable to read from the device: %d\n", ret);
  427. return ret;
  428. }
  429. memcpy(param, ar->bmi.cmd_buf, sizeof(*param));
  430. return 0;
  431. }
  432. int ath6kl_bmi_reg_write(struct ath6kl *ar, u32 addr, u32 param)
  433. {
  434. u32 cid = BMI_WRITE_SOC_REGISTER;
  435. int ret;
  436. u32 offset;
  437. u16 size;
  438. if (ar->bmi.done_sent) {
  439. ath6kl_err("bmi done sent already, cmd %d disallowed\n", cid);
  440. return -EACCES;
  441. }
  442. size = sizeof(cid) + sizeof(addr) + sizeof(param);
  443. if (size > MAX_BMI_CMDBUF_SZ) {
  444. WARN_ON(1);
  445. return -EINVAL;
  446. }
  447. memset(ar->bmi.cmd_buf, 0, size);
  448. ath6kl_dbg(ATH6KL_DBG_BMI,
  449. "bmi write SOC reg: addr: 0x%x, param: %d\n",
  450. addr, param);
  451. offset = 0;
  452. memcpy(&(ar->bmi.cmd_buf[offset]), &cid, sizeof(cid));
  453. offset += sizeof(cid);
  454. memcpy(&(ar->bmi.cmd_buf[offset]), &addr, sizeof(addr));
  455. offset += sizeof(addr);
  456. memcpy(&(ar->bmi.cmd_buf[offset]), &param, sizeof(param));
  457. offset += sizeof(param);
  458. ret = ath6kl_bmi_send_buf(ar, ar->bmi.cmd_buf, offset);
  459. if (ret) {
  460. ath6kl_err("Unable to write to the device: %d\n", ret);
  461. return ret;
  462. }
  463. return 0;
  464. }
  465. int ath6kl_bmi_lz_data(struct ath6kl *ar, u8 *buf, u32 len)
  466. {
  467. u32 cid = BMI_LZ_DATA;
  468. int ret;
  469. u32 offset;
  470. u32 len_remain, tx_len;
  471. const u32 header = sizeof(cid) + sizeof(len);
  472. u16 size;
  473. if (ar->bmi.done_sent) {
  474. ath6kl_err("bmi done sent already, cmd %d disallowed\n", cid);
  475. return -EACCES;
  476. }
  477. size = BMI_DATASZ_MAX + header;
  478. if (size > MAX_BMI_CMDBUF_SZ) {
  479. WARN_ON(1);
  480. return -EINVAL;
  481. }
  482. memset(ar->bmi.cmd_buf, 0, size);
  483. ath6kl_dbg(ATH6KL_DBG_BMI, "bmi send LZ data: len: %d)\n",
  484. len);
  485. len_remain = len;
  486. while (len_remain) {
  487. tx_len = (len_remain < (BMI_DATASZ_MAX - header)) ?
  488. len_remain : (BMI_DATASZ_MAX - header);
  489. offset = 0;
  490. memcpy(&(ar->bmi.cmd_buf[offset]), &cid, sizeof(cid));
  491. offset += sizeof(cid);
  492. memcpy(&(ar->bmi.cmd_buf[offset]), &tx_len, sizeof(tx_len));
  493. offset += sizeof(tx_len);
  494. memcpy(&(ar->bmi.cmd_buf[offset]), &buf[len - len_remain],
  495. tx_len);
  496. offset += tx_len;
  497. ret = ath6kl_bmi_send_buf(ar, ar->bmi.cmd_buf, offset);
  498. if (ret) {
  499. ath6kl_err("Unable to write to the device: %d\n",
  500. ret);
  501. return ret;
  502. }
  503. len_remain -= tx_len;
  504. }
  505. return 0;
  506. }
  507. int ath6kl_bmi_lz_stream_start(struct ath6kl *ar, u32 addr)
  508. {
  509. u32 cid = BMI_LZ_STREAM_START;
  510. int ret;
  511. u32 offset;
  512. u16 size;
  513. if (ar->bmi.done_sent) {
  514. ath6kl_err("bmi done sent already, cmd %d disallowed\n", cid);
  515. return -EACCES;
  516. }
  517. size = sizeof(cid) + sizeof(addr);
  518. if (size > MAX_BMI_CMDBUF_SZ) {
  519. WARN_ON(1);
  520. return -EINVAL;
  521. }
  522. memset(ar->bmi.cmd_buf, 0, size);
  523. ath6kl_dbg(ATH6KL_DBG_BMI,
  524. "bmi LZ stream start: addr: 0x%x)\n",
  525. addr);
  526. offset = 0;
  527. memcpy(&(ar->bmi.cmd_buf[offset]), &cid, sizeof(cid));
  528. offset += sizeof(cid);
  529. memcpy(&(ar->bmi.cmd_buf[offset]), &addr, sizeof(addr));
  530. offset += sizeof(addr);
  531. ret = ath6kl_bmi_send_buf(ar, ar->bmi.cmd_buf, offset);
  532. if (ret) {
  533. ath6kl_err("Unable to start LZ stream to the device: %d\n",
  534. ret);
  535. return ret;
  536. }
  537. return 0;
  538. }
  539. int ath6kl_bmi_fast_download(struct ath6kl *ar, u32 addr, u8 *buf, u32 len)
  540. {
  541. int ret;
  542. u32 last_word = 0;
  543. u32 last_word_offset = len & ~0x3;
  544. u32 unaligned_bytes = len & 0x3;
  545. ret = ath6kl_bmi_lz_stream_start(ar, addr);
  546. if (ret)
  547. return ret;
  548. if (unaligned_bytes) {
  549. /* copy the last word into a zero padded buffer */
  550. memcpy(&last_word, &buf[last_word_offset], unaligned_bytes);
  551. }
  552. ret = ath6kl_bmi_lz_data(ar, buf, last_word_offset);
  553. if (ret)
  554. return ret;
  555. if (unaligned_bytes)
  556. ret = ath6kl_bmi_lz_data(ar, (u8 *)&last_word, 4);
  557. if (!ret) {
  558. /* Close compressed stream and open a new (fake) one.
  559. * This serves mainly to flush Target caches. */
  560. ret = ath6kl_bmi_lz_stream_start(ar, 0x00);
  561. }
  562. return ret;
  563. }
  564. int ath6kl_bmi_init(struct ath6kl *ar)
  565. {
  566. ar->bmi.cmd_buf = kzalloc(MAX_BMI_CMDBUF_SZ, GFP_ATOMIC);
  567. if (!ar->bmi.cmd_buf)
  568. return -ENOMEM;
  569. return 0;
  570. }
  571. void ath6kl_bmi_cleanup(struct ath6kl *ar)
  572. {
  573. kfree(ar->bmi.cmd_buf);
  574. ar->bmi.cmd_buf = NULL;
  575. }