tsi108_eth.c 47 KB

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  1. /*******************************************************************************
  2. Copyright(c) 2006 Tundra Semiconductor Corporation.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. *******************************************************************************/
  15. /* This driver is based on the driver code originally developed
  16. * for the Intel IOC80314 (ForestLake) Gigabit Ethernet by
  17. * scott.wood@timesys.com * Copyright (C) 2003 TimeSys Corporation
  18. *
  19. * Currently changes from original version are:
  20. * - porting to Tsi108-based platform and kernel 2.6 (kong.lai@tundra.com)
  21. * - modifications to handle two ports independently and support for
  22. * additional PHY devices (alexandre.bounine@tundra.com)
  23. * - Get hardware information from platform device. (tie-fei.zang@freescale.com)
  24. *
  25. */
  26. #include <linux/module.h>
  27. #include <linux/types.h>
  28. #include <linux/init.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/net.h>
  31. #include <linux/netdevice.h>
  32. #include <linux/etherdevice.h>
  33. #include <linux/ethtool.h>
  34. #include <linux/skbuff.h>
  35. #include <linux/spinlock.h>
  36. #include <linux/delay.h>
  37. #include <linux/crc32.h>
  38. #include <linux/mii.h>
  39. #include <linux/device.h>
  40. #include <linux/pci.h>
  41. #include <linux/rtnetlink.h>
  42. #include <linux/timer.h>
  43. #include <linux/platform_device.h>
  44. #include <linux/gfp.h>
  45. #include <asm/system.h>
  46. #include <asm/io.h>
  47. #include <asm/tsi108.h>
  48. #include "tsi108_eth.h"
  49. #define MII_READ_DELAY 10000 /* max link wait time in msec */
  50. #define TSI108_RXRING_LEN 256
  51. /* NOTE: The driver currently does not support receiving packets
  52. * larger than the buffer size, so don't decrease this (unless you
  53. * want to add such support).
  54. */
  55. #define TSI108_RXBUF_SIZE 1536
  56. #define TSI108_TXRING_LEN 256
  57. #define TSI108_TX_INT_FREQ 64
  58. /* Check the phy status every half a second. */
  59. #define CHECK_PHY_INTERVAL (HZ/2)
  60. static int tsi108_init_one(struct platform_device *pdev);
  61. static int tsi108_ether_remove(struct platform_device *pdev);
  62. struct tsi108_prv_data {
  63. void __iomem *regs; /* Base of normal regs */
  64. void __iomem *phyregs; /* Base of register bank used for PHY access */
  65. struct net_device *dev;
  66. struct napi_struct napi;
  67. unsigned int phy; /* Index of PHY for this interface */
  68. unsigned int irq_num;
  69. unsigned int id;
  70. unsigned int phy_type;
  71. struct timer_list timer;/* Timer that triggers the check phy function */
  72. unsigned int rxtail; /* Next entry in rxring to read */
  73. unsigned int rxhead; /* Next entry in rxring to give a new buffer */
  74. unsigned int rxfree; /* Number of free, allocated RX buffers */
  75. unsigned int rxpending; /* Non-zero if there are still descriptors
  76. * to be processed from a previous descriptor
  77. * interrupt condition that has been cleared */
  78. unsigned int txtail; /* Next TX descriptor to check status on */
  79. unsigned int txhead; /* Next TX descriptor to use */
  80. /* Number of free TX descriptors. This could be calculated from
  81. * rxhead and rxtail if one descriptor were left unused to disambiguate
  82. * full and empty conditions, but it's simpler to just keep track
  83. * explicitly. */
  84. unsigned int txfree;
  85. unsigned int phy_ok; /* The PHY is currently powered on. */
  86. /* PHY status (duplex is 1 for half, 2 for full,
  87. * so that the default 0 indicates that neither has
  88. * yet been configured). */
  89. unsigned int link_up;
  90. unsigned int speed;
  91. unsigned int duplex;
  92. tx_desc *txring;
  93. rx_desc *rxring;
  94. struct sk_buff *txskbs[TSI108_TXRING_LEN];
  95. struct sk_buff *rxskbs[TSI108_RXRING_LEN];
  96. dma_addr_t txdma, rxdma;
  97. /* txlock nests in misclock and phy_lock */
  98. spinlock_t txlock, misclock;
  99. /* stats is used to hold the upper bits of each hardware counter,
  100. * and tmpstats is used to hold the full values for returning
  101. * to the caller of get_stats(). They must be separate in case
  102. * an overflow interrupt occurs before the stats are consumed.
  103. */
  104. struct net_device_stats stats;
  105. struct net_device_stats tmpstats;
  106. /* These stats are kept separate in hardware, thus require individual
  107. * fields for handling carry. They are combined in get_stats.
  108. */
  109. unsigned long rx_fcs; /* Add to rx_frame_errors */
  110. unsigned long rx_short_fcs; /* Add to rx_frame_errors */
  111. unsigned long rx_long_fcs; /* Add to rx_frame_errors */
  112. unsigned long rx_underruns; /* Add to rx_length_errors */
  113. unsigned long rx_overruns; /* Add to rx_length_errors */
  114. unsigned long tx_coll_abort; /* Add to tx_aborted_errors/collisions */
  115. unsigned long tx_pause_drop; /* Add to tx_aborted_errors */
  116. unsigned long mc_hash[16];
  117. u32 msg_enable; /* debug message level */
  118. struct mii_if_info mii_if;
  119. unsigned int init_media;
  120. };
  121. /* Structure for a device driver */
  122. static struct platform_driver tsi_eth_driver = {
  123. .probe = tsi108_init_one,
  124. .remove = tsi108_ether_remove,
  125. .driver = {
  126. .name = "tsi-ethernet",
  127. .owner = THIS_MODULE,
  128. },
  129. };
  130. static void tsi108_timed_checker(unsigned long dev_ptr);
  131. static void dump_eth_one(struct net_device *dev)
  132. {
  133. struct tsi108_prv_data *data = netdev_priv(dev);
  134. printk("Dumping %s...\n", dev->name);
  135. printk("intstat %x intmask %x phy_ok %d"
  136. " link %d speed %d duplex %d\n",
  137. TSI_READ(TSI108_EC_INTSTAT),
  138. TSI_READ(TSI108_EC_INTMASK), data->phy_ok,
  139. data->link_up, data->speed, data->duplex);
  140. printk("TX: head %d, tail %d, free %d, stat %x, estat %x, err %x\n",
  141. data->txhead, data->txtail, data->txfree,
  142. TSI_READ(TSI108_EC_TXSTAT),
  143. TSI_READ(TSI108_EC_TXESTAT),
  144. TSI_READ(TSI108_EC_TXERR));
  145. printk("RX: head %d, tail %d, free %d, stat %x,"
  146. " estat %x, err %x, pending %d\n\n",
  147. data->rxhead, data->rxtail, data->rxfree,
  148. TSI_READ(TSI108_EC_RXSTAT),
  149. TSI_READ(TSI108_EC_RXESTAT),
  150. TSI_READ(TSI108_EC_RXERR), data->rxpending);
  151. }
  152. /* Synchronization is needed between the thread and up/down events.
  153. * Note that the PHY is accessed through the same registers for both
  154. * interfaces, so this can't be made interface-specific.
  155. */
  156. static DEFINE_SPINLOCK(phy_lock);
  157. static int tsi108_read_mii(struct tsi108_prv_data *data, int reg)
  158. {
  159. unsigned i;
  160. TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
  161. (data->phy << TSI108_MAC_MII_ADDR_PHY) |
  162. (reg << TSI108_MAC_MII_ADDR_REG));
  163. TSI_WRITE_PHY(TSI108_MAC_MII_CMD, 0);
  164. TSI_WRITE_PHY(TSI108_MAC_MII_CMD, TSI108_MAC_MII_CMD_READ);
  165. for (i = 0; i < 100; i++) {
  166. if (!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
  167. (TSI108_MAC_MII_IND_NOTVALID | TSI108_MAC_MII_IND_BUSY)))
  168. break;
  169. udelay(10);
  170. }
  171. if (i == 100)
  172. return 0xffff;
  173. else
  174. return TSI_READ_PHY(TSI108_MAC_MII_DATAIN);
  175. }
  176. static void tsi108_write_mii(struct tsi108_prv_data *data,
  177. int reg, u16 val)
  178. {
  179. unsigned i = 100;
  180. TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
  181. (data->phy << TSI108_MAC_MII_ADDR_PHY) |
  182. (reg << TSI108_MAC_MII_ADDR_REG));
  183. TSI_WRITE_PHY(TSI108_MAC_MII_DATAOUT, val);
  184. while (i--) {
  185. if(!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
  186. TSI108_MAC_MII_IND_BUSY))
  187. break;
  188. udelay(10);
  189. }
  190. }
  191. static int tsi108_mdio_read(struct net_device *dev, int addr, int reg)
  192. {
  193. struct tsi108_prv_data *data = netdev_priv(dev);
  194. return tsi108_read_mii(data, reg);
  195. }
  196. static void tsi108_mdio_write(struct net_device *dev, int addr, int reg, int val)
  197. {
  198. struct tsi108_prv_data *data = netdev_priv(dev);
  199. tsi108_write_mii(data, reg, val);
  200. }
  201. static inline void tsi108_write_tbi(struct tsi108_prv_data *data,
  202. int reg, u16 val)
  203. {
  204. unsigned i = 1000;
  205. TSI_WRITE(TSI108_MAC_MII_ADDR,
  206. (0x1e << TSI108_MAC_MII_ADDR_PHY)
  207. | (reg << TSI108_MAC_MII_ADDR_REG));
  208. TSI_WRITE(TSI108_MAC_MII_DATAOUT, val);
  209. while(i--) {
  210. if(!(TSI_READ(TSI108_MAC_MII_IND) & TSI108_MAC_MII_IND_BUSY))
  211. return;
  212. udelay(10);
  213. }
  214. printk(KERN_ERR "%s function time out\n", __func__);
  215. }
  216. static int mii_speed(struct mii_if_info *mii)
  217. {
  218. int advert, lpa, val, media;
  219. int lpa2 = 0;
  220. int speed;
  221. if (!mii_link_ok(mii))
  222. return 0;
  223. val = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_BMSR);
  224. if ((val & BMSR_ANEGCOMPLETE) == 0)
  225. return 0;
  226. advert = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_ADVERTISE);
  227. lpa = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_LPA);
  228. media = mii_nway_result(advert & lpa);
  229. if (mii->supports_gmii)
  230. lpa2 = mii->mdio_read(mii->dev, mii->phy_id, MII_STAT1000);
  231. speed = lpa2 & (LPA_1000FULL | LPA_1000HALF) ? 1000 :
  232. (media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? 100 : 10);
  233. return speed;
  234. }
  235. static void tsi108_check_phy(struct net_device *dev)
  236. {
  237. struct tsi108_prv_data *data = netdev_priv(dev);
  238. u32 mac_cfg2_reg, portctrl_reg;
  239. u32 duplex;
  240. u32 speed;
  241. unsigned long flags;
  242. spin_lock_irqsave(&phy_lock, flags);
  243. if (!data->phy_ok)
  244. goto out;
  245. duplex = mii_check_media(&data->mii_if, netif_msg_link(data), data->init_media);
  246. data->init_media = 0;
  247. if (netif_carrier_ok(dev)) {
  248. speed = mii_speed(&data->mii_if);
  249. if ((speed != data->speed) || duplex) {
  250. mac_cfg2_reg = TSI_READ(TSI108_MAC_CFG2);
  251. portctrl_reg = TSI_READ(TSI108_EC_PORTCTRL);
  252. mac_cfg2_reg &= ~TSI108_MAC_CFG2_IFACE_MASK;
  253. if (speed == 1000) {
  254. mac_cfg2_reg |= TSI108_MAC_CFG2_GIG;
  255. portctrl_reg &= ~TSI108_EC_PORTCTRL_NOGIG;
  256. } else {
  257. mac_cfg2_reg |= TSI108_MAC_CFG2_NOGIG;
  258. portctrl_reg |= TSI108_EC_PORTCTRL_NOGIG;
  259. }
  260. data->speed = speed;
  261. if (data->mii_if.full_duplex) {
  262. mac_cfg2_reg |= TSI108_MAC_CFG2_FULLDUPLEX;
  263. portctrl_reg &= ~TSI108_EC_PORTCTRL_HALFDUPLEX;
  264. data->duplex = 2;
  265. } else {
  266. mac_cfg2_reg &= ~TSI108_MAC_CFG2_FULLDUPLEX;
  267. portctrl_reg |= TSI108_EC_PORTCTRL_HALFDUPLEX;
  268. data->duplex = 1;
  269. }
  270. TSI_WRITE(TSI108_MAC_CFG2, mac_cfg2_reg);
  271. TSI_WRITE(TSI108_EC_PORTCTRL, portctrl_reg);
  272. }
  273. if (data->link_up == 0) {
  274. /* The manual says it can take 3-4 usecs for the speed change
  275. * to take effect.
  276. */
  277. udelay(5);
  278. spin_lock(&data->txlock);
  279. if (is_valid_ether_addr(dev->dev_addr) && data->txfree)
  280. netif_wake_queue(dev);
  281. data->link_up = 1;
  282. spin_unlock(&data->txlock);
  283. }
  284. } else {
  285. if (data->link_up == 1) {
  286. netif_stop_queue(dev);
  287. data->link_up = 0;
  288. printk(KERN_NOTICE "%s : link is down\n", dev->name);
  289. }
  290. goto out;
  291. }
  292. out:
  293. spin_unlock_irqrestore(&phy_lock, flags);
  294. }
  295. static inline void
  296. tsi108_stat_carry_one(int carry, int carry_bit, int carry_shift,
  297. unsigned long *upper)
  298. {
  299. if (carry & carry_bit)
  300. *upper += carry_shift;
  301. }
  302. static void tsi108_stat_carry(struct net_device *dev)
  303. {
  304. struct tsi108_prv_data *data = netdev_priv(dev);
  305. u32 carry1, carry2;
  306. spin_lock_irq(&data->misclock);
  307. carry1 = TSI_READ(TSI108_STAT_CARRY1);
  308. carry2 = TSI_READ(TSI108_STAT_CARRY2);
  309. TSI_WRITE(TSI108_STAT_CARRY1, carry1);
  310. TSI_WRITE(TSI108_STAT_CARRY2, carry2);
  311. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXBYTES,
  312. TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
  313. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXPKTS,
  314. TSI108_STAT_RXPKTS_CARRY,
  315. &data->stats.rx_packets);
  316. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFCS,
  317. TSI108_STAT_RXFCS_CARRY, &data->rx_fcs);
  318. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXMCAST,
  319. TSI108_STAT_RXMCAST_CARRY,
  320. &data->stats.multicast);
  321. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXALIGN,
  322. TSI108_STAT_RXALIGN_CARRY,
  323. &data->stats.rx_frame_errors);
  324. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXLENGTH,
  325. TSI108_STAT_RXLENGTH_CARRY,
  326. &data->stats.rx_length_errors);
  327. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXRUNT,
  328. TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
  329. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJUMBO,
  330. TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
  331. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFRAG,
  332. TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
  333. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJABBER,
  334. TSI108_STAT_RXJABBER_CARRY, &data->rx_long_fcs);
  335. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXDROP,
  336. TSI108_STAT_RXDROP_CARRY,
  337. &data->stats.rx_missed_errors);
  338. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXBYTES,
  339. TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
  340. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPKTS,
  341. TSI108_STAT_TXPKTS_CARRY,
  342. &data->stats.tx_packets);
  343. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXDEF,
  344. TSI108_STAT_TXEXDEF_CARRY,
  345. &data->stats.tx_aborted_errors);
  346. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXCOL,
  347. TSI108_STAT_TXEXCOL_CARRY, &data->tx_coll_abort);
  348. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXTCOL,
  349. TSI108_STAT_TXTCOL_CARRY,
  350. &data->stats.collisions);
  351. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPAUSE,
  352. TSI108_STAT_TXPAUSEDROP_CARRY,
  353. &data->tx_pause_drop);
  354. spin_unlock_irq(&data->misclock);
  355. }
  356. /* Read a stat counter atomically with respect to carries.
  357. * data->misclock must be held.
  358. */
  359. static inline unsigned long
  360. tsi108_read_stat(struct tsi108_prv_data * data, int reg, int carry_bit,
  361. int carry_shift, unsigned long *upper)
  362. {
  363. int carryreg;
  364. unsigned long val;
  365. if (reg < 0xb0)
  366. carryreg = TSI108_STAT_CARRY1;
  367. else
  368. carryreg = TSI108_STAT_CARRY2;
  369. again:
  370. val = TSI_READ(reg) | *upper;
  371. /* Check to see if it overflowed, but the interrupt hasn't
  372. * been serviced yet. If so, handle the carry here, and
  373. * try again.
  374. */
  375. if (unlikely(TSI_READ(carryreg) & carry_bit)) {
  376. *upper += carry_shift;
  377. TSI_WRITE(carryreg, carry_bit);
  378. goto again;
  379. }
  380. return val;
  381. }
  382. static struct net_device_stats *tsi108_get_stats(struct net_device *dev)
  383. {
  384. unsigned long excol;
  385. struct tsi108_prv_data *data = netdev_priv(dev);
  386. spin_lock_irq(&data->misclock);
  387. data->tmpstats.rx_packets =
  388. tsi108_read_stat(data, TSI108_STAT_RXPKTS,
  389. TSI108_STAT_CARRY1_RXPKTS,
  390. TSI108_STAT_RXPKTS_CARRY, &data->stats.rx_packets);
  391. data->tmpstats.tx_packets =
  392. tsi108_read_stat(data, TSI108_STAT_TXPKTS,
  393. TSI108_STAT_CARRY2_TXPKTS,
  394. TSI108_STAT_TXPKTS_CARRY, &data->stats.tx_packets);
  395. data->tmpstats.rx_bytes =
  396. tsi108_read_stat(data, TSI108_STAT_RXBYTES,
  397. TSI108_STAT_CARRY1_RXBYTES,
  398. TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
  399. data->tmpstats.tx_bytes =
  400. tsi108_read_stat(data, TSI108_STAT_TXBYTES,
  401. TSI108_STAT_CARRY2_TXBYTES,
  402. TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
  403. data->tmpstats.multicast =
  404. tsi108_read_stat(data, TSI108_STAT_RXMCAST,
  405. TSI108_STAT_CARRY1_RXMCAST,
  406. TSI108_STAT_RXMCAST_CARRY, &data->stats.multicast);
  407. excol = tsi108_read_stat(data, TSI108_STAT_TXEXCOL,
  408. TSI108_STAT_CARRY2_TXEXCOL,
  409. TSI108_STAT_TXEXCOL_CARRY,
  410. &data->tx_coll_abort);
  411. data->tmpstats.collisions =
  412. tsi108_read_stat(data, TSI108_STAT_TXTCOL,
  413. TSI108_STAT_CARRY2_TXTCOL,
  414. TSI108_STAT_TXTCOL_CARRY, &data->stats.collisions);
  415. data->tmpstats.collisions += excol;
  416. data->tmpstats.rx_length_errors =
  417. tsi108_read_stat(data, TSI108_STAT_RXLENGTH,
  418. TSI108_STAT_CARRY1_RXLENGTH,
  419. TSI108_STAT_RXLENGTH_CARRY,
  420. &data->stats.rx_length_errors);
  421. data->tmpstats.rx_length_errors +=
  422. tsi108_read_stat(data, TSI108_STAT_RXRUNT,
  423. TSI108_STAT_CARRY1_RXRUNT,
  424. TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
  425. data->tmpstats.rx_length_errors +=
  426. tsi108_read_stat(data, TSI108_STAT_RXJUMBO,
  427. TSI108_STAT_CARRY1_RXJUMBO,
  428. TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
  429. data->tmpstats.rx_frame_errors =
  430. tsi108_read_stat(data, TSI108_STAT_RXALIGN,
  431. TSI108_STAT_CARRY1_RXALIGN,
  432. TSI108_STAT_RXALIGN_CARRY,
  433. &data->stats.rx_frame_errors);
  434. data->tmpstats.rx_frame_errors +=
  435. tsi108_read_stat(data, TSI108_STAT_RXFCS,
  436. TSI108_STAT_CARRY1_RXFCS, TSI108_STAT_RXFCS_CARRY,
  437. &data->rx_fcs);
  438. data->tmpstats.rx_frame_errors +=
  439. tsi108_read_stat(data, TSI108_STAT_RXFRAG,
  440. TSI108_STAT_CARRY1_RXFRAG,
  441. TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
  442. data->tmpstats.rx_missed_errors =
  443. tsi108_read_stat(data, TSI108_STAT_RXDROP,
  444. TSI108_STAT_CARRY1_RXDROP,
  445. TSI108_STAT_RXDROP_CARRY,
  446. &data->stats.rx_missed_errors);
  447. /* These three are maintained by software. */
  448. data->tmpstats.rx_fifo_errors = data->stats.rx_fifo_errors;
  449. data->tmpstats.rx_crc_errors = data->stats.rx_crc_errors;
  450. data->tmpstats.tx_aborted_errors =
  451. tsi108_read_stat(data, TSI108_STAT_TXEXDEF,
  452. TSI108_STAT_CARRY2_TXEXDEF,
  453. TSI108_STAT_TXEXDEF_CARRY,
  454. &data->stats.tx_aborted_errors);
  455. data->tmpstats.tx_aborted_errors +=
  456. tsi108_read_stat(data, TSI108_STAT_TXPAUSEDROP,
  457. TSI108_STAT_CARRY2_TXPAUSE,
  458. TSI108_STAT_TXPAUSEDROP_CARRY,
  459. &data->tx_pause_drop);
  460. data->tmpstats.tx_aborted_errors += excol;
  461. data->tmpstats.tx_errors = data->tmpstats.tx_aborted_errors;
  462. data->tmpstats.rx_errors = data->tmpstats.rx_length_errors +
  463. data->tmpstats.rx_crc_errors +
  464. data->tmpstats.rx_frame_errors +
  465. data->tmpstats.rx_fifo_errors + data->tmpstats.rx_missed_errors;
  466. spin_unlock_irq(&data->misclock);
  467. return &data->tmpstats;
  468. }
  469. static void tsi108_restart_rx(struct tsi108_prv_data * data, struct net_device *dev)
  470. {
  471. TSI_WRITE(TSI108_EC_RXQ_PTRHIGH,
  472. TSI108_EC_RXQ_PTRHIGH_VALID);
  473. TSI_WRITE(TSI108_EC_RXCTRL, TSI108_EC_RXCTRL_GO
  474. | TSI108_EC_RXCTRL_QUEUE0);
  475. }
  476. static void tsi108_restart_tx(struct tsi108_prv_data * data)
  477. {
  478. TSI_WRITE(TSI108_EC_TXQ_PTRHIGH,
  479. TSI108_EC_TXQ_PTRHIGH_VALID);
  480. TSI_WRITE(TSI108_EC_TXCTRL, TSI108_EC_TXCTRL_IDLEINT |
  481. TSI108_EC_TXCTRL_GO | TSI108_EC_TXCTRL_QUEUE0);
  482. }
  483. /* txlock must be held by caller, with IRQs disabled, and
  484. * with permission to re-enable them when the lock is dropped.
  485. */
  486. static void tsi108_complete_tx(struct net_device *dev)
  487. {
  488. struct tsi108_prv_data *data = netdev_priv(dev);
  489. int tx;
  490. struct sk_buff *skb;
  491. int release = 0;
  492. while (!data->txfree || data->txhead != data->txtail) {
  493. tx = data->txtail;
  494. if (data->txring[tx].misc & TSI108_TX_OWN)
  495. break;
  496. skb = data->txskbs[tx];
  497. if (!(data->txring[tx].misc & TSI108_TX_OK))
  498. printk("%s: bad tx packet, misc %x\n",
  499. dev->name, data->txring[tx].misc);
  500. data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
  501. data->txfree++;
  502. if (data->txring[tx].misc & TSI108_TX_EOF) {
  503. dev_kfree_skb_any(skb);
  504. release++;
  505. }
  506. }
  507. if (release) {
  508. if (is_valid_ether_addr(dev->dev_addr) && data->link_up)
  509. netif_wake_queue(dev);
  510. }
  511. }
  512. static int tsi108_send_packet(struct sk_buff * skb, struct net_device *dev)
  513. {
  514. struct tsi108_prv_data *data = netdev_priv(dev);
  515. int frags = skb_shinfo(skb)->nr_frags + 1;
  516. int i;
  517. if (!data->phy_ok && net_ratelimit())
  518. printk(KERN_ERR "%s: Transmit while PHY is down!\n", dev->name);
  519. if (!data->link_up) {
  520. printk(KERN_ERR "%s: Transmit while link is down!\n",
  521. dev->name);
  522. netif_stop_queue(dev);
  523. return NETDEV_TX_BUSY;
  524. }
  525. if (data->txfree < MAX_SKB_FRAGS + 1) {
  526. netif_stop_queue(dev);
  527. if (net_ratelimit())
  528. printk(KERN_ERR "%s: Transmit with full tx ring!\n",
  529. dev->name);
  530. return NETDEV_TX_BUSY;
  531. }
  532. if (data->txfree - frags < MAX_SKB_FRAGS + 1) {
  533. netif_stop_queue(dev);
  534. }
  535. spin_lock_irq(&data->txlock);
  536. for (i = 0; i < frags; i++) {
  537. int misc = 0;
  538. int tx = data->txhead;
  539. /* This is done to mark every TSI108_TX_INT_FREQ tx buffers with
  540. * the interrupt bit. TX descriptor-complete interrupts are
  541. * enabled when the queue fills up, and masked when there is
  542. * still free space. This way, when saturating the outbound
  543. * link, the tx interrupts are kept to a reasonable level.
  544. * When the queue is not full, reclamation of skbs still occurs
  545. * as new packets are transmitted, or on a queue-empty
  546. * interrupt.
  547. */
  548. if ((tx % TSI108_TX_INT_FREQ == 0) &&
  549. ((TSI108_TXRING_LEN - data->txfree) >= TSI108_TX_INT_FREQ))
  550. misc = TSI108_TX_INT;
  551. data->txskbs[tx] = skb;
  552. if (i == 0) {
  553. data->txring[tx].buf0 = dma_map_single(NULL, skb->data,
  554. skb_headlen(skb), DMA_TO_DEVICE);
  555. data->txring[tx].len = skb_headlen(skb);
  556. misc |= TSI108_TX_SOF;
  557. } else {
  558. const skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1];
  559. data->txring[tx].buf0 = skb_frag_dma_map(NULL, frag,
  560. 0,
  561. skb_frag_size(frag),
  562. DMA_TO_DEVICE);
  563. data->txring[tx].len = skb_frag_size(frag);
  564. }
  565. if (i == frags - 1)
  566. misc |= TSI108_TX_EOF;
  567. if (netif_msg_pktdata(data)) {
  568. int i;
  569. printk("%s: Tx Frame contents (%d)\n", dev->name,
  570. skb->len);
  571. for (i = 0; i < skb->len; i++)
  572. printk(" %2.2x", skb->data[i]);
  573. printk(".\n");
  574. }
  575. data->txring[tx].misc = misc | TSI108_TX_OWN;
  576. data->txhead = (data->txhead + 1) % TSI108_TXRING_LEN;
  577. data->txfree--;
  578. }
  579. tsi108_complete_tx(dev);
  580. /* This must be done after the check for completed tx descriptors,
  581. * so that the tail pointer is correct.
  582. */
  583. if (!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_QUEUE0))
  584. tsi108_restart_tx(data);
  585. spin_unlock_irq(&data->txlock);
  586. return NETDEV_TX_OK;
  587. }
  588. static int tsi108_complete_rx(struct net_device *dev, int budget)
  589. {
  590. struct tsi108_prv_data *data = netdev_priv(dev);
  591. int done = 0;
  592. while (data->rxfree && done != budget) {
  593. int rx = data->rxtail;
  594. struct sk_buff *skb;
  595. if (data->rxring[rx].misc & TSI108_RX_OWN)
  596. break;
  597. skb = data->rxskbs[rx];
  598. data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
  599. data->rxfree--;
  600. done++;
  601. if (data->rxring[rx].misc & TSI108_RX_BAD) {
  602. spin_lock_irq(&data->misclock);
  603. if (data->rxring[rx].misc & TSI108_RX_CRC)
  604. data->stats.rx_crc_errors++;
  605. if (data->rxring[rx].misc & TSI108_RX_OVER)
  606. data->stats.rx_fifo_errors++;
  607. spin_unlock_irq(&data->misclock);
  608. dev_kfree_skb_any(skb);
  609. continue;
  610. }
  611. if (netif_msg_pktdata(data)) {
  612. int i;
  613. printk("%s: Rx Frame contents (%d)\n",
  614. dev->name, data->rxring[rx].len);
  615. for (i = 0; i < data->rxring[rx].len; i++)
  616. printk(" %2.2x", skb->data[i]);
  617. printk(".\n");
  618. }
  619. skb_put(skb, data->rxring[rx].len);
  620. skb->protocol = eth_type_trans(skb, dev);
  621. netif_receive_skb(skb);
  622. }
  623. return done;
  624. }
  625. static int tsi108_refill_rx(struct net_device *dev, int budget)
  626. {
  627. struct tsi108_prv_data *data = netdev_priv(dev);
  628. int done = 0;
  629. while (data->rxfree != TSI108_RXRING_LEN && done != budget) {
  630. int rx = data->rxhead;
  631. struct sk_buff *skb;
  632. skb = netdev_alloc_skb_ip_align(dev, TSI108_RXBUF_SIZE);
  633. data->rxskbs[rx] = skb;
  634. if (!skb)
  635. break;
  636. data->rxring[rx].buf0 = dma_map_single(NULL, skb->data,
  637. TSI108_RX_SKB_SIZE,
  638. DMA_FROM_DEVICE);
  639. /* Sometimes the hardware sets blen to zero after packet
  640. * reception, even though the manual says that it's only ever
  641. * modified by the driver.
  642. */
  643. data->rxring[rx].blen = TSI108_RX_SKB_SIZE;
  644. data->rxring[rx].misc = TSI108_RX_OWN | TSI108_RX_INT;
  645. data->rxhead = (data->rxhead + 1) % TSI108_RXRING_LEN;
  646. data->rxfree++;
  647. done++;
  648. }
  649. if (done != 0 && !(TSI_READ(TSI108_EC_RXSTAT) &
  650. TSI108_EC_RXSTAT_QUEUE0))
  651. tsi108_restart_rx(data, dev);
  652. return done;
  653. }
  654. static int tsi108_poll(struct napi_struct *napi, int budget)
  655. {
  656. struct tsi108_prv_data *data = container_of(napi, struct tsi108_prv_data, napi);
  657. struct net_device *dev = data->dev;
  658. u32 estat = TSI_READ(TSI108_EC_RXESTAT);
  659. u32 intstat = TSI_READ(TSI108_EC_INTSTAT);
  660. int num_received = 0, num_filled = 0;
  661. intstat &= TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
  662. TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | TSI108_INT_RXWAIT;
  663. TSI_WRITE(TSI108_EC_RXESTAT, estat);
  664. TSI_WRITE(TSI108_EC_INTSTAT, intstat);
  665. if (data->rxpending || (estat & TSI108_EC_RXESTAT_Q0_DESCINT))
  666. num_received = tsi108_complete_rx(dev, budget);
  667. /* This should normally fill no more slots than the number of
  668. * packets received in tsi108_complete_rx(). The exception
  669. * is when we previously ran out of memory for RX SKBs. In that
  670. * case, it's helpful to obey the budget, not only so that the
  671. * CPU isn't hogged, but so that memory (which may still be low)
  672. * is not hogged by one device.
  673. *
  674. * A work unit is considered to be two SKBs to allow us to catch
  675. * up when the ring has shrunk due to out-of-memory but we're
  676. * still removing the full budget's worth of packets each time.
  677. */
  678. if (data->rxfree < TSI108_RXRING_LEN)
  679. num_filled = tsi108_refill_rx(dev, budget * 2);
  680. if (intstat & TSI108_INT_RXERROR) {
  681. u32 err = TSI_READ(TSI108_EC_RXERR);
  682. TSI_WRITE(TSI108_EC_RXERR, err);
  683. if (err) {
  684. if (net_ratelimit())
  685. printk(KERN_DEBUG "%s: RX error %x\n",
  686. dev->name, err);
  687. if (!(TSI_READ(TSI108_EC_RXSTAT) &
  688. TSI108_EC_RXSTAT_QUEUE0))
  689. tsi108_restart_rx(data, dev);
  690. }
  691. }
  692. if (intstat & TSI108_INT_RXOVERRUN) {
  693. spin_lock_irq(&data->misclock);
  694. data->stats.rx_fifo_errors++;
  695. spin_unlock_irq(&data->misclock);
  696. }
  697. if (num_received < budget) {
  698. data->rxpending = 0;
  699. napi_complete(napi);
  700. TSI_WRITE(TSI108_EC_INTMASK,
  701. TSI_READ(TSI108_EC_INTMASK)
  702. & ~(TSI108_INT_RXQUEUE0
  703. | TSI108_INT_RXTHRESH |
  704. TSI108_INT_RXOVERRUN |
  705. TSI108_INT_RXERROR |
  706. TSI108_INT_RXWAIT));
  707. } else {
  708. data->rxpending = 1;
  709. }
  710. return num_received;
  711. }
  712. static void tsi108_rx_int(struct net_device *dev)
  713. {
  714. struct tsi108_prv_data *data = netdev_priv(dev);
  715. /* A race could cause dev to already be scheduled, so it's not an
  716. * error if that happens (and interrupts shouldn't be re-masked,
  717. * because that can cause harmful races, if poll has already
  718. * unmasked them but not cleared LINK_STATE_SCHED).
  719. *
  720. * This can happen if this code races with tsi108_poll(), which masks
  721. * the interrupts after tsi108_irq_one() read the mask, but before
  722. * napi_schedule is called. It could also happen due to calls
  723. * from tsi108_check_rxring().
  724. */
  725. if (napi_schedule_prep(&data->napi)) {
  726. /* Mask, rather than ack, the receive interrupts. The ack
  727. * will happen in tsi108_poll().
  728. */
  729. TSI_WRITE(TSI108_EC_INTMASK,
  730. TSI_READ(TSI108_EC_INTMASK) |
  731. TSI108_INT_RXQUEUE0
  732. | TSI108_INT_RXTHRESH |
  733. TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR |
  734. TSI108_INT_RXWAIT);
  735. __napi_schedule(&data->napi);
  736. } else {
  737. if (!netif_running(dev)) {
  738. /* This can happen if an interrupt occurs while the
  739. * interface is being brought down, as the START
  740. * bit is cleared before the stop function is called.
  741. *
  742. * In this case, the interrupts must be masked, or
  743. * they will continue indefinitely.
  744. *
  745. * There's a race here if the interface is brought down
  746. * and then up in rapid succession, as the device could
  747. * be made running after the above check and before
  748. * the masking below. This will only happen if the IRQ
  749. * thread has a lower priority than the task brining
  750. * up the interface. Fixing this race would likely
  751. * require changes in generic code.
  752. */
  753. TSI_WRITE(TSI108_EC_INTMASK,
  754. TSI_READ
  755. (TSI108_EC_INTMASK) |
  756. TSI108_INT_RXQUEUE0 |
  757. TSI108_INT_RXTHRESH |
  758. TSI108_INT_RXOVERRUN |
  759. TSI108_INT_RXERROR |
  760. TSI108_INT_RXWAIT);
  761. }
  762. }
  763. }
  764. /* If the RX ring has run out of memory, try periodically
  765. * to allocate some more, as otherwise poll would never
  766. * get called (apart from the initial end-of-queue condition).
  767. *
  768. * This is called once per second (by default) from the thread.
  769. */
  770. static void tsi108_check_rxring(struct net_device *dev)
  771. {
  772. struct tsi108_prv_data *data = netdev_priv(dev);
  773. /* A poll is scheduled, as opposed to caling tsi108_refill_rx
  774. * directly, so as to keep the receive path single-threaded
  775. * (and thus not needing a lock).
  776. */
  777. if (netif_running(dev) && data->rxfree < TSI108_RXRING_LEN / 4)
  778. tsi108_rx_int(dev);
  779. }
  780. static void tsi108_tx_int(struct net_device *dev)
  781. {
  782. struct tsi108_prv_data *data = netdev_priv(dev);
  783. u32 estat = TSI_READ(TSI108_EC_TXESTAT);
  784. TSI_WRITE(TSI108_EC_TXESTAT, estat);
  785. TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_TXQUEUE0 |
  786. TSI108_INT_TXIDLE | TSI108_INT_TXERROR);
  787. if (estat & TSI108_EC_TXESTAT_Q0_ERR) {
  788. u32 err = TSI_READ(TSI108_EC_TXERR);
  789. TSI_WRITE(TSI108_EC_TXERR, err);
  790. if (err && net_ratelimit())
  791. printk(KERN_ERR "%s: TX error %x\n", dev->name, err);
  792. }
  793. if (estat & (TSI108_EC_TXESTAT_Q0_DESCINT | TSI108_EC_TXESTAT_Q0_EOQ)) {
  794. spin_lock(&data->txlock);
  795. tsi108_complete_tx(dev);
  796. spin_unlock(&data->txlock);
  797. }
  798. }
  799. static irqreturn_t tsi108_irq(int irq, void *dev_id)
  800. {
  801. struct net_device *dev = dev_id;
  802. struct tsi108_prv_data *data = netdev_priv(dev);
  803. u32 stat = TSI_READ(TSI108_EC_INTSTAT);
  804. if (!(stat & TSI108_INT_ANY))
  805. return IRQ_NONE; /* Not our interrupt */
  806. stat &= ~TSI_READ(TSI108_EC_INTMASK);
  807. if (stat & (TSI108_INT_TXQUEUE0 | TSI108_INT_TXIDLE |
  808. TSI108_INT_TXERROR))
  809. tsi108_tx_int(dev);
  810. if (stat & (TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
  811. TSI108_INT_RXWAIT | TSI108_INT_RXOVERRUN |
  812. TSI108_INT_RXERROR))
  813. tsi108_rx_int(dev);
  814. if (stat & TSI108_INT_SFN) {
  815. if (net_ratelimit())
  816. printk(KERN_DEBUG "%s: SFN error\n", dev->name);
  817. TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_SFN);
  818. }
  819. if (stat & TSI108_INT_STATCARRY) {
  820. tsi108_stat_carry(dev);
  821. TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_STATCARRY);
  822. }
  823. return IRQ_HANDLED;
  824. }
  825. static void tsi108_stop_ethernet(struct net_device *dev)
  826. {
  827. struct tsi108_prv_data *data = netdev_priv(dev);
  828. int i = 1000;
  829. /* Disable all TX and RX queues ... */
  830. TSI_WRITE(TSI108_EC_TXCTRL, 0);
  831. TSI_WRITE(TSI108_EC_RXCTRL, 0);
  832. /* ...and wait for them to become idle */
  833. while(i--) {
  834. if(!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_ACTIVE))
  835. break;
  836. udelay(10);
  837. }
  838. i = 1000;
  839. while(i--){
  840. if(!(TSI_READ(TSI108_EC_RXSTAT) & TSI108_EC_RXSTAT_ACTIVE))
  841. return;
  842. udelay(10);
  843. }
  844. printk(KERN_ERR "%s function time out\n", __func__);
  845. }
  846. static void tsi108_reset_ether(struct tsi108_prv_data * data)
  847. {
  848. TSI_WRITE(TSI108_MAC_CFG1, TSI108_MAC_CFG1_SOFTRST);
  849. udelay(100);
  850. TSI_WRITE(TSI108_MAC_CFG1, 0);
  851. TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATRST);
  852. udelay(100);
  853. TSI_WRITE(TSI108_EC_PORTCTRL,
  854. TSI_READ(TSI108_EC_PORTCTRL) &
  855. ~TSI108_EC_PORTCTRL_STATRST);
  856. TSI_WRITE(TSI108_EC_TXCFG, TSI108_EC_TXCFG_RST);
  857. udelay(100);
  858. TSI_WRITE(TSI108_EC_TXCFG,
  859. TSI_READ(TSI108_EC_TXCFG) &
  860. ~TSI108_EC_TXCFG_RST);
  861. TSI_WRITE(TSI108_EC_RXCFG, TSI108_EC_RXCFG_RST);
  862. udelay(100);
  863. TSI_WRITE(TSI108_EC_RXCFG,
  864. TSI_READ(TSI108_EC_RXCFG) &
  865. ~TSI108_EC_RXCFG_RST);
  866. TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
  867. TSI_READ(TSI108_MAC_MII_MGMT_CFG) |
  868. TSI108_MAC_MII_MGMT_RST);
  869. udelay(100);
  870. TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
  871. (TSI_READ(TSI108_MAC_MII_MGMT_CFG) &
  872. ~(TSI108_MAC_MII_MGMT_RST |
  873. TSI108_MAC_MII_MGMT_CLK)) | 0x07);
  874. }
  875. static int tsi108_get_mac(struct net_device *dev)
  876. {
  877. struct tsi108_prv_data *data = netdev_priv(dev);
  878. u32 word1 = TSI_READ(TSI108_MAC_ADDR1);
  879. u32 word2 = TSI_READ(TSI108_MAC_ADDR2);
  880. /* Note that the octets are reversed from what the manual says,
  881. * producing an even weirder ordering...
  882. */
  883. if (word2 == 0 && word1 == 0) {
  884. dev->dev_addr[0] = 0x00;
  885. dev->dev_addr[1] = 0x06;
  886. dev->dev_addr[2] = 0xd2;
  887. dev->dev_addr[3] = 0x00;
  888. dev->dev_addr[4] = 0x00;
  889. if (0x8 == data->phy)
  890. dev->dev_addr[5] = 0x01;
  891. else
  892. dev->dev_addr[5] = 0x02;
  893. word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
  894. word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
  895. (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
  896. TSI_WRITE(TSI108_MAC_ADDR1, word1);
  897. TSI_WRITE(TSI108_MAC_ADDR2, word2);
  898. } else {
  899. dev->dev_addr[0] = (word2 >> 16) & 0xff;
  900. dev->dev_addr[1] = (word2 >> 24) & 0xff;
  901. dev->dev_addr[2] = (word1 >> 0) & 0xff;
  902. dev->dev_addr[3] = (word1 >> 8) & 0xff;
  903. dev->dev_addr[4] = (word1 >> 16) & 0xff;
  904. dev->dev_addr[5] = (word1 >> 24) & 0xff;
  905. }
  906. if (!is_valid_ether_addr(dev->dev_addr)) {
  907. printk(KERN_ERR
  908. "%s: Invalid MAC address. word1: %08x, word2: %08x\n",
  909. dev->name, word1, word2);
  910. return -EINVAL;
  911. }
  912. return 0;
  913. }
  914. static int tsi108_set_mac(struct net_device *dev, void *addr)
  915. {
  916. struct tsi108_prv_data *data = netdev_priv(dev);
  917. u32 word1, word2;
  918. int i;
  919. if (!is_valid_ether_addr(addr))
  920. return -EINVAL;
  921. for (i = 0; i < 6; i++)
  922. /* +2 is for the offset of the HW addr type */
  923. dev->dev_addr[i] = ((unsigned char *)addr)[i + 2];
  924. word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
  925. word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
  926. (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
  927. spin_lock_irq(&data->misclock);
  928. TSI_WRITE(TSI108_MAC_ADDR1, word1);
  929. TSI_WRITE(TSI108_MAC_ADDR2, word2);
  930. spin_lock(&data->txlock);
  931. if (data->txfree && data->link_up)
  932. netif_wake_queue(dev);
  933. spin_unlock(&data->txlock);
  934. spin_unlock_irq(&data->misclock);
  935. return 0;
  936. }
  937. /* Protected by dev->xmit_lock. */
  938. static void tsi108_set_rx_mode(struct net_device *dev)
  939. {
  940. struct tsi108_prv_data *data = netdev_priv(dev);
  941. u32 rxcfg = TSI_READ(TSI108_EC_RXCFG);
  942. if (dev->flags & IFF_PROMISC) {
  943. rxcfg &= ~(TSI108_EC_RXCFG_UC_HASH | TSI108_EC_RXCFG_MC_HASH);
  944. rxcfg |= TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE;
  945. goto out;
  946. }
  947. rxcfg &= ~(TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE);
  948. if (dev->flags & IFF_ALLMULTI || !netdev_mc_empty(dev)) {
  949. int i;
  950. struct netdev_hw_addr *ha;
  951. rxcfg |= TSI108_EC_RXCFG_MFE | TSI108_EC_RXCFG_MC_HASH;
  952. memset(data->mc_hash, 0, sizeof(data->mc_hash));
  953. netdev_for_each_mc_addr(ha, dev) {
  954. u32 hash, crc;
  955. crc = ether_crc(6, ha->addr);
  956. hash = crc >> 23;
  957. __set_bit(hash, &data->mc_hash[0]);
  958. }
  959. TSI_WRITE(TSI108_EC_HASHADDR,
  960. TSI108_EC_HASHADDR_AUTOINC |
  961. TSI108_EC_HASHADDR_MCAST);
  962. for (i = 0; i < 16; i++) {
  963. /* The manual says that the hardware may drop
  964. * back-to-back writes to the data register.
  965. */
  966. udelay(1);
  967. TSI_WRITE(TSI108_EC_HASHDATA,
  968. data->mc_hash[i]);
  969. }
  970. }
  971. out:
  972. TSI_WRITE(TSI108_EC_RXCFG, rxcfg);
  973. }
  974. static void tsi108_init_phy(struct net_device *dev)
  975. {
  976. struct tsi108_prv_data *data = netdev_priv(dev);
  977. u32 i = 0;
  978. u16 phyval = 0;
  979. unsigned long flags;
  980. spin_lock_irqsave(&phy_lock, flags);
  981. tsi108_write_mii(data, MII_BMCR, BMCR_RESET);
  982. while (--i) {
  983. if(!(tsi108_read_mii(data, MII_BMCR) & BMCR_RESET))
  984. break;
  985. udelay(10);
  986. }
  987. if (i == 0)
  988. printk(KERN_ERR "%s function time out\n", __func__);
  989. if (data->phy_type == TSI108_PHY_BCM54XX) {
  990. tsi108_write_mii(data, 0x09, 0x0300);
  991. tsi108_write_mii(data, 0x10, 0x1020);
  992. tsi108_write_mii(data, 0x1c, 0x8c00);
  993. }
  994. tsi108_write_mii(data,
  995. MII_BMCR,
  996. BMCR_ANENABLE | BMCR_ANRESTART);
  997. while (tsi108_read_mii(data, MII_BMCR) & BMCR_ANRESTART)
  998. cpu_relax();
  999. /* Set G/MII mode and receive clock select in TBI control #2. The
  1000. * second port won't work if this isn't done, even though we don't
  1001. * use TBI mode.
  1002. */
  1003. tsi108_write_tbi(data, 0x11, 0x30);
  1004. /* FIXME: It seems to take more than 2 back-to-back reads to the
  1005. * PHY_STAT register before the link up status bit is set.
  1006. */
  1007. data->link_up = 0;
  1008. while (!((phyval = tsi108_read_mii(data, MII_BMSR)) &
  1009. BMSR_LSTATUS)) {
  1010. if (i++ > (MII_READ_DELAY / 10)) {
  1011. break;
  1012. }
  1013. spin_unlock_irqrestore(&phy_lock, flags);
  1014. msleep(10);
  1015. spin_lock_irqsave(&phy_lock, flags);
  1016. }
  1017. data->mii_if.supports_gmii = mii_check_gmii_support(&data->mii_if);
  1018. printk(KERN_DEBUG "PHY_STAT reg contains %08x\n", phyval);
  1019. data->phy_ok = 1;
  1020. data->init_media = 1;
  1021. spin_unlock_irqrestore(&phy_lock, flags);
  1022. }
  1023. static void tsi108_kill_phy(struct net_device *dev)
  1024. {
  1025. struct tsi108_prv_data *data = netdev_priv(dev);
  1026. unsigned long flags;
  1027. spin_lock_irqsave(&phy_lock, flags);
  1028. tsi108_write_mii(data, MII_BMCR, BMCR_PDOWN);
  1029. data->phy_ok = 0;
  1030. spin_unlock_irqrestore(&phy_lock, flags);
  1031. }
  1032. static int tsi108_open(struct net_device *dev)
  1033. {
  1034. int i;
  1035. struct tsi108_prv_data *data = netdev_priv(dev);
  1036. unsigned int rxring_size = TSI108_RXRING_LEN * sizeof(rx_desc);
  1037. unsigned int txring_size = TSI108_TXRING_LEN * sizeof(tx_desc);
  1038. i = request_irq(data->irq_num, tsi108_irq, 0, dev->name, dev);
  1039. if (i != 0) {
  1040. printk(KERN_ERR "tsi108_eth%d: Could not allocate IRQ%d.\n",
  1041. data->id, data->irq_num);
  1042. return i;
  1043. } else {
  1044. dev->irq = data->irq_num;
  1045. printk(KERN_NOTICE
  1046. "tsi108_open : Port %d Assigned IRQ %d to %s\n",
  1047. data->id, dev->irq, dev->name);
  1048. }
  1049. data->rxring = dma_alloc_coherent(NULL, rxring_size,
  1050. &data->rxdma, GFP_KERNEL);
  1051. if (!data->rxring) {
  1052. printk(KERN_DEBUG
  1053. "TSI108_ETH: failed to allocate memory for rxring!\n");
  1054. return -ENOMEM;
  1055. } else {
  1056. memset(data->rxring, 0, rxring_size);
  1057. }
  1058. data->txring = dma_alloc_coherent(NULL, txring_size,
  1059. &data->txdma, GFP_KERNEL);
  1060. if (!data->txring) {
  1061. printk(KERN_DEBUG
  1062. "TSI108_ETH: failed to allocate memory for txring!\n");
  1063. pci_free_consistent(0, rxring_size, data->rxring, data->rxdma);
  1064. return -ENOMEM;
  1065. } else {
  1066. memset(data->txring, 0, txring_size);
  1067. }
  1068. for (i = 0; i < TSI108_RXRING_LEN; i++) {
  1069. data->rxring[i].next0 = data->rxdma + (i + 1) * sizeof(rx_desc);
  1070. data->rxring[i].blen = TSI108_RXBUF_SIZE;
  1071. data->rxring[i].vlan = 0;
  1072. }
  1073. data->rxring[TSI108_RXRING_LEN - 1].next0 = data->rxdma;
  1074. data->rxtail = 0;
  1075. data->rxhead = 0;
  1076. for (i = 0; i < TSI108_RXRING_LEN; i++) {
  1077. struct sk_buff *skb;
  1078. skb = netdev_alloc_skb_ip_align(dev, TSI108_RXBUF_SIZE);
  1079. if (!skb) {
  1080. /* Bah. No memory for now, but maybe we'll get
  1081. * some more later.
  1082. * For now, we'll live with the smaller ring.
  1083. */
  1084. printk(KERN_WARNING
  1085. "%s: Could only allocate %d receive skb(s).\n",
  1086. dev->name, i);
  1087. data->rxhead = i;
  1088. break;
  1089. }
  1090. data->rxskbs[i] = skb;
  1091. data->rxskbs[i] = skb;
  1092. data->rxring[i].buf0 = virt_to_phys(data->rxskbs[i]->data);
  1093. data->rxring[i].misc = TSI108_RX_OWN | TSI108_RX_INT;
  1094. }
  1095. data->rxfree = i;
  1096. TSI_WRITE(TSI108_EC_RXQ_PTRLOW, data->rxdma);
  1097. for (i = 0; i < TSI108_TXRING_LEN; i++) {
  1098. data->txring[i].next0 = data->txdma + (i + 1) * sizeof(tx_desc);
  1099. data->txring[i].misc = 0;
  1100. }
  1101. data->txring[TSI108_TXRING_LEN - 1].next0 = data->txdma;
  1102. data->txtail = 0;
  1103. data->txhead = 0;
  1104. data->txfree = TSI108_TXRING_LEN;
  1105. TSI_WRITE(TSI108_EC_TXQ_PTRLOW, data->txdma);
  1106. tsi108_init_phy(dev);
  1107. napi_enable(&data->napi);
  1108. setup_timer(&data->timer, tsi108_timed_checker, (unsigned long)dev);
  1109. mod_timer(&data->timer, jiffies + 1);
  1110. tsi108_restart_rx(data, dev);
  1111. TSI_WRITE(TSI108_EC_INTSTAT, ~0);
  1112. TSI_WRITE(TSI108_EC_INTMASK,
  1113. ~(TSI108_INT_TXQUEUE0 | TSI108_INT_RXERROR |
  1114. TSI108_INT_RXTHRESH | TSI108_INT_RXQUEUE0 |
  1115. TSI108_INT_RXOVERRUN | TSI108_INT_RXWAIT |
  1116. TSI108_INT_SFN | TSI108_INT_STATCARRY));
  1117. TSI_WRITE(TSI108_MAC_CFG1,
  1118. TSI108_MAC_CFG1_RXEN | TSI108_MAC_CFG1_TXEN);
  1119. netif_start_queue(dev);
  1120. return 0;
  1121. }
  1122. static int tsi108_close(struct net_device *dev)
  1123. {
  1124. struct tsi108_prv_data *data = netdev_priv(dev);
  1125. netif_stop_queue(dev);
  1126. napi_disable(&data->napi);
  1127. del_timer_sync(&data->timer);
  1128. tsi108_stop_ethernet(dev);
  1129. tsi108_kill_phy(dev);
  1130. TSI_WRITE(TSI108_EC_INTMASK, ~0);
  1131. TSI_WRITE(TSI108_MAC_CFG1, 0);
  1132. /* Check for any pending TX packets, and drop them. */
  1133. while (!data->txfree || data->txhead != data->txtail) {
  1134. int tx = data->txtail;
  1135. struct sk_buff *skb;
  1136. skb = data->txskbs[tx];
  1137. data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
  1138. data->txfree++;
  1139. dev_kfree_skb(skb);
  1140. }
  1141. free_irq(data->irq_num, dev);
  1142. /* Discard the RX ring. */
  1143. while (data->rxfree) {
  1144. int rx = data->rxtail;
  1145. struct sk_buff *skb;
  1146. skb = data->rxskbs[rx];
  1147. data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
  1148. data->rxfree--;
  1149. dev_kfree_skb(skb);
  1150. }
  1151. dma_free_coherent(0,
  1152. TSI108_RXRING_LEN * sizeof(rx_desc),
  1153. data->rxring, data->rxdma);
  1154. dma_free_coherent(0,
  1155. TSI108_TXRING_LEN * sizeof(tx_desc),
  1156. data->txring, data->txdma);
  1157. return 0;
  1158. }
  1159. static void tsi108_init_mac(struct net_device *dev)
  1160. {
  1161. struct tsi108_prv_data *data = netdev_priv(dev);
  1162. TSI_WRITE(TSI108_MAC_CFG2, TSI108_MAC_CFG2_DFLT_PREAMBLE |
  1163. TSI108_MAC_CFG2_PADCRC);
  1164. TSI_WRITE(TSI108_EC_TXTHRESH,
  1165. (192 << TSI108_EC_TXTHRESH_STARTFILL) |
  1166. (192 << TSI108_EC_TXTHRESH_STOPFILL));
  1167. TSI_WRITE(TSI108_STAT_CARRYMASK1,
  1168. ~(TSI108_STAT_CARRY1_RXBYTES |
  1169. TSI108_STAT_CARRY1_RXPKTS |
  1170. TSI108_STAT_CARRY1_RXFCS |
  1171. TSI108_STAT_CARRY1_RXMCAST |
  1172. TSI108_STAT_CARRY1_RXALIGN |
  1173. TSI108_STAT_CARRY1_RXLENGTH |
  1174. TSI108_STAT_CARRY1_RXRUNT |
  1175. TSI108_STAT_CARRY1_RXJUMBO |
  1176. TSI108_STAT_CARRY1_RXFRAG |
  1177. TSI108_STAT_CARRY1_RXJABBER |
  1178. TSI108_STAT_CARRY1_RXDROP));
  1179. TSI_WRITE(TSI108_STAT_CARRYMASK2,
  1180. ~(TSI108_STAT_CARRY2_TXBYTES |
  1181. TSI108_STAT_CARRY2_TXPKTS |
  1182. TSI108_STAT_CARRY2_TXEXDEF |
  1183. TSI108_STAT_CARRY2_TXEXCOL |
  1184. TSI108_STAT_CARRY2_TXTCOL |
  1185. TSI108_STAT_CARRY2_TXPAUSE));
  1186. TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATEN);
  1187. TSI_WRITE(TSI108_MAC_CFG1, 0);
  1188. TSI_WRITE(TSI108_EC_RXCFG,
  1189. TSI108_EC_RXCFG_SE | TSI108_EC_RXCFG_BFE);
  1190. TSI_WRITE(TSI108_EC_TXQ_CFG, TSI108_EC_TXQ_CFG_DESC_INT |
  1191. TSI108_EC_TXQ_CFG_EOQ_OWN_INT |
  1192. TSI108_EC_TXQ_CFG_WSWP | (TSI108_PBM_PORT <<
  1193. TSI108_EC_TXQ_CFG_SFNPORT));
  1194. TSI_WRITE(TSI108_EC_RXQ_CFG, TSI108_EC_RXQ_CFG_DESC_INT |
  1195. TSI108_EC_RXQ_CFG_EOQ_OWN_INT |
  1196. TSI108_EC_RXQ_CFG_WSWP | (TSI108_PBM_PORT <<
  1197. TSI108_EC_RXQ_CFG_SFNPORT));
  1198. TSI_WRITE(TSI108_EC_TXQ_BUFCFG,
  1199. TSI108_EC_TXQ_BUFCFG_BURST256 |
  1200. TSI108_EC_TXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
  1201. TSI108_EC_TXQ_BUFCFG_SFNPORT));
  1202. TSI_WRITE(TSI108_EC_RXQ_BUFCFG,
  1203. TSI108_EC_RXQ_BUFCFG_BURST256 |
  1204. TSI108_EC_RXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
  1205. TSI108_EC_RXQ_BUFCFG_SFNPORT));
  1206. TSI_WRITE(TSI108_EC_INTMASK, ~0);
  1207. }
  1208. static int tsi108_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  1209. {
  1210. struct tsi108_prv_data *data = netdev_priv(dev);
  1211. unsigned long flags;
  1212. int rc;
  1213. spin_lock_irqsave(&data->txlock, flags);
  1214. rc = mii_ethtool_gset(&data->mii_if, cmd);
  1215. spin_unlock_irqrestore(&data->txlock, flags);
  1216. return rc;
  1217. }
  1218. static int tsi108_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  1219. {
  1220. struct tsi108_prv_data *data = netdev_priv(dev);
  1221. unsigned long flags;
  1222. int rc;
  1223. spin_lock_irqsave(&data->txlock, flags);
  1224. rc = mii_ethtool_sset(&data->mii_if, cmd);
  1225. spin_unlock_irqrestore(&data->txlock, flags);
  1226. return rc;
  1227. }
  1228. static int tsi108_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  1229. {
  1230. struct tsi108_prv_data *data = netdev_priv(dev);
  1231. if (!netif_running(dev))
  1232. return -EINVAL;
  1233. return generic_mii_ioctl(&data->mii_if, if_mii(rq), cmd, NULL);
  1234. }
  1235. static const struct ethtool_ops tsi108_ethtool_ops = {
  1236. .get_link = ethtool_op_get_link,
  1237. .get_settings = tsi108_get_settings,
  1238. .set_settings = tsi108_set_settings,
  1239. };
  1240. static const struct net_device_ops tsi108_netdev_ops = {
  1241. .ndo_open = tsi108_open,
  1242. .ndo_stop = tsi108_close,
  1243. .ndo_start_xmit = tsi108_send_packet,
  1244. .ndo_set_rx_mode = tsi108_set_rx_mode,
  1245. .ndo_get_stats = tsi108_get_stats,
  1246. .ndo_do_ioctl = tsi108_do_ioctl,
  1247. .ndo_set_mac_address = tsi108_set_mac,
  1248. .ndo_validate_addr = eth_validate_addr,
  1249. .ndo_change_mtu = eth_change_mtu,
  1250. };
  1251. static int
  1252. tsi108_init_one(struct platform_device *pdev)
  1253. {
  1254. struct net_device *dev = NULL;
  1255. struct tsi108_prv_data *data = NULL;
  1256. hw_info *einfo;
  1257. int err = 0;
  1258. einfo = pdev->dev.platform_data;
  1259. if (NULL == einfo) {
  1260. printk(KERN_ERR "tsi-eth %d: Missing additional data!\n",
  1261. pdev->id);
  1262. return -ENODEV;
  1263. }
  1264. /* Create an ethernet device instance */
  1265. dev = alloc_etherdev(sizeof(struct tsi108_prv_data));
  1266. if (!dev) {
  1267. printk("tsi108_eth: Could not allocate a device structure\n");
  1268. return -ENOMEM;
  1269. }
  1270. printk("tsi108_eth%d: probe...\n", pdev->id);
  1271. data = netdev_priv(dev);
  1272. data->dev = dev;
  1273. pr_debug("tsi108_eth%d:regs:phyresgs:phy:irq_num=0x%x:0x%x:0x%x:0x%x\n",
  1274. pdev->id, einfo->regs, einfo->phyregs,
  1275. einfo->phy, einfo->irq_num);
  1276. data->regs = ioremap(einfo->regs, 0x400);
  1277. if (NULL == data->regs) {
  1278. err = -ENOMEM;
  1279. goto regs_fail;
  1280. }
  1281. data->phyregs = ioremap(einfo->phyregs, 0x400);
  1282. if (NULL == data->phyregs) {
  1283. err = -ENOMEM;
  1284. goto regs_fail;
  1285. }
  1286. /* MII setup */
  1287. data->mii_if.dev = dev;
  1288. data->mii_if.mdio_read = tsi108_mdio_read;
  1289. data->mii_if.mdio_write = tsi108_mdio_write;
  1290. data->mii_if.phy_id = einfo->phy;
  1291. data->mii_if.phy_id_mask = 0x1f;
  1292. data->mii_if.reg_num_mask = 0x1f;
  1293. data->phy = einfo->phy;
  1294. data->phy_type = einfo->phy_type;
  1295. data->irq_num = einfo->irq_num;
  1296. data->id = pdev->id;
  1297. netif_napi_add(dev, &data->napi, tsi108_poll, 64);
  1298. dev->netdev_ops = &tsi108_netdev_ops;
  1299. dev->ethtool_ops = &tsi108_ethtool_ops;
  1300. /* Apparently, the Linux networking code won't use scatter-gather
  1301. * if the hardware doesn't do checksums. However, it's faster
  1302. * to checksum in place and use SG, as (among other reasons)
  1303. * the cache won't be dirtied (which then has to be flushed
  1304. * before DMA). The checksumming is done by the driver (via
  1305. * a new function skb_csum_dev() in net/core/skbuff.c).
  1306. */
  1307. dev->features = NETIF_F_HIGHDMA;
  1308. spin_lock_init(&data->txlock);
  1309. spin_lock_init(&data->misclock);
  1310. tsi108_reset_ether(data);
  1311. tsi108_kill_phy(dev);
  1312. if ((err = tsi108_get_mac(dev)) != 0) {
  1313. printk(KERN_ERR "%s: Invalid MAC address. Please correct.\n",
  1314. dev->name);
  1315. goto register_fail;
  1316. }
  1317. tsi108_init_mac(dev);
  1318. err = register_netdev(dev);
  1319. if (err) {
  1320. printk(KERN_ERR "%s: Cannot register net device, aborting.\n",
  1321. dev->name);
  1322. goto register_fail;
  1323. }
  1324. platform_set_drvdata(pdev, dev);
  1325. printk(KERN_INFO "%s: Tsi108 Gigabit Ethernet, MAC: %pM\n",
  1326. dev->name, dev->dev_addr);
  1327. #ifdef DEBUG
  1328. data->msg_enable = DEBUG;
  1329. dump_eth_one(dev);
  1330. #endif
  1331. return 0;
  1332. register_fail:
  1333. iounmap(data->regs);
  1334. iounmap(data->phyregs);
  1335. regs_fail:
  1336. free_netdev(dev);
  1337. return err;
  1338. }
  1339. /* There's no way to either get interrupts from the PHY when
  1340. * something changes, or to have the Tsi108 automatically communicate
  1341. * with the PHY to reconfigure itself.
  1342. *
  1343. * Thus, we have to do it using a timer.
  1344. */
  1345. static void tsi108_timed_checker(unsigned long dev_ptr)
  1346. {
  1347. struct net_device *dev = (struct net_device *)dev_ptr;
  1348. struct tsi108_prv_data *data = netdev_priv(dev);
  1349. tsi108_check_phy(dev);
  1350. tsi108_check_rxring(dev);
  1351. mod_timer(&data->timer, jiffies + CHECK_PHY_INTERVAL);
  1352. }
  1353. static int tsi108_ether_init(void)
  1354. {
  1355. int ret;
  1356. ret = platform_driver_register (&tsi_eth_driver);
  1357. if (ret < 0){
  1358. printk("tsi108_ether_init: error initializing ethernet "
  1359. "device\n");
  1360. return ret;
  1361. }
  1362. return 0;
  1363. }
  1364. static int tsi108_ether_remove(struct platform_device *pdev)
  1365. {
  1366. struct net_device *dev = platform_get_drvdata(pdev);
  1367. struct tsi108_prv_data *priv = netdev_priv(dev);
  1368. unregister_netdev(dev);
  1369. tsi108_stop_ethernet(dev);
  1370. platform_set_drvdata(pdev, NULL);
  1371. iounmap(priv->regs);
  1372. iounmap(priv->phyregs);
  1373. free_netdev(dev);
  1374. return 0;
  1375. }
  1376. static void tsi108_ether_exit(void)
  1377. {
  1378. platform_driver_unregister(&tsi_eth_driver);
  1379. }
  1380. module_init(tsi108_ether_init);
  1381. module_exit(tsi108_ether_exit);
  1382. MODULE_AUTHOR("Tundra Semiconductor Corporation");
  1383. MODULE_DESCRIPTION("Tsi108 Gigabit Ethernet driver");
  1384. MODULE_LICENSE("GPL");
  1385. MODULE_ALIAS("platform:tsi-ethernet");