ks8851.c 44 KB

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  1. /* drivers/net/ks8851.c
  2. *
  3. * Copyright 2009 Simtec Electronics
  4. * http://www.simtec.co.uk/
  5. * Ben Dooks <ben@simtec.co.uk>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  12. #define DEBUG
  13. #include <linux/interrupt.h>
  14. #include <linux/module.h>
  15. #include <linux/kernel.h>
  16. #include <linux/netdevice.h>
  17. #include <linux/etherdevice.h>
  18. #include <linux/ethtool.h>
  19. #include <linux/cache.h>
  20. #include <linux/crc32.h>
  21. #include <linux/mii.h>
  22. #include <linux/spi/spi.h>
  23. #include "ks8851.h"
  24. /**
  25. * struct ks8851_rxctrl - KS8851 driver rx control
  26. * @mchash: Multicast hash-table data.
  27. * @rxcr1: KS_RXCR1 register setting
  28. * @rxcr2: KS_RXCR2 register setting
  29. *
  30. * Representation of the settings needs to control the receive filtering
  31. * such as the multicast hash-filter and the receive register settings. This
  32. * is used to make the job of working out if the receive settings change and
  33. * then issuing the new settings to the worker that will send the necessary
  34. * commands.
  35. */
  36. struct ks8851_rxctrl {
  37. u16 mchash[4];
  38. u16 rxcr1;
  39. u16 rxcr2;
  40. };
  41. /**
  42. * union ks8851_tx_hdr - tx header data
  43. * @txb: The header as bytes
  44. * @txw: The header as 16bit, little-endian words
  45. *
  46. * A dual representation of the tx header data to allow
  47. * access to individual bytes, and to allow 16bit accesses
  48. * with 16bit alignment.
  49. */
  50. union ks8851_tx_hdr {
  51. u8 txb[6];
  52. __le16 txw[3];
  53. };
  54. /**
  55. * struct ks8851_net - KS8851 driver private data
  56. * @netdev: The network device we're bound to
  57. * @spidev: The spi device we're bound to.
  58. * @lock: Lock to ensure that the device is not accessed when busy.
  59. * @statelock: Lock on this structure for tx list.
  60. * @mii: The MII state information for the mii calls.
  61. * @rxctrl: RX settings for @rxctrl_work.
  62. * @tx_work: Work queue for tx packets
  63. * @irq_work: Work queue for servicing interrupts
  64. * @rxctrl_work: Work queue for updating RX mode and multicast lists
  65. * @txq: Queue of packets for transmission.
  66. * @spi_msg1: pre-setup SPI transfer with one message, @spi_xfer1.
  67. * @spi_msg2: pre-setup SPI transfer with two messages, @spi_xfer2.
  68. * @txh: Space for generating packet TX header in DMA-able data
  69. * @rxd: Space for receiving SPI data, in DMA-able space.
  70. * @txd: Space for transmitting SPI data, in DMA-able space.
  71. * @msg_enable: The message flags controlling driver output (see ethtool).
  72. * @fid: Incrementing frame id tag.
  73. * @rc_ier: Cached copy of KS_IER.
  74. * @rc_ccr: Cached copy of KS_CCR.
  75. * @rc_rxqcr: Cached copy of KS_RXQCR.
  76. * @eeprom_size: Companion eeprom size in Bytes, 0 if no eeprom
  77. *
  78. * The @lock ensures that the chip is protected when certain operations are
  79. * in progress. When the read or write packet transfer is in progress, most
  80. * of the chip registers are not ccessible until the transfer is finished and
  81. * the DMA has been de-asserted.
  82. *
  83. * The @statelock is used to protect information in the structure which may
  84. * need to be accessed via several sources, such as the network driver layer
  85. * or one of the work queues.
  86. *
  87. * We align the buffers we may use for rx/tx to ensure that if the SPI driver
  88. * wants to DMA map them, it will not have any problems with data the driver
  89. * modifies.
  90. */
  91. struct ks8851_net {
  92. struct net_device *netdev;
  93. struct spi_device *spidev;
  94. struct mutex lock;
  95. spinlock_t statelock;
  96. union ks8851_tx_hdr txh ____cacheline_aligned;
  97. u8 rxd[8];
  98. u8 txd[8];
  99. u32 msg_enable ____cacheline_aligned;
  100. u16 tx_space;
  101. u8 fid;
  102. u16 rc_ier;
  103. u16 rc_rxqcr;
  104. u16 rc_ccr;
  105. u16 eeprom_size;
  106. struct mii_if_info mii;
  107. struct ks8851_rxctrl rxctrl;
  108. struct work_struct tx_work;
  109. struct work_struct irq_work;
  110. struct work_struct rxctrl_work;
  111. struct sk_buff_head txq;
  112. struct spi_message spi_msg1;
  113. struct spi_message spi_msg2;
  114. struct spi_transfer spi_xfer1;
  115. struct spi_transfer spi_xfer2[2];
  116. };
  117. static int msg_enable;
  118. /* shift for byte-enable data */
  119. #define BYTE_EN(_x) ((_x) << 2)
  120. /* turn register number and byte-enable mask into data for start of packet */
  121. #define MK_OP(_byteen, _reg) (BYTE_EN(_byteen) | (_reg) << (8+2) | (_reg) >> 6)
  122. /* SPI register read/write calls.
  123. *
  124. * All these calls issue SPI transactions to access the chip's registers. They
  125. * all require that the necessary lock is held to prevent accesses when the
  126. * chip is busy transferring packet data (RX/TX FIFO accesses).
  127. */
  128. /**
  129. * ks8851_wrreg16 - write 16bit register value to chip
  130. * @ks: The chip state
  131. * @reg: The register address
  132. * @val: The value to write
  133. *
  134. * Issue a write to put the value @val into the register specified in @reg.
  135. */
  136. static void ks8851_wrreg16(struct ks8851_net *ks, unsigned reg, unsigned val)
  137. {
  138. struct spi_transfer *xfer = &ks->spi_xfer1;
  139. struct spi_message *msg = &ks->spi_msg1;
  140. __le16 txb[2];
  141. int ret;
  142. txb[0] = cpu_to_le16(MK_OP(reg & 2 ? 0xC : 0x03, reg) | KS_SPIOP_WR);
  143. txb[1] = cpu_to_le16(val);
  144. xfer->tx_buf = txb;
  145. xfer->rx_buf = NULL;
  146. xfer->len = 4;
  147. ret = spi_sync(ks->spidev, msg);
  148. if (ret < 0)
  149. netdev_err(ks->netdev, "spi_sync() failed\n");
  150. }
  151. /**
  152. * ks8851_wrreg8 - write 8bit register value to chip
  153. * @ks: The chip state
  154. * @reg: The register address
  155. * @val: The value to write
  156. *
  157. * Issue a write to put the value @val into the register specified in @reg.
  158. */
  159. static void ks8851_wrreg8(struct ks8851_net *ks, unsigned reg, unsigned val)
  160. {
  161. struct spi_transfer *xfer = &ks->spi_xfer1;
  162. struct spi_message *msg = &ks->spi_msg1;
  163. __le16 txb[2];
  164. int ret;
  165. int bit;
  166. bit = 1 << (reg & 3);
  167. txb[0] = cpu_to_le16(MK_OP(bit, reg) | KS_SPIOP_WR);
  168. txb[1] = val;
  169. xfer->tx_buf = txb;
  170. xfer->rx_buf = NULL;
  171. xfer->len = 3;
  172. ret = spi_sync(ks->spidev, msg);
  173. if (ret < 0)
  174. netdev_err(ks->netdev, "spi_sync() failed\n");
  175. }
  176. /**
  177. * ks8851_rx_1msg - select whether to use one or two messages for spi read
  178. * @ks: The device structure
  179. *
  180. * Return whether to generate a single message with a tx and rx buffer
  181. * supplied to spi_sync(), or alternatively send the tx and rx buffers
  182. * as separate messages.
  183. *
  184. * Depending on the hardware in use, a single message may be more efficient
  185. * on interrupts or work done by the driver.
  186. *
  187. * This currently always returns true until we add some per-device data passed
  188. * from the platform code to specify which mode is better.
  189. */
  190. static inline bool ks8851_rx_1msg(struct ks8851_net *ks)
  191. {
  192. return true;
  193. }
  194. /**
  195. * ks8851_rdreg - issue read register command and return the data
  196. * @ks: The device state
  197. * @op: The register address and byte enables in message format.
  198. * @rxb: The RX buffer to return the result into
  199. * @rxl: The length of data expected.
  200. *
  201. * This is the low level read call that issues the necessary spi message(s)
  202. * to read data from the register specified in @op.
  203. */
  204. static void ks8851_rdreg(struct ks8851_net *ks, unsigned op,
  205. u8 *rxb, unsigned rxl)
  206. {
  207. struct spi_transfer *xfer;
  208. struct spi_message *msg;
  209. __le16 *txb = (__le16 *)ks->txd;
  210. u8 *trx = ks->rxd;
  211. int ret;
  212. txb[0] = cpu_to_le16(op | KS_SPIOP_RD);
  213. if (ks8851_rx_1msg(ks)) {
  214. msg = &ks->spi_msg1;
  215. xfer = &ks->spi_xfer1;
  216. xfer->tx_buf = txb;
  217. xfer->rx_buf = trx;
  218. xfer->len = rxl + 2;
  219. } else {
  220. msg = &ks->spi_msg2;
  221. xfer = ks->spi_xfer2;
  222. xfer->tx_buf = txb;
  223. xfer->rx_buf = NULL;
  224. xfer->len = 2;
  225. xfer++;
  226. xfer->tx_buf = NULL;
  227. xfer->rx_buf = trx;
  228. xfer->len = rxl;
  229. }
  230. ret = spi_sync(ks->spidev, msg);
  231. if (ret < 0)
  232. netdev_err(ks->netdev, "read: spi_sync() failed\n");
  233. else if (ks8851_rx_1msg(ks))
  234. memcpy(rxb, trx + 2, rxl);
  235. else
  236. memcpy(rxb, trx, rxl);
  237. }
  238. /**
  239. * ks8851_rdreg8 - read 8 bit register from device
  240. * @ks: The chip information
  241. * @reg: The register address
  242. *
  243. * Read a 8bit register from the chip, returning the result
  244. */
  245. static unsigned ks8851_rdreg8(struct ks8851_net *ks, unsigned reg)
  246. {
  247. u8 rxb[1];
  248. ks8851_rdreg(ks, MK_OP(1 << (reg & 3), reg), rxb, 1);
  249. return rxb[0];
  250. }
  251. /**
  252. * ks8851_rdreg16 - read 16 bit register from device
  253. * @ks: The chip information
  254. * @reg: The register address
  255. *
  256. * Read a 16bit register from the chip, returning the result
  257. */
  258. static unsigned ks8851_rdreg16(struct ks8851_net *ks, unsigned reg)
  259. {
  260. __le16 rx = 0;
  261. ks8851_rdreg(ks, MK_OP(reg & 2 ? 0xC : 0x3, reg), (u8 *)&rx, 2);
  262. return le16_to_cpu(rx);
  263. }
  264. /**
  265. * ks8851_rdreg32 - read 32 bit register from device
  266. * @ks: The chip information
  267. * @reg: The register address
  268. *
  269. * Read a 32bit register from the chip.
  270. *
  271. * Note, this read requires the address be aligned to 4 bytes.
  272. */
  273. static unsigned ks8851_rdreg32(struct ks8851_net *ks, unsigned reg)
  274. {
  275. __le32 rx = 0;
  276. WARN_ON(reg & 3);
  277. ks8851_rdreg(ks, MK_OP(0xf, reg), (u8 *)&rx, 4);
  278. return le32_to_cpu(rx);
  279. }
  280. /**
  281. * ks8851_soft_reset - issue one of the soft reset to the device
  282. * @ks: The device state.
  283. * @op: The bit(s) to set in the GRR
  284. *
  285. * Issue the relevant soft-reset command to the device's GRR register
  286. * specified by @op.
  287. *
  288. * Note, the delays are in there as a caution to ensure that the reset
  289. * has time to take effect and then complete. Since the datasheet does
  290. * not currently specify the exact sequence, we have chosen something
  291. * that seems to work with our device.
  292. */
  293. static void ks8851_soft_reset(struct ks8851_net *ks, unsigned op)
  294. {
  295. ks8851_wrreg16(ks, KS_GRR, op);
  296. mdelay(1); /* wait a short time to effect reset */
  297. ks8851_wrreg16(ks, KS_GRR, 0);
  298. mdelay(1); /* wait for condition to clear */
  299. }
  300. /**
  301. * ks8851_write_mac_addr - write mac address to device registers
  302. * @dev: The network device
  303. *
  304. * Update the KS8851 MAC address registers from the address in @dev.
  305. *
  306. * This call assumes that the chip is not running, so there is no need to
  307. * shutdown the RXQ process whilst setting this.
  308. */
  309. static int ks8851_write_mac_addr(struct net_device *dev)
  310. {
  311. struct ks8851_net *ks = netdev_priv(dev);
  312. int i;
  313. mutex_lock(&ks->lock);
  314. for (i = 0; i < ETH_ALEN; i++)
  315. ks8851_wrreg8(ks, KS_MAR(i), dev->dev_addr[i]);
  316. mutex_unlock(&ks->lock);
  317. return 0;
  318. }
  319. /**
  320. * ks8851_init_mac - initialise the mac address
  321. * @ks: The device structure
  322. *
  323. * Get or create the initial mac address for the device and then set that
  324. * into the station address register. Currently we assume that the device
  325. * does not have a valid mac address in it, and so we use random_ether_addr()
  326. * to create a new one.
  327. *
  328. * In future, the driver should check to see if the device has an EEPROM
  329. * attached and whether that has a valid ethernet address in it.
  330. */
  331. static void ks8851_init_mac(struct ks8851_net *ks)
  332. {
  333. struct net_device *dev = ks->netdev;
  334. random_ether_addr(dev->dev_addr);
  335. ks8851_write_mac_addr(dev);
  336. }
  337. /**
  338. * ks8851_irq - device interrupt handler
  339. * @irq: Interrupt number passed from the IRQ hnalder.
  340. * @pw: The private word passed to register_irq(), our struct ks8851_net.
  341. *
  342. * Disable the interrupt from happening again until we've processed the
  343. * current status by scheduling ks8851_irq_work().
  344. */
  345. static irqreturn_t ks8851_irq(int irq, void *pw)
  346. {
  347. struct ks8851_net *ks = pw;
  348. disable_irq_nosync(irq);
  349. schedule_work(&ks->irq_work);
  350. return IRQ_HANDLED;
  351. }
  352. /**
  353. * ks8851_rdfifo - read data from the receive fifo
  354. * @ks: The device state.
  355. * @buff: The buffer address
  356. * @len: The length of the data to read
  357. *
  358. * Issue an RXQ FIFO read command and read the @len amount of data from
  359. * the FIFO into the buffer specified by @buff.
  360. */
  361. static void ks8851_rdfifo(struct ks8851_net *ks, u8 *buff, unsigned len)
  362. {
  363. struct spi_transfer *xfer = ks->spi_xfer2;
  364. struct spi_message *msg = &ks->spi_msg2;
  365. u8 txb[1];
  366. int ret;
  367. netif_dbg(ks, rx_status, ks->netdev,
  368. "%s: %d@%p\n", __func__, len, buff);
  369. /* set the operation we're issuing */
  370. txb[0] = KS_SPIOP_RXFIFO;
  371. xfer->tx_buf = txb;
  372. xfer->rx_buf = NULL;
  373. xfer->len = 1;
  374. xfer++;
  375. xfer->rx_buf = buff;
  376. xfer->tx_buf = NULL;
  377. xfer->len = len;
  378. ret = spi_sync(ks->spidev, msg);
  379. if (ret < 0)
  380. netdev_err(ks->netdev, "%s: spi_sync() failed\n", __func__);
  381. }
  382. /**
  383. * ks8851_dbg_dumpkkt - dump initial packet contents to debug
  384. * @ks: The device state
  385. * @rxpkt: The data for the received packet
  386. *
  387. * Dump the initial data from the packet to dev_dbg().
  388. */
  389. static void ks8851_dbg_dumpkkt(struct ks8851_net *ks, u8 *rxpkt)
  390. {
  391. netdev_dbg(ks->netdev,
  392. "pkt %02x%02x%02x%02x %02x%02x%02x%02x %02x%02x%02x%02x\n",
  393. rxpkt[4], rxpkt[5], rxpkt[6], rxpkt[7],
  394. rxpkt[8], rxpkt[9], rxpkt[10], rxpkt[11],
  395. rxpkt[12], rxpkt[13], rxpkt[14], rxpkt[15]);
  396. }
  397. /**
  398. * ks8851_rx_pkts - receive packets from the host
  399. * @ks: The device information.
  400. *
  401. * This is called from the IRQ work queue when the system detects that there
  402. * are packets in the receive queue. Find out how many packets there are and
  403. * read them from the FIFO.
  404. */
  405. static void ks8851_rx_pkts(struct ks8851_net *ks)
  406. {
  407. struct sk_buff *skb;
  408. unsigned rxfc;
  409. unsigned rxlen;
  410. unsigned rxstat;
  411. u32 rxh;
  412. u8 *rxpkt;
  413. rxfc = ks8851_rdreg8(ks, KS_RXFC);
  414. netif_dbg(ks, rx_status, ks->netdev,
  415. "%s: %d packets\n", __func__, rxfc);
  416. /* Currently we're issuing a read per packet, but we could possibly
  417. * improve the code by issuing a single read, getting the receive
  418. * header, allocating the packet and then reading the packet data
  419. * out in one go.
  420. *
  421. * This form of operation would require us to hold the SPI bus'
  422. * chipselect low during the entie transaction to avoid any
  423. * reset to the data stream coming from the chip.
  424. */
  425. for (; rxfc != 0; rxfc--) {
  426. rxh = ks8851_rdreg32(ks, KS_RXFHSR);
  427. rxstat = rxh & 0xffff;
  428. rxlen = rxh >> 16;
  429. netif_dbg(ks, rx_status, ks->netdev,
  430. "rx: stat 0x%04x, len 0x%04x\n", rxstat, rxlen);
  431. /* the length of the packet includes the 32bit CRC */
  432. /* set dma read address */
  433. ks8851_wrreg16(ks, KS_RXFDPR, RXFDPR_RXFPAI | 0x00);
  434. /* start the packet dma process, and set auto-dequeue rx */
  435. ks8851_wrreg16(ks, KS_RXQCR,
  436. ks->rc_rxqcr | RXQCR_SDA | RXQCR_ADRFE);
  437. if (rxlen > 4) {
  438. unsigned int rxalign;
  439. rxlen -= 4;
  440. rxalign = ALIGN(rxlen, 4);
  441. skb = netdev_alloc_skb_ip_align(ks->netdev, rxalign);
  442. if (skb) {
  443. /* 4 bytes of status header + 4 bytes of
  444. * garbage: we put them before ethernet
  445. * header, so that they are copied,
  446. * but ignored.
  447. */
  448. rxpkt = skb_put(skb, rxlen) - 8;
  449. ks8851_rdfifo(ks, rxpkt, rxalign + 8);
  450. if (netif_msg_pktdata(ks))
  451. ks8851_dbg_dumpkkt(ks, rxpkt);
  452. skb->protocol = eth_type_trans(skb, ks->netdev);
  453. netif_rx(skb);
  454. ks->netdev->stats.rx_packets++;
  455. ks->netdev->stats.rx_bytes += rxlen;
  456. }
  457. }
  458. ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr);
  459. }
  460. }
  461. /**
  462. * ks8851_irq_work - work queue handler for dealing with interrupt requests
  463. * @work: The work structure that was scheduled by schedule_work()
  464. *
  465. * This is the handler invoked when the ks8851_irq() is called to find out
  466. * what happened, as we cannot allow ourselves to sleep whilst waiting for
  467. * anything other process has the chip's lock.
  468. *
  469. * Read the interrupt status, work out what needs to be done and then clear
  470. * any of the interrupts that are not needed.
  471. */
  472. static void ks8851_irq_work(struct work_struct *work)
  473. {
  474. struct ks8851_net *ks = container_of(work, struct ks8851_net, irq_work);
  475. unsigned status;
  476. unsigned handled = 0;
  477. mutex_lock(&ks->lock);
  478. status = ks8851_rdreg16(ks, KS_ISR);
  479. netif_dbg(ks, intr, ks->netdev,
  480. "%s: status 0x%04x\n", __func__, status);
  481. if (status & IRQ_LCI) {
  482. /* should do something about checking link status */
  483. handled |= IRQ_LCI;
  484. }
  485. if (status & IRQ_LDI) {
  486. u16 pmecr = ks8851_rdreg16(ks, KS_PMECR);
  487. pmecr &= ~PMECR_WKEVT_MASK;
  488. ks8851_wrreg16(ks, KS_PMECR, pmecr | PMECR_WKEVT_LINK);
  489. handled |= IRQ_LDI;
  490. }
  491. if (status & IRQ_RXPSI)
  492. handled |= IRQ_RXPSI;
  493. if (status & IRQ_TXI) {
  494. handled |= IRQ_TXI;
  495. /* no lock here, tx queue should have been stopped */
  496. /* update our idea of how much tx space is available to the
  497. * system */
  498. ks->tx_space = ks8851_rdreg16(ks, KS_TXMIR);
  499. netif_dbg(ks, intr, ks->netdev,
  500. "%s: txspace %d\n", __func__, ks->tx_space);
  501. }
  502. if (status & IRQ_RXI)
  503. handled |= IRQ_RXI;
  504. if (status & IRQ_SPIBEI) {
  505. dev_err(&ks->spidev->dev, "%s: spi bus error\n", __func__);
  506. handled |= IRQ_SPIBEI;
  507. }
  508. ks8851_wrreg16(ks, KS_ISR, handled);
  509. if (status & IRQ_RXI) {
  510. /* the datasheet says to disable the rx interrupt during
  511. * packet read-out, however we're masking the interrupt
  512. * from the device so do not bother masking just the RX
  513. * from the device. */
  514. ks8851_rx_pkts(ks);
  515. }
  516. /* if something stopped the rx process, probably due to wanting
  517. * to change the rx settings, then do something about restarting
  518. * it. */
  519. if (status & IRQ_RXPSI) {
  520. struct ks8851_rxctrl *rxc = &ks->rxctrl;
  521. /* update the multicast hash table */
  522. ks8851_wrreg16(ks, KS_MAHTR0, rxc->mchash[0]);
  523. ks8851_wrreg16(ks, KS_MAHTR1, rxc->mchash[1]);
  524. ks8851_wrreg16(ks, KS_MAHTR2, rxc->mchash[2]);
  525. ks8851_wrreg16(ks, KS_MAHTR3, rxc->mchash[3]);
  526. ks8851_wrreg16(ks, KS_RXCR2, rxc->rxcr2);
  527. ks8851_wrreg16(ks, KS_RXCR1, rxc->rxcr1);
  528. }
  529. mutex_unlock(&ks->lock);
  530. if (status & IRQ_TXI)
  531. netif_wake_queue(ks->netdev);
  532. enable_irq(ks->netdev->irq);
  533. }
  534. /**
  535. * calc_txlen - calculate size of message to send packet
  536. * @len: Length of data
  537. *
  538. * Returns the size of the TXFIFO message needed to send
  539. * this packet.
  540. */
  541. static inline unsigned calc_txlen(unsigned len)
  542. {
  543. return ALIGN(len + 4, 4);
  544. }
  545. /**
  546. * ks8851_wrpkt - write packet to TX FIFO
  547. * @ks: The device state.
  548. * @txp: The sk_buff to transmit.
  549. * @irq: IRQ on completion of the packet.
  550. *
  551. * Send the @txp to the chip. This means creating the relevant packet header
  552. * specifying the length of the packet and the other information the chip
  553. * needs, such as IRQ on completion. Send the header and the packet data to
  554. * the device.
  555. */
  556. static void ks8851_wrpkt(struct ks8851_net *ks, struct sk_buff *txp, bool irq)
  557. {
  558. struct spi_transfer *xfer = ks->spi_xfer2;
  559. struct spi_message *msg = &ks->spi_msg2;
  560. unsigned fid = 0;
  561. int ret;
  562. netif_dbg(ks, tx_queued, ks->netdev, "%s: skb %p, %d@%p, irq %d\n",
  563. __func__, txp, txp->len, txp->data, irq);
  564. fid = ks->fid++;
  565. fid &= TXFR_TXFID_MASK;
  566. if (irq)
  567. fid |= TXFR_TXIC; /* irq on completion */
  568. /* start header at txb[1] to align txw entries */
  569. ks->txh.txb[1] = KS_SPIOP_TXFIFO;
  570. ks->txh.txw[1] = cpu_to_le16(fid);
  571. ks->txh.txw[2] = cpu_to_le16(txp->len);
  572. xfer->tx_buf = &ks->txh.txb[1];
  573. xfer->rx_buf = NULL;
  574. xfer->len = 5;
  575. xfer++;
  576. xfer->tx_buf = txp->data;
  577. xfer->rx_buf = NULL;
  578. xfer->len = ALIGN(txp->len, 4);
  579. ret = spi_sync(ks->spidev, msg);
  580. if (ret < 0)
  581. netdev_err(ks->netdev, "%s: spi_sync() failed\n", __func__);
  582. }
  583. /**
  584. * ks8851_done_tx - update and then free skbuff after transmitting
  585. * @ks: The device state
  586. * @txb: The buffer transmitted
  587. */
  588. static void ks8851_done_tx(struct ks8851_net *ks, struct sk_buff *txb)
  589. {
  590. struct net_device *dev = ks->netdev;
  591. dev->stats.tx_bytes += txb->len;
  592. dev->stats.tx_packets++;
  593. dev_kfree_skb(txb);
  594. }
  595. /**
  596. * ks8851_tx_work - process tx packet(s)
  597. * @work: The work strucutre what was scheduled.
  598. *
  599. * This is called when a number of packets have been scheduled for
  600. * transmission and need to be sent to the device.
  601. */
  602. static void ks8851_tx_work(struct work_struct *work)
  603. {
  604. struct ks8851_net *ks = container_of(work, struct ks8851_net, tx_work);
  605. struct sk_buff *txb;
  606. bool last = skb_queue_empty(&ks->txq);
  607. mutex_lock(&ks->lock);
  608. while (!last) {
  609. txb = skb_dequeue(&ks->txq);
  610. last = skb_queue_empty(&ks->txq);
  611. if (txb != NULL) {
  612. ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr | RXQCR_SDA);
  613. ks8851_wrpkt(ks, txb, last);
  614. ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr);
  615. ks8851_wrreg16(ks, KS_TXQCR, TXQCR_METFE);
  616. ks8851_done_tx(ks, txb);
  617. }
  618. }
  619. mutex_unlock(&ks->lock);
  620. }
  621. /**
  622. * ks8851_set_powermode - set power mode of the device
  623. * @ks: The device state
  624. * @pwrmode: The power mode value to write to KS_PMECR.
  625. *
  626. * Change the power mode of the chip.
  627. */
  628. static void ks8851_set_powermode(struct ks8851_net *ks, unsigned pwrmode)
  629. {
  630. unsigned pmecr;
  631. netif_dbg(ks, hw, ks->netdev, "setting power mode %d\n", pwrmode);
  632. pmecr = ks8851_rdreg16(ks, KS_PMECR);
  633. pmecr &= ~PMECR_PM_MASK;
  634. pmecr |= pwrmode;
  635. ks8851_wrreg16(ks, KS_PMECR, pmecr);
  636. }
  637. /**
  638. * ks8851_net_open - open network device
  639. * @dev: The network device being opened.
  640. *
  641. * Called when the network device is marked active, such as a user executing
  642. * 'ifconfig up' on the device.
  643. */
  644. static int ks8851_net_open(struct net_device *dev)
  645. {
  646. struct ks8851_net *ks = netdev_priv(dev);
  647. /* lock the card, even if we may not actually be doing anything
  648. * else at the moment */
  649. mutex_lock(&ks->lock);
  650. netif_dbg(ks, ifup, ks->netdev, "opening\n");
  651. /* bring chip out of any power saving mode it was in */
  652. ks8851_set_powermode(ks, PMECR_PM_NORMAL);
  653. /* issue a soft reset to the RX/TX QMU to put it into a known
  654. * state. */
  655. ks8851_soft_reset(ks, GRR_QMU);
  656. /* setup transmission parameters */
  657. ks8851_wrreg16(ks, KS_TXCR, (TXCR_TXE | /* enable transmit process */
  658. TXCR_TXPE | /* pad to min length */
  659. TXCR_TXCRC | /* add CRC */
  660. TXCR_TXFCE)); /* enable flow control */
  661. /* auto-increment tx data, reset tx pointer */
  662. ks8851_wrreg16(ks, KS_TXFDPR, TXFDPR_TXFPAI);
  663. /* setup receiver control */
  664. ks8851_wrreg16(ks, KS_RXCR1, (RXCR1_RXPAFMA | /* from mac filter */
  665. RXCR1_RXFCE | /* enable flow control */
  666. RXCR1_RXBE | /* broadcast enable */
  667. RXCR1_RXUE | /* unicast enable */
  668. RXCR1_RXE)); /* enable rx block */
  669. /* transfer entire frames out in one go */
  670. ks8851_wrreg16(ks, KS_RXCR2, RXCR2_SRDBL_FRAME);
  671. /* set receive counter timeouts */
  672. ks8851_wrreg16(ks, KS_RXDTTR, 1000); /* 1ms after first frame to IRQ */
  673. ks8851_wrreg16(ks, KS_RXDBCTR, 4096); /* >4Kbytes in buffer to IRQ */
  674. ks8851_wrreg16(ks, KS_RXFCTR, 10); /* 10 frames to IRQ */
  675. ks->rc_rxqcr = (RXQCR_RXFCTE | /* IRQ on frame count exceeded */
  676. RXQCR_RXDBCTE | /* IRQ on byte count exceeded */
  677. RXQCR_RXDTTE); /* IRQ on time exceeded */
  678. ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr);
  679. /* clear then enable interrupts */
  680. #define STD_IRQ (IRQ_LCI | /* Link Change */ \
  681. IRQ_TXI | /* TX done */ \
  682. IRQ_RXI | /* RX done */ \
  683. IRQ_SPIBEI | /* SPI bus error */ \
  684. IRQ_TXPSI | /* TX process stop */ \
  685. IRQ_RXPSI) /* RX process stop */
  686. ks->rc_ier = STD_IRQ;
  687. ks8851_wrreg16(ks, KS_ISR, STD_IRQ);
  688. ks8851_wrreg16(ks, KS_IER, STD_IRQ);
  689. netif_start_queue(ks->netdev);
  690. netif_dbg(ks, ifup, ks->netdev, "network device up\n");
  691. mutex_unlock(&ks->lock);
  692. return 0;
  693. }
  694. /**
  695. * ks8851_net_stop - close network device
  696. * @dev: The device being closed.
  697. *
  698. * Called to close down a network device which has been active. Cancell any
  699. * work, shutdown the RX and TX process and then place the chip into a low
  700. * power state whilst it is not being used.
  701. */
  702. static int ks8851_net_stop(struct net_device *dev)
  703. {
  704. struct ks8851_net *ks = netdev_priv(dev);
  705. netif_info(ks, ifdown, dev, "shutting down\n");
  706. netif_stop_queue(dev);
  707. mutex_lock(&ks->lock);
  708. /* stop any outstanding work */
  709. flush_work(&ks->irq_work);
  710. flush_work(&ks->tx_work);
  711. flush_work(&ks->rxctrl_work);
  712. /* turn off the IRQs and ack any outstanding */
  713. ks8851_wrreg16(ks, KS_IER, 0x0000);
  714. ks8851_wrreg16(ks, KS_ISR, 0xffff);
  715. /* shutdown RX process */
  716. ks8851_wrreg16(ks, KS_RXCR1, 0x0000);
  717. /* shutdown TX process */
  718. ks8851_wrreg16(ks, KS_TXCR, 0x0000);
  719. /* set powermode to soft power down to save power */
  720. ks8851_set_powermode(ks, PMECR_PM_SOFTDOWN);
  721. /* ensure any queued tx buffers are dumped */
  722. while (!skb_queue_empty(&ks->txq)) {
  723. struct sk_buff *txb = skb_dequeue(&ks->txq);
  724. netif_dbg(ks, ifdown, ks->netdev,
  725. "%s: freeing txb %p\n", __func__, txb);
  726. dev_kfree_skb(txb);
  727. }
  728. mutex_unlock(&ks->lock);
  729. return 0;
  730. }
  731. /**
  732. * ks8851_start_xmit - transmit packet
  733. * @skb: The buffer to transmit
  734. * @dev: The device used to transmit the packet.
  735. *
  736. * Called by the network layer to transmit the @skb. Queue the packet for
  737. * the device and schedule the necessary work to transmit the packet when
  738. * it is free.
  739. *
  740. * We do this to firstly avoid sleeping with the network device locked,
  741. * and secondly so we can round up more than one packet to transmit which
  742. * means we can try and avoid generating too many transmit done interrupts.
  743. */
  744. static netdev_tx_t ks8851_start_xmit(struct sk_buff *skb,
  745. struct net_device *dev)
  746. {
  747. struct ks8851_net *ks = netdev_priv(dev);
  748. unsigned needed = calc_txlen(skb->len);
  749. netdev_tx_t ret = NETDEV_TX_OK;
  750. netif_dbg(ks, tx_queued, ks->netdev,
  751. "%s: skb %p, %d@%p\n", __func__, skb, skb->len, skb->data);
  752. spin_lock(&ks->statelock);
  753. if (needed > ks->tx_space) {
  754. netif_stop_queue(dev);
  755. ret = NETDEV_TX_BUSY;
  756. } else {
  757. ks->tx_space -= needed;
  758. skb_queue_tail(&ks->txq, skb);
  759. }
  760. spin_unlock(&ks->statelock);
  761. schedule_work(&ks->tx_work);
  762. return ret;
  763. }
  764. /**
  765. * ks8851_rxctrl_work - work handler to change rx mode
  766. * @work: The work structure this belongs to.
  767. *
  768. * Lock the device and issue the necessary changes to the receive mode from
  769. * the network device layer. This is done so that we can do this without
  770. * having to sleep whilst holding the network device lock.
  771. *
  772. * Since the recommendation from Micrel is that the RXQ is shutdown whilst the
  773. * receive parameters are programmed, we issue a write to disable the RXQ and
  774. * then wait for the interrupt handler to be triggered once the RXQ shutdown is
  775. * complete. The interrupt handler then writes the new values into the chip.
  776. */
  777. static void ks8851_rxctrl_work(struct work_struct *work)
  778. {
  779. struct ks8851_net *ks = container_of(work, struct ks8851_net, rxctrl_work);
  780. mutex_lock(&ks->lock);
  781. /* need to shutdown RXQ before modifying filter parameters */
  782. ks8851_wrreg16(ks, KS_RXCR1, 0x00);
  783. mutex_unlock(&ks->lock);
  784. }
  785. static void ks8851_set_rx_mode(struct net_device *dev)
  786. {
  787. struct ks8851_net *ks = netdev_priv(dev);
  788. struct ks8851_rxctrl rxctrl;
  789. memset(&rxctrl, 0, sizeof(rxctrl));
  790. if (dev->flags & IFF_PROMISC) {
  791. /* interface to receive everything */
  792. rxctrl.rxcr1 = RXCR1_RXAE | RXCR1_RXINVF;
  793. } else if (dev->flags & IFF_ALLMULTI) {
  794. /* accept all multicast packets */
  795. rxctrl.rxcr1 = (RXCR1_RXME | RXCR1_RXAE |
  796. RXCR1_RXPAFMA | RXCR1_RXMAFMA);
  797. } else if (dev->flags & IFF_MULTICAST && !netdev_mc_empty(dev)) {
  798. struct netdev_hw_addr *ha;
  799. u32 crc;
  800. /* accept some multicast */
  801. netdev_for_each_mc_addr(ha, dev) {
  802. crc = ether_crc(ETH_ALEN, ha->addr);
  803. crc >>= (32 - 6); /* get top six bits */
  804. rxctrl.mchash[crc >> 4] |= (1 << (crc & 0xf));
  805. }
  806. rxctrl.rxcr1 = RXCR1_RXME | RXCR1_RXPAFMA;
  807. } else {
  808. /* just accept broadcast / unicast */
  809. rxctrl.rxcr1 = RXCR1_RXPAFMA;
  810. }
  811. rxctrl.rxcr1 |= (RXCR1_RXUE | /* unicast enable */
  812. RXCR1_RXBE | /* broadcast enable */
  813. RXCR1_RXE | /* RX process enable */
  814. RXCR1_RXFCE); /* enable flow control */
  815. rxctrl.rxcr2 |= RXCR2_SRDBL_FRAME;
  816. /* schedule work to do the actual set of the data if needed */
  817. spin_lock(&ks->statelock);
  818. if (memcmp(&rxctrl, &ks->rxctrl, sizeof(rxctrl)) != 0) {
  819. memcpy(&ks->rxctrl, &rxctrl, sizeof(ks->rxctrl));
  820. schedule_work(&ks->rxctrl_work);
  821. }
  822. spin_unlock(&ks->statelock);
  823. }
  824. static int ks8851_set_mac_address(struct net_device *dev, void *addr)
  825. {
  826. struct sockaddr *sa = addr;
  827. if (netif_running(dev))
  828. return -EBUSY;
  829. if (!is_valid_ether_addr(sa->sa_data))
  830. return -EADDRNOTAVAIL;
  831. memcpy(dev->dev_addr, sa->sa_data, ETH_ALEN);
  832. return ks8851_write_mac_addr(dev);
  833. }
  834. static int ks8851_net_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
  835. {
  836. struct ks8851_net *ks = netdev_priv(dev);
  837. if (!netif_running(dev))
  838. return -EINVAL;
  839. return generic_mii_ioctl(&ks->mii, if_mii(req), cmd, NULL);
  840. }
  841. static const struct net_device_ops ks8851_netdev_ops = {
  842. .ndo_open = ks8851_net_open,
  843. .ndo_stop = ks8851_net_stop,
  844. .ndo_do_ioctl = ks8851_net_ioctl,
  845. .ndo_start_xmit = ks8851_start_xmit,
  846. .ndo_set_mac_address = ks8851_set_mac_address,
  847. .ndo_set_rx_mode = ks8851_set_rx_mode,
  848. .ndo_change_mtu = eth_change_mtu,
  849. .ndo_validate_addr = eth_validate_addr,
  850. };
  851. /* Companion eeprom access */
  852. enum { /* EEPROM programming states */
  853. EEPROM_CONTROL,
  854. EEPROM_ADDRESS,
  855. EEPROM_DATA,
  856. EEPROM_COMPLETE
  857. };
  858. /**
  859. * ks8851_eeprom_read - read a 16bits word in ks8851 companion EEPROM
  860. * @dev: The network device the PHY is on.
  861. * @addr: EEPROM address to read
  862. *
  863. * eeprom_size: used to define the data coding length. Can be changed
  864. * through debug-fs.
  865. *
  866. * Programs a read on the EEPROM using ks8851 EEPROM SW access feature.
  867. * Warning: The READ feature is not supported on ks8851 revision 0.
  868. *
  869. * Rough programming model:
  870. * - on period start: set clock high and read value on bus
  871. * - on period / 2: set clock low and program value on bus
  872. * - start on period / 2
  873. */
  874. unsigned int ks8851_eeprom_read(struct net_device *dev, unsigned int addr)
  875. {
  876. struct ks8851_net *ks = netdev_priv(dev);
  877. int eepcr;
  878. int ctrl = EEPROM_OP_READ;
  879. int state = EEPROM_CONTROL;
  880. int bit_count = EEPROM_OP_LEN - 1;
  881. unsigned int data = 0;
  882. int dummy;
  883. unsigned int addr_len;
  884. addr_len = (ks->eeprom_size == 128) ? 6 : 8;
  885. /* start transaction: chip select high, authorize write */
  886. mutex_lock(&ks->lock);
  887. eepcr = EEPCR_EESA | EEPCR_EESRWA;
  888. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  889. eepcr |= EEPCR_EECS;
  890. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  891. mutex_unlock(&ks->lock);
  892. while (state != EEPROM_COMPLETE) {
  893. /* falling clock period starts... */
  894. /* set EED_IO pin for control and address */
  895. eepcr &= ~EEPCR_EEDO;
  896. switch (state) {
  897. case EEPROM_CONTROL:
  898. eepcr |= ((ctrl >> bit_count) & 1) << 2;
  899. if (bit_count-- <= 0) {
  900. bit_count = addr_len - 1;
  901. state = EEPROM_ADDRESS;
  902. }
  903. break;
  904. case EEPROM_ADDRESS:
  905. eepcr |= ((addr >> bit_count) & 1) << 2;
  906. bit_count--;
  907. break;
  908. case EEPROM_DATA:
  909. /* Change to receive mode */
  910. eepcr &= ~EEPCR_EESRWA;
  911. break;
  912. }
  913. /* lower clock */
  914. eepcr &= ~EEPCR_EESCK;
  915. mutex_lock(&ks->lock);
  916. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  917. mutex_unlock(&ks->lock);
  918. /* waitread period / 2 */
  919. udelay(EEPROM_SK_PERIOD / 2);
  920. /* rising clock period starts... */
  921. /* raise clock */
  922. mutex_lock(&ks->lock);
  923. eepcr |= EEPCR_EESCK;
  924. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  925. mutex_unlock(&ks->lock);
  926. /* Manage read */
  927. switch (state) {
  928. case EEPROM_ADDRESS:
  929. if (bit_count < 0) {
  930. bit_count = EEPROM_DATA_LEN - 1;
  931. state = EEPROM_DATA;
  932. }
  933. break;
  934. case EEPROM_DATA:
  935. mutex_lock(&ks->lock);
  936. dummy = ks8851_rdreg16(ks, KS_EEPCR);
  937. mutex_unlock(&ks->lock);
  938. data |= ((dummy >> EEPCR_EESB_OFFSET) & 1) << bit_count;
  939. if (bit_count-- <= 0)
  940. state = EEPROM_COMPLETE;
  941. break;
  942. }
  943. /* wait period / 2 */
  944. udelay(EEPROM_SK_PERIOD / 2);
  945. }
  946. /* close transaction */
  947. mutex_lock(&ks->lock);
  948. eepcr &= ~EEPCR_EECS;
  949. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  950. eepcr = 0;
  951. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  952. mutex_unlock(&ks->lock);
  953. return data;
  954. }
  955. /**
  956. * ks8851_eeprom_write - write a 16bits word in ks8851 companion EEPROM
  957. * @dev: The network device the PHY is on.
  958. * @op: operand (can be WRITE, EWEN, EWDS)
  959. * @addr: EEPROM address to write
  960. * @data: data to write
  961. *
  962. * eeprom_size: used to define the data coding length. Can be changed
  963. * through debug-fs.
  964. *
  965. * Programs a write on the EEPROM using ks8851 EEPROM SW access feature.
  966. *
  967. * Note that a write enable is required before writing data.
  968. *
  969. * Rough programming model:
  970. * - on period start: set clock high
  971. * - on period / 2: set clock low and program value on bus
  972. * - start on period / 2
  973. */
  974. void ks8851_eeprom_write(struct net_device *dev, unsigned int op,
  975. unsigned int addr, unsigned int data)
  976. {
  977. struct ks8851_net *ks = netdev_priv(dev);
  978. int eepcr;
  979. int state = EEPROM_CONTROL;
  980. int bit_count = EEPROM_OP_LEN - 1;
  981. unsigned int addr_len;
  982. addr_len = (ks->eeprom_size == 128) ? 6 : 8;
  983. switch (op) {
  984. case EEPROM_OP_EWEN:
  985. addr = 0x30;
  986. break;
  987. case EEPROM_OP_EWDS:
  988. addr = 0;
  989. break;
  990. }
  991. /* start transaction: chip select high, authorize write */
  992. mutex_lock(&ks->lock);
  993. eepcr = EEPCR_EESA | EEPCR_EESRWA;
  994. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  995. eepcr |= EEPCR_EECS;
  996. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  997. mutex_unlock(&ks->lock);
  998. while (state != EEPROM_COMPLETE) {
  999. /* falling clock period starts... */
  1000. /* set EED_IO pin for control and address */
  1001. eepcr &= ~EEPCR_EEDO;
  1002. switch (state) {
  1003. case EEPROM_CONTROL:
  1004. eepcr |= ((op >> bit_count) & 1) << 2;
  1005. if (bit_count-- <= 0) {
  1006. bit_count = addr_len - 1;
  1007. state = EEPROM_ADDRESS;
  1008. }
  1009. break;
  1010. case EEPROM_ADDRESS:
  1011. eepcr |= ((addr >> bit_count) & 1) << 2;
  1012. if (bit_count-- <= 0) {
  1013. if (op == EEPROM_OP_WRITE) {
  1014. bit_count = EEPROM_DATA_LEN - 1;
  1015. state = EEPROM_DATA;
  1016. } else {
  1017. state = EEPROM_COMPLETE;
  1018. }
  1019. }
  1020. break;
  1021. case EEPROM_DATA:
  1022. eepcr |= ((data >> bit_count) & 1) << 2;
  1023. if (bit_count-- <= 0)
  1024. state = EEPROM_COMPLETE;
  1025. break;
  1026. }
  1027. /* lower clock */
  1028. eepcr &= ~EEPCR_EESCK;
  1029. mutex_lock(&ks->lock);
  1030. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  1031. mutex_unlock(&ks->lock);
  1032. /* wait period / 2 */
  1033. udelay(EEPROM_SK_PERIOD / 2);
  1034. /* rising clock period starts... */
  1035. /* raise clock */
  1036. eepcr |= EEPCR_EESCK;
  1037. mutex_lock(&ks->lock);
  1038. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  1039. mutex_unlock(&ks->lock);
  1040. /* wait period / 2 */
  1041. udelay(EEPROM_SK_PERIOD / 2);
  1042. }
  1043. /* close transaction */
  1044. mutex_lock(&ks->lock);
  1045. eepcr &= ~EEPCR_EECS;
  1046. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  1047. eepcr = 0;
  1048. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  1049. mutex_unlock(&ks->lock);
  1050. }
  1051. /* ethtool support */
  1052. static void ks8851_get_drvinfo(struct net_device *dev,
  1053. struct ethtool_drvinfo *di)
  1054. {
  1055. strlcpy(di->driver, "KS8851", sizeof(di->driver));
  1056. strlcpy(di->version, "1.00", sizeof(di->version));
  1057. strlcpy(di->bus_info, dev_name(dev->dev.parent), sizeof(di->bus_info));
  1058. }
  1059. static u32 ks8851_get_msglevel(struct net_device *dev)
  1060. {
  1061. struct ks8851_net *ks = netdev_priv(dev);
  1062. return ks->msg_enable;
  1063. }
  1064. static void ks8851_set_msglevel(struct net_device *dev, u32 to)
  1065. {
  1066. struct ks8851_net *ks = netdev_priv(dev);
  1067. ks->msg_enable = to;
  1068. }
  1069. static int ks8851_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  1070. {
  1071. struct ks8851_net *ks = netdev_priv(dev);
  1072. return mii_ethtool_gset(&ks->mii, cmd);
  1073. }
  1074. static int ks8851_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  1075. {
  1076. struct ks8851_net *ks = netdev_priv(dev);
  1077. return mii_ethtool_sset(&ks->mii, cmd);
  1078. }
  1079. static u32 ks8851_get_link(struct net_device *dev)
  1080. {
  1081. struct ks8851_net *ks = netdev_priv(dev);
  1082. return mii_link_ok(&ks->mii);
  1083. }
  1084. static int ks8851_nway_reset(struct net_device *dev)
  1085. {
  1086. struct ks8851_net *ks = netdev_priv(dev);
  1087. return mii_nway_restart(&ks->mii);
  1088. }
  1089. static int ks8851_get_eeprom_len(struct net_device *dev)
  1090. {
  1091. struct ks8851_net *ks = netdev_priv(dev);
  1092. return ks->eeprom_size;
  1093. }
  1094. static int ks8851_get_eeprom(struct net_device *dev,
  1095. struct ethtool_eeprom *eeprom, u8 *bytes)
  1096. {
  1097. struct ks8851_net *ks = netdev_priv(dev);
  1098. u16 *eeprom_buff;
  1099. int first_word;
  1100. int last_word;
  1101. int ret_val = 0;
  1102. u16 i;
  1103. if (eeprom->len == 0)
  1104. return -EINVAL;
  1105. if (eeprom->len > ks->eeprom_size)
  1106. return -EINVAL;
  1107. eeprom->magic = ks8851_rdreg16(ks, KS_CIDER);
  1108. first_word = eeprom->offset >> 1;
  1109. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  1110. eeprom_buff = kmalloc(sizeof(u16) *
  1111. (last_word - first_word + 1), GFP_KERNEL);
  1112. if (!eeprom_buff)
  1113. return -ENOMEM;
  1114. for (i = 0; i < last_word - first_word + 1; i++)
  1115. eeprom_buff[i] = ks8851_eeprom_read(dev, first_word + 1);
  1116. /* Device's eeprom is little-endian, word addressable */
  1117. for (i = 0; i < last_word - first_word + 1; i++)
  1118. le16_to_cpus(&eeprom_buff[i]);
  1119. memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
  1120. kfree(eeprom_buff);
  1121. return ret_val;
  1122. }
  1123. static int ks8851_set_eeprom(struct net_device *dev,
  1124. struct ethtool_eeprom *eeprom, u8 *bytes)
  1125. {
  1126. struct ks8851_net *ks = netdev_priv(dev);
  1127. u16 *eeprom_buff;
  1128. void *ptr;
  1129. int max_len;
  1130. int first_word;
  1131. int last_word;
  1132. int ret_val = 0;
  1133. u16 i;
  1134. if (eeprom->len == 0)
  1135. return -EOPNOTSUPP;
  1136. if (eeprom->len > ks->eeprom_size)
  1137. return -EINVAL;
  1138. if (eeprom->magic != ks8851_rdreg16(ks, KS_CIDER))
  1139. return -EFAULT;
  1140. first_word = eeprom->offset >> 1;
  1141. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  1142. max_len = (last_word - first_word + 1) * 2;
  1143. eeprom_buff = kmalloc(max_len, GFP_KERNEL);
  1144. if (!eeprom_buff)
  1145. return -ENOMEM;
  1146. ptr = (void *)eeprom_buff;
  1147. if (eeprom->offset & 1) {
  1148. /* need read/modify/write of first changed EEPROM word */
  1149. /* only the second byte of the word is being modified */
  1150. eeprom_buff[0] = ks8851_eeprom_read(dev, first_word);
  1151. ptr++;
  1152. }
  1153. if ((eeprom->offset + eeprom->len) & 1)
  1154. /* need read/modify/write of last changed EEPROM word */
  1155. /* only the first byte of the word is being modified */
  1156. eeprom_buff[last_word - first_word] =
  1157. ks8851_eeprom_read(dev, last_word);
  1158. /* Device's eeprom is little-endian, word addressable */
  1159. le16_to_cpus(&eeprom_buff[0]);
  1160. le16_to_cpus(&eeprom_buff[last_word - first_word]);
  1161. memcpy(ptr, bytes, eeprom->len);
  1162. for (i = 0; i < last_word - first_word + 1; i++)
  1163. eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
  1164. ks8851_eeprom_write(dev, EEPROM_OP_EWEN, 0, 0);
  1165. for (i = 0; i < last_word - first_word + 1; i++) {
  1166. ks8851_eeprom_write(dev, EEPROM_OP_WRITE, first_word + i,
  1167. eeprom_buff[i]);
  1168. mdelay(EEPROM_WRITE_TIME);
  1169. }
  1170. ks8851_eeprom_write(dev, EEPROM_OP_EWDS, 0, 0);
  1171. kfree(eeprom_buff);
  1172. return ret_val;
  1173. }
  1174. static const struct ethtool_ops ks8851_ethtool_ops = {
  1175. .get_drvinfo = ks8851_get_drvinfo,
  1176. .get_msglevel = ks8851_get_msglevel,
  1177. .set_msglevel = ks8851_set_msglevel,
  1178. .get_settings = ks8851_get_settings,
  1179. .set_settings = ks8851_set_settings,
  1180. .get_link = ks8851_get_link,
  1181. .nway_reset = ks8851_nway_reset,
  1182. .get_eeprom_len = ks8851_get_eeprom_len,
  1183. .get_eeprom = ks8851_get_eeprom,
  1184. .set_eeprom = ks8851_set_eeprom,
  1185. };
  1186. /* MII interface controls */
  1187. /**
  1188. * ks8851_phy_reg - convert MII register into a KS8851 register
  1189. * @reg: MII register number.
  1190. *
  1191. * Return the KS8851 register number for the corresponding MII PHY register
  1192. * if possible. Return zero if the MII register has no direct mapping to the
  1193. * KS8851 register set.
  1194. */
  1195. static int ks8851_phy_reg(int reg)
  1196. {
  1197. switch (reg) {
  1198. case MII_BMCR:
  1199. return KS_P1MBCR;
  1200. case MII_BMSR:
  1201. return KS_P1MBSR;
  1202. case MII_PHYSID1:
  1203. return KS_PHY1ILR;
  1204. case MII_PHYSID2:
  1205. return KS_PHY1IHR;
  1206. case MII_ADVERTISE:
  1207. return KS_P1ANAR;
  1208. case MII_LPA:
  1209. return KS_P1ANLPR;
  1210. }
  1211. return 0x0;
  1212. }
  1213. /**
  1214. * ks8851_phy_read - MII interface PHY register read.
  1215. * @dev: The network device the PHY is on.
  1216. * @phy_addr: Address of PHY (ignored as we only have one)
  1217. * @reg: The register to read.
  1218. *
  1219. * This call reads data from the PHY register specified in @reg. Since the
  1220. * device does not support all the MII registers, the non-existent values
  1221. * are always returned as zero.
  1222. *
  1223. * We return zero for unsupported registers as the MII code does not check
  1224. * the value returned for any error status, and simply returns it to the
  1225. * caller. The mii-tool that the driver was tested with takes any -ve error
  1226. * as real PHY capabilities, thus displaying incorrect data to the user.
  1227. */
  1228. static int ks8851_phy_read(struct net_device *dev, int phy_addr, int reg)
  1229. {
  1230. struct ks8851_net *ks = netdev_priv(dev);
  1231. int ksreg;
  1232. int result;
  1233. ksreg = ks8851_phy_reg(reg);
  1234. if (!ksreg)
  1235. return 0x0; /* no error return allowed, so use zero */
  1236. mutex_lock(&ks->lock);
  1237. result = ks8851_rdreg16(ks, ksreg);
  1238. mutex_unlock(&ks->lock);
  1239. return result;
  1240. }
  1241. static void ks8851_phy_write(struct net_device *dev,
  1242. int phy, int reg, int value)
  1243. {
  1244. struct ks8851_net *ks = netdev_priv(dev);
  1245. int ksreg;
  1246. ksreg = ks8851_phy_reg(reg);
  1247. if (ksreg) {
  1248. mutex_lock(&ks->lock);
  1249. ks8851_wrreg16(ks, ksreg, value);
  1250. mutex_unlock(&ks->lock);
  1251. }
  1252. }
  1253. /**
  1254. * ks8851_read_selftest - read the selftest memory info.
  1255. * @ks: The device state
  1256. *
  1257. * Read and check the TX/RX memory selftest information.
  1258. */
  1259. static int ks8851_read_selftest(struct ks8851_net *ks)
  1260. {
  1261. unsigned both_done = MBIR_TXMBF | MBIR_RXMBF;
  1262. int ret = 0;
  1263. unsigned rd;
  1264. rd = ks8851_rdreg16(ks, KS_MBIR);
  1265. if ((rd & both_done) != both_done) {
  1266. netdev_warn(ks->netdev, "Memory selftest not finished\n");
  1267. return 0;
  1268. }
  1269. if (rd & MBIR_TXMBFA) {
  1270. netdev_err(ks->netdev, "TX memory selftest fail\n");
  1271. ret |= 1;
  1272. }
  1273. if (rd & MBIR_RXMBFA) {
  1274. netdev_err(ks->netdev, "RX memory selftest fail\n");
  1275. ret |= 2;
  1276. }
  1277. return 0;
  1278. }
  1279. /* driver bus management functions */
  1280. #ifdef CONFIG_PM
  1281. static int ks8851_suspend(struct spi_device *spi, pm_message_t state)
  1282. {
  1283. struct ks8851_net *ks = dev_get_drvdata(&spi->dev);
  1284. struct net_device *dev = ks->netdev;
  1285. if (netif_running(dev)) {
  1286. netif_device_detach(dev);
  1287. ks8851_net_stop(dev);
  1288. }
  1289. return 0;
  1290. }
  1291. static int ks8851_resume(struct spi_device *spi)
  1292. {
  1293. struct ks8851_net *ks = dev_get_drvdata(&spi->dev);
  1294. struct net_device *dev = ks->netdev;
  1295. if (netif_running(dev)) {
  1296. ks8851_net_open(dev);
  1297. netif_device_attach(dev);
  1298. }
  1299. return 0;
  1300. }
  1301. #else
  1302. #define ks8851_suspend NULL
  1303. #define ks8851_resume NULL
  1304. #endif
  1305. static int __devinit ks8851_probe(struct spi_device *spi)
  1306. {
  1307. struct net_device *ndev;
  1308. struct ks8851_net *ks;
  1309. int ret;
  1310. ndev = alloc_etherdev(sizeof(struct ks8851_net));
  1311. if (!ndev) {
  1312. dev_err(&spi->dev, "failed to alloc ethernet device\n");
  1313. return -ENOMEM;
  1314. }
  1315. spi->bits_per_word = 8;
  1316. ks = netdev_priv(ndev);
  1317. ks->netdev = ndev;
  1318. ks->spidev = spi;
  1319. ks->tx_space = 6144;
  1320. mutex_init(&ks->lock);
  1321. spin_lock_init(&ks->statelock);
  1322. INIT_WORK(&ks->tx_work, ks8851_tx_work);
  1323. INIT_WORK(&ks->irq_work, ks8851_irq_work);
  1324. INIT_WORK(&ks->rxctrl_work, ks8851_rxctrl_work);
  1325. /* initialise pre-made spi transfer messages */
  1326. spi_message_init(&ks->spi_msg1);
  1327. spi_message_add_tail(&ks->spi_xfer1, &ks->spi_msg1);
  1328. spi_message_init(&ks->spi_msg2);
  1329. spi_message_add_tail(&ks->spi_xfer2[0], &ks->spi_msg2);
  1330. spi_message_add_tail(&ks->spi_xfer2[1], &ks->spi_msg2);
  1331. /* setup mii state */
  1332. ks->mii.dev = ndev;
  1333. ks->mii.phy_id = 1,
  1334. ks->mii.phy_id_mask = 1;
  1335. ks->mii.reg_num_mask = 0xf;
  1336. ks->mii.mdio_read = ks8851_phy_read;
  1337. ks->mii.mdio_write = ks8851_phy_write;
  1338. dev_info(&spi->dev, "message enable is %d\n", msg_enable);
  1339. /* set the default message enable */
  1340. ks->msg_enable = netif_msg_init(msg_enable, (NETIF_MSG_DRV |
  1341. NETIF_MSG_PROBE |
  1342. NETIF_MSG_LINK));
  1343. skb_queue_head_init(&ks->txq);
  1344. SET_ETHTOOL_OPS(ndev, &ks8851_ethtool_ops);
  1345. SET_NETDEV_DEV(ndev, &spi->dev);
  1346. dev_set_drvdata(&spi->dev, ks);
  1347. ndev->if_port = IF_PORT_100BASET;
  1348. ndev->netdev_ops = &ks8851_netdev_ops;
  1349. ndev->irq = spi->irq;
  1350. /* issue a global soft reset to reset the device. */
  1351. ks8851_soft_reset(ks, GRR_GSR);
  1352. /* simple check for a valid chip being connected to the bus */
  1353. if ((ks8851_rdreg16(ks, KS_CIDER) & ~CIDER_REV_MASK) != CIDER_ID) {
  1354. dev_err(&spi->dev, "failed to read device ID\n");
  1355. ret = -ENODEV;
  1356. goto err_id;
  1357. }
  1358. /* cache the contents of the CCR register for EEPROM, etc. */
  1359. ks->rc_ccr = ks8851_rdreg16(ks, KS_CCR);
  1360. if (ks->rc_ccr & CCR_EEPROM)
  1361. ks->eeprom_size = 128;
  1362. else
  1363. ks->eeprom_size = 0;
  1364. ks8851_read_selftest(ks);
  1365. ks8851_init_mac(ks);
  1366. ret = request_irq(spi->irq, ks8851_irq, IRQF_TRIGGER_LOW,
  1367. ndev->name, ks);
  1368. if (ret < 0) {
  1369. dev_err(&spi->dev, "failed to get irq\n");
  1370. goto err_irq;
  1371. }
  1372. ret = register_netdev(ndev);
  1373. if (ret) {
  1374. dev_err(&spi->dev, "failed to register network device\n");
  1375. goto err_netdev;
  1376. }
  1377. netdev_info(ndev, "revision %d, MAC %pM, IRQ %d\n",
  1378. CIDER_REV_GET(ks8851_rdreg16(ks, KS_CIDER)),
  1379. ndev->dev_addr, ndev->irq);
  1380. return 0;
  1381. err_netdev:
  1382. free_irq(ndev->irq, ndev);
  1383. err_id:
  1384. err_irq:
  1385. free_netdev(ndev);
  1386. return ret;
  1387. }
  1388. static int __devexit ks8851_remove(struct spi_device *spi)
  1389. {
  1390. struct ks8851_net *priv = dev_get_drvdata(&spi->dev);
  1391. if (netif_msg_drv(priv))
  1392. dev_info(&spi->dev, "remove\n");
  1393. unregister_netdev(priv->netdev);
  1394. free_irq(spi->irq, priv);
  1395. free_netdev(priv->netdev);
  1396. return 0;
  1397. }
  1398. static struct spi_driver ks8851_driver = {
  1399. .driver = {
  1400. .name = "ks8851",
  1401. .owner = THIS_MODULE,
  1402. },
  1403. .probe = ks8851_probe,
  1404. .remove = __devexit_p(ks8851_remove),
  1405. .suspend = ks8851_suspend,
  1406. .resume = ks8851_resume,
  1407. };
  1408. static int __init ks8851_init(void)
  1409. {
  1410. return spi_register_driver(&ks8851_driver);
  1411. }
  1412. static void __exit ks8851_exit(void)
  1413. {
  1414. spi_unregister_driver(&ks8851_driver);
  1415. }
  1416. module_init(ks8851_init);
  1417. module_exit(ks8851_exit);
  1418. MODULE_DESCRIPTION("KS8851 Network driver");
  1419. MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
  1420. MODULE_LICENSE("GPL");
  1421. module_param_named(message, msg_enable, int, 0);
  1422. MODULE_PARM_DESC(message, "Message verbosity level (0=none, 31=all)");
  1423. MODULE_ALIAS("spi:ks8851");