ftmac100.c 31 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201
  1. /*
  2. * Faraday FTMAC100 10/100 Ethernet
  3. *
  4. * (C) Copyright 2009-2011 Faraday Technology
  5. * Po-Yu Chuang <ratbert@faraday-tech.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  22. #include <linux/dma-mapping.h>
  23. #include <linux/etherdevice.h>
  24. #include <linux/ethtool.h>
  25. #include <linux/init.h>
  26. #include <linux/io.h>
  27. #include <linux/mii.h>
  28. #include <linux/module.h>
  29. #include <linux/netdevice.h>
  30. #include <linux/platform_device.h>
  31. #include "ftmac100.h"
  32. #define DRV_NAME "ftmac100"
  33. #define DRV_VERSION "0.2"
  34. #define RX_QUEUE_ENTRIES 128 /* must be power of 2 */
  35. #define TX_QUEUE_ENTRIES 16 /* must be power of 2 */
  36. #define MAX_PKT_SIZE 1518
  37. #define RX_BUF_SIZE 2044 /* must be smaller than 0x7ff */
  38. #if MAX_PKT_SIZE > 0x7ff
  39. #error invalid MAX_PKT_SIZE
  40. #endif
  41. #if RX_BUF_SIZE > 0x7ff || RX_BUF_SIZE > PAGE_SIZE
  42. #error invalid RX_BUF_SIZE
  43. #endif
  44. /******************************************************************************
  45. * private data
  46. *****************************************************************************/
  47. struct ftmac100_descs {
  48. struct ftmac100_rxdes rxdes[RX_QUEUE_ENTRIES];
  49. struct ftmac100_txdes txdes[TX_QUEUE_ENTRIES];
  50. };
  51. struct ftmac100 {
  52. struct resource *res;
  53. void __iomem *base;
  54. int irq;
  55. struct ftmac100_descs *descs;
  56. dma_addr_t descs_dma_addr;
  57. unsigned int rx_pointer;
  58. unsigned int tx_clean_pointer;
  59. unsigned int tx_pointer;
  60. unsigned int tx_pending;
  61. spinlock_t tx_lock;
  62. struct net_device *netdev;
  63. struct device *dev;
  64. struct napi_struct napi;
  65. struct mii_if_info mii;
  66. };
  67. static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
  68. struct ftmac100_rxdes *rxdes, gfp_t gfp);
  69. /******************************************************************************
  70. * internal functions (hardware register access)
  71. *****************************************************************************/
  72. #define INT_MASK_ALL_ENABLED (FTMAC100_INT_RPKT_FINISH | \
  73. FTMAC100_INT_NORXBUF | \
  74. FTMAC100_INT_XPKT_OK | \
  75. FTMAC100_INT_XPKT_LOST | \
  76. FTMAC100_INT_RPKT_LOST | \
  77. FTMAC100_INT_AHB_ERR | \
  78. FTMAC100_INT_PHYSTS_CHG)
  79. #define INT_MASK_ALL_DISABLED 0
  80. static void ftmac100_enable_all_int(struct ftmac100 *priv)
  81. {
  82. iowrite32(INT_MASK_ALL_ENABLED, priv->base + FTMAC100_OFFSET_IMR);
  83. }
  84. static void ftmac100_disable_all_int(struct ftmac100 *priv)
  85. {
  86. iowrite32(INT_MASK_ALL_DISABLED, priv->base + FTMAC100_OFFSET_IMR);
  87. }
  88. static void ftmac100_set_rx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
  89. {
  90. iowrite32(addr, priv->base + FTMAC100_OFFSET_RXR_BADR);
  91. }
  92. static void ftmac100_set_tx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
  93. {
  94. iowrite32(addr, priv->base + FTMAC100_OFFSET_TXR_BADR);
  95. }
  96. static void ftmac100_txdma_start_polling(struct ftmac100 *priv)
  97. {
  98. iowrite32(1, priv->base + FTMAC100_OFFSET_TXPD);
  99. }
  100. static int ftmac100_reset(struct ftmac100 *priv)
  101. {
  102. struct net_device *netdev = priv->netdev;
  103. int i;
  104. /* NOTE: reset clears all registers */
  105. iowrite32(FTMAC100_MACCR_SW_RST, priv->base + FTMAC100_OFFSET_MACCR);
  106. for (i = 0; i < 5; i++) {
  107. unsigned int maccr;
  108. maccr = ioread32(priv->base + FTMAC100_OFFSET_MACCR);
  109. if (!(maccr & FTMAC100_MACCR_SW_RST)) {
  110. /*
  111. * FTMAC100_MACCR_SW_RST cleared does not indicate
  112. * that hardware reset completed (what the f*ck).
  113. * We still need to wait for a while.
  114. */
  115. udelay(500);
  116. return 0;
  117. }
  118. udelay(1000);
  119. }
  120. netdev_err(netdev, "software reset failed\n");
  121. return -EIO;
  122. }
  123. static void ftmac100_set_mac(struct ftmac100 *priv, const unsigned char *mac)
  124. {
  125. unsigned int maddr = mac[0] << 8 | mac[1];
  126. unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5];
  127. iowrite32(maddr, priv->base + FTMAC100_OFFSET_MAC_MADR);
  128. iowrite32(laddr, priv->base + FTMAC100_OFFSET_MAC_LADR);
  129. }
  130. #define MACCR_ENABLE_ALL (FTMAC100_MACCR_XMT_EN | \
  131. FTMAC100_MACCR_RCV_EN | \
  132. FTMAC100_MACCR_XDMA_EN | \
  133. FTMAC100_MACCR_RDMA_EN | \
  134. FTMAC100_MACCR_CRC_APD | \
  135. FTMAC100_MACCR_FULLDUP | \
  136. FTMAC100_MACCR_RX_RUNT | \
  137. FTMAC100_MACCR_RX_BROADPKT)
  138. static int ftmac100_start_hw(struct ftmac100 *priv)
  139. {
  140. struct net_device *netdev = priv->netdev;
  141. if (ftmac100_reset(priv))
  142. return -EIO;
  143. /* setup ring buffer base registers */
  144. ftmac100_set_rx_ring_base(priv,
  145. priv->descs_dma_addr +
  146. offsetof(struct ftmac100_descs, rxdes));
  147. ftmac100_set_tx_ring_base(priv,
  148. priv->descs_dma_addr +
  149. offsetof(struct ftmac100_descs, txdes));
  150. iowrite32(FTMAC100_APTC_RXPOLL_CNT(1), priv->base + FTMAC100_OFFSET_APTC);
  151. ftmac100_set_mac(priv, netdev->dev_addr);
  152. iowrite32(MACCR_ENABLE_ALL, priv->base + FTMAC100_OFFSET_MACCR);
  153. return 0;
  154. }
  155. static void ftmac100_stop_hw(struct ftmac100 *priv)
  156. {
  157. iowrite32(0, priv->base + FTMAC100_OFFSET_MACCR);
  158. }
  159. /******************************************************************************
  160. * internal functions (receive descriptor)
  161. *****************************************************************************/
  162. static bool ftmac100_rxdes_first_segment(struct ftmac100_rxdes *rxdes)
  163. {
  164. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_FRS);
  165. }
  166. static bool ftmac100_rxdes_last_segment(struct ftmac100_rxdes *rxdes)
  167. {
  168. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_LRS);
  169. }
  170. static bool ftmac100_rxdes_owned_by_dma(struct ftmac100_rxdes *rxdes)
  171. {
  172. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
  173. }
  174. static void ftmac100_rxdes_set_dma_own(struct ftmac100_rxdes *rxdes)
  175. {
  176. /* clear status bits */
  177. rxdes->rxdes0 = cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
  178. }
  179. static bool ftmac100_rxdes_rx_error(struct ftmac100_rxdes *rxdes)
  180. {
  181. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ERR);
  182. }
  183. static bool ftmac100_rxdes_crc_error(struct ftmac100_rxdes *rxdes)
  184. {
  185. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_CRC_ERR);
  186. }
  187. static bool ftmac100_rxdes_frame_too_long(struct ftmac100_rxdes *rxdes)
  188. {
  189. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_FTL);
  190. }
  191. static bool ftmac100_rxdes_runt(struct ftmac100_rxdes *rxdes)
  192. {
  193. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RUNT);
  194. }
  195. static bool ftmac100_rxdes_odd_nibble(struct ftmac100_rxdes *rxdes)
  196. {
  197. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ODD_NB);
  198. }
  199. static unsigned int ftmac100_rxdes_frame_length(struct ftmac100_rxdes *rxdes)
  200. {
  201. return le32_to_cpu(rxdes->rxdes0) & FTMAC100_RXDES0_RFL;
  202. }
  203. static bool ftmac100_rxdes_multicast(struct ftmac100_rxdes *rxdes)
  204. {
  205. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_MULTICAST);
  206. }
  207. static void ftmac100_rxdes_set_buffer_size(struct ftmac100_rxdes *rxdes,
  208. unsigned int size)
  209. {
  210. rxdes->rxdes1 &= cpu_to_le32(FTMAC100_RXDES1_EDORR);
  211. rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_RXBUF_SIZE(size));
  212. }
  213. static void ftmac100_rxdes_set_end_of_ring(struct ftmac100_rxdes *rxdes)
  214. {
  215. rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_EDORR);
  216. }
  217. static void ftmac100_rxdes_set_dma_addr(struct ftmac100_rxdes *rxdes,
  218. dma_addr_t addr)
  219. {
  220. rxdes->rxdes2 = cpu_to_le32(addr);
  221. }
  222. static dma_addr_t ftmac100_rxdes_get_dma_addr(struct ftmac100_rxdes *rxdes)
  223. {
  224. return le32_to_cpu(rxdes->rxdes2);
  225. }
  226. /*
  227. * rxdes3 is not used by hardware. We use it to keep track of page.
  228. * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
  229. */
  230. static void ftmac100_rxdes_set_page(struct ftmac100_rxdes *rxdes, struct page *page)
  231. {
  232. rxdes->rxdes3 = (unsigned int)page;
  233. }
  234. static struct page *ftmac100_rxdes_get_page(struct ftmac100_rxdes *rxdes)
  235. {
  236. return (struct page *)rxdes->rxdes3;
  237. }
  238. /******************************************************************************
  239. * internal functions (receive)
  240. *****************************************************************************/
  241. static int ftmac100_next_rx_pointer(int pointer)
  242. {
  243. return (pointer + 1) & (RX_QUEUE_ENTRIES - 1);
  244. }
  245. static void ftmac100_rx_pointer_advance(struct ftmac100 *priv)
  246. {
  247. priv->rx_pointer = ftmac100_next_rx_pointer(priv->rx_pointer);
  248. }
  249. static struct ftmac100_rxdes *ftmac100_current_rxdes(struct ftmac100 *priv)
  250. {
  251. return &priv->descs->rxdes[priv->rx_pointer];
  252. }
  253. static struct ftmac100_rxdes *
  254. ftmac100_rx_locate_first_segment(struct ftmac100 *priv)
  255. {
  256. struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
  257. while (!ftmac100_rxdes_owned_by_dma(rxdes)) {
  258. if (ftmac100_rxdes_first_segment(rxdes))
  259. return rxdes;
  260. ftmac100_rxdes_set_dma_own(rxdes);
  261. ftmac100_rx_pointer_advance(priv);
  262. rxdes = ftmac100_current_rxdes(priv);
  263. }
  264. return NULL;
  265. }
  266. static bool ftmac100_rx_packet_error(struct ftmac100 *priv,
  267. struct ftmac100_rxdes *rxdes)
  268. {
  269. struct net_device *netdev = priv->netdev;
  270. bool error = false;
  271. if (unlikely(ftmac100_rxdes_rx_error(rxdes))) {
  272. if (net_ratelimit())
  273. netdev_info(netdev, "rx err\n");
  274. netdev->stats.rx_errors++;
  275. error = true;
  276. }
  277. if (unlikely(ftmac100_rxdes_crc_error(rxdes))) {
  278. if (net_ratelimit())
  279. netdev_info(netdev, "rx crc err\n");
  280. netdev->stats.rx_crc_errors++;
  281. error = true;
  282. }
  283. if (unlikely(ftmac100_rxdes_frame_too_long(rxdes))) {
  284. if (net_ratelimit())
  285. netdev_info(netdev, "rx frame too long\n");
  286. netdev->stats.rx_length_errors++;
  287. error = true;
  288. } else if (unlikely(ftmac100_rxdes_runt(rxdes))) {
  289. if (net_ratelimit())
  290. netdev_info(netdev, "rx runt\n");
  291. netdev->stats.rx_length_errors++;
  292. error = true;
  293. } else if (unlikely(ftmac100_rxdes_odd_nibble(rxdes))) {
  294. if (net_ratelimit())
  295. netdev_info(netdev, "rx odd nibble\n");
  296. netdev->stats.rx_length_errors++;
  297. error = true;
  298. }
  299. return error;
  300. }
  301. static void ftmac100_rx_drop_packet(struct ftmac100 *priv)
  302. {
  303. struct net_device *netdev = priv->netdev;
  304. struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
  305. bool done = false;
  306. if (net_ratelimit())
  307. netdev_dbg(netdev, "drop packet %p\n", rxdes);
  308. do {
  309. if (ftmac100_rxdes_last_segment(rxdes))
  310. done = true;
  311. ftmac100_rxdes_set_dma_own(rxdes);
  312. ftmac100_rx_pointer_advance(priv);
  313. rxdes = ftmac100_current_rxdes(priv);
  314. } while (!done && !ftmac100_rxdes_owned_by_dma(rxdes));
  315. netdev->stats.rx_dropped++;
  316. }
  317. static bool ftmac100_rx_packet(struct ftmac100 *priv, int *processed)
  318. {
  319. struct net_device *netdev = priv->netdev;
  320. struct ftmac100_rxdes *rxdes;
  321. struct sk_buff *skb;
  322. struct page *page;
  323. dma_addr_t map;
  324. int length;
  325. rxdes = ftmac100_rx_locate_first_segment(priv);
  326. if (!rxdes)
  327. return false;
  328. if (unlikely(ftmac100_rx_packet_error(priv, rxdes))) {
  329. ftmac100_rx_drop_packet(priv);
  330. return true;
  331. }
  332. /*
  333. * It is impossible to get multi-segment packets
  334. * because we always provide big enough receive buffers.
  335. */
  336. if (unlikely(!ftmac100_rxdes_last_segment(rxdes)))
  337. BUG();
  338. /* start processing */
  339. skb = netdev_alloc_skb_ip_align(netdev, 128);
  340. if (unlikely(!skb)) {
  341. if (net_ratelimit())
  342. netdev_err(netdev, "rx skb alloc failed\n");
  343. ftmac100_rx_drop_packet(priv);
  344. return true;
  345. }
  346. if (unlikely(ftmac100_rxdes_multicast(rxdes)))
  347. netdev->stats.multicast++;
  348. map = ftmac100_rxdes_get_dma_addr(rxdes);
  349. dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
  350. length = ftmac100_rxdes_frame_length(rxdes);
  351. page = ftmac100_rxdes_get_page(rxdes);
  352. skb_fill_page_desc(skb, 0, page, 0, length);
  353. skb->len += length;
  354. skb->data_len += length;
  355. /* page might be freed in __pskb_pull_tail() */
  356. if (length > 64)
  357. skb->truesize += PAGE_SIZE;
  358. __pskb_pull_tail(skb, min(length, 64));
  359. ftmac100_alloc_rx_page(priv, rxdes, GFP_ATOMIC);
  360. ftmac100_rx_pointer_advance(priv);
  361. skb->protocol = eth_type_trans(skb, netdev);
  362. netdev->stats.rx_packets++;
  363. netdev->stats.rx_bytes += skb->len;
  364. /* push packet to protocol stack */
  365. netif_receive_skb(skb);
  366. (*processed)++;
  367. return true;
  368. }
  369. /******************************************************************************
  370. * internal functions (transmit descriptor)
  371. *****************************************************************************/
  372. static void ftmac100_txdes_reset(struct ftmac100_txdes *txdes)
  373. {
  374. /* clear all except end of ring bit */
  375. txdes->txdes0 = 0;
  376. txdes->txdes1 &= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
  377. txdes->txdes2 = 0;
  378. txdes->txdes3 = 0;
  379. }
  380. static bool ftmac100_txdes_owned_by_dma(struct ftmac100_txdes *txdes)
  381. {
  382. return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
  383. }
  384. static void ftmac100_txdes_set_dma_own(struct ftmac100_txdes *txdes)
  385. {
  386. /*
  387. * Make sure dma own bit will not be set before any other
  388. * descriptor fields.
  389. */
  390. wmb();
  391. txdes->txdes0 |= cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
  392. }
  393. static bool ftmac100_txdes_excessive_collision(struct ftmac100_txdes *txdes)
  394. {
  395. return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_EXSCOL);
  396. }
  397. static bool ftmac100_txdes_late_collision(struct ftmac100_txdes *txdes)
  398. {
  399. return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_LATECOL);
  400. }
  401. static void ftmac100_txdes_set_end_of_ring(struct ftmac100_txdes *txdes)
  402. {
  403. txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
  404. }
  405. static void ftmac100_txdes_set_first_segment(struct ftmac100_txdes *txdes)
  406. {
  407. txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_FTS);
  408. }
  409. static void ftmac100_txdes_set_last_segment(struct ftmac100_txdes *txdes)
  410. {
  411. txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_LTS);
  412. }
  413. static void ftmac100_txdes_set_txint(struct ftmac100_txdes *txdes)
  414. {
  415. txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXIC);
  416. }
  417. static void ftmac100_txdes_set_buffer_size(struct ftmac100_txdes *txdes,
  418. unsigned int len)
  419. {
  420. txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXBUF_SIZE(len));
  421. }
  422. static void ftmac100_txdes_set_dma_addr(struct ftmac100_txdes *txdes,
  423. dma_addr_t addr)
  424. {
  425. txdes->txdes2 = cpu_to_le32(addr);
  426. }
  427. static dma_addr_t ftmac100_txdes_get_dma_addr(struct ftmac100_txdes *txdes)
  428. {
  429. return le32_to_cpu(txdes->txdes2);
  430. }
  431. /*
  432. * txdes3 is not used by hardware. We use it to keep track of socket buffer.
  433. * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
  434. */
  435. static void ftmac100_txdes_set_skb(struct ftmac100_txdes *txdes, struct sk_buff *skb)
  436. {
  437. txdes->txdes3 = (unsigned int)skb;
  438. }
  439. static struct sk_buff *ftmac100_txdes_get_skb(struct ftmac100_txdes *txdes)
  440. {
  441. return (struct sk_buff *)txdes->txdes3;
  442. }
  443. /******************************************************************************
  444. * internal functions (transmit)
  445. *****************************************************************************/
  446. static int ftmac100_next_tx_pointer(int pointer)
  447. {
  448. return (pointer + 1) & (TX_QUEUE_ENTRIES - 1);
  449. }
  450. static void ftmac100_tx_pointer_advance(struct ftmac100 *priv)
  451. {
  452. priv->tx_pointer = ftmac100_next_tx_pointer(priv->tx_pointer);
  453. }
  454. static void ftmac100_tx_clean_pointer_advance(struct ftmac100 *priv)
  455. {
  456. priv->tx_clean_pointer = ftmac100_next_tx_pointer(priv->tx_clean_pointer);
  457. }
  458. static struct ftmac100_txdes *ftmac100_current_txdes(struct ftmac100 *priv)
  459. {
  460. return &priv->descs->txdes[priv->tx_pointer];
  461. }
  462. static struct ftmac100_txdes *ftmac100_current_clean_txdes(struct ftmac100 *priv)
  463. {
  464. return &priv->descs->txdes[priv->tx_clean_pointer];
  465. }
  466. static bool ftmac100_tx_complete_packet(struct ftmac100 *priv)
  467. {
  468. struct net_device *netdev = priv->netdev;
  469. struct ftmac100_txdes *txdes;
  470. struct sk_buff *skb;
  471. dma_addr_t map;
  472. if (priv->tx_pending == 0)
  473. return false;
  474. txdes = ftmac100_current_clean_txdes(priv);
  475. if (ftmac100_txdes_owned_by_dma(txdes))
  476. return false;
  477. skb = ftmac100_txdes_get_skb(txdes);
  478. map = ftmac100_txdes_get_dma_addr(txdes);
  479. if (unlikely(ftmac100_txdes_excessive_collision(txdes) ||
  480. ftmac100_txdes_late_collision(txdes))) {
  481. /*
  482. * packet transmitted to ethernet lost due to late collision
  483. * or excessive collision
  484. */
  485. netdev->stats.tx_aborted_errors++;
  486. } else {
  487. netdev->stats.tx_packets++;
  488. netdev->stats.tx_bytes += skb->len;
  489. }
  490. dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
  491. dev_kfree_skb(skb);
  492. ftmac100_txdes_reset(txdes);
  493. ftmac100_tx_clean_pointer_advance(priv);
  494. spin_lock(&priv->tx_lock);
  495. priv->tx_pending--;
  496. spin_unlock(&priv->tx_lock);
  497. netif_wake_queue(netdev);
  498. return true;
  499. }
  500. static void ftmac100_tx_complete(struct ftmac100 *priv)
  501. {
  502. while (ftmac100_tx_complete_packet(priv))
  503. ;
  504. }
  505. static int ftmac100_xmit(struct ftmac100 *priv, struct sk_buff *skb,
  506. dma_addr_t map)
  507. {
  508. struct net_device *netdev = priv->netdev;
  509. struct ftmac100_txdes *txdes;
  510. unsigned int len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len;
  511. txdes = ftmac100_current_txdes(priv);
  512. ftmac100_tx_pointer_advance(priv);
  513. /* setup TX descriptor */
  514. ftmac100_txdes_set_skb(txdes, skb);
  515. ftmac100_txdes_set_dma_addr(txdes, map);
  516. ftmac100_txdes_set_first_segment(txdes);
  517. ftmac100_txdes_set_last_segment(txdes);
  518. ftmac100_txdes_set_txint(txdes);
  519. ftmac100_txdes_set_buffer_size(txdes, len);
  520. spin_lock(&priv->tx_lock);
  521. priv->tx_pending++;
  522. if (priv->tx_pending == TX_QUEUE_ENTRIES)
  523. netif_stop_queue(netdev);
  524. /* start transmit */
  525. ftmac100_txdes_set_dma_own(txdes);
  526. spin_unlock(&priv->tx_lock);
  527. ftmac100_txdma_start_polling(priv);
  528. return NETDEV_TX_OK;
  529. }
  530. /******************************************************************************
  531. * internal functions (buffer)
  532. *****************************************************************************/
  533. static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
  534. struct ftmac100_rxdes *rxdes, gfp_t gfp)
  535. {
  536. struct net_device *netdev = priv->netdev;
  537. struct page *page;
  538. dma_addr_t map;
  539. page = alloc_page(gfp);
  540. if (!page) {
  541. if (net_ratelimit())
  542. netdev_err(netdev, "failed to allocate rx page\n");
  543. return -ENOMEM;
  544. }
  545. map = dma_map_page(priv->dev, page, 0, RX_BUF_SIZE, DMA_FROM_DEVICE);
  546. if (unlikely(dma_mapping_error(priv->dev, map))) {
  547. if (net_ratelimit())
  548. netdev_err(netdev, "failed to map rx page\n");
  549. __free_page(page);
  550. return -ENOMEM;
  551. }
  552. ftmac100_rxdes_set_page(rxdes, page);
  553. ftmac100_rxdes_set_dma_addr(rxdes, map);
  554. ftmac100_rxdes_set_buffer_size(rxdes, RX_BUF_SIZE);
  555. ftmac100_rxdes_set_dma_own(rxdes);
  556. return 0;
  557. }
  558. static void ftmac100_free_buffers(struct ftmac100 *priv)
  559. {
  560. int i;
  561. for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
  562. struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
  563. struct page *page = ftmac100_rxdes_get_page(rxdes);
  564. dma_addr_t map = ftmac100_rxdes_get_dma_addr(rxdes);
  565. if (!page)
  566. continue;
  567. dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
  568. __free_page(page);
  569. }
  570. for (i = 0; i < TX_QUEUE_ENTRIES; i++) {
  571. struct ftmac100_txdes *txdes = &priv->descs->txdes[i];
  572. struct sk_buff *skb = ftmac100_txdes_get_skb(txdes);
  573. dma_addr_t map = ftmac100_txdes_get_dma_addr(txdes);
  574. if (!skb)
  575. continue;
  576. dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
  577. dev_kfree_skb(skb);
  578. }
  579. dma_free_coherent(priv->dev, sizeof(struct ftmac100_descs),
  580. priv->descs, priv->descs_dma_addr);
  581. }
  582. static int ftmac100_alloc_buffers(struct ftmac100 *priv)
  583. {
  584. int i;
  585. priv->descs = dma_alloc_coherent(priv->dev, sizeof(struct ftmac100_descs),
  586. &priv->descs_dma_addr, GFP_KERNEL);
  587. if (!priv->descs)
  588. return -ENOMEM;
  589. memset(priv->descs, 0, sizeof(struct ftmac100_descs));
  590. /* initialize RX ring */
  591. ftmac100_rxdes_set_end_of_ring(&priv->descs->rxdes[RX_QUEUE_ENTRIES - 1]);
  592. for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
  593. struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
  594. if (ftmac100_alloc_rx_page(priv, rxdes, GFP_KERNEL))
  595. goto err;
  596. }
  597. /* initialize TX ring */
  598. ftmac100_txdes_set_end_of_ring(&priv->descs->txdes[TX_QUEUE_ENTRIES - 1]);
  599. return 0;
  600. err:
  601. ftmac100_free_buffers(priv);
  602. return -ENOMEM;
  603. }
  604. /******************************************************************************
  605. * struct mii_if_info functions
  606. *****************************************************************************/
  607. static int ftmac100_mdio_read(struct net_device *netdev, int phy_id, int reg)
  608. {
  609. struct ftmac100 *priv = netdev_priv(netdev);
  610. unsigned int phycr;
  611. int i;
  612. phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
  613. FTMAC100_PHYCR_REGAD(reg) |
  614. FTMAC100_PHYCR_MIIRD;
  615. iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
  616. for (i = 0; i < 10; i++) {
  617. phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
  618. if ((phycr & FTMAC100_PHYCR_MIIRD) == 0)
  619. return phycr & FTMAC100_PHYCR_MIIRDATA;
  620. udelay(100);
  621. }
  622. netdev_err(netdev, "mdio read timed out\n");
  623. return 0;
  624. }
  625. static void ftmac100_mdio_write(struct net_device *netdev, int phy_id, int reg,
  626. int data)
  627. {
  628. struct ftmac100 *priv = netdev_priv(netdev);
  629. unsigned int phycr;
  630. int i;
  631. phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
  632. FTMAC100_PHYCR_REGAD(reg) |
  633. FTMAC100_PHYCR_MIIWR;
  634. data = FTMAC100_PHYWDATA_MIIWDATA(data);
  635. iowrite32(data, priv->base + FTMAC100_OFFSET_PHYWDATA);
  636. iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
  637. for (i = 0; i < 10; i++) {
  638. phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
  639. if ((phycr & FTMAC100_PHYCR_MIIWR) == 0)
  640. return;
  641. udelay(100);
  642. }
  643. netdev_err(netdev, "mdio write timed out\n");
  644. }
  645. /******************************************************************************
  646. * struct ethtool_ops functions
  647. *****************************************************************************/
  648. static void ftmac100_get_drvinfo(struct net_device *netdev,
  649. struct ethtool_drvinfo *info)
  650. {
  651. strcpy(info->driver, DRV_NAME);
  652. strcpy(info->version, DRV_VERSION);
  653. strcpy(info->bus_info, dev_name(&netdev->dev));
  654. }
  655. static int ftmac100_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
  656. {
  657. struct ftmac100 *priv = netdev_priv(netdev);
  658. return mii_ethtool_gset(&priv->mii, cmd);
  659. }
  660. static int ftmac100_set_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
  661. {
  662. struct ftmac100 *priv = netdev_priv(netdev);
  663. return mii_ethtool_sset(&priv->mii, cmd);
  664. }
  665. static int ftmac100_nway_reset(struct net_device *netdev)
  666. {
  667. struct ftmac100 *priv = netdev_priv(netdev);
  668. return mii_nway_restart(&priv->mii);
  669. }
  670. static u32 ftmac100_get_link(struct net_device *netdev)
  671. {
  672. struct ftmac100 *priv = netdev_priv(netdev);
  673. return mii_link_ok(&priv->mii);
  674. }
  675. static const struct ethtool_ops ftmac100_ethtool_ops = {
  676. .set_settings = ftmac100_set_settings,
  677. .get_settings = ftmac100_get_settings,
  678. .get_drvinfo = ftmac100_get_drvinfo,
  679. .nway_reset = ftmac100_nway_reset,
  680. .get_link = ftmac100_get_link,
  681. };
  682. /******************************************************************************
  683. * interrupt handler
  684. *****************************************************************************/
  685. static irqreturn_t ftmac100_interrupt(int irq, void *dev_id)
  686. {
  687. struct net_device *netdev = dev_id;
  688. struct ftmac100 *priv = netdev_priv(netdev);
  689. if (likely(netif_running(netdev))) {
  690. /* Disable interrupts for polling */
  691. ftmac100_disable_all_int(priv);
  692. napi_schedule(&priv->napi);
  693. }
  694. return IRQ_HANDLED;
  695. }
  696. /******************************************************************************
  697. * struct napi_struct functions
  698. *****************************************************************************/
  699. static int ftmac100_poll(struct napi_struct *napi, int budget)
  700. {
  701. struct ftmac100 *priv = container_of(napi, struct ftmac100, napi);
  702. struct net_device *netdev = priv->netdev;
  703. unsigned int status;
  704. bool completed = true;
  705. int rx = 0;
  706. status = ioread32(priv->base + FTMAC100_OFFSET_ISR);
  707. if (status & (FTMAC100_INT_RPKT_FINISH | FTMAC100_INT_NORXBUF)) {
  708. /*
  709. * FTMAC100_INT_RPKT_FINISH:
  710. * RX DMA has received packets into RX buffer successfully
  711. *
  712. * FTMAC100_INT_NORXBUF:
  713. * RX buffer unavailable
  714. */
  715. bool retry;
  716. do {
  717. retry = ftmac100_rx_packet(priv, &rx);
  718. } while (retry && rx < budget);
  719. if (retry && rx == budget)
  720. completed = false;
  721. }
  722. if (status & (FTMAC100_INT_XPKT_OK | FTMAC100_INT_XPKT_LOST)) {
  723. /*
  724. * FTMAC100_INT_XPKT_OK:
  725. * packet transmitted to ethernet successfully
  726. *
  727. * FTMAC100_INT_XPKT_LOST:
  728. * packet transmitted to ethernet lost due to late
  729. * collision or excessive collision
  730. */
  731. ftmac100_tx_complete(priv);
  732. }
  733. if (status & (FTMAC100_INT_NORXBUF | FTMAC100_INT_RPKT_LOST |
  734. FTMAC100_INT_AHB_ERR | FTMAC100_INT_PHYSTS_CHG)) {
  735. if (net_ratelimit())
  736. netdev_info(netdev, "[ISR] = 0x%x: %s%s%s%s\n", status,
  737. status & FTMAC100_INT_NORXBUF ? "NORXBUF " : "",
  738. status & FTMAC100_INT_RPKT_LOST ? "RPKT_LOST " : "",
  739. status & FTMAC100_INT_AHB_ERR ? "AHB_ERR " : "",
  740. status & FTMAC100_INT_PHYSTS_CHG ? "PHYSTS_CHG" : "");
  741. if (status & FTMAC100_INT_NORXBUF) {
  742. /* RX buffer unavailable */
  743. netdev->stats.rx_over_errors++;
  744. }
  745. if (status & FTMAC100_INT_RPKT_LOST) {
  746. /* received packet lost due to RX FIFO full */
  747. netdev->stats.rx_fifo_errors++;
  748. }
  749. if (status & FTMAC100_INT_PHYSTS_CHG) {
  750. /* PHY link status change */
  751. mii_check_link(&priv->mii);
  752. }
  753. }
  754. if (completed) {
  755. /* stop polling */
  756. napi_complete(napi);
  757. ftmac100_enable_all_int(priv);
  758. }
  759. return rx;
  760. }
  761. /******************************************************************************
  762. * struct net_device_ops functions
  763. *****************************************************************************/
  764. static int ftmac100_open(struct net_device *netdev)
  765. {
  766. struct ftmac100 *priv = netdev_priv(netdev);
  767. int err;
  768. err = ftmac100_alloc_buffers(priv);
  769. if (err) {
  770. netdev_err(netdev, "failed to allocate buffers\n");
  771. goto err_alloc;
  772. }
  773. err = request_irq(priv->irq, ftmac100_interrupt, 0, netdev->name, netdev);
  774. if (err) {
  775. netdev_err(netdev, "failed to request irq %d\n", priv->irq);
  776. goto err_irq;
  777. }
  778. priv->rx_pointer = 0;
  779. priv->tx_clean_pointer = 0;
  780. priv->tx_pointer = 0;
  781. priv->tx_pending = 0;
  782. err = ftmac100_start_hw(priv);
  783. if (err)
  784. goto err_hw;
  785. napi_enable(&priv->napi);
  786. netif_start_queue(netdev);
  787. ftmac100_enable_all_int(priv);
  788. return 0;
  789. err_hw:
  790. free_irq(priv->irq, netdev);
  791. err_irq:
  792. ftmac100_free_buffers(priv);
  793. err_alloc:
  794. return err;
  795. }
  796. static int ftmac100_stop(struct net_device *netdev)
  797. {
  798. struct ftmac100 *priv = netdev_priv(netdev);
  799. ftmac100_disable_all_int(priv);
  800. netif_stop_queue(netdev);
  801. napi_disable(&priv->napi);
  802. ftmac100_stop_hw(priv);
  803. free_irq(priv->irq, netdev);
  804. ftmac100_free_buffers(priv);
  805. return 0;
  806. }
  807. static int ftmac100_hard_start_xmit(struct sk_buff *skb, struct net_device *netdev)
  808. {
  809. struct ftmac100 *priv = netdev_priv(netdev);
  810. dma_addr_t map;
  811. if (unlikely(skb->len > MAX_PKT_SIZE)) {
  812. if (net_ratelimit())
  813. netdev_dbg(netdev, "tx packet too big\n");
  814. netdev->stats.tx_dropped++;
  815. dev_kfree_skb(skb);
  816. return NETDEV_TX_OK;
  817. }
  818. map = dma_map_single(priv->dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE);
  819. if (unlikely(dma_mapping_error(priv->dev, map))) {
  820. /* drop packet */
  821. if (net_ratelimit())
  822. netdev_err(netdev, "map socket buffer failed\n");
  823. netdev->stats.tx_dropped++;
  824. dev_kfree_skb(skb);
  825. return NETDEV_TX_OK;
  826. }
  827. return ftmac100_xmit(priv, skb, map);
  828. }
  829. /* optional */
  830. static int ftmac100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  831. {
  832. struct ftmac100 *priv = netdev_priv(netdev);
  833. struct mii_ioctl_data *data = if_mii(ifr);
  834. return generic_mii_ioctl(&priv->mii, data, cmd, NULL);
  835. }
  836. static const struct net_device_ops ftmac100_netdev_ops = {
  837. .ndo_open = ftmac100_open,
  838. .ndo_stop = ftmac100_stop,
  839. .ndo_start_xmit = ftmac100_hard_start_xmit,
  840. .ndo_set_mac_address = eth_mac_addr,
  841. .ndo_validate_addr = eth_validate_addr,
  842. .ndo_do_ioctl = ftmac100_do_ioctl,
  843. };
  844. /******************************************************************************
  845. * struct platform_driver functions
  846. *****************************************************************************/
  847. static int ftmac100_probe(struct platform_device *pdev)
  848. {
  849. struct resource *res;
  850. int irq;
  851. struct net_device *netdev;
  852. struct ftmac100 *priv;
  853. int err;
  854. if (!pdev)
  855. return -ENODEV;
  856. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  857. if (!res)
  858. return -ENXIO;
  859. irq = platform_get_irq(pdev, 0);
  860. if (irq < 0)
  861. return irq;
  862. /* setup net_device */
  863. netdev = alloc_etherdev(sizeof(*priv));
  864. if (!netdev) {
  865. err = -ENOMEM;
  866. goto err_alloc_etherdev;
  867. }
  868. SET_NETDEV_DEV(netdev, &pdev->dev);
  869. SET_ETHTOOL_OPS(netdev, &ftmac100_ethtool_ops);
  870. netdev->netdev_ops = &ftmac100_netdev_ops;
  871. platform_set_drvdata(pdev, netdev);
  872. /* setup private data */
  873. priv = netdev_priv(netdev);
  874. priv->netdev = netdev;
  875. priv->dev = &pdev->dev;
  876. spin_lock_init(&priv->tx_lock);
  877. /* initialize NAPI */
  878. netif_napi_add(netdev, &priv->napi, ftmac100_poll, 64);
  879. /* map io memory */
  880. priv->res = request_mem_region(res->start, resource_size(res),
  881. dev_name(&pdev->dev));
  882. if (!priv->res) {
  883. dev_err(&pdev->dev, "Could not reserve memory region\n");
  884. err = -ENOMEM;
  885. goto err_req_mem;
  886. }
  887. priv->base = ioremap(res->start, resource_size(res));
  888. if (!priv->base) {
  889. dev_err(&pdev->dev, "Failed to ioremap ethernet registers\n");
  890. err = -EIO;
  891. goto err_ioremap;
  892. }
  893. priv->irq = irq;
  894. /* initialize struct mii_if_info */
  895. priv->mii.phy_id = 0;
  896. priv->mii.phy_id_mask = 0x1f;
  897. priv->mii.reg_num_mask = 0x1f;
  898. priv->mii.dev = netdev;
  899. priv->mii.mdio_read = ftmac100_mdio_read;
  900. priv->mii.mdio_write = ftmac100_mdio_write;
  901. /* register network device */
  902. err = register_netdev(netdev);
  903. if (err) {
  904. dev_err(&pdev->dev, "Failed to register netdev\n");
  905. goto err_register_netdev;
  906. }
  907. netdev_info(netdev, "irq %d, mapped at %p\n", priv->irq, priv->base);
  908. if (!is_valid_ether_addr(netdev->dev_addr)) {
  909. random_ether_addr(netdev->dev_addr);
  910. netdev_info(netdev, "generated random MAC address %pM\n",
  911. netdev->dev_addr);
  912. }
  913. return 0;
  914. err_register_netdev:
  915. iounmap(priv->base);
  916. err_ioremap:
  917. release_resource(priv->res);
  918. err_req_mem:
  919. netif_napi_del(&priv->napi);
  920. platform_set_drvdata(pdev, NULL);
  921. free_netdev(netdev);
  922. err_alloc_etherdev:
  923. return err;
  924. }
  925. static int __exit ftmac100_remove(struct platform_device *pdev)
  926. {
  927. struct net_device *netdev;
  928. struct ftmac100 *priv;
  929. netdev = platform_get_drvdata(pdev);
  930. priv = netdev_priv(netdev);
  931. unregister_netdev(netdev);
  932. iounmap(priv->base);
  933. release_resource(priv->res);
  934. netif_napi_del(&priv->napi);
  935. platform_set_drvdata(pdev, NULL);
  936. free_netdev(netdev);
  937. return 0;
  938. }
  939. static struct platform_driver ftmac100_driver = {
  940. .probe = ftmac100_probe,
  941. .remove = __exit_p(ftmac100_remove),
  942. .driver = {
  943. .name = DRV_NAME,
  944. .owner = THIS_MODULE,
  945. },
  946. };
  947. /******************************************************************************
  948. * initialization / finalization
  949. *****************************************************************************/
  950. static int __init ftmac100_init(void)
  951. {
  952. pr_info("Loading version " DRV_VERSION " ...\n");
  953. return platform_driver_register(&ftmac100_driver);
  954. }
  955. static void __exit ftmac100_exit(void)
  956. {
  957. platform_driver_unregister(&ftmac100_driver);
  958. }
  959. module_init(ftmac100_init);
  960. module_exit(ftmac100_exit);
  961. MODULE_AUTHOR("Po-Yu Chuang <ratbert@faraday-tech.com>");
  962. MODULE_DESCRIPTION("FTMAC100 driver");
  963. MODULE_LICENSE("GPL");