vnic_dev.c 22 KB

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  1. /*
  2. * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
  3. * Copyright 2007 Nuova Systems, Inc. All rights reserved.
  4. *
  5. * This program is free software; you may redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  10. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  11. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  12. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  13. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  14. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  15. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  16. * SOFTWARE.
  17. *
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/errno.h>
  21. #include <linux/types.h>
  22. #include <linux/pci.h>
  23. #include <linux/delay.h>
  24. #include <linux/if_ether.h>
  25. #include "vnic_resource.h"
  26. #include "vnic_devcmd.h"
  27. #include "vnic_dev.h"
  28. #include "vnic_stats.h"
  29. enum vnic_proxy_type {
  30. PROXY_NONE,
  31. PROXY_BY_BDF,
  32. PROXY_BY_INDEX,
  33. };
  34. struct vnic_res {
  35. void __iomem *vaddr;
  36. dma_addr_t bus_addr;
  37. unsigned int count;
  38. };
  39. struct vnic_intr_coal_timer_info {
  40. u32 mul;
  41. u32 div;
  42. u32 max_usec;
  43. };
  44. struct vnic_dev {
  45. void *priv;
  46. struct pci_dev *pdev;
  47. struct vnic_res res[RES_TYPE_MAX];
  48. enum vnic_dev_intr_mode intr_mode;
  49. struct vnic_devcmd __iomem *devcmd;
  50. struct vnic_devcmd_notify *notify;
  51. struct vnic_devcmd_notify notify_copy;
  52. dma_addr_t notify_pa;
  53. u32 notify_sz;
  54. dma_addr_t linkstatus_pa;
  55. struct vnic_stats *stats;
  56. dma_addr_t stats_pa;
  57. struct vnic_devcmd_fw_info *fw_info;
  58. dma_addr_t fw_info_pa;
  59. enum vnic_proxy_type proxy;
  60. u32 proxy_index;
  61. u64 args[VNIC_DEVCMD_NARGS];
  62. struct vnic_intr_coal_timer_info intr_coal_timer_info;
  63. };
  64. #define VNIC_MAX_RES_HDR_SIZE \
  65. (sizeof(struct vnic_resource_header) + \
  66. sizeof(struct vnic_resource) * RES_TYPE_MAX)
  67. #define VNIC_RES_STRIDE 128
  68. void *vnic_dev_priv(struct vnic_dev *vdev)
  69. {
  70. return vdev->priv;
  71. }
  72. static int vnic_dev_discover_res(struct vnic_dev *vdev,
  73. struct vnic_dev_bar *bar, unsigned int num_bars)
  74. {
  75. struct vnic_resource_header __iomem *rh;
  76. struct mgmt_barmap_hdr __iomem *mrh;
  77. struct vnic_resource __iomem *r;
  78. u8 type;
  79. if (num_bars == 0)
  80. return -EINVAL;
  81. if (bar->len < VNIC_MAX_RES_HDR_SIZE) {
  82. pr_err("vNIC BAR0 res hdr length error\n");
  83. return -EINVAL;
  84. }
  85. rh = bar->vaddr;
  86. mrh = bar->vaddr;
  87. if (!rh) {
  88. pr_err("vNIC BAR0 res hdr not mem-mapped\n");
  89. return -EINVAL;
  90. }
  91. /* Check for mgmt vnic in addition to normal vnic */
  92. if ((ioread32(&rh->magic) != VNIC_RES_MAGIC) ||
  93. (ioread32(&rh->version) != VNIC_RES_VERSION)) {
  94. if ((ioread32(&mrh->magic) != MGMTVNIC_MAGIC) ||
  95. (ioread32(&mrh->version) != MGMTVNIC_VERSION)) {
  96. pr_err("vNIC BAR0 res magic/version error "
  97. "exp (%lx/%lx) or (%lx/%lx), curr (%x/%x)\n",
  98. VNIC_RES_MAGIC, VNIC_RES_VERSION,
  99. MGMTVNIC_MAGIC, MGMTVNIC_VERSION,
  100. ioread32(&rh->magic), ioread32(&rh->version));
  101. return -EINVAL;
  102. }
  103. }
  104. if (ioread32(&mrh->magic) == MGMTVNIC_MAGIC)
  105. r = (struct vnic_resource __iomem *)(mrh + 1);
  106. else
  107. r = (struct vnic_resource __iomem *)(rh + 1);
  108. while ((type = ioread8(&r->type)) != RES_TYPE_EOL) {
  109. u8 bar_num = ioread8(&r->bar);
  110. u32 bar_offset = ioread32(&r->bar_offset);
  111. u32 count = ioread32(&r->count);
  112. u32 len;
  113. r++;
  114. if (bar_num >= num_bars)
  115. continue;
  116. if (!bar[bar_num].len || !bar[bar_num].vaddr)
  117. continue;
  118. switch (type) {
  119. case RES_TYPE_WQ:
  120. case RES_TYPE_RQ:
  121. case RES_TYPE_CQ:
  122. case RES_TYPE_INTR_CTRL:
  123. /* each count is stride bytes long */
  124. len = count * VNIC_RES_STRIDE;
  125. if (len + bar_offset > bar[bar_num].len) {
  126. pr_err("vNIC BAR0 resource %d "
  127. "out-of-bounds, offset 0x%x + "
  128. "size 0x%x > bar len 0x%lx\n",
  129. type, bar_offset,
  130. len,
  131. bar[bar_num].len);
  132. return -EINVAL;
  133. }
  134. break;
  135. case RES_TYPE_INTR_PBA_LEGACY:
  136. case RES_TYPE_DEVCMD:
  137. len = count;
  138. break;
  139. default:
  140. continue;
  141. }
  142. vdev->res[type].count = count;
  143. vdev->res[type].vaddr = (char __iomem *)bar[bar_num].vaddr +
  144. bar_offset;
  145. vdev->res[type].bus_addr = bar[bar_num].bus_addr + bar_offset;
  146. }
  147. return 0;
  148. }
  149. unsigned int vnic_dev_get_res_count(struct vnic_dev *vdev,
  150. enum vnic_res_type type)
  151. {
  152. return vdev->res[type].count;
  153. }
  154. void __iomem *vnic_dev_get_res(struct vnic_dev *vdev, enum vnic_res_type type,
  155. unsigned int index)
  156. {
  157. if (!vdev->res[type].vaddr)
  158. return NULL;
  159. switch (type) {
  160. case RES_TYPE_WQ:
  161. case RES_TYPE_RQ:
  162. case RES_TYPE_CQ:
  163. case RES_TYPE_INTR_CTRL:
  164. return (char __iomem *)vdev->res[type].vaddr +
  165. index * VNIC_RES_STRIDE;
  166. default:
  167. return (char __iomem *)vdev->res[type].vaddr;
  168. }
  169. }
  170. static unsigned int vnic_dev_desc_ring_size(struct vnic_dev_ring *ring,
  171. unsigned int desc_count, unsigned int desc_size)
  172. {
  173. /* The base address of the desc rings must be 512 byte aligned.
  174. * Descriptor count is aligned to groups of 32 descriptors. A
  175. * count of 0 means the maximum 4096 descriptors. Descriptor
  176. * size is aligned to 16 bytes.
  177. */
  178. unsigned int count_align = 32;
  179. unsigned int desc_align = 16;
  180. ring->base_align = 512;
  181. if (desc_count == 0)
  182. desc_count = 4096;
  183. ring->desc_count = ALIGN(desc_count, count_align);
  184. ring->desc_size = ALIGN(desc_size, desc_align);
  185. ring->size = ring->desc_count * ring->desc_size;
  186. ring->size_unaligned = ring->size + ring->base_align;
  187. return ring->size_unaligned;
  188. }
  189. void vnic_dev_clear_desc_ring(struct vnic_dev_ring *ring)
  190. {
  191. memset(ring->descs, 0, ring->size);
  192. }
  193. int vnic_dev_alloc_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring,
  194. unsigned int desc_count, unsigned int desc_size)
  195. {
  196. vnic_dev_desc_ring_size(ring, desc_count, desc_size);
  197. ring->descs_unaligned = pci_alloc_consistent(vdev->pdev,
  198. ring->size_unaligned,
  199. &ring->base_addr_unaligned);
  200. if (!ring->descs_unaligned) {
  201. pr_err("Failed to allocate ring (size=%d), aborting\n",
  202. (int)ring->size);
  203. return -ENOMEM;
  204. }
  205. ring->base_addr = ALIGN(ring->base_addr_unaligned,
  206. ring->base_align);
  207. ring->descs = (u8 *)ring->descs_unaligned +
  208. (ring->base_addr - ring->base_addr_unaligned);
  209. vnic_dev_clear_desc_ring(ring);
  210. ring->desc_avail = ring->desc_count - 1;
  211. return 0;
  212. }
  213. void vnic_dev_free_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring)
  214. {
  215. if (ring->descs) {
  216. pci_free_consistent(vdev->pdev,
  217. ring->size_unaligned,
  218. ring->descs_unaligned,
  219. ring->base_addr_unaligned);
  220. ring->descs = NULL;
  221. }
  222. }
  223. static int _vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
  224. int wait)
  225. {
  226. struct vnic_devcmd __iomem *devcmd = vdev->devcmd;
  227. unsigned int i;
  228. int delay;
  229. u32 status;
  230. int err;
  231. status = ioread32(&devcmd->status);
  232. if (status == 0xFFFFFFFF) {
  233. /* PCI-e target device is gone */
  234. return -ENODEV;
  235. }
  236. if (status & STAT_BUSY) {
  237. pr_err("Busy devcmd %d\n", _CMD_N(cmd));
  238. return -EBUSY;
  239. }
  240. if (_CMD_DIR(cmd) & _CMD_DIR_WRITE) {
  241. for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
  242. writeq(vdev->args[i], &devcmd->args[i]);
  243. wmb();
  244. }
  245. iowrite32(cmd, &devcmd->cmd);
  246. if ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))
  247. return 0;
  248. for (delay = 0; delay < wait; delay++) {
  249. udelay(100);
  250. status = ioread32(&devcmd->status);
  251. if (status == 0xFFFFFFFF) {
  252. /* PCI-e target device is gone */
  253. return -ENODEV;
  254. }
  255. if (!(status & STAT_BUSY)) {
  256. if (status & STAT_ERROR) {
  257. err = (int)readq(&devcmd->args[0]);
  258. if (err != ERR_ECMDUNKNOWN ||
  259. cmd != CMD_CAPABILITY)
  260. pr_err("Error %d devcmd %d\n",
  261. err, _CMD_N(cmd));
  262. return err;
  263. }
  264. if (_CMD_DIR(cmd) & _CMD_DIR_READ) {
  265. rmb();
  266. for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
  267. vdev->args[i] = readq(&devcmd->args[i]);
  268. }
  269. return 0;
  270. }
  271. }
  272. pr_err("Timedout devcmd %d\n", _CMD_N(cmd));
  273. return -ETIMEDOUT;
  274. }
  275. static int vnic_dev_cmd_proxy(struct vnic_dev *vdev,
  276. enum vnic_devcmd_cmd proxy_cmd, enum vnic_devcmd_cmd cmd,
  277. u64 *a0, u64 *a1, int wait)
  278. {
  279. u32 status;
  280. int err;
  281. memset(vdev->args, 0, sizeof(vdev->args));
  282. vdev->args[0] = vdev->proxy_index;
  283. vdev->args[1] = cmd;
  284. vdev->args[2] = *a0;
  285. vdev->args[3] = *a1;
  286. err = _vnic_dev_cmd(vdev, proxy_cmd, wait);
  287. if (err)
  288. return err;
  289. status = (u32)vdev->args[0];
  290. if (status & STAT_ERROR) {
  291. err = (int)vdev->args[1];
  292. if (err != ERR_ECMDUNKNOWN ||
  293. cmd != CMD_CAPABILITY)
  294. pr_err("Error %d proxy devcmd %d\n", err, _CMD_N(cmd));
  295. return err;
  296. }
  297. *a0 = vdev->args[1];
  298. *a1 = vdev->args[2];
  299. return 0;
  300. }
  301. static int vnic_dev_cmd_no_proxy(struct vnic_dev *vdev,
  302. enum vnic_devcmd_cmd cmd, u64 *a0, u64 *a1, int wait)
  303. {
  304. int err;
  305. vdev->args[0] = *a0;
  306. vdev->args[1] = *a1;
  307. err = _vnic_dev_cmd(vdev, cmd, wait);
  308. *a0 = vdev->args[0];
  309. *a1 = vdev->args[1];
  310. return err;
  311. }
  312. void vnic_dev_cmd_proxy_by_index_start(struct vnic_dev *vdev, u16 index)
  313. {
  314. vdev->proxy = PROXY_BY_INDEX;
  315. vdev->proxy_index = index;
  316. }
  317. void vnic_dev_cmd_proxy_end(struct vnic_dev *vdev)
  318. {
  319. vdev->proxy = PROXY_NONE;
  320. vdev->proxy_index = 0;
  321. }
  322. int vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
  323. u64 *a0, u64 *a1, int wait)
  324. {
  325. memset(vdev->args, 0, sizeof(vdev->args));
  326. switch (vdev->proxy) {
  327. case PROXY_BY_INDEX:
  328. return vnic_dev_cmd_proxy(vdev, CMD_PROXY_BY_INDEX, cmd,
  329. a0, a1, wait);
  330. case PROXY_BY_BDF:
  331. return vnic_dev_cmd_proxy(vdev, CMD_PROXY_BY_BDF, cmd,
  332. a0, a1, wait);
  333. case PROXY_NONE:
  334. default:
  335. return vnic_dev_cmd_no_proxy(vdev, cmd, a0, a1, wait);
  336. }
  337. }
  338. static int vnic_dev_capable(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd)
  339. {
  340. u64 a0 = (u32)cmd, a1 = 0;
  341. int wait = 1000;
  342. int err;
  343. err = vnic_dev_cmd(vdev, CMD_CAPABILITY, &a0, &a1, wait);
  344. return !(err || a0);
  345. }
  346. int vnic_dev_fw_info(struct vnic_dev *vdev,
  347. struct vnic_devcmd_fw_info **fw_info)
  348. {
  349. u64 a0, a1 = 0;
  350. int wait = 1000;
  351. int err = 0;
  352. if (!vdev->fw_info) {
  353. vdev->fw_info = pci_alloc_consistent(vdev->pdev,
  354. sizeof(struct vnic_devcmd_fw_info),
  355. &vdev->fw_info_pa);
  356. if (!vdev->fw_info)
  357. return -ENOMEM;
  358. memset(vdev->fw_info, 0, sizeof(struct vnic_devcmd_fw_info));
  359. a0 = vdev->fw_info_pa;
  360. a1 = sizeof(struct vnic_devcmd_fw_info);
  361. /* only get fw_info once and cache it */
  362. err = vnic_dev_cmd(vdev, CMD_MCPU_FW_INFO, &a0, &a1, wait);
  363. if (err == ERR_ECMDUNKNOWN) {
  364. err = vnic_dev_cmd(vdev, CMD_MCPU_FW_INFO_OLD,
  365. &a0, &a1, wait);
  366. }
  367. }
  368. *fw_info = vdev->fw_info;
  369. return err;
  370. }
  371. int vnic_dev_spec(struct vnic_dev *vdev, unsigned int offset, unsigned int size,
  372. void *value)
  373. {
  374. u64 a0, a1;
  375. int wait = 1000;
  376. int err;
  377. a0 = offset;
  378. a1 = size;
  379. err = vnic_dev_cmd(vdev, CMD_DEV_SPEC, &a0, &a1, wait);
  380. switch (size) {
  381. case 1: *(u8 *)value = (u8)a0; break;
  382. case 2: *(u16 *)value = (u16)a0; break;
  383. case 4: *(u32 *)value = (u32)a0; break;
  384. case 8: *(u64 *)value = a0; break;
  385. default: BUG(); break;
  386. }
  387. return err;
  388. }
  389. int vnic_dev_stats_dump(struct vnic_dev *vdev, struct vnic_stats **stats)
  390. {
  391. u64 a0, a1;
  392. int wait = 1000;
  393. if (!vdev->stats) {
  394. vdev->stats = pci_alloc_consistent(vdev->pdev,
  395. sizeof(struct vnic_stats), &vdev->stats_pa);
  396. if (!vdev->stats)
  397. return -ENOMEM;
  398. }
  399. *stats = vdev->stats;
  400. a0 = vdev->stats_pa;
  401. a1 = sizeof(struct vnic_stats);
  402. return vnic_dev_cmd(vdev, CMD_STATS_DUMP, &a0, &a1, wait);
  403. }
  404. int vnic_dev_close(struct vnic_dev *vdev)
  405. {
  406. u64 a0 = 0, a1 = 0;
  407. int wait = 1000;
  408. return vnic_dev_cmd(vdev, CMD_CLOSE, &a0, &a1, wait);
  409. }
  410. int vnic_dev_enable_wait(struct vnic_dev *vdev)
  411. {
  412. u64 a0 = 0, a1 = 0;
  413. int wait = 1000;
  414. int err;
  415. err = vnic_dev_cmd(vdev, CMD_ENABLE_WAIT, &a0, &a1, wait);
  416. if (err == ERR_ECMDUNKNOWN)
  417. return vnic_dev_cmd(vdev, CMD_ENABLE, &a0, &a1, wait);
  418. return err;
  419. }
  420. int vnic_dev_disable(struct vnic_dev *vdev)
  421. {
  422. u64 a0 = 0, a1 = 0;
  423. int wait = 1000;
  424. return vnic_dev_cmd(vdev, CMD_DISABLE, &a0, &a1, wait);
  425. }
  426. int vnic_dev_open(struct vnic_dev *vdev, int arg)
  427. {
  428. u64 a0 = (u32)arg, a1 = 0;
  429. int wait = 1000;
  430. return vnic_dev_cmd(vdev, CMD_OPEN, &a0, &a1, wait);
  431. }
  432. int vnic_dev_open_done(struct vnic_dev *vdev, int *done)
  433. {
  434. u64 a0 = 0, a1 = 0;
  435. int wait = 1000;
  436. int err;
  437. *done = 0;
  438. err = vnic_dev_cmd(vdev, CMD_OPEN_STATUS, &a0, &a1, wait);
  439. if (err)
  440. return err;
  441. *done = (a0 == 0);
  442. return 0;
  443. }
  444. static int vnic_dev_soft_reset(struct vnic_dev *vdev, int arg)
  445. {
  446. u64 a0 = (u32)arg, a1 = 0;
  447. int wait = 1000;
  448. return vnic_dev_cmd(vdev, CMD_SOFT_RESET, &a0, &a1, wait);
  449. }
  450. static int vnic_dev_soft_reset_done(struct vnic_dev *vdev, int *done)
  451. {
  452. u64 a0 = 0, a1 = 0;
  453. int wait = 1000;
  454. int err;
  455. *done = 0;
  456. err = vnic_dev_cmd(vdev, CMD_SOFT_RESET_STATUS, &a0, &a1, wait);
  457. if (err)
  458. return err;
  459. *done = (a0 == 0);
  460. return 0;
  461. }
  462. int vnic_dev_hang_reset(struct vnic_dev *vdev, int arg)
  463. {
  464. u64 a0 = (u32)arg, a1 = 0;
  465. int wait = 1000;
  466. int err;
  467. err = vnic_dev_cmd(vdev, CMD_HANG_RESET, &a0, &a1, wait);
  468. if (err == ERR_ECMDUNKNOWN) {
  469. err = vnic_dev_soft_reset(vdev, arg);
  470. if (err)
  471. return err;
  472. return vnic_dev_init(vdev, 0);
  473. }
  474. return err;
  475. }
  476. int vnic_dev_hang_reset_done(struct vnic_dev *vdev, int *done)
  477. {
  478. u64 a0 = 0, a1 = 0;
  479. int wait = 1000;
  480. int err;
  481. *done = 0;
  482. err = vnic_dev_cmd(vdev, CMD_HANG_RESET_STATUS, &a0, &a1, wait);
  483. if (err) {
  484. if (err == ERR_ECMDUNKNOWN)
  485. return vnic_dev_soft_reset_done(vdev, done);
  486. return err;
  487. }
  488. *done = (a0 == 0);
  489. return 0;
  490. }
  491. int vnic_dev_hang_notify(struct vnic_dev *vdev)
  492. {
  493. u64 a0, a1;
  494. int wait = 1000;
  495. return vnic_dev_cmd(vdev, CMD_HANG_NOTIFY, &a0, &a1, wait);
  496. }
  497. int vnic_dev_mac_addr(struct vnic_dev *vdev, u8 *mac_addr)
  498. {
  499. u64 a0, a1;
  500. int wait = 1000;
  501. int err, i;
  502. for (i = 0; i < ETH_ALEN; i++)
  503. mac_addr[i] = 0;
  504. err = vnic_dev_cmd(vdev, CMD_MAC_ADDR, &a0, &a1, wait);
  505. if (err)
  506. return err;
  507. for (i = 0; i < ETH_ALEN; i++)
  508. mac_addr[i] = ((u8 *)&a0)[i];
  509. return 0;
  510. }
  511. int vnic_dev_packet_filter(struct vnic_dev *vdev, int directed, int multicast,
  512. int broadcast, int promisc, int allmulti)
  513. {
  514. u64 a0, a1 = 0;
  515. int wait = 1000;
  516. int err;
  517. a0 = (directed ? CMD_PFILTER_DIRECTED : 0) |
  518. (multicast ? CMD_PFILTER_MULTICAST : 0) |
  519. (broadcast ? CMD_PFILTER_BROADCAST : 0) |
  520. (promisc ? CMD_PFILTER_PROMISCUOUS : 0) |
  521. (allmulti ? CMD_PFILTER_ALL_MULTICAST : 0);
  522. err = vnic_dev_cmd(vdev, CMD_PACKET_FILTER, &a0, &a1, wait);
  523. if (err)
  524. pr_err("Can't set packet filter\n");
  525. return err;
  526. }
  527. int vnic_dev_add_addr(struct vnic_dev *vdev, u8 *addr)
  528. {
  529. u64 a0 = 0, a1 = 0;
  530. int wait = 1000;
  531. int err;
  532. int i;
  533. for (i = 0; i < ETH_ALEN; i++)
  534. ((u8 *)&a0)[i] = addr[i];
  535. err = vnic_dev_cmd(vdev, CMD_ADDR_ADD, &a0, &a1, wait);
  536. if (err)
  537. pr_err("Can't add addr [%pM], %d\n", addr, err);
  538. return err;
  539. }
  540. int vnic_dev_del_addr(struct vnic_dev *vdev, u8 *addr)
  541. {
  542. u64 a0 = 0, a1 = 0;
  543. int wait = 1000;
  544. int err;
  545. int i;
  546. for (i = 0; i < ETH_ALEN; i++)
  547. ((u8 *)&a0)[i] = addr[i];
  548. err = vnic_dev_cmd(vdev, CMD_ADDR_DEL, &a0, &a1, wait);
  549. if (err)
  550. pr_err("Can't del addr [%pM], %d\n", addr, err);
  551. return err;
  552. }
  553. int vnic_dev_set_ig_vlan_rewrite_mode(struct vnic_dev *vdev,
  554. u8 ig_vlan_rewrite_mode)
  555. {
  556. u64 a0 = ig_vlan_rewrite_mode, a1 = 0;
  557. int wait = 1000;
  558. int err;
  559. err = vnic_dev_cmd(vdev, CMD_IG_VLAN_REWRITE_MODE, &a0, &a1, wait);
  560. if (err == ERR_ECMDUNKNOWN)
  561. return 0;
  562. return err;
  563. }
  564. static int vnic_dev_notify_setcmd(struct vnic_dev *vdev,
  565. void *notify_addr, dma_addr_t notify_pa, u16 intr)
  566. {
  567. u64 a0, a1;
  568. int wait = 1000;
  569. int r;
  570. memset(notify_addr, 0, sizeof(struct vnic_devcmd_notify));
  571. vdev->notify = notify_addr;
  572. vdev->notify_pa = notify_pa;
  573. a0 = (u64)notify_pa;
  574. a1 = ((u64)intr << 32) & 0x0000ffff00000000ULL;
  575. a1 += sizeof(struct vnic_devcmd_notify);
  576. r = vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
  577. vdev->notify_sz = (r == 0) ? (u32)a1 : 0;
  578. return r;
  579. }
  580. int vnic_dev_notify_set(struct vnic_dev *vdev, u16 intr)
  581. {
  582. void *notify_addr;
  583. dma_addr_t notify_pa;
  584. if (vdev->notify || vdev->notify_pa) {
  585. pr_err("notify block %p still allocated", vdev->notify);
  586. return -EINVAL;
  587. }
  588. notify_addr = pci_alloc_consistent(vdev->pdev,
  589. sizeof(struct vnic_devcmd_notify),
  590. &notify_pa);
  591. if (!notify_addr)
  592. return -ENOMEM;
  593. return vnic_dev_notify_setcmd(vdev, notify_addr, notify_pa, intr);
  594. }
  595. static int vnic_dev_notify_unsetcmd(struct vnic_dev *vdev)
  596. {
  597. u64 a0, a1;
  598. int wait = 1000;
  599. int err;
  600. a0 = 0; /* paddr = 0 to unset notify buffer */
  601. a1 = 0x0000ffff00000000ULL; /* intr num = -1 to unreg for intr */
  602. a1 += sizeof(struct vnic_devcmd_notify);
  603. err = vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
  604. vdev->notify = NULL;
  605. vdev->notify_pa = 0;
  606. vdev->notify_sz = 0;
  607. return err;
  608. }
  609. int vnic_dev_notify_unset(struct vnic_dev *vdev)
  610. {
  611. if (vdev->notify) {
  612. pci_free_consistent(vdev->pdev,
  613. sizeof(struct vnic_devcmd_notify),
  614. vdev->notify,
  615. vdev->notify_pa);
  616. }
  617. return vnic_dev_notify_unsetcmd(vdev);
  618. }
  619. static int vnic_dev_notify_ready(struct vnic_dev *vdev)
  620. {
  621. u32 *words;
  622. unsigned int nwords = vdev->notify_sz / 4;
  623. unsigned int i;
  624. u32 csum;
  625. if (!vdev->notify || !vdev->notify_sz)
  626. return 0;
  627. do {
  628. csum = 0;
  629. memcpy(&vdev->notify_copy, vdev->notify, vdev->notify_sz);
  630. words = (u32 *)&vdev->notify_copy;
  631. for (i = 1; i < nwords; i++)
  632. csum += words[i];
  633. } while (csum != words[0]);
  634. return 1;
  635. }
  636. int vnic_dev_init(struct vnic_dev *vdev, int arg)
  637. {
  638. u64 a0 = (u32)arg, a1 = 0;
  639. int wait = 1000;
  640. int r = 0;
  641. if (vnic_dev_capable(vdev, CMD_INIT))
  642. r = vnic_dev_cmd(vdev, CMD_INIT, &a0, &a1, wait);
  643. else {
  644. vnic_dev_cmd(vdev, CMD_INIT_v1, &a0, &a1, wait);
  645. if (a0 & CMD_INITF_DEFAULT_MAC) {
  646. /* Emulate these for old CMD_INIT_v1 which
  647. * didn't pass a0 so no CMD_INITF_*.
  648. */
  649. vnic_dev_cmd(vdev, CMD_MAC_ADDR, &a0, &a1, wait);
  650. vnic_dev_cmd(vdev, CMD_ADDR_ADD, &a0, &a1, wait);
  651. }
  652. }
  653. return r;
  654. }
  655. int vnic_dev_deinit(struct vnic_dev *vdev)
  656. {
  657. u64 a0 = 0, a1 = 0;
  658. int wait = 1000;
  659. return vnic_dev_cmd(vdev, CMD_DEINIT, &a0, &a1, wait);
  660. }
  661. void vnic_dev_intr_coal_timer_info_default(struct vnic_dev *vdev)
  662. {
  663. /* Default: hardware intr coal timer is in units of 1.5 usecs */
  664. vdev->intr_coal_timer_info.mul = 2;
  665. vdev->intr_coal_timer_info.div = 3;
  666. vdev->intr_coal_timer_info.max_usec =
  667. vnic_dev_intr_coal_timer_hw_to_usec(vdev, 0xffff);
  668. }
  669. int vnic_dev_intr_coal_timer_info(struct vnic_dev *vdev)
  670. {
  671. int wait = 1000;
  672. int err;
  673. memset(vdev->args, 0, sizeof(vdev->args));
  674. err = _vnic_dev_cmd(vdev, CMD_INTR_COAL_CONVERT, wait);
  675. /* Use defaults when firmware doesn't support the devcmd at all or
  676. * supports it for only specific hardware
  677. */
  678. if ((err == ERR_ECMDUNKNOWN) ||
  679. (!err && !(vdev->args[0] && vdev->args[1] && vdev->args[2]))) {
  680. pr_warning("Using default conversion factor for "
  681. "interrupt coalesce timer\n");
  682. vnic_dev_intr_coal_timer_info_default(vdev);
  683. return 0;
  684. }
  685. vdev->intr_coal_timer_info.mul = (u32) vdev->args[0];
  686. vdev->intr_coal_timer_info.div = (u32) vdev->args[1];
  687. vdev->intr_coal_timer_info.max_usec = (u32) vdev->args[2];
  688. return err;
  689. }
  690. int vnic_dev_link_status(struct vnic_dev *vdev)
  691. {
  692. if (!vnic_dev_notify_ready(vdev))
  693. return 0;
  694. return vdev->notify_copy.link_state;
  695. }
  696. u32 vnic_dev_port_speed(struct vnic_dev *vdev)
  697. {
  698. if (!vnic_dev_notify_ready(vdev))
  699. return 0;
  700. return vdev->notify_copy.port_speed;
  701. }
  702. u32 vnic_dev_msg_lvl(struct vnic_dev *vdev)
  703. {
  704. if (!vnic_dev_notify_ready(vdev))
  705. return 0;
  706. return vdev->notify_copy.msglvl;
  707. }
  708. u32 vnic_dev_mtu(struct vnic_dev *vdev)
  709. {
  710. if (!vnic_dev_notify_ready(vdev))
  711. return 0;
  712. return vdev->notify_copy.mtu;
  713. }
  714. void vnic_dev_set_intr_mode(struct vnic_dev *vdev,
  715. enum vnic_dev_intr_mode intr_mode)
  716. {
  717. vdev->intr_mode = intr_mode;
  718. }
  719. enum vnic_dev_intr_mode vnic_dev_get_intr_mode(
  720. struct vnic_dev *vdev)
  721. {
  722. return vdev->intr_mode;
  723. }
  724. u32 vnic_dev_intr_coal_timer_usec_to_hw(struct vnic_dev *vdev, u32 usec)
  725. {
  726. return (usec * vdev->intr_coal_timer_info.mul) /
  727. vdev->intr_coal_timer_info.div;
  728. }
  729. u32 vnic_dev_intr_coal_timer_hw_to_usec(struct vnic_dev *vdev, u32 hw_cycles)
  730. {
  731. return (hw_cycles * vdev->intr_coal_timer_info.div) /
  732. vdev->intr_coal_timer_info.mul;
  733. }
  734. u32 vnic_dev_get_intr_coal_timer_max(struct vnic_dev *vdev)
  735. {
  736. return vdev->intr_coal_timer_info.max_usec;
  737. }
  738. void vnic_dev_unregister(struct vnic_dev *vdev)
  739. {
  740. if (vdev) {
  741. if (vdev->notify)
  742. pci_free_consistent(vdev->pdev,
  743. sizeof(struct vnic_devcmd_notify),
  744. vdev->notify,
  745. vdev->notify_pa);
  746. if (vdev->stats)
  747. pci_free_consistent(vdev->pdev,
  748. sizeof(struct vnic_stats),
  749. vdev->stats, vdev->stats_pa);
  750. if (vdev->fw_info)
  751. pci_free_consistent(vdev->pdev,
  752. sizeof(struct vnic_devcmd_fw_info),
  753. vdev->fw_info, vdev->fw_info_pa);
  754. kfree(vdev);
  755. }
  756. }
  757. struct vnic_dev *vnic_dev_register(struct vnic_dev *vdev,
  758. void *priv, struct pci_dev *pdev, struct vnic_dev_bar *bar,
  759. unsigned int num_bars)
  760. {
  761. if (!vdev) {
  762. vdev = kzalloc(sizeof(struct vnic_dev), GFP_ATOMIC);
  763. if (!vdev)
  764. return NULL;
  765. }
  766. vdev->priv = priv;
  767. vdev->pdev = pdev;
  768. if (vnic_dev_discover_res(vdev, bar, num_bars))
  769. goto err_out;
  770. vdev->devcmd = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD, 0);
  771. if (!vdev->devcmd)
  772. goto err_out;
  773. return vdev;
  774. err_out:
  775. vnic_dev_unregister(vdev);
  776. return NULL;
  777. }
  778. int vnic_dev_init_prov2(struct vnic_dev *vdev, u8 *buf, u32 len)
  779. {
  780. u64 a0, a1 = len;
  781. int wait = 1000;
  782. dma_addr_t prov_pa;
  783. void *prov_buf;
  784. int ret;
  785. prov_buf = pci_alloc_consistent(vdev->pdev, len, &prov_pa);
  786. if (!prov_buf)
  787. return -ENOMEM;
  788. memcpy(prov_buf, buf, len);
  789. a0 = prov_pa;
  790. ret = vnic_dev_cmd(vdev, CMD_INIT_PROV_INFO2, &a0, &a1, wait);
  791. pci_free_consistent(vdev->pdev, len, prov_buf, prov_pa);
  792. return ret;
  793. }
  794. int vnic_dev_enable2(struct vnic_dev *vdev, int active)
  795. {
  796. u64 a0, a1 = 0;
  797. int wait = 1000;
  798. a0 = (active ? CMD_ENABLE2_ACTIVE : 0);
  799. return vnic_dev_cmd(vdev, CMD_ENABLE2, &a0, &a1, wait);
  800. }
  801. static int vnic_dev_cmd_status(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
  802. int *status)
  803. {
  804. u64 a0 = cmd, a1 = 0;
  805. int wait = 1000;
  806. int ret;
  807. ret = vnic_dev_cmd(vdev, CMD_STATUS, &a0, &a1, wait);
  808. if (!ret)
  809. *status = (int)a0;
  810. return ret;
  811. }
  812. int vnic_dev_enable2_done(struct vnic_dev *vdev, int *status)
  813. {
  814. return vnic_dev_cmd_status(vdev, CMD_ENABLE2, status);
  815. }
  816. int vnic_dev_deinit_done(struct vnic_dev *vdev, int *status)
  817. {
  818. return vnic_dev_cmd_status(vdev, CMD_DEINIT, status);
  819. }