tegra-kbc.c 20 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821
  1. /*
  2. * Keyboard class input driver for the NVIDIA Tegra SoC internal matrix
  3. * keyboard controller
  4. *
  5. * Copyright (c) 2009-2011, NVIDIA Corporation.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along
  18. * with this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/module.h>
  23. #include <linux/input.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/delay.h>
  26. #include <linux/io.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/clk.h>
  29. #include <linux/slab.h>
  30. #include <mach/clk.h>
  31. #include <mach/kbc.h>
  32. #define KBC_MAX_DEBOUNCE_CNT 0x3ffu
  33. /* KBC row scan time and delay for beginning the row scan. */
  34. #define KBC_ROW_SCAN_TIME 16
  35. #define KBC_ROW_SCAN_DLY 5
  36. /* KBC uses a 32KHz clock so a cycle = 1/32Khz */
  37. #define KBC_CYCLE_MS 32
  38. /* KBC Registers */
  39. /* KBC Control Register */
  40. #define KBC_CONTROL_0 0x0
  41. #define KBC_FIFO_TH_CNT_SHIFT(cnt) (cnt << 14)
  42. #define KBC_DEBOUNCE_CNT_SHIFT(cnt) (cnt << 4)
  43. #define KBC_CONTROL_FIFO_CNT_INT_EN (1 << 3)
  44. #define KBC_CONTROL_KBC_EN (1 << 0)
  45. /* KBC Interrupt Register */
  46. #define KBC_INT_0 0x4
  47. #define KBC_INT_FIFO_CNT_INT_STATUS (1 << 2)
  48. #define KBC_ROW_CFG0_0 0x8
  49. #define KBC_COL_CFG0_0 0x18
  50. #define KBC_TO_CNT_0 0x24
  51. #define KBC_INIT_DLY_0 0x28
  52. #define KBC_RPT_DLY_0 0x2c
  53. #define KBC_KP_ENT0_0 0x30
  54. #define KBC_KP_ENT1_0 0x34
  55. #define KBC_ROW0_MASK_0 0x38
  56. #define KBC_ROW_SHIFT 3
  57. struct tegra_kbc {
  58. void __iomem *mmio;
  59. struct input_dev *idev;
  60. unsigned int irq;
  61. spinlock_t lock;
  62. unsigned int repoll_dly;
  63. unsigned long cp_dly_jiffies;
  64. unsigned int cp_to_wkup_dly;
  65. bool use_fn_map;
  66. bool use_ghost_filter;
  67. const struct tegra_kbc_platform_data *pdata;
  68. unsigned short keycode[KBC_MAX_KEY * 2];
  69. unsigned short current_keys[KBC_MAX_KPENT];
  70. unsigned int num_pressed_keys;
  71. struct timer_list timer;
  72. struct clk *clk;
  73. };
  74. static const u32 tegra_kbc_default_keymap[] = {
  75. KEY(0, 2, KEY_W),
  76. KEY(0, 3, KEY_S),
  77. KEY(0, 4, KEY_A),
  78. KEY(0, 5, KEY_Z),
  79. KEY(0, 7, KEY_FN),
  80. KEY(1, 7, KEY_LEFTMETA),
  81. KEY(2, 6, KEY_RIGHTALT),
  82. KEY(2, 7, KEY_LEFTALT),
  83. KEY(3, 0, KEY_5),
  84. KEY(3, 1, KEY_4),
  85. KEY(3, 2, KEY_R),
  86. KEY(3, 3, KEY_E),
  87. KEY(3, 4, KEY_F),
  88. KEY(3, 5, KEY_D),
  89. KEY(3, 6, KEY_X),
  90. KEY(4, 0, KEY_7),
  91. KEY(4, 1, KEY_6),
  92. KEY(4, 2, KEY_T),
  93. KEY(4, 3, KEY_H),
  94. KEY(4, 4, KEY_G),
  95. KEY(4, 5, KEY_V),
  96. KEY(4, 6, KEY_C),
  97. KEY(4, 7, KEY_SPACE),
  98. KEY(5, 0, KEY_9),
  99. KEY(5, 1, KEY_8),
  100. KEY(5, 2, KEY_U),
  101. KEY(5, 3, KEY_Y),
  102. KEY(5, 4, KEY_J),
  103. KEY(5, 5, KEY_N),
  104. KEY(5, 6, KEY_B),
  105. KEY(5, 7, KEY_BACKSLASH),
  106. KEY(6, 0, KEY_MINUS),
  107. KEY(6, 1, KEY_0),
  108. KEY(6, 2, KEY_O),
  109. KEY(6, 3, KEY_I),
  110. KEY(6, 4, KEY_L),
  111. KEY(6, 5, KEY_K),
  112. KEY(6, 6, KEY_COMMA),
  113. KEY(6, 7, KEY_M),
  114. KEY(7, 1, KEY_EQUAL),
  115. KEY(7, 2, KEY_RIGHTBRACE),
  116. KEY(7, 3, KEY_ENTER),
  117. KEY(7, 7, KEY_MENU),
  118. KEY(8, 4, KEY_RIGHTSHIFT),
  119. KEY(8, 5, KEY_LEFTSHIFT),
  120. KEY(9, 5, KEY_RIGHTCTRL),
  121. KEY(9, 7, KEY_LEFTCTRL),
  122. KEY(11, 0, KEY_LEFTBRACE),
  123. KEY(11, 1, KEY_P),
  124. KEY(11, 2, KEY_APOSTROPHE),
  125. KEY(11, 3, KEY_SEMICOLON),
  126. KEY(11, 4, KEY_SLASH),
  127. KEY(11, 5, KEY_DOT),
  128. KEY(12, 0, KEY_F10),
  129. KEY(12, 1, KEY_F9),
  130. KEY(12, 2, KEY_BACKSPACE),
  131. KEY(12, 3, KEY_3),
  132. KEY(12, 4, KEY_2),
  133. KEY(12, 5, KEY_UP),
  134. KEY(12, 6, KEY_PRINT),
  135. KEY(12, 7, KEY_PAUSE),
  136. KEY(13, 0, KEY_INSERT),
  137. KEY(13, 1, KEY_DELETE),
  138. KEY(13, 3, KEY_PAGEUP),
  139. KEY(13, 4, KEY_PAGEDOWN),
  140. KEY(13, 5, KEY_RIGHT),
  141. KEY(13, 6, KEY_DOWN),
  142. KEY(13, 7, KEY_LEFT),
  143. KEY(14, 0, KEY_F11),
  144. KEY(14, 1, KEY_F12),
  145. KEY(14, 2, KEY_F8),
  146. KEY(14, 3, KEY_Q),
  147. KEY(14, 4, KEY_F4),
  148. KEY(14, 5, KEY_F3),
  149. KEY(14, 6, KEY_1),
  150. KEY(14, 7, KEY_F7),
  151. KEY(15, 0, KEY_ESC),
  152. KEY(15, 1, KEY_GRAVE),
  153. KEY(15, 2, KEY_F5),
  154. KEY(15, 3, KEY_TAB),
  155. KEY(15, 4, KEY_F1),
  156. KEY(15, 5, KEY_F2),
  157. KEY(15, 6, KEY_CAPSLOCK),
  158. KEY(15, 7, KEY_F6),
  159. /* Software Handled Function Keys */
  160. KEY(20, 0, KEY_KP7),
  161. KEY(21, 0, KEY_KP9),
  162. KEY(21, 1, KEY_KP8),
  163. KEY(21, 2, KEY_KP4),
  164. KEY(21, 4, KEY_KP1),
  165. KEY(22, 1, KEY_KPSLASH),
  166. KEY(22, 2, KEY_KP6),
  167. KEY(22, 3, KEY_KP5),
  168. KEY(22, 4, KEY_KP3),
  169. KEY(22, 5, KEY_KP2),
  170. KEY(22, 7, KEY_KP0),
  171. KEY(27, 1, KEY_KPASTERISK),
  172. KEY(27, 3, KEY_KPMINUS),
  173. KEY(27, 4, KEY_KPPLUS),
  174. KEY(27, 5, KEY_KPDOT),
  175. KEY(28, 5, KEY_VOLUMEUP),
  176. KEY(29, 3, KEY_HOME),
  177. KEY(29, 4, KEY_END),
  178. KEY(29, 5, KEY_BRIGHTNESSDOWN),
  179. KEY(29, 6, KEY_VOLUMEDOWN),
  180. KEY(29, 7, KEY_BRIGHTNESSUP),
  181. KEY(30, 0, KEY_NUMLOCK),
  182. KEY(30, 1, KEY_SCROLLLOCK),
  183. KEY(30, 2, KEY_MUTE),
  184. KEY(31, 4, KEY_HELP),
  185. };
  186. static const struct matrix_keymap_data tegra_kbc_default_keymap_data = {
  187. .keymap = tegra_kbc_default_keymap,
  188. .keymap_size = ARRAY_SIZE(tegra_kbc_default_keymap),
  189. };
  190. static void tegra_kbc_report_released_keys(struct input_dev *input,
  191. unsigned short old_keycodes[],
  192. unsigned int old_num_keys,
  193. unsigned short new_keycodes[],
  194. unsigned int new_num_keys)
  195. {
  196. unsigned int i, j;
  197. for (i = 0; i < old_num_keys; i++) {
  198. for (j = 0; j < new_num_keys; j++)
  199. if (old_keycodes[i] == new_keycodes[j])
  200. break;
  201. if (j == new_num_keys)
  202. input_report_key(input, old_keycodes[i], 0);
  203. }
  204. }
  205. static void tegra_kbc_report_pressed_keys(struct input_dev *input,
  206. unsigned char scancodes[],
  207. unsigned short keycodes[],
  208. unsigned int num_pressed_keys)
  209. {
  210. unsigned int i;
  211. for (i = 0; i < num_pressed_keys; i++) {
  212. input_event(input, EV_MSC, MSC_SCAN, scancodes[i]);
  213. input_report_key(input, keycodes[i], 1);
  214. }
  215. }
  216. static void tegra_kbc_report_keys(struct tegra_kbc *kbc)
  217. {
  218. unsigned char scancodes[KBC_MAX_KPENT];
  219. unsigned short keycodes[KBC_MAX_KPENT];
  220. u32 val = 0;
  221. unsigned int i;
  222. unsigned int num_down = 0;
  223. bool fn_keypress = false;
  224. bool key_in_same_row = false;
  225. bool key_in_same_col = false;
  226. for (i = 0; i < KBC_MAX_KPENT; i++) {
  227. if ((i % 4) == 0)
  228. val = readl(kbc->mmio + KBC_KP_ENT0_0 + i);
  229. if (val & 0x80) {
  230. unsigned int col = val & 0x07;
  231. unsigned int row = (val >> 3) & 0x0f;
  232. unsigned char scancode =
  233. MATRIX_SCAN_CODE(row, col, KBC_ROW_SHIFT);
  234. scancodes[num_down] = scancode;
  235. keycodes[num_down] = kbc->keycode[scancode];
  236. /* If driver uses Fn map, do not report the Fn key. */
  237. if ((keycodes[num_down] == KEY_FN) && kbc->use_fn_map)
  238. fn_keypress = true;
  239. else
  240. num_down++;
  241. }
  242. val >>= 8;
  243. }
  244. /*
  245. * Matrix keyboard designs are prone to keyboard ghosting.
  246. * Ghosting occurs if there are 3 keys such that -
  247. * any 2 of the 3 keys share a row, and any 2 of them share a column.
  248. * If so ignore the key presses for this iteration.
  249. */
  250. if (kbc->use_ghost_filter && num_down >= 3) {
  251. for (i = 0; i < num_down; i++) {
  252. unsigned int j;
  253. u8 curr_col = scancodes[i] & 0x07;
  254. u8 curr_row = scancodes[i] >> KBC_ROW_SHIFT;
  255. /*
  256. * Find 2 keys such that one key is in the same row
  257. * and the other is in the same column as the i-th key.
  258. */
  259. for (j = i + 1; j < num_down; j++) {
  260. u8 col = scancodes[j] & 0x07;
  261. u8 row = scancodes[j] >> KBC_ROW_SHIFT;
  262. if (col == curr_col)
  263. key_in_same_col = true;
  264. if (row == curr_row)
  265. key_in_same_row = true;
  266. }
  267. }
  268. }
  269. /*
  270. * If the platform uses Fn keymaps, translate keys on a Fn keypress.
  271. * Function keycodes are KBC_MAX_KEY apart from the plain keycodes.
  272. */
  273. if (fn_keypress) {
  274. for (i = 0; i < num_down; i++) {
  275. scancodes[i] += KBC_MAX_KEY;
  276. keycodes[i] = kbc->keycode[scancodes[i]];
  277. }
  278. }
  279. /* Ignore the key presses for this iteration? */
  280. if (key_in_same_col && key_in_same_row)
  281. return;
  282. tegra_kbc_report_released_keys(kbc->idev,
  283. kbc->current_keys, kbc->num_pressed_keys,
  284. keycodes, num_down);
  285. tegra_kbc_report_pressed_keys(kbc->idev, scancodes, keycodes, num_down);
  286. input_sync(kbc->idev);
  287. memcpy(kbc->current_keys, keycodes, sizeof(kbc->current_keys));
  288. kbc->num_pressed_keys = num_down;
  289. }
  290. static void tegra_kbc_set_fifo_interrupt(struct tegra_kbc *kbc, bool enable)
  291. {
  292. u32 val;
  293. val = readl(kbc->mmio + KBC_CONTROL_0);
  294. if (enable)
  295. val |= KBC_CONTROL_FIFO_CNT_INT_EN;
  296. else
  297. val &= ~KBC_CONTROL_FIFO_CNT_INT_EN;
  298. writel(val, kbc->mmio + KBC_CONTROL_0);
  299. }
  300. static void tegra_kbc_keypress_timer(unsigned long data)
  301. {
  302. struct tegra_kbc *kbc = (struct tegra_kbc *)data;
  303. unsigned long flags;
  304. u32 val;
  305. unsigned int i;
  306. spin_lock_irqsave(&kbc->lock, flags);
  307. val = (readl(kbc->mmio + KBC_INT_0) >> 4) & 0xf;
  308. if (val) {
  309. unsigned long dly;
  310. tegra_kbc_report_keys(kbc);
  311. /*
  312. * If more than one keys are pressed we need not wait
  313. * for the repoll delay.
  314. */
  315. dly = (val == 1) ? kbc->repoll_dly : 1;
  316. mod_timer(&kbc->timer, jiffies + msecs_to_jiffies(dly));
  317. } else {
  318. /* Release any pressed keys and exit the polling loop */
  319. for (i = 0; i < kbc->num_pressed_keys; i++)
  320. input_report_key(kbc->idev, kbc->current_keys[i], 0);
  321. input_sync(kbc->idev);
  322. kbc->num_pressed_keys = 0;
  323. /* All keys are released so enable the keypress interrupt */
  324. tegra_kbc_set_fifo_interrupt(kbc, true);
  325. }
  326. spin_unlock_irqrestore(&kbc->lock, flags);
  327. }
  328. static irqreturn_t tegra_kbc_isr(int irq, void *args)
  329. {
  330. struct tegra_kbc *kbc = args;
  331. unsigned long flags;
  332. u32 val;
  333. spin_lock_irqsave(&kbc->lock, flags);
  334. /*
  335. * Quickly bail out & reenable interrupts if the fifo threshold
  336. * count interrupt wasn't the interrupt source
  337. */
  338. val = readl(kbc->mmio + KBC_INT_0);
  339. writel(val, kbc->mmio + KBC_INT_0);
  340. if (val & KBC_INT_FIFO_CNT_INT_STATUS) {
  341. /*
  342. * Until all keys are released, defer further processing to
  343. * the polling loop in tegra_kbc_keypress_timer.
  344. */
  345. tegra_kbc_set_fifo_interrupt(kbc, false);
  346. mod_timer(&kbc->timer, jiffies + kbc->cp_dly_jiffies);
  347. }
  348. spin_unlock_irqrestore(&kbc->lock, flags);
  349. return IRQ_HANDLED;
  350. }
  351. static void tegra_kbc_setup_wakekeys(struct tegra_kbc *kbc, bool filter)
  352. {
  353. const struct tegra_kbc_platform_data *pdata = kbc->pdata;
  354. int i;
  355. unsigned int rst_val;
  356. /* Either mask all keys or none. */
  357. rst_val = (filter && !pdata->wakeup) ? ~0 : 0;
  358. for (i = 0; i < KBC_MAX_ROW; i++)
  359. writel(rst_val, kbc->mmio + KBC_ROW0_MASK_0 + i * 4);
  360. }
  361. static void tegra_kbc_config_pins(struct tegra_kbc *kbc)
  362. {
  363. const struct tegra_kbc_platform_data *pdata = kbc->pdata;
  364. int i;
  365. for (i = 0; i < KBC_MAX_GPIO; i++) {
  366. u32 r_shft = 5 * (i % 6);
  367. u32 c_shft = 4 * (i % 8);
  368. u32 r_mask = 0x1f << r_shft;
  369. u32 c_mask = 0x0f << c_shft;
  370. u32 r_offs = (i / 6) * 4 + KBC_ROW_CFG0_0;
  371. u32 c_offs = (i / 8) * 4 + KBC_COL_CFG0_0;
  372. u32 row_cfg = readl(kbc->mmio + r_offs);
  373. u32 col_cfg = readl(kbc->mmio + c_offs);
  374. row_cfg &= ~r_mask;
  375. col_cfg &= ~c_mask;
  376. if (pdata->pin_cfg[i].is_row)
  377. row_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << r_shft;
  378. else
  379. col_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << c_shft;
  380. writel(row_cfg, kbc->mmio + r_offs);
  381. writel(col_cfg, kbc->mmio + c_offs);
  382. }
  383. }
  384. static int tegra_kbc_start(struct tegra_kbc *kbc)
  385. {
  386. const struct tegra_kbc_platform_data *pdata = kbc->pdata;
  387. unsigned int debounce_cnt;
  388. u32 val = 0;
  389. clk_enable(kbc->clk);
  390. /* Reset the KBC controller to clear all previous status.*/
  391. tegra_periph_reset_assert(kbc->clk);
  392. udelay(100);
  393. tegra_periph_reset_deassert(kbc->clk);
  394. udelay(100);
  395. tegra_kbc_config_pins(kbc);
  396. tegra_kbc_setup_wakekeys(kbc, false);
  397. writel(pdata->repeat_cnt, kbc->mmio + KBC_RPT_DLY_0);
  398. /* Keyboard debounce count is maximum of 12 bits. */
  399. debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
  400. val = KBC_DEBOUNCE_CNT_SHIFT(debounce_cnt);
  401. val |= KBC_FIFO_TH_CNT_SHIFT(1); /* set fifo interrupt threshold to 1 */
  402. val |= KBC_CONTROL_FIFO_CNT_INT_EN; /* interrupt on FIFO threshold */
  403. val |= KBC_CONTROL_KBC_EN; /* enable */
  404. writel(val, kbc->mmio + KBC_CONTROL_0);
  405. /*
  406. * Compute the delay(ns) from interrupt mode to continuous polling
  407. * mode so the timer routine is scheduled appropriately.
  408. */
  409. val = readl(kbc->mmio + KBC_INIT_DLY_0);
  410. kbc->cp_dly_jiffies = usecs_to_jiffies((val & 0xfffff) * 32);
  411. kbc->num_pressed_keys = 0;
  412. /*
  413. * Atomically clear out any remaining entries in the key FIFO
  414. * and enable keyboard interrupts.
  415. */
  416. while (1) {
  417. val = readl(kbc->mmio + KBC_INT_0);
  418. val >>= 4;
  419. if (!val)
  420. break;
  421. val = readl(kbc->mmio + KBC_KP_ENT0_0);
  422. val = readl(kbc->mmio + KBC_KP_ENT1_0);
  423. }
  424. writel(0x7, kbc->mmio + KBC_INT_0);
  425. enable_irq(kbc->irq);
  426. return 0;
  427. }
  428. static void tegra_kbc_stop(struct tegra_kbc *kbc)
  429. {
  430. unsigned long flags;
  431. u32 val;
  432. spin_lock_irqsave(&kbc->lock, flags);
  433. val = readl(kbc->mmio + KBC_CONTROL_0);
  434. val &= ~1;
  435. writel(val, kbc->mmio + KBC_CONTROL_0);
  436. spin_unlock_irqrestore(&kbc->lock, flags);
  437. disable_irq(kbc->irq);
  438. del_timer_sync(&kbc->timer);
  439. clk_disable(kbc->clk);
  440. }
  441. static int tegra_kbc_open(struct input_dev *dev)
  442. {
  443. struct tegra_kbc *kbc = input_get_drvdata(dev);
  444. return tegra_kbc_start(kbc);
  445. }
  446. static void tegra_kbc_close(struct input_dev *dev)
  447. {
  448. struct tegra_kbc *kbc = input_get_drvdata(dev);
  449. return tegra_kbc_stop(kbc);
  450. }
  451. static bool __devinit
  452. tegra_kbc_check_pin_cfg(const struct tegra_kbc_platform_data *pdata,
  453. struct device *dev, unsigned int *num_rows)
  454. {
  455. int i;
  456. *num_rows = 0;
  457. for (i = 0; i < KBC_MAX_GPIO; i++) {
  458. const struct tegra_kbc_pin_cfg *pin_cfg = &pdata->pin_cfg[i];
  459. if (pin_cfg->is_row) {
  460. if (pin_cfg->num >= KBC_MAX_ROW) {
  461. dev_err(dev,
  462. "pin_cfg[%d]: invalid row number %d\n",
  463. i, pin_cfg->num);
  464. return false;
  465. }
  466. (*num_rows)++;
  467. } else {
  468. if (pin_cfg->num >= KBC_MAX_COL) {
  469. dev_err(dev,
  470. "pin_cfg[%d]: invalid column number %d\n",
  471. i, pin_cfg->num);
  472. return false;
  473. }
  474. }
  475. }
  476. return true;
  477. }
  478. static int __devinit tegra_kbc_probe(struct platform_device *pdev)
  479. {
  480. const struct tegra_kbc_platform_data *pdata = pdev->dev.platform_data;
  481. const struct matrix_keymap_data *keymap_data;
  482. struct tegra_kbc *kbc;
  483. struct input_dev *input_dev;
  484. struct resource *res;
  485. int irq;
  486. int err;
  487. int num_rows = 0;
  488. unsigned int debounce_cnt;
  489. unsigned int scan_time_rows;
  490. if (!pdata)
  491. return -EINVAL;
  492. if (!tegra_kbc_check_pin_cfg(pdata, &pdev->dev, &num_rows))
  493. return -EINVAL;
  494. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  495. if (!res) {
  496. dev_err(&pdev->dev, "failed to get I/O memory\n");
  497. return -ENXIO;
  498. }
  499. irq = platform_get_irq(pdev, 0);
  500. if (irq < 0) {
  501. dev_err(&pdev->dev, "failed to get keyboard IRQ\n");
  502. return -ENXIO;
  503. }
  504. kbc = kzalloc(sizeof(*kbc), GFP_KERNEL);
  505. input_dev = input_allocate_device();
  506. if (!kbc || !input_dev) {
  507. err = -ENOMEM;
  508. goto err_free_mem;
  509. }
  510. kbc->pdata = pdata;
  511. kbc->idev = input_dev;
  512. kbc->irq = irq;
  513. spin_lock_init(&kbc->lock);
  514. setup_timer(&kbc->timer, tegra_kbc_keypress_timer, (unsigned long)kbc);
  515. res = request_mem_region(res->start, resource_size(res), pdev->name);
  516. if (!res) {
  517. dev_err(&pdev->dev, "failed to request I/O memory\n");
  518. err = -EBUSY;
  519. goto err_free_mem;
  520. }
  521. kbc->mmio = ioremap(res->start, resource_size(res));
  522. if (!kbc->mmio) {
  523. dev_err(&pdev->dev, "failed to remap I/O memory\n");
  524. err = -ENXIO;
  525. goto err_free_mem_region;
  526. }
  527. kbc->clk = clk_get(&pdev->dev, NULL);
  528. if (IS_ERR(kbc->clk)) {
  529. dev_err(&pdev->dev, "failed to get keyboard clock\n");
  530. err = PTR_ERR(kbc->clk);
  531. goto err_iounmap;
  532. }
  533. /*
  534. * The time delay between two consecutive reads of the FIFO is
  535. * the sum of the repeat time and the time taken for scanning
  536. * the rows. There is an additional delay before the row scanning
  537. * starts. The repoll delay is computed in milliseconds.
  538. */
  539. debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
  540. scan_time_rows = (KBC_ROW_SCAN_TIME + debounce_cnt) * num_rows;
  541. kbc->repoll_dly = KBC_ROW_SCAN_DLY + scan_time_rows + pdata->repeat_cnt;
  542. kbc->repoll_dly = DIV_ROUND_UP(kbc->repoll_dly, KBC_CYCLE_MS);
  543. input_dev->name = pdev->name;
  544. input_dev->id.bustype = BUS_HOST;
  545. input_dev->dev.parent = &pdev->dev;
  546. input_dev->open = tegra_kbc_open;
  547. input_dev->close = tegra_kbc_close;
  548. input_set_drvdata(input_dev, kbc);
  549. input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REP);
  550. input_set_capability(input_dev, EV_MSC, MSC_SCAN);
  551. input_dev->keycode = kbc->keycode;
  552. input_dev->keycodesize = sizeof(kbc->keycode[0]);
  553. input_dev->keycodemax = KBC_MAX_KEY;
  554. if (pdata->use_fn_map)
  555. input_dev->keycodemax *= 2;
  556. kbc->use_fn_map = pdata->use_fn_map;
  557. kbc->use_ghost_filter = pdata->use_ghost_filter;
  558. keymap_data = pdata->keymap_data ?: &tegra_kbc_default_keymap_data;
  559. matrix_keypad_build_keymap(keymap_data, KBC_ROW_SHIFT,
  560. input_dev->keycode, input_dev->keybit);
  561. err = request_irq(kbc->irq, tegra_kbc_isr, IRQF_TRIGGER_HIGH,
  562. pdev->name, kbc);
  563. if (err) {
  564. dev_err(&pdev->dev, "failed to request keyboard IRQ\n");
  565. goto err_put_clk;
  566. }
  567. disable_irq(kbc->irq);
  568. err = input_register_device(kbc->idev);
  569. if (err) {
  570. dev_err(&pdev->dev, "failed to register input device\n");
  571. goto err_free_irq;
  572. }
  573. platform_set_drvdata(pdev, kbc);
  574. device_init_wakeup(&pdev->dev, pdata->wakeup);
  575. return 0;
  576. err_free_irq:
  577. free_irq(kbc->irq, pdev);
  578. err_put_clk:
  579. clk_put(kbc->clk);
  580. err_iounmap:
  581. iounmap(kbc->mmio);
  582. err_free_mem_region:
  583. release_mem_region(res->start, resource_size(res));
  584. err_free_mem:
  585. input_free_device(input_dev);
  586. kfree(kbc);
  587. return err;
  588. }
  589. static int __devexit tegra_kbc_remove(struct platform_device *pdev)
  590. {
  591. struct tegra_kbc *kbc = platform_get_drvdata(pdev);
  592. struct resource *res;
  593. free_irq(kbc->irq, pdev);
  594. clk_put(kbc->clk);
  595. input_unregister_device(kbc->idev);
  596. iounmap(kbc->mmio);
  597. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  598. release_mem_region(res->start, resource_size(res));
  599. kfree(kbc);
  600. platform_set_drvdata(pdev, NULL);
  601. return 0;
  602. }
  603. #ifdef CONFIG_PM_SLEEP
  604. static int tegra_kbc_suspend(struct device *dev)
  605. {
  606. struct platform_device *pdev = to_platform_device(dev);
  607. struct tegra_kbc *kbc = platform_get_drvdata(pdev);
  608. mutex_lock(&kbc->idev->mutex);
  609. if (device_may_wakeup(&pdev->dev)) {
  610. disable_irq(kbc->irq);
  611. del_timer_sync(&kbc->timer);
  612. tegra_kbc_set_fifo_interrupt(kbc, false);
  613. /* Forcefully clear the interrupt status */
  614. writel(0x7, kbc->mmio + KBC_INT_0);
  615. /*
  616. * Store the previous resident time of continuous polling mode.
  617. * Force the keyboard into interrupt mode.
  618. */
  619. kbc->cp_to_wkup_dly = readl(kbc->mmio + KBC_TO_CNT_0);
  620. writel(0, kbc->mmio + KBC_TO_CNT_0);
  621. tegra_kbc_setup_wakekeys(kbc, true);
  622. msleep(30);
  623. enable_irq_wake(kbc->irq);
  624. } else {
  625. if (kbc->idev->users)
  626. tegra_kbc_stop(kbc);
  627. }
  628. mutex_unlock(&kbc->idev->mutex);
  629. return 0;
  630. }
  631. static int tegra_kbc_resume(struct device *dev)
  632. {
  633. struct platform_device *pdev = to_platform_device(dev);
  634. struct tegra_kbc *kbc = platform_get_drvdata(pdev);
  635. int err = 0;
  636. mutex_lock(&kbc->idev->mutex);
  637. if (device_may_wakeup(&pdev->dev)) {
  638. disable_irq_wake(kbc->irq);
  639. tegra_kbc_setup_wakekeys(kbc, false);
  640. /* Restore the resident time of continuous polling mode. */
  641. writel(kbc->cp_to_wkup_dly, kbc->mmio + KBC_TO_CNT_0);
  642. tegra_kbc_set_fifo_interrupt(kbc, true);
  643. enable_irq(kbc->irq);
  644. } else {
  645. if (kbc->idev->users)
  646. err = tegra_kbc_start(kbc);
  647. }
  648. mutex_unlock(&kbc->idev->mutex);
  649. return err;
  650. }
  651. #endif
  652. static SIMPLE_DEV_PM_OPS(tegra_kbc_pm_ops, tegra_kbc_suspend, tegra_kbc_resume);
  653. static struct platform_driver tegra_kbc_driver = {
  654. .probe = tegra_kbc_probe,
  655. .remove = __devexit_p(tegra_kbc_remove),
  656. .driver = {
  657. .name = "tegra-kbc",
  658. .owner = THIS_MODULE,
  659. .pm = &tegra_kbc_pm_ops,
  660. },
  661. };
  662. static void __exit tegra_kbc_exit(void)
  663. {
  664. platform_driver_unregister(&tegra_kbc_driver);
  665. }
  666. module_exit(tegra_kbc_exit);
  667. static int __init tegra_kbc_init(void)
  668. {
  669. return platform_driver_register(&tegra_kbc_driver);
  670. }
  671. module_init(tegra_kbc_init);
  672. MODULE_LICENSE("GPL");
  673. MODULE_AUTHOR("Rakesh Iyer <riyer@nvidia.com>");
  674. MODULE_DESCRIPTION("Tegra matrix keyboard controller driver");
  675. MODULE_ALIAS("platform:tegra-kbc");