coretemp.c 21 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812
  1. /*
  2. * coretemp.c - Linux kernel module for hardware monitoring
  3. *
  4. * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
  5. *
  6. * Inspired from many hwmon drivers
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; version 2 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  20. * 02110-1301 USA.
  21. */
  22. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/slab.h>
  26. #include <linux/jiffies.h>
  27. #include <linux/hwmon.h>
  28. #include <linux/sysfs.h>
  29. #include <linux/hwmon-sysfs.h>
  30. #include <linux/err.h>
  31. #include <linux/mutex.h>
  32. #include <linux/list.h>
  33. #include <linux/platform_device.h>
  34. #include <linux/cpu.h>
  35. #include <linux/pci.h>
  36. #include <linux/smp.h>
  37. #include <linux/moduleparam.h>
  38. #include <asm/msr.h>
  39. #include <asm/processor.h>
  40. #define DRVNAME "coretemp"
  41. /*
  42. * force_tjmax only matters when TjMax can't be read from the CPU itself.
  43. * When set, it replaces the driver's suboptimal heuristic.
  44. */
  45. static int force_tjmax;
  46. module_param_named(tjmax, force_tjmax, int, 0444);
  47. MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
  48. #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */
  49. #define NUM_REAL_CORES 16 /* Number of Real cores per cpu */
  50. #define CORETEMP_NAME_LENGTH 17 /* String Length of attrs */
  51. #define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */
  52. #define TOTAL_ATTRS (MAX_CORE_ATTRS + 1)
  53. #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
  54. #ifdef CONFIG_SMP
  55. #define TO_PHYS_ID(cpu) cpu_data(cpu).phys_proc_id
  56. #define TO_CORE_ID(cpu) cpu_data(cpu).cpu_core_id
  57. #define for_each_sibling(i, cpu) for_each_cpu(i, cpu_sibling_mask(cpu))
  58. #else
  59. #define TO_PHYS_ID(cpu) (cpu)
  60. #define TO_CORE_ID(cpu) (cpu)
  61. #define for_each_sibling(i, cpu) for (i = 0; false; )
  62. #endif
  63. #define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
  64. /*
  65. * Per-Core Temperature Data
  66. * @last_updated: The time when the current temperature value was updated
  67. * earlier (in jiffies).
  68. * @cpu_core_id: The CPU Core from which temperature values should be read
  69. * This value is passed as "id" field to rdmsr/wrmsr functions.
  70. * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
  71. * from where the temperature values should be read.
  72. * @attr_size: Total number of pre-core attrs displayed in the sysfs.
  73. * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
  74. * Otherwise, temp_data holds coretemp data.
  75. * @valid: If this is 1, the current temperature is valid.
  76. */
  77. struct temp_data {
  78. int temp;
  79. int ttarget;
  80. int tjmax;
  81. unsigned long last_updated;
  82. unsigned int cpu;
  83. u32 cpu_core_id;
  84. u32 status_reg;
  85. int attr_size;
  86. bool is_pkg_data;
  87. bool valid;
  88. struct sensor_device_attribute sd_attrs[TOTAL_ATTRS];
  89. char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH];
  90. struct mutex update_lock;
  91. };
  92. /* Platform Data per Physical CPU */
  93. struct platform_data {
  94. struct device *hwmon_dev;
  95. u16 phys_proc_id;
  96. struct temp_data *core_data[MAX_CORE_DATA];
  97. struct device_attribute name_attr;
  98. };
  99. struct pdev_entry {
  100. struct list_head list;
  101. struct platform_device *pdev;
  102. u16 phys_proc_id;
  103. };
  104. static LIST_HEAD(pdev_list);
  105. static DEFINE_MUTEX(pdev_list_mutex);
  106. static ssize_t show_name(struct device *dev,
  107. struct device_attribute *devattr, char *buf)
  108. {
  109. return sprintf(buf, "%s\n", DRVNAME);
  110. }
  111. static ssize_t show_label(struct device *dev,
  112. struct device_attribute *devattr, char *buf)
  113. {
  114. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  115. struct platform_data *pdata = dev_get_drvdata(dev);
  116. struct temp_data *tdata = pdata->core_data[attr->index];
  117. if (tdata->is_pkg_data)
  118. return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id);
  119. return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
  120. }
  121. static ssize_t show_crit_alarm(struct device *dev,
  122. struct device_attribute *devattr, char *buf)
  123. {
  124. u32 eax, edx;
  125. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  126. struct platform_data *pdata = dev_get_drvdata(dev);
  127. struct temp_data *tdata = pdata->core_data[attr->index];
  128. rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
  129. return sprintf(buf, "%d\n", (eax >> 5) & 1);
  130. }
  131. static ssize_t show_tjmax(struct device *dev,
  132. struct device_attribute *devattr, char *buf)
  133. {
  134. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  135. struct platform_data *pdata = dev_get_drvdata(dev);
  136. return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax);
  137. }
  138. static ssize_t show_ttarget(struct device *dev,
  139. struct device_attribute *devattr, char *buf)
  140. {
  141. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  142. struct platform_data *pdata = dev_get_drvdata(dev);
  143. return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget);
  144. }
  145. static ssize_t show_temp(struct device *dev,
  146. struct device_attribute *devattr, char *buf)
  147. {
  148. u32 eax, edx;
  149. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  150. struct platform_data *pdata = dev_get_drvdata(dev);
  151. struct temp_data *tdata = pdata->core_data[attr->index];
  152. mutex_lock(&tdata->update_lock);
  153. /* Check whether the time interval has elapsed */
  154. if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
  155. rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
  156. tdata->valid = 0;
  157. /* Check whether the data is valid */
  158. if (eax & 0x80000000) {
  159. tdata->temp = tdata->tjmax -
  160. ((eax >> 16) & 0x7f) * 1000;
  161. tdata->valid = 1;
  162. }
  163. tdata->last_updated = jiffies;
  164. }
  165. mutex_unlock(&tdata->update_lock);
  166. return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN;
  167. }
  168. static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
  169. {
  170. /* The 100C is default for both mobile and non mobile CPUs */
  171. int tjmax = 100000;
  172. int tjmax_ee = 85000;
  173. int usemsr_ee = 1;
  174. int err;
  175. u32 eax, edx;
  176. struct pci_dev *host_bridge;
  177. /* Early chips have no MSR for TjMax */
  178. if (c->x86_model == 0xf && c->x86_mask < 4)
  179. usemsr_ee = 0;
  180. /* Atom CPUs */
  181. if (c->x86_model == 0x1c) {
  182. usemsr_ee = 0;
  183. host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
  184. if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL
  185. && (host_bridge->device == 0xa000 /* NM10 based nettop */
  186. || host_bridge->device == 0xa010)) /* NM10 based netbook */
  187. tjmax = 100000;
  188. else
  189. tjmax = 90000;
  190. pci_dev_put(host_bridge);
  191. }
  192. if (c->x86_model > 0xe && usemsr_ee) {
  193. u8 platform_id;
  194. /*
  195. * Now we can detect the mobile CPU using Intel provided table
  196. * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
  197. * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
  198. */
  199. err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
  200. if (err) {
  201. dev_warn(dev,
  202. "Unable to access MSR 0x17, assuming desktop"
  203. " CPU\n");
  204. usemsr_ee = 0;
  205. } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
  206. /*
  207. * Trust bit 28 up to Penryn, I could not find any
  208. * documentation on that; if you happen to know
  209. * someone at Intel please ask
  210. */
  211. usemsr_ee = 0;
  212. } else {
  213. /* Platform ID bits 52:50 (EDX starts at bit 32) */
  214. platform_id = (edx >> 18) & 0x7;
  215. /*
  216. * Mobile Penryn CPU seems to be platform ID 7 or 5
  217. * (guesswork)
  218. */
  219. if (c->x86_model == 0x17 &&
  220. (platform_id == 5 || platform_id == 7)) {
  221. /*
  222. * If MSR EE bit is set, set it to 90 degrees C,
  223. * otherwise 105 degrees C
  224. */
  225. tjmax_ee = 90000;
  226. tjmax = 105000;
  227. }
  228. }
  229. }
  230. if (usemsr_ee) {
  231. err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
  232. if (err) {
  233. dev_warn(dev,
  234. "Unable to access MSR 0xEE, for Tjmax, left"
  235. " at default\n");
  236. } else if (eax & 0x40000000) {
  237. tjmax = tjmax_ee;
  238. }
  239. } else if (tjmax == 100000) {
  240. /*
  241. * If we don't use msr EE it means we are desktop CPU
  242. * (with exeception of Atom)
  243. */
  244. dev_warn(dev, "Using relative temperature scale!\n");
  245. }
  246. return tjmax;
  247. }
  248. static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
  249. {
  250. int err;
  251. u32 eax, edx;
  252. u32 val;
  253. /*
  254. * A new feature of current Intel(R) processors, the
  255. * IA32_TEMPERATURE_TARGET contains the TjMax value
  256. */
  257. err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
  258. if (err) {
  259. if (c->x86_model > 0xe && c->x86_model != 0x1c)
  260. dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
  261. } else {
  262. val = (eax >> 16) & 0xff;
  263. /*
  264. * If the TjMax is not plausible, an assumption
  265. * will be used
  266. */
  267. if (val) {
  268. dev_dbg(dev, "TjMax is %d degrees C\n", val);
  269. return val * 1000;
  270. }
  271. }
  272. if (force_tjmax) {
  273. dev_notice(dev, "TjMax forced to %d degrees C by user\n",
  274. force_tjmax);
  275. return force_tjmax * 1000;
  276. }
  277. /*
  278. * An assumption is made for early CPUs and unreadable MSR.
  279. * NOTE: the calculated value may not be correct.
  280. */
  281. return adjust_tjmax(c, id, dev);
  282. }
  283. static int create_name_attr(struct platform_data *pdata, struct device *dev)
  284. {
  285. sysfs_attr_init(&pdata->name_attr.attr);
  286. pdata->name_attr.attr.name = "name";
  287. pdata->name_attr.attr.mode = S_IRUGO;
  288. pdata->name_attr.show = show_name;
  289. return device_create_file(dev, &pdata->name_attr);
  290. }
  291. static int create_core_attrs(struct temp_data *tdata, struct device *dev,
  292. int attr_no)
  293. {
  294. int err, i;
  295. static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev,
  296. struct device_attribute *devattr, char *buf) = {
  297. show_label, show_crit_alarm, show_temp, show_tjmax,
  298. show_ttarget };
  299. static const char *const names[TOTAL_ATTRS] = {
  300. "temp%d_label", "temp%d_crit_alarm",
  301. "temp%d_input", "temp%d_crit",
  302. "temp%d_max" };
  303. for (i = 0; i < tdata->attr_size; i++) {
  304. snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i],
  305. attr_no);
  306. sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
  307. tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
  308. tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO;
  309. tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
  310. tdata->sd_attrs[i].index = attr_no;
  311. err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr);
  312. if (err)
  313. goto exit_free;
  314. }
  315. return 0;
  316. exit_free:
  317. while (--i >= 0)
  318. device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
  319. return err;
  320. }
  321. static int __cpuinit chk_ucode_version(unsigned int cpu)
  322. {
  323. struct cpuinfo_x86 *c = &cpu_data(cpu);
  324. /*
  325. * Check if we have problem with errata AE18 of Core processors:
  326. * Readings might stop update when processor visited too deep sleep,
  327. * fixed for stepping D0 (6EC).
  328. */
  329. if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) {
  330. pr_err("Errata AE18 not fixed, update BIOS or "
  331. "microcode of the CPU!\n");
  332. return -ENODEV;
  333. }
  334. return 0;
  335. }
  336. static struct platform_device *coretemp_get_pdev(unsigned int cpu)
  337. {
  338. u16 phys_proc_id = TO_PHYS_ID(cpu);
  339. struct pdev_entry *p;
  340. mutex_lock(&pdev_list_mutex);
  341. list_for_each_entry(p, &pdev_list, list)
  342. if (p->phys_proc_id == phys_proc_id) {
  343. mutex_unlock(&pdev_list_mutex);
  344. return p->pdev;
  345. }
  346. mutex_unlock(&pdev_list_mutex);
  347. return NULL;
  348. }
  349. static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag)
  350. {
  351. struct temp_data *tdata;
  352. tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
  353. if (!tdata)
  354. return NULL;
  355. tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
  356. MSR_IA32_THERM_STATUS;
  357. tdata->is_pkg_data = pkg_flag;
  358. tdata->cpu = cpu;
  359. tdata->cpu_core_id = TO_CORE_ID(cpu);
  360. tdata->attr_size = MAX_CORE_ATTRS;
  361. mutex_init(&tdata->update_lock);
  362. return tdata;
  363. }
  364. static int create_core_data(struct platform_device *pdev,
  365. unsigned int cpu, int pkg_flag)
  366. {
  367. struct temp_data *tdata;
  368. struct platform_data *pdata = platform_get_drvdata(pdev);
  369. struct cpuinfo_x86 *c = &cpu_data(cpu);
  370. u32 eax, edx;
  371. int err, attr_no;
  372. /*
  373. * Find attr number for sysfs:
  374. * We map the attr number to core id of the CPU
  375. * The attr number is always core id + 2
  376. * The Pkgtemp will always show up as temp1_*, if available
  377. */
  378. attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu);
  379. if (attr_no > MAX_CORE_DATA - 1)
  380. return -ERANGE;
  381. /*
  382. * Provide a single set of attributes for all HT siblings of a core
  383. * to avoid duplicate sensors (the processor ID and core ID of all
  384. * HT siblings of a core are the same).
  385. * Skip if a HT sibling of this core is already registered.
  386. * This is not an error.
  387. */
  388. if (pdata->core_data[attr_no] != NULL)
  389. return 0;
  390. tdata = init_temp_data(cpu, pkg_flag);
  391. if (!tdata)
  392. return -ENOMEM;
  393. /* Test if we can access the status register */
  394. err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
  395. if (err)
  396. goto exit_free;
  397. /* We can access status register. Get Critical Temperature */
  398. tdata->tjmax = get_tjmax(c, cpu, &pdev->dev);
  399. /*
  400. * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET.
  401. * The target temperature is available on older CPUs but not in this
  402. * register. Atoms don't have the register at all.
  403. */
  404. if (c->x86_model > 0xe && c->x86_model != 0x1c) {
  405. err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET,
  406. &eax, &edx);
  407. if (!err) {
  408. tdata->ttarget
  409. = tdata->tjmax - ((eax >> 8) & 0xff) * 1000;
  410. tdata->attr_size++;
  411. }
  412. }
  413. pdata->core_data[attr_no] = tdata;
  414. /* Create sysfs interfaces */
  415. err = create_core_attrs(tdata, &pdev->dev, attr_no);
  416. if (err)
  417. goto exit_free;
  418. return 0;
  419. exit_free:
  420. pdata->core_data[attr_no] = NULL;
  421. kfree(tdata);
  422. return err;
  423. }
  424. static void coretemp_add_core(unsigned int cpu, int pkg_flag)
  425. {
  426. struct platform_device *pdev = coretemp_get_pdev(cpu);
  427. int err;
  428. if (!pdev)
  429. return;
  430. err = create_core_data(pdev, cpu, pkg_flag);
  431. if (err)
  432. dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
  433. }
  434. static void coretemp_remove_core(struct platform_data *pdata,
  435. struct device *dev, int indx)
  436. {
  437. int i;
  438. struct temp_data *tdata = pdata->core_data[indx];
  439. /* Remove the sysfs attributes */
  440. for (i = 0; i < tdata->attr_size; i++)
  441. device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
  442. kfree(pdata->core_data[indx]);
  443. pdata->core_data[indx] = NULL;
  444. }
  445. static int __devinit coretemp_probe(struct platform_device *pdev)
  446. {
  447. struct platform_data *pdata;
  448. int err;
  449. /* Initialize the per-package data structures */
  450. pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL);
  451. if (!pdata)
  452. return -ENOMEM;
  453. err = create_name_attr(pdata, &pdev->dev);
  454. if (err)
  455. goto exit_free;
  456. pdata->phys_proc_id = pdev->id;
  457. platform_set_drvdata(pdev, pdata);
  458. pdata->hwmon_dev = hwmon_device_register(&pdev->dev);
  459. if (IS_ERR(pdata->hwmon_dev)) {
  460. err = PTR_ERR(pdata->hwmon_dev);
  461. dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
  462. goto exit_name;
  463. }
  464. return 0;
  465. exit_name:
  466. device_remove_file(&pdev->dev, &pdata->name_attr);
  467. platform_set_drvdata(pdev, NULL);
  468. exit_free:
  469. kfree(pdata);
  470. return err;
  471. }
  472. static int __devexit coretemp_remove(struct platform_device *pdev)
  473. {
  474. struct platform_data *pdata = platform_get_drvdata(pdev);
  475. int i;
  476. for (i = MAX_CORE_DATA - 1; i >= 0; --i)
  477. if (pdata->core_data[i])
  478. coretemp_remove_core(pdata, &pdev->dev, i);
  479. device_remove_file(&pdev->dev, &pdata->name_attr);
  480. hwmon_device_unregister(pdata->hwmon_dev);
  481. platform_set_drvdata(pdev, NULL);
  482. kfree(pdata);
  483. return 0;
  484. }
  485. static struct platform_driver coretemp_driver = {
  486. .driver = {
  487. .owner = THIS_MODULE,
  488. .name = DRVNAME,
  489. },
  490. .probe = coretemp_probe,
  491. .remove = __devexit_p(coretemp_remove),
  492. };
  493. static int __cpuinit coretemp_device_add(unsigned int cpu)
  494. {
  495. int err;
  496. struct platform_device *pdev;
  497. struct pdev_entry *pdev_entry;
  498. mutex_lock(&pdev_list_mutex);
  499. pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu));
  500. if (!pdev) {
  501. err = -ENOMEM;
  502. pr_err("Device allocation failed\n");
  503. goto exit;
  504. }
  505. pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
  506. if (!pdev_entry) {
  507. err = -ENOMEM;
  508. goto exit_device_put;
  509. }
  510. err = platform_device_add(pdev);
  511. if (err) {
  512. pr_err("Device addition failed (%d)\n", err);
  513. goto exit_device_free;
  514. }
  515. pdev_entry->pdev = pdev;
  516. pdev_entry->phys_proc_id = pdev->id;
  517. list_add_tail(&pdev_entry->list, &pdev_list);
  518. mutex_unlock(&pdev_list_mutex);
  519. return 0;
  520. exit_device_free:
  521. kfree(pdev_entry);
  522. exit_device_put:
  523. platform_device_put(pdev);
  524. exit:
  525. mutex_unlock(&pdev_list_mutex);
  526. return err;
  527. }
  528. static void coretemp_device_remove(unsigned int cpu)
  529. {
  530. struct pdev_entry *p, *n;
  531. u16 phys_proc_id = TO_PHYS_ID(cpu);
  532. mutex_lock(&pdev_list_mutex);
  533. list_for_each_entry_safe(p, n, &pdev_list, list) {
  534. if (p->phys_proc_id != phys_proc_id)
  535. continue;
  536. platform_device_unregister(p->pdev);
  537. list_del(&p->list);
  538. kfree(p);
  539. }
  540. mutex_unlock(&pdev_list_mutex);
  541. }
  542. static bool is_any_core_online(struct platform_data *pdata)
  543. {
  544. int i;
  545. /* Find online cores, except pkgtemp data */
  546. for (i = MAX_CORE_DATA - 1; i >= 0; --i) {
  547. if (pdata->core_data[i] &&
  548. !pdata->core_data[i]->is_pkg_data) {
  549. return true;
  550. }
  551. }
  552. return false;
  553. }
  554. static void __cpuinit get_core_online(unsigned int cpu)
  555. {
  556. struct cpuinfo_x86 *c = &cpu_data(cpu);
  557. struct platform_device *pdev = coretemp_get_pdev(cpu);
  558. int err;
  559. /*
  560. * CPUID.06H.EAX[0] indicates whether the CPU has thermal
  561. * sensors. We check this bit only, all the early CPUs
  562. * without thermal sensors will be filtered out.
  563. */
  564. if (!cpu_has(c, X86_FEATURE_DTS))
  565. return;
  566. if (!pdev) {
  567. /* Check the microcode version of the CPU */
  568. if (chk_ucode_version(cpu))
  569. return;
  570. /*
  571. * Alright, we have DTS support.
  572. * We are bringing the _first_ core in this pkg
  573. * online. So, initialize per-pkg data structures and
  574. * then bring this core online.
  575. */
  576. err = coretemp_device_add(cpu);
  577. if (err)
  578. return;
  579. /*
  580. * Check whether pkgtemp support is available.
  581. * If so, add interfaces for pkgtemp.
  582. */
  583. if (cpu_has(c, X86_FEATURE_PTS))
  584. coretemp_add_core(cpu, 1);
  585. }
  586. /*
  587. * Physical CPU device already exists.
  588. * So, just add interfaces for this core.
  589. */
  590. coretemp_add_core(cpu, 0);
  591. }
  592. static void __cpuinit put_core_offline(unsigned int cpu)
  593. {
  594. int i, indx;
  595. struct platform_data *pdata;
  596. struct platform_device *pdev = coretemp_get_pdev(cpu);
  597. /* If the physical CPU device does not exist, just return */
  598. if (!pdev)
  599. return;
  600. pdata = platform_get_drvdata(pdev);
  601. indx = TO_ATTR_NO(cpu);
  602. if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu)
  603. coretemp_remove_core(pdata, &pdev->dev, indx);
  604. /*
  605. * If a HT sibling of a core is taken offline, but another HT sibling
  606. * of the same core is still online, register the alternate sibling.
  607. * This ensures that exactly one set of attributes is provided as long
  608. * as at least one HT sibling of a core is online.
  609. */
  610. for_each_sibling(i, cpu) {
  611. if (i != cpu) {
  612. get_core_online(i);
  613. /*
  614. * Display temperature sensor data for one HT sibling
  615. * per core only, so abort the loop after one such
  616. * sibling has been found.
  617. */
  618. break;
  619. }
  620. }
  621. /*
  622. * If all cores in this pkg are offline, remove the device.
  623. * coretemp_device_remove calls unregister_platform_device,
  624. * which in turn calls coretemp_remove. This removes the
  625. * pkgtemp entry and does other clean ups.
  626. */
  627. if (!is_any_core_online(pdata))
  628. coretemp_device_remove(cpu);
  629. }
  630. static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb,
  631. unsigned long action, void *hcpu)
  632. {
  633. unsigned int cpu = (unsigned long) hcpu;
  634. switch (action) {
  635. case CPU_ONLINE:
  636. case CPU_DOWN_FAILED:
  637. get_core_online(cpu);
  638. break;
  639. case CPU_DOWN_PREPARE:
  640. put_core_offline(cpu);
  641. break;
  642. }
  643. return NOTIFY_OK;
  644. }
  645. static struct notifier_block coretemp_cpu_notifier __refdata = {
  646. .notifier_call = coretemp_cpu_callback,
  647. };
  648. static int __init coretemp_init(void)
  649. {
  650. int i, err = -ENODEV;
  651. /* quick check if we run Intel */
  652. if (cpu_data(0).x86_vendor != X86_VENDOR_INTEL)
  653. goto exit;
  654. err = platform_driver_register(&coretemp_driver);
  655. if (err)
  656. goto exit;
  657. for_each_online_cpu(i)
  658. get_core_online(i);
  659. #ifndef CONFIG_HOTPLUG_CPU
  660. if (list_empty(&pdev_list)) {
  661. err = -ENODEV;
  662. goto exit_driver_unreg;
  663. }
  664. #endif
  665. register_hotcpu_notifier(&coretemp_cpu_notifier);
  666. return 0;
  667. #ifndef CONFIG_HOTPLUG_CPU
  668. exit_driver_unreg:
  669. platform_driver_unregister(&coretemp_driver);
  670. #endif
  671. exit:
  672. return err;
  673. }
  674. static void __exit coretemp_exit(void)
  675. {
  676. struct pdev_entry *p, *n;
  677. unregister_hotcpu_notifier(&coretemp_cpu_notifier);
  678. mutex_lock(&pdev_list_mutex);
  679. list_for_each_entry_safe(p, n, &pdev_list, list) {
  680. platform_device_unregister(p->pdev);
  681. list_del(&p->list);
  682. kfree(p);
  683. }
  684. mutex_unlock(&pdev_list_mutex);
  685. platform_driver_unregister(&coretemp_driver);
  686. }
  687. MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
  688. MODULE_DESCRIPTION("Intel Core temperature monitor");
  689. MODULE_LICENSE("GPL");
  690. module_init(coretemp_init)
  691. module_exit(coretemp_exit)