radeon_test.c 6.4 KB

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  1. /*
  2. * Copyright 2009 VMware, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Michel Dänzer
  23. */
  24. #include <drm/drmP.h>
  25. #include <drm/radeon_drm.h>
  26. #include "radeon_reg.h"
  27. #include "radeon.h"
  28. /* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */
  29. void radeon_test_moves(struct radeon_device *rdev)
  30. {
  31. struct radeon_bo *vram_obj = NULL;
  32. struct radeon_bo **gtt_obj = NULL;
  33. struct radeon_fence *fence = NULL;
  34. uint64_t gtt_addr, vram_addr;
  35. unsigned i, n, size;
  36. int r;
  37. size = 1024 * 1024;
  38. /* Number of tests =
  39. * (Total GTT - IB pool - writeback page - ring buffers) / test size
  40. */
  41. n = rdev->mc.gtt_size - RADEON_IB_POOL_SIZE*64*1024 - rdev->cp.ring_size;
  42. if (rdev->wb.wb_obj)
  43. n -= RADEON_GPU_PAGE_SIZE;
  44. if (rdev->ih.ring_obj)
  45. n -= rdev->ih.ring_size;
  46. n /= size;
  47. gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL);
  48. if (!gtt_obj) {
  49. DRM_ERROR("Failed to allocate %d pointers\n", n);
  50. r = 1;
  51. goto out_cleanup;
  52. }
  53. r = radeon_bo_create(rdev, size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,
  54. &vram_obj);
  55. if (r) {
  56. DRM_ERROR("Failed to create VRAM object\n");
  57. goto out_cleanup;
  58. }
  59. r = radeon_bo_reserve(vram_obj, false);
  60. if (unlikely(r != 0))
  61. goto out_cleanup;
  62. r = radeon_bo_pin(vram_obj, RADEON_GEM_DOMAIN_VRAM, &vram_addr);
  63. if (r) {
  64. DRM_ERROR("Failed to pin VRAM object\n");
  65. goto out_cleanup;
  66. }
  67. for (i = 0; i < n; i++) {
  68. void *gtt_map, *vram_map;
  69. void **gtt_start, **gtt_end;
  70. void **vram_start, **vram_end;
  71. r = radeon_bo_create(rdev, size, PAGE_SIZE, true,
  72. RADEON_GEM_DOMAIN_GTT, gtt_obj + i);
  73. if (r) {
  74. DRM_ERROR("Failed to create GTT object %d\n", i);
  75. goto out_cleanup;
  76. }
  77. r = radeon_bo_reserve(gtt_obj[i], false);
  78. if (unlikely(r != 0))
  79. goto out_cleanup;
  80. r = radeon_bo_pin(gtt_obj[i], RADEON_GEM_DOMAIN_GTT, &gtt_addr);
  81. if (r) {
  82. DRM_ERROR("Failed to pin GTT object %d\n", i);
  83. goto out_cleanup;
  84. }
  85. r = radeon_bo_kmap(gtt_obj[i], &gtt_map);
  86. if (r) {
  87. DRM_ERROR("Failed to map GTT object %d\n", i);
  88. goto out_cleanup;
  89. }
  90. for (gtt_start = gtt_map, gtt_end = gtt_map + size;
  91. gtt_start < gtt_end;
  92. gtt_start++)
  93. *gtt_start = gtt_start;
  94. radeon_bo_kunmap(gtt_obj[i]);
  95. r = radeon_fence_create(rdev, &fence);
  96. if (r) {
  97. DRM_ERROR("Failed to create GTT->VRAM fence %d\n", i);
  98. goto out_cleanup;
  99. }
  100. r = radeon_copy(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, fence);
  101. if (r) {
  102. DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
  103. goto out_cleanup;
  104. }
  105. r = radeon_fence_wait(fence, false);
  106. if (r) {
  107. DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i);
  108. goto out_cleanup;
  109. }
  110. radeon_fence_unref(&fence);
  111. r = radeon_bo_kmap(vram_obj, &vram_map);
  112. if (r) {
  113. DRM_ERROR("Failed to map VRAM object after copy %d\n", i);
  114. goto out_cleanup;
  115. }
  116. for (gtt_start = gtt_map, gtt_end = gtt_map + size,
  117. vram_start = vram_map, vram_end = vram_map + size;
  118. vram_start < vram_end;
  119. gtt_start++, vram_start++) {
  120. if (*vram_start != gtt_start) {
  121. DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, "
  122. "expected 0x%p (GTT/VRAM offset "
  123. "0x%16llx/0x%16llx)\n",
  124. i, *vram_start, gtt_start,
  125. (unsigned long long)
  126. (gtt_addr - rdev->mc.gtt_start +
  127. (void*)gtt_start - gtt_map),
  128. (unsigned long long)
  129. (vram_addr - rdev->mc.vram_start +
  130. (void*)gtt_start - gtt_map));
  131. radeon_bo_kunmap(vram_obj);
  132. goto out_cleanup;
  133. }
  134. *vram_start = vram_start;
  135. }
  136. radeon_bo_kunmap(vram_obj);
  137. r = radeon_fence_create(rdev, &fence);
  138. if (r) {
  139. DRM_ERROR("Failed to create VRAM->GTT fence %d\n", i);
  140. goto out_cleanup;
  141. }
  142. r = radeon_copy(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, fence);
  143. if (r) {
  144. DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
  145. goto out_cleanup;
  146. }
  147. r = radeon_fence_wait(fence, false);
  148. if (r) {
  149. DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i);
  150. goto out_cleanup;
  151. }
  152. radeon_fence_unref(&fence);
  153. r = radeon_bo_kmap(gtt_obj[i], &gtt_map);
  154. if (r) {
  155. DRM_ERROR("Failed to map GTT object after copy %d\n", i);
  156. goto out_cleanup;
  157. }
  158. for (gtt_start = gtt_map, gtt_end = gtt_map + size,
  159. vram_start = vram_map, vram_end = vram_map + size;
  160. gtt_start < gtt_end;
  161. gtt_start++, vram_start++) {
  162. if (*gtt_start != vram_start) {
  163. DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, "
  164. "expected 0x%p (VRAM/GTT offset "
  165. "0x%16llx/0x%16llx)\n",
  166. i, *gtt_start, vram_start,
  167. (unsigned long long)
  168. (vram_addr - rdev->mc.vram_start +
  169. (void*)vram_start - vram_map),
  170. (unsigned long long)
  171. (gtt_addr - rdev->mc.gtt_start +
  172. (void*)vram_start - vram_map));
  173. radeon_bo_kunmap(gtt_obj[i]);
  174. goto out_cleanup;
  175. }
  176. }
  177. radeon_bo_kunmap(gtt_obj[i]);
  178. DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n",
  179. gtt_addr - rdev->mc.gtt_start);
  180. }
  181. out_cleanup:
  182. if (vram_obj) {
  183. if (radeon_bo_is_reserved(vram_obj)) {
  184. radeon_bo_unpin(vram_obj);
  185. radeon_bo_unreserve(vram_obj);
  186. }
  187. radeon_bo_unref(&vram_obj);
  188. }
  189. if (gtt_obj) {
  190. for (i = 0; i < n; i++) {
  191. if (gtt_obj[i]) {
  192. if (radeon_bo_is_reserved(gtt_obj[i])) {
  193. radeon_bo_unpin(gtt_obj[i]);
  194. radeon_bo_unreserve(gtt_obj[i]);
  195. }
  196. radeon_bo_unref(&gtt_obj[i]);
  197. }
  198. }
  199. kfree(gtt_obj);
  200. }
  201. if (fence) {
  202. radeon_fence_unref(&fence);
  203. }
  204. if (r) {
  205. printk(KERN_WARNING "Error while testing BO move.\n");
  206. }
  207. }