nv50_sor.c 8.6 KB

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  1. /*
  2. * Copyright (C) 2008 Maarten Maathuis.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the
  14. * next paragraph) shall be included in all copies or substantial
  15. * portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20. * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21. * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22. * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23. * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24. *
  25. */
  26. #include "drmP.h"
  27. #include "drm_crtc_helper.h"
  28. #define NOUVEAU_DMA_DEBUG (nouveau_reg_debug & NOUVEAU_REG_DEBUG_EVO)
  29. #include "nouveau_reg.h"
  30. #include "nouveau_drv.h"
  31. #include "nouveau_dma.h"
  32. #include "nouveau_encoder.h"
  33. #include "nouveau_connector.h"
  34. #include "nouveau_crtc.h"
  35. #include "nv50_display.h"
  36. static void
  37. nv50_sor_disconnect(struct drm_encoder *encoder)
  38. {
  39. struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  40. struct drm_device *dev = encoder->dev;
  41. struct nouveau_channel *evo = nv50_display(dev)->master;
  42. int ret;
  43. if (!nv_encoder->crtc)
  44. return;
  45. nv50_crtc_blank(nouveau_crtc(nv_encoder->crtc), true);
  46. NV_DEBUG_KMS(dev, "Disconnecting SOR %d\n", nv_encoder->or);
  47. ret = RING_SPACE(evo, 4);
  48. if (ret) {
  49. NV_ERROR(dev, "no space while disconnecting SOR\n");
  50. return;
  51. }
  52. BEGIN_RING(evo, 0, NV50_EVO_SOR(nv_encoder->or, MODE_CTRL), 1);
  53. OUT_RING (evo, 0);
  54. BEGIN_RING(evo, 0, NV50_EVO_UPDATE, 1);
  55. OUT_RING (evo, 0);
  56. nv_encoder->crtc = NULL;
  57. nv_encoder->last_dpms = DRM_MODE_DPMS_OFF;
  58. }
  59. static void
  60. nv50_sor_dpms(struct drm_encoder *encoder, int mode)
  61. {
  62. struct drm_device *dev = encoder->dev;
  63. struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  64. struct drm_encoder *enc;
  65. uint32_t val;
  66. int or = nv_encoder->or;
  67. NV_DEBUG_KMS(dev, "or %d type %d mode %d\n", or, nv_encoder->dcb->type, mode);
  68. nv_encoder->last_dpms = mode;
  69. list_for_each_entry(enc, &dev->mode_config.encoder_list, head) {
  70. struct nouveau_encoder *nvenc = nouveau_encoder(enc);
  71. if (nvenc == nv_encoder ||
  72. (nvenc->dcb->type != OUTPUT_TMDS &&
  73. nvenc->dcb->type != OUTPUT_LVDS &&
  74. nvenc->dcb->type != OUTPUT_DP) ||
  75. nvenc->dcb->or != nv_encoder->dcb->or)
  76. continue;
  77. if (nvenc->last_dpms == DRM_MODE_DPMS_ON)
  78. return;
  79. }
  80. /* wait for it to be done */
  81. if (!nv_wait(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or),
  82. NV50_PDISPLAY_SOR_DPMS_CTRL_PENDING, 0)) {
  83. NV_ERROR(dev, "timeout: SOR_DPMS_CTRL_PENDING(%d) == 0\n", or);
  84. NV_ERROR(dev, "SOR_DPMS_CTRL(%d) = 0x%08x\n", or,
  85. nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or)));
  86. }
  87. val = nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or));
  88. if (mode == DRM_MODE_DPMS_ON)
  89. val |= NV50_PDISPLAY_SOR_DPMS_CTRL_ON;
  90. else
  91. val &= ~NV50_PDISPLAY_SOR_DPMS_CTRL_ON;
  92. nv_wr32(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or), val |
  93. NV50_PDISPLAY_SOR_DPMS_CTRL_PENDING);
  94. if (!nv_wait(dev, NV50_PDISPLAY_SOR_DPMS_STATE(or),
  95. NV50_PDISPLAY_SOR_DPMS_STATE_WAIT, 0)) {
  96. NV_ERROR(dev, "timeout: SOR_DPMS_STATE_WAIT(%d) == 0\n", or);
  97. NV_ERROR(dev, "SOR_DPMS_STATE(%d) = 0x%08x\n", or,
  98. nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_STATE(or)));
  99. }
  100. if (nv_encoder->dcb->type == OUTPUT_DP) {
  101. struct nouveau_i2c_chan *auxch;
  102. auxch = nouveau_i2c_find(dev, nv_encoder->dcb->i2c_index);
  103. if (!auxch)
  104. return;
  105. if (mode == DRM_MODE_DPMS_ON) {
  106. u8 status = DP_SET_POWER_D0;
  107. nouveau_dp_auxch(auxch, 8, DP_SET_POWER, &status, 1);
  108. nouveau_dp_link_train(encoder, nv_encoder->dp.datarate);
  109. } else {
  110. u8 status = DP_SET_POWER_D3;
  111. nouveau_dp_auxch(auxch, 8, DP_SET_POWER, &status, 1);
  112. }
  113. }
  114. }
  115. static void
  116. nv50_sor_save(struct drm_encoder *encoder)
  117. {
  118. NV_ERROR(encoder->dev, "!!\n");
  119. }
  120. static void
  121. nv50_sor_restore(struct drm_encoder *encoder)
  122. {
  123. NV_ERROR(encoder->dev, "!!\n");
  124. }
  125. static bool
  126. nv50_sor_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
  127. struct drm_display_mode *adjusted_mode)
  128. {
  129. struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  130. struct nouveau_connector *connector;
  131. NV_DEBUG_KMS(encoder->dev, "or %d\n", nv_encoder->or);
  132. connector = nouveau_encoder_connector_get(nv_encoder);
  133. if (!connector) {
  134. NV_ERROR(encoder->dev, "Encoder has no connector\n");
  135. return false;
  136. }
  137. if (connector->scaling_mode != DRM_MODE_SCALE_NONE &&
  138. connector->native_mode) {
  139. int id = adjusted_mode->base.id;
  140. *adjusted_mode = *connector->native_mode;
  141. adjusted_mode->base.id = id;
  142. }
  143. return true;
  144. }
  145. static void
  146. nv50_sor_prepare(struct drm_encoder *encoder)
  147. {
  148. }
  149. static void
  150. nv50_sor_commit(struct drm_encoder *encoder)
  151. {
  152. }
  153. static void
  154. nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
  155. struct drm_display_mode *adjusted_mode)
  156. {
  157. struct nouveau_channel *evo = nv50_display(encoder->dev)->master;
  158. struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  159. struct drm_device *dev = encoder->dev;
  160. struct nouveau_crtc *crtc = nouveau_crtc(encoder->crtc);
  161. struct nouveau_connector *nv_connector;
  162. uint32_t mode_ctl = 0;
  163. int ret;
  164. NV_DEBUG_KMS(dev, "or %d type %d -> crtc %d\n",
  165. nv_encoder->or, nv_encoder->dcb->type, crtc->index);
  166. switch (nv_encoder->dcb->type) {
  167. case OUTPUT_TMDS:
  168. if (nv_encoder->dcb->sorconf.link & 1) {
  169. if (adjusted_mode->clock < 165000)
  170. mode_ctl = 0x0100;
  171. else
  172. mode_ctl = 0x0500;
  173. } else
  174. mode_ctl = 0x0200;
  175. break;
  176. case OUTPUT_DP:
  177. nv_connector = nouveau_encoder_connector_get(nv_encoder);
  178. if (nv_connector && nv_connector->base.display_info.bpc == 6) {
  179. nv_encoder->dp.datarate = crtc->mode->clock * 18 / 8;
  180. mode_ctl |= 0x00020000;
  181. } else {
  182. nv_encoder->dp.datarate = crtc->mode->clock * 24 / 8;
  183. mode_ctl |= 0x00050000;
  184. }
  185. if (nv_encoder->dcb->sorconf.link & 1)
  186. mode_ctl |= 0x00000800;
  187. else
  188. mode_ctl |= 0x00000900;
  189. break;
  190. default:
  191. break;
  192. }
  193. if (crtc->index == 1)
  194. mode_ctl |= NV50_EVO_SOR_MODE_CTRL_CRTC1;
  195. else
  196. mode_ctl |= NV50_EVO_SOR_MODE_CTRL_CRTC0;
  197. if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
  198. mode_ctl |= NV50_EVO_SOR_MODE_CTRL_NHSYNC;
  199. if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
  200. mode_ctl |= NV50_EVO_SOR_MODE_CTRL_NVSYNC;
  201. nv50_sor_dpms(encoder, DRM_MODE_DPMS_ON);
  202. ret = RING_SPACE(evo, 2);
  203. if (ret) {
  204. NV_ERROR(dev, "no space while connecting SOR\n");
  205. return;
  206. }
  207. BEGIN_RING(evo, 0, NV50_EVO_SOR(nv_encoder->or, MODE_CTRL), 1);
  208. OUT_RING(evo, mode_ctl);
  209. nv_encoder->crtc = encoder->crtc;
  210. }
  211. static struct drm_crtc *
  212. nv50_sor_crtc_get(struct drm_encoder *encoder)
  213. {
  214. return nouveau_encoder(encoder)->crtc;
  215. }
  216. static const struct drm_encoder_helper_funcs nv50_sor_helper_funcs = {
  217. .dpms = nv50_sor_dpms,
  218. .save = nv50_sor_save,
  219. .restore = nv50_sor_restore,
  220. .mode_fixup = nv50_sor_mode_fixup,
  221. .prepare = nv50_sor_prepare,
  222. .commit = nv50_sor_commit,
  223. .mode_set = nv50_sor_mode_set,
  224. .get_crtc = nv50_sor_crtc_get,
  225. .detect = NULL,
  226. .disable = nv50_sor_disconnect
  227. };
  228. static void
  229. nv50_sor_destroy(struct drm_encoder *encoder)
  230. {
  231. struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  232. if (!encoder)
  233. return;
  234. NV_DEBUG_KMS(encoder->dev, "\n");
  235. drm_encoder_cleanup(encoder);
  236. kfree(nv_encoder);
  237. }
  238. static const struct drm_encoder_funcs nv50_sor_encoder_funcs = {
  239. .destroy = nv50_sor_destroy,
  240. };
  241. int
  242. nv50_sor_create(struct drm_connector *connector, struct dcb_entry *entry)
  243. {
  244. struct nouveau_encoder *nv_encoder = NULL;
  245. struct drm_device *dev = connector->dev;
  246. struct drm_encoder *encoder;
  247. int type;
  248. NV_DEBUG_KMS(dev, "\n");
  249. switch (entry->type) {
  250. case OUTPUT_TMDS:
  251. case OUTPUT_DP:
  252. type = DRM_MODE_ENCODER_TMDS;
  253. break;
  254. case OUTPUT_LVDS:
  255. type = DRM_MODE_ENCODER_LVDS;
  256. break;
  257. default:
  258. return -EINVAL;
  259. }
  260. nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
  261. if (!nv_encoder)
  262. return -ENOMEM;
  263. encoder = to_drm_encoder(nv_encoder);
  264. nv_encoder->dcb = entry;
  265. nv_encoder->or = ffs(entry->or) - 1;
  266. nv_encoder->last_dpms = DRM_MODE_DPMS_OFF;
  267. drm_encoder_init(dev, encoder, &nv50_sor_encoder_funcs, type);
  268. drm_encoder_helper_add(encoder, &nv50_sor_helper_funcs);
  269. encoder->possible_crtcs = entry->heads;
  270. encoder->possible_clones = 0;
  271. drm_mode_connector_attach_encoder(connector, encoder);
  272. return 0;
  273. }