intel_bios.c 19 KB

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  1. /*
  2. * Copyright © 2006 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21. * SOFTWARE.
  22. *
  23. * Authors:
  24. * Eric Anholt <eric@anholt.net>
  25. *
  26. */
  27. #include <drm/drm_dp_helper.h>
  28. #include "drmP.h"
  29. #include "drm.h"
  30. #include "i915_drm.h"
  31. #include "i915_drv.h"
  32. #include "intel_bios.h"
  33. #define SLAVE_ADDR1 0x70
  34. #define SLAVE_ADDR2 0x72
  35. static int panel_type;
  36. static void *
  37. find_section(struct bdb_header *bdb, int section_id)
  38. {
  39. u8 *base = (u8 *)bdb;
  40. int index = 0;
  41. u16 total, current_size;
  42. u8 current_id;
  43. /* skip to first section */
  44. index += bdb->header_size;
  45. total = bdb->bdb_size;
  46. /* walk the sections looking for section_id */
  47. while (index < total) {
  48. current_id = *(base + index);
  49. index++;
  50. current_size = *((u16 *)(base + index));
  51. index += 2;
  52. if (current_id == section_id)
  53. return base + index;
  54. index += current_size;
  55. }
  56. return NULL;
  57. }
  58. static u16
  59. get_blocksize(void *p)
  60. {
  61. u16 *block_ptr, block_size;
  62. block_ptr = (u16 *)((char *)p - 2);
  63. block_size = *block_ptr;
  64. return block_size;
  65. }
  66. static void
  67. fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
  68. const struct lvds_dvo_timing *dvo_timing)
  69. {
  70. panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
  71. dvo_timing->hactive_lo;
  72. panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
  73. ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
  74. panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
  75. dvo_timing->hsync_pulse_width;
  76. panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
  77. ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
  78. panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
  79. dvo_timing->vactive_lo;
  80. panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
  81. dvo_timing->vsync_off;
  82. panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
  83. dvo_timing->vsync_pulse_width;
  84. panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
  85. ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
  86. panel_fixed_mode->clock = dvo_timing->clock * 10;
  87. panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
  88. if (dvo_timing->hsync_positive)
  89. panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
  90. else
  91. panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
  92. if (dvo_timing->vsync_positive)
  93. panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
  94. else
  95. panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
  96. /* Some VBTs have bogus h/vtotal values */
  97. if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
  98. panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
  99. if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
  100. panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
  101. drm_mode_set_name(panel_fixed_mode);
  102. }
  103. static bool
  104. lvds_dvo_timing_equal_size(const struct lvds_dvo_timing *a,
  105. const struct lvds_dvo_timing *b)
  106. {
  107. if (a->hactive_hi != b->hactive_hi ||
  108. a->hactive_lo != b->hactive_lo)
  109. return false;
  110. if (a->hsync_off_hi != b->hsync_off_hi ||
  111. a->hsync_off_lo != b->hsync_off_lo)
  112. return false;
  113. if (a->hsync_pulse_width != b->hsync_pulse_width)
  114. return false;
  115. if (a->hblank_hi != b->hblank_hi ||
  116. a->hblank_lo != b->hblank_lo)
  117. return false;
  118. if (a->vactive_hi != b->vactive_hi ||
  119. a->vactive_lo != b->vactive_lo)
  120. return false;
  121. if (a->vsync_off != b->vsync_off)
  122. return false;
  123. if (a->vsync_pulse_width != b->vsync_pulse_width)
  124. return false;
  125. if (a->vblank_hi != b->vblank_hi ||
  126. a->vblank_lo != b->vblank_lo)
  127. return false;
  128. return true;
  129. }
  130. static const struct lvds_dvo_timing *
  131. get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
  132. const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
  133. int index)
  134. {
  135. /*
  136. * the size of fp_timing varies on the different platform.
  137. * So calculate the DVO timing relative offset in LVDS data
  138. * entry to get the DVO timing entry
  139. */
  140. int lfp_data_size =
  141. lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
  142. lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
  143. int dvo_timing_offset =
  144. lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
  145. lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
  146. char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
  147. return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
  148. }
  149. /* Try to find integrated panel data */
  150. static void
  151. parse_lfp_panel_data(struct drm_i915_private *dev_priv,
  152. struct bdb_header *bdb)
  153. {
  154. const struct bdb_lvds_options *lvds_options;
  155. const struct bdb_lvds_lfp_data *lvds_lfp_data;
  156. const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
  157. const struct lvds_dvo_timing *panel_dvo_timing;
  158. struct drm_display_mode *panel_fixed_mode;
  159. int i, downclock;
  160. lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
  161. if (!lvds_options)
  162. return;
  163. dev_priv->lvds_dither = lvds_options->pixel_dither;
  164. if (lvds_options->panel_type == 0xff)
  165. return;
  166. panel_type = lvds_options->panel_type;
  167. lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
  168. if (!lvds_lfp_data)
  169. return;
  170. lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
  171. if (!lvds_lfp_data_ptrs)
  172. return;
  173. dev_priv->lvds_vbt = 1;
  174. panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
  175. lvds_lfp_data_ptrs,
  176. lvds_options->panel_type);
  177. panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
  178. if (!panel_fixed_mode)
  179. return;
  180. fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
  181. dev_priv->lfp_lvds_vbt_mode = panel_fixed_mode;
  182. DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
  183. drm_mode_debug_printmodeline(panel_fixed_mode);
  184. /*
  185. * Iterate over the LVDS panel timing info to find the lowest clock
  186. * for the native resolution.
  187. */
  188. downclock = panel_dvo_timing->clock;
  189. for (i = 0; i < 16; i++) {
  190. const struct lvds_dvo_timing *dvo_timing;
  191. dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
  192. lvds_lfp_data_ptrs,
  193. i);
  194. if (lvds_dvo_timing_equal_size(dvo_timing, panel_dvo_timing) &&
  195. dvo_timing->clock < downclock)
  196. downclock = dvo_timing->clock;
  197. }
  198. if (downclock < panel_dvo_timing->clock && i915_lvds_downclock) {
  199. dev_priv->lvds_downclock_avail = 1;
  200. dev_priv->lvds_downclock = downclock * 10;
  201. DRM_DEBUG_KMS("LVDS downclock is found in VBT. "
  202. "Normal Clock %dKHz, downclock %dKHz\n",
  203. panel_fixed_mode->clock, 10*downclock);
  204. }
  205. }
  206. /* Try to find sdvo panel data */
  207. static void
  208. parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
  209. struct bdb_header *bdb)
  210. {
  211. struct lvds_dvo_timing *dvo_timing;
  212. struct drm_display_mode *panel_fixed_mode;
  213. int index;
  214. index = i915_vbt_sdvo_panel_type;
  215. if (index == -1) {
  216. struct bdb_sdvo_lvds_options *sdvo_lvds_options;
  217. sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
  218. if (!sdvo_lvds_options)
  219. return;
  220. index = sdvo_lvds_options->panel_type;
  221. }
  222. dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
  223. if (!dvo_timing)
  224. return;
  225. panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
  226. if (!panel_fixed_mode)
  227. return;
  228. fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
  229. dev_priv->sdvo_lvds_vbt_mode = panel_fixed_mode;
  230. DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
  231. drm_mode_debug_printmodeline(panel_fixed_mode);
  232. }
  233. static int intel_bios_ssc_frequency(struct drm_device *dev,
  234. bool alternate)
  235. {
  236. switch (INTEL_INFO(dev)->gen) {
  237. case 2:
  238. return alternate ? 66 : 48;
  239. case 3:
  240. case 4:
  241. return alternate ? 100 : 96;
  242. default:
  243. return alternate ? 100 : 120;
  244. }
  245. }
  246. static void
  247. parse_general_features(struct drm_i915_private *dev_priv,
  248. struct bdb_header *bdb)
  249. {
  250. struct drm_device *dev = dev_priv->dev;
  251. struct bdb_general_features *general;
  252. general = find_section(bdb, BDB_GENERAL_FEATURES);
  253. if (general) {
  254. dev_priv->int_tv_support = general->int_tv_support;
  255. dev_priv->int_crt_support = general->int_crt_support;
  256. dev_priv->lvds_use_ssc = general->enable_ssc;
  257. dev_priv->lvds_ssc_freq =
  258. intel_bios_ssc_frequency(dev, general->ssc_freq);
  259. dev_priv->display_clock_mode = general->display_clock_mode;
  260. DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d\n",
  261. dev_priv->int_tv_support,
  262. dev_priv->int_crt_support,
  263. dev_priv->lvds_use_ssc,
  264. dev_priv->lvds_ssc_freq,
  265. dev_priv->display_clock_mode);
  266. }
  267. }
  268. static void
  269. parse_general_definitions(struct drm_i915_private *dev_priv,
  270. struct bdb_header *bdb)
  271. {
  272. struct bdb_general_definitions *general;
  273. general = find_section(bdb, BDB_GENERAL_DEFINITIONS);
  274. if (general) {
  275. u16 block_size = get_blocksize(general);
  276. if (block_size >= sizeof(*general)) {
  277. int bus_pin = general->crt_ddc_gmbus_pin;
  278. DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
  279. if (bus_pin >= 1 && bus_pin <= 6)
  280. dev_priv->crt_ddc_pin = bus_pin;
  281. } else {
  282. DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n",
  283. block_size);
  284. }
  285. }
  286. }
  287. static void
  288. parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
  289. struct bdb_header *bdb)
  290. {
  291. struct sdvo_device_mapping *p_mapping;
  292. struct bdb_general_definitions *p_defs;
  293. struct child_device_config *p_child;
  294. int i, child_device_num, count;
  295. u16 block_size;
  296. p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
  297. if (!p_defs) {
  298. DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n");
  299. return;
  300. }
  301. /* judge whether the size of child device meets the requirements.
  302. * If the child device size obtained from general definition block
  303. * is different with sizeof(struct child_device_config), skip the
  304. * parsing of sdvo device info
  305. */
  306. if (p_defs->child_dev_size != sizeof(*p_child)) {
  307. /* different child dev size . Ignore it */
  308. DRM_DEBUG_KMS("different child size is found. Invalid.\n");
  309. return;
  310. }
  311. /* get the block size of general definitions */
  312. block_size = get_blocksize(p_defs);
  313. /* get the number of child device */
  314. child_device_num = (block_size - sizeof(*p_defs)) /
  315. sizeof(*p_child);
  316. count = 0;
  317. for (i = 0; i < child_device_num; i++) {
  318. p_child = &(p_defs->devices[i]);
  319. if (!p_child->device_type) {
  320. /* skip the device block if device type is invalid */
  321. continue;
  322. }
  323. if (p_child->slave_addr != SLAVE_ADDR1 &&
  324. p_child->slave_addr != SLAVE_ADDR2) {
  325. /*
  326. * If the slave address is neither 0x70 nor 0x72,
  327. * it is not a SDVO device. Skip it.
  328. */
  329. continue;
  330. }
  331. if (p_child->dvo_port != DEVICE_PORT_DVOB &&
  332. p_child->dvo_port != DEVICE_PORT_DVOC) {
  333. /* skip the incorrect SDVO port */
  334. DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
  335. continue;
  336. }
  337. DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
  338. " %s port\n",
  339. p_child->slave_addr,
  340. (p_child->dvo_port == DEVICE_PORT_DVOB) ?
  341. "SDVOB" : "SDVOC");
  342. p_mapping = &(dev_priv->sdvo_mappings[p_child->dvo_port - 1]);
  343. if (!p_mapping->initialized) {
  344. p_mapping->dvo_port = p_child->dvo_port;
  345. p_mapping->slave_addr = p_child->slave_addr;
  346. p_mapping->dvo_wiring = p_child->dvo_wiring;
  347. p_mapping->ddc_pin = p_child->ddc_pin;
  348. p_mapping->i2c_pin = p_child->i2c_pin;
  349. p_mapping->initialized = 1;
  350. DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
  351. p_mapping->dvo_port,
  352. p_mapping->slave_addr,
  353. p_mapping->dvo_wiring,
  354. p_mapping->ddc_pin,
  355. p_mapping->i2c_pin);
  356. } else {
  357. DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
  358. "two SDVO device.\n");
  359. }
  360. if (p_child->slave2_addr) {
  361. /* Maybe this is a SDVO device with multiple inputs */
  362. /* And the mapping info is not added */
  363. DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
  364. " is a SDVO device with multiple inputs.\n");
  365. }
  366. count++;
  367. }
  368. if (!count) {
  369. /* No SDVO device info is found */
  370. DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
  371. }
  372. return;
  373. }
  374. static void
  375. parse_driver_features(struct drm_i915_private *dev_priv,
  376. struct bdb_header *bdb)
  377. {
  378. struct drm_device *dev = dev_priv->dev;
  379. struct bdb_driver_features *driver;
  380. driver = find_section(bdb, BDB_DRIVER_FEATURES);
  381. if (!driver)
  382. return;
  383. if (SUPPORTS_EDP(dev) &&
  384. driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
  385. dev_priv->edp.support = 1;
  386. if (driver->dual_frequency)
  387. dev_priv->render_reclock_avail = true;
  388. }
  389. static void
  390. parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
  391. {
  392. struct bdb_edp *edp;
  393. struct edp_power_seq *edp_pps;
  394. struct edp_link_params *edp_link_params;
  395. edp = find_section(bdb, BDB_EDP);
  396. if (!edp) {
  397. if (SUPPORTS_EDP(dev_priv->dev) && dev_priv->edp.support) {
  398. DRM_DEBUG_KMS("No eDP BDB found but eDP panel "
  399. "supported, assume %dbpp panel color "
  400. "depth.\n",
  401. dev_priv->edp.bpp);
  402. }
  403. return;
  404. }
  405. switch ((edp->color_depth >> (panel_type * 2)) & 3) {
  406. case EDP_18BPP:
  407. dev_priv->edp.bpp = 18;
  408. break;
  409. case EDP_24BPP:
  410. dev_priv->edp.bpp = 24;
  411. break;
  412. case EDP_30BPP:
  413. dev_priv->edp.bpp = 30;
  414. break;
  415. }
  416. /* Get the eDP sequencing and link info */
  417. edp_pps = &edp->power_seqs[panel_type];
  418. edp_link_params = &edp->link_params[panel_type];
  419. dev_priv->edp.pps = *edp_pps;
  420. dev_priv->edp.rate = edp_link_params->rate ? DP_LINK_BW_2_7 :
  421. DP_LINK_BW_1_62;
  422. switch (edp_link_params->lanes) {
  423. case 0:
  424. dev_priv->edp.lanes = 1;
  425. break;
  426. case 1:
  427. dev_priv->edp.lanes = 2;
  428. break;
  429. case 3:
  430. default:
  431. dev_priv->edp.lanes = 4;
  432. break;
  433. }
  434. switch (edp_link_params->preemphasis) {
  435. case 0:
  436. dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_0;
  437. break;
  438. case 1:
  439. dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_3_5;
  440. break;
  441. case 2:
  442. dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_6;
  443. break;
  444. case 3:
  445. dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_9_5;
  446. break;
  447. }
  448. switch (edp_link_params->vswing) {
  449. case 0:
  450. dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_400;
  451. break;
  452. case 1:
  453. dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_600;
  454. break;
  455. case 2:
  456. dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_800;
  457. break;
  458. case 3:
  459. dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_1200;
  460. break;
  461. }
  462. }
  463. static void
  464. parse_device_mapping(struct drm_i915_private *dev_priv,
  465. struct bdb_header *bdb)
  466. {
  467. struct bdb_general_definitions *p_defs;
  468. struct child_device_config *p_child, *child_dev_ptr;
  469. int i, child_device_num, count;
  470. u16 block_size;
  471. p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
  472. if (!p_defs) {
  473. DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
  474. return;
  475. }
  476. /* judge whether the size of child device meets the requirements.
  477. * If the child device size obtained from general definition block
  478. * is different with sizeof(struct child_device_config), skip the
  479. * parsing of sdvo device info
  480. */
  481. if (p_defs->child_dev_size != sizeof(*p_child)) {
  482. /* different child dev size . Ignore it */
  483. DRM_DEBUG_KMS("different child size is found. Invalid.\n");
  484. return;
  485. }
  486. /* get the block size of general definitions */
  487. block_size = get_blocksize(p_defs);
  488. /* get the number of child device */
  489. child_device_num = (block_size - sizeof(*p_defs)) /
  490. sizeof(*p_child);
  491. count = 0;
  492. /* get the number of child device that is present */
  493. for (i = 0; i < child_device_num; i++) {
  494. p_child = &(p_defs->devices[i]);
  495. if (!p_child->device_type) {
  496. /* skip the device block if device type is invalid */
  497. continue;
  498. }
  499. count++;
  500. }
  501. if (!count) {
  502. DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
  503. return;
  504. }
  505. dev_priv->child_dev = kzalloc(sizeof(*p_child) * count, GFP_KERNEL);
  506. if (!dev_priv->child_dev) {
  507. DRM_DEBUG_KMS("No memory space for child device\n");
  508. return;
  509. }
  510. dev_priv->child_dev_num = count;
  511. count = 0;
  512. for (i = 0; i < child_device_num; i++) {
  513. p_child = &(p_defs->devices[i]);
  514. if (!p_child->device_type) {
  515. /* skip the device block if device type is invalid */
  516. continue;
  517. }
  518. child_dev_ptr = dev_priv->child_dev + count;
  519. count++;
  520. memcpy((void *)child_dev_ptr, (void *)p_child,
  521. sizeof(*p_child));
  522. }
  523. return;
  524. }
  525. static void
  526. init_vbt_defaults(struct drm_i915_private *dev_priv)
  527. {
  528. struct drm_device *dev = dev_priv->dev;
  529. dev_priv->crt_ddc_pin = GMBUS_PORT_VGADDC;
  530. /* LFP panel data */
  531. dev_priv->lvds_dither = 1;
  532. dev_priv->lvds_vbt = 0;
  533. /* SDVO panel data */
  534. dev_priv->sdvo_lvds_vbt_mode = NULL;
  535. /* general features */
  536. dev_priv->int_tv_support = 1;
  537. dev_priv->int_crt_support = 1;
  538. /* Default to using SSC */
  539. dev_priv->lvds_use_ssc = 1;
  540. dev_priv->lvds_ssc_freq = intel_bios_ssc_frequency(dev, 1);
  541. DRM_DEBUG_KMS("Set default to SSC at %dMHz\n", dev_priv->lvds_ssc_freq);
  542. /* eDP data */
  543. dev_priv->edp.bpp = 18;
  544. }
  545. /**
  546. * intel_parse_bios - find VBT and initialize settings from the BIOS
  547. * @dev: DRM device
  548. *
  549. * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers
  550. * to appropriate values.
  551. *
  552. * Returns 0 on success, nonzero on failure.
  553. */
  554. bool
  555. intel_parse_bios(struct drm_device *dev)
  556. {
  557. struct drm_i915_private *dev_priv = dev->dev_private;
  558. struct pci_dev *pdev = dev->pdev;
  559. struct bdb_header *bdb = NULL;
  560. u8 __iomem *bios = NULL;
  561. init_vbt_defaults(dev_priv);
  562. /* XXX Should this validation be moved to intel_opregion.c? */
  563. if (dev_priv->opregion.vbt) {
  564. struct vbt_header *vbt = dev_priv->opregion.vbt;
  565. if (memcmp(vbt->signature, "$VBT", 4) == 0) {
  566. DRM_DEBUG_KMS("Using VBT from OpRegion: %20s\n",
  567. vbt->signature);
  568. bdb = (struct bdb_header *)((char *)vbt + vbt->bdb_offset);
  569. } else
  570. dev_priv->opregion.vbt = NULL;
  571. }
  572. if (bdb == NULL) {
  573. struct vbt_header *vbt = NULL;
  574. size_t size;
  575. int i;
  576. bios = pci_map_rom(pdev, &size);
  577. if (!bios)
  578. return -1;
  579. /* Scour memory looking for the VBT signature */
  580. for (i = 0; i + 4 < size; i++) {
  581. if (!memcmp(bios + i, "$VBT", 4)) {
  582. vbt = (struct vbt_header *)(bios + i);
  583. break;
  584. }
  585. }
  586. if (!vbt) {
  587. DRM_ERROR("VBT signature missing\n");
  588. pci_unmap_rom(pdev, bios);
  589. return -1;
  590. }
  591. bdb = (struct bdb_header *)(bios + i + vbt->bdb_offset);
  592. }
  593. /* Grab useful general definitions */
  594. parse_general_features(dev_priv, bdb);
  595. parse_general_definitions(dev_priv, bdb);
  596. parse_lfp_panel_data(dev_priv, bdb);
  597. parse_sdvo_panel_data(dev_priv, bdb);
  598. parse_sdvo_device_mapping(dev_priv, bdb);
  599. parse_device_mapping(dev_priv, bdb);
  600. parse_driver_features(dev_priv, bdb);
  601. parse_edp(dev_priv, bdb);
  602. if (bios)
  603. pci_unmap_rom(pdev, bios);
  604. return 0;
  605. }
  606. /* Ensure that vital registers have been initialised, even if the BIOS
  607. * is absent or just failing to do its job.
  608. */
  609. void intel_setup_bios(struct drm_device *dev)
  610. {
  611. struct drm_i915_private *dev_priv = dev->dev_private;
  612. /* Set the Panel Power On/Off timings if uninitialized. */
  613. if ((I915_READ(PP_ON_DELAYS) == 0) && (I915_READ(PP_OFF_DELAYS) == 0)) {
  614. /* Set T2 to 40ms and T5 to 200ms */
  615. I915_WRITE(PP_ON_DELAYS, 0x019007d0);
  616. /* Set T3 to 35ms and Tx to 200ms */
  617. I915_WRITE(PP_OFF_DELAYS, 0x015e07d0);
  618. }
  619. }