aesni-intel_glue.c 39 KB

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  1. /*
  2. * Support for Intel AES-NI instructions. This file contains glue
  3. * code, the real AES implementation is in intel-aes_asm.S.
  4. *
  5. * Copyright (C) 2008, Intel Corp.
  6. * Author: Huang Ying <ying.huang@intel.com>
  7. *
  8. * Added RFC4106 AES-GCM support for 128-bit keys under the AEAD
  9. * interface for 64-bit kernels.
  10. * Authors: Adrian Hoban <adrian.hoban@intel.com>
  11. * Gabriele Paoloni <gabriele.paoloni@intel.com>
  12. * Tadeusz Struk (tadeusz.struk@intel.com)
  13. * Aidan O'Mahony (aidan.o.mahony@intel.com)
  14. * Copyright (c) 2010, Intel Corporation.
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. */
  21. #include <linux/hardirq.h>
  22. #include <linux/types.h>
  23. #include <linux/crypto.h>
  24. #include <linux/module.h>
  25. #include <linux/err.h>
  26. #include <crypto/algapi.h>
  27. #include <crypto/aes.h>
  28. #include <crypto/cryptd.h>
  29. #include <crypto/ctr.h>
  30. #include <asm/i387.h>
  31. #include <asm/aes.h>
  32. #include <crypto/scatterwalk.h>
  33. #include <crypto/internal/aead.h>
  34. #include <linux/workqueue.h>
  35. #include <linux/spinlock.h>
  36. #if defined(CONFIG_CRYPTO_CTR) || defined(CONFIG_CRYPTO_CTR_MODULE)
  37. #define HAS_CTR
  38. #endif
  39. #if defined(CONFIG_CRYPTO_LRW) || defined(CONFIG_CRYPTO_LRW_MODULE)
  40. #define HAS_LRW
  41. #endif
  42. #if defined(CONFIG_CRYPTO_PCBC) || defined(CONFIG_CRYPTO_PCBC_MODULE)
  43. #define HAS_PCBC
  44. #endif
  45. #if defined(CONFIG_CRYPTO_XTS) || defined(CONFIG_CRYPTO_XTS_MODULE)
  46. #define HAS_XTS
  47. #endif
  48. struct async_aes_ctx {
  49. struct cryptd_ablkcipher *cryptd_tfm;
  50. };
  51. /* This data is stored at the end of the crypto_tfm struct.
  52. * It's a type of per "session" data storage location.
  53. * This needs to be 16 byte aligned.
  54. */
  55. struct aesni_rfc4106_gcm_ctx {
  56. u8 hash_subkey[16];
  57. struct crypto_aes_ctx aes_key_expanded;
  58. u8 nonce[4];
  59. struct cryptd_aead *cryptd_tfm;
  60. };
  61. struct aesni_gcm_set_hash_subkey_result {
  62. int err;
  63. struct completion completion;
  64. };
  65. struct aesni_hash_subkey_req_data {
  66. u8 iv[16];
  67. struct aesni_gcm_set_hash_subkey_result result;
  68. struct scatterlist sg;
  69. };
  70. #define AESNI_ALIGN (16)
  71. #define AES_BLOCK_MASK (~(AES_BLOCK_SIZE-1))
  72. #define RFC4106_HASH_SUBKEY_SIZE 16
  73. asmlinkage int aesni_set_key(struct crypto_aes_ctx *ctx, const u8 *in_key,
  74. unsigned int key_len);
  75. asmlinkage void aesni_enc(struct crypto_aes_ctx *ctx, u8 *out,
  76. const u8 *in);
  77. asmlinkage void aesni_dec(struct crypto_aes_ctx *ctx, u8 *out,
  78. const u8 *in);
  79. asmlinkage void aesni_ecb_enc(struct crypto_aes_ctx *ctx, u8 *out,
  80. const u8 *in, unsigned int len);
  81. asmlinkage void aesni_ecb_dec(struct crypto_aes_ctx *ctx, u8 *out,
  82. const u8 *in, unsigned int len);
  83. asmlinkage void aesni_cbc_enc(struct crypto_aes_ctx *ctx, u8 *out,
  84. const u8 *in, unsigned int len, u8 *iv);
  85. asmlinkage void aesni_cbc_dec(struct crypto_aes_ctx *ctx, u8 *out,
  86. const u8 *in, unsigned int len, u8 *iv);
  87. int crypto_fpu_init(void);
  88. void crypto_fpu_exit(void);
  89. #ifdef CONFIG_X86_64
  90. asmlinkage void aesni_ctr_enc(struct crypto_aes_ctx *ctx, u8 *out,
  91. const u8 *in, unsigned int len, u8 *iv);
  92. /* asmlinkage void aesni_gcm_enc()
  93. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  94. * u8 *out, Ciphertext output. Encrypt in-place is allowed.
  95. * const u8 *in, Plaintext input
  96. * unsigned long plaintext_len, Length of data in bytes for encryption.
  97. * u8 *iv, Pre-counter block j0: 4 byte salt (from Security Association)
  98. * concatenated with 8 byte Initialisation Vector (from IPSec ESP
  99. * Payload) concatenated with 0x00000001. 16-byte aligned pointer.
  100. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  101. * const u8 *aad, Additional Authentication Data (AAD)
  102. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this
  103. * is going to be 8 or 12 bytes
  104. * u8 *auth_tag, Authenticated Tag output.
  105. * unsigned long auth_tag_len), Authenticated Tag Length in bytes.
  106. * Valid values are 16 (most likely), 12 or 8.
  107. */
  108. asmlinkage void aesni_gcm_enc(void *ctx, u8 *out,
  109. const u8 *in, unsigned long plaintext_len, u8 *iv,
  110. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  111. u8 *auth_tag, unsigned long auth_tag_len);
  112. /* asmlinkage void aesni_gcm_dec()
  113. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  114. * u8 *out, Plaintext output. Decrypt in-place is allowed.
  115. * const u8 *in, Ciphertext input
  116. * unsigned long ciphertext_len, Length of data in bytes for decryption.
  117. * u8 *iv, Pre-counter block j0: 4 byte salt (from Security Association)
  118. * concatenated with 8 byte Initialisation Vector (from IPSec ESP
  119. * Payload) concatenated with 0x00000001. 16-byte aligned pointer.
  120. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  121. * const u8 *aad, Additional Authentication Data (AAD)
  122. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this is going
  123. * to be 8 or 12 bytes
  124. * u8 *auth_tag, Authenticated Tag output.
  125. * unsigned long auth_tag_len) Authenticated Tag Length in bytes.
  126. * Valid values are 16 (most likely), 12 or 8.
  127. */
  128. asmlinkage void aesni_gcm_dec(void *ctx, u8 *out,
  129. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  130. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  131. u8 *auth_tag, unsigned long auth_tag_len);
  132. static inline struct
  133. aesni_rfc4106_gcm_ctx *aesni_rfc4106_gcm_ctx_get(struct crypto_aead *tfm)
  134. {
  135. return
  136. (struct aesni_rfc4106_gcm_ctx *)
  137. PTR_ALIGN((u8 *)
  138. crypto_tfm_ctx(crypto_aead_tfm(tfm)), AESNI_ALIGN);
  139. }
  140. #endif
  141. static inline struct crypto_aes_ctx *aes_ctx(void *raw_ctx)
  142. {
  143. unsigned long addr = (unsigned long)raw_ctx;
  144. unsigned long align = AESNI_ALIGN;
  145. if (align <= crypto_tfm_ctx_alignment())
  146. align = 1;
  147. return (struct crypto_aes_ctx *)ALIGN(addr, align);
  148. }
  149. static int aes_set_key_common(struct crypto_tfm *tfm, void *raw_ctx,
  150. const u8 *in_key, unsigned int key_len)
  151. {
  152. struct crypto_aes_ctx *ctx = aes_ctx(raw_ctx);
  153. u32 *flags = &tfm->crt_flags;
  154. int err;
  155. if (key_len != AES_KEYSIZE_128 && key_len != AES_KEYSIZE_192 &&
  156. key_len != AES_KEYSIZE_256) {
  157. *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
  158. return -EINVAL;
  159. }
  160. if (!irq_fpu_usable())
  161. err = crypto_aes_expand_key(ctx, in_key, key_len);
  162. else {
  163. kernel_fpu_begin();
  164. err = aesni_set_key(ctx, in_key, key_len);
  165. kernel_fpu_end();
  166. }
  167. return err;
  168. }
  169. static int aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
  170. unsigned int key_len)
  171. {
  172. return aes_set_key_common(tfm, crypto_tfm_ctx(tfm), in_key, key_len);
  173. }
  174. static void aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  175. {
  176. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  177. if (!irq_fpu_usable())
  178. crypto_aes_encrypt_x86(ctx, dst, src);
  179. else {
  180. kernel_fpu_begin();
  181. aesni_enc(ctx, dst, src);
  182. kernel_fpu_end();
  183. }
  184. }
  185. static void aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  186. {
  187. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  188. if (!irq_fpu_usable())
  189. crypto_aes_decrypt_x86(ctx, dst, src);
  190. else {
  191. kernel_fpu_begin();
  192. aesni_dec(ctx, dst, src);
  193. kernel_fpu_end();
  194. }
  195. }
  196. static struct crypto_alg aesni_alg = {
  197. .cra_name = "aes",
  198. .cra_driver_name = "aes-aesni",
  199. .cra_priority = 300,
  200. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  201. .cra_blocksize = AES_BLOCK_SIZE,
  202. .cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
  203. .cra_alignmask = 0,
  204. .cra_module = THIS_MODULE,
  205. .cra_list = LIST_HEAD_INIT(aesni_alg.cra_list),
  206. .cra_u = {
  207. .cipher = {
  208. .cia_min_keysize = AES_MIN_KEY_SIZE,
  209. .cia_max_keysize = AES_MAX_KEY_SIZE,
  210. .cia_setkey = aes_set_key,
  211. .cia_encrypt = aes_encrypt,
  212. .cia_decrypt = aes_decrypt
  213. }
  214. }
  215. };
  216. static void __aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  217. {
  218. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  219. aesni_enc(ctx, dst, src);
  220. }
  221. static void __aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  222. {
  223. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  224. aesni_dec(ctx, dst, src);
  225. }
  226. static struct crypto_alg __aesni_alg = {
  227. .cra_name = "__aes-aesni",
  228. .cra_driver_name = "__driver-aes-aesni",
  229. .cra_priority = 0,
  230. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  231. .cra_blocksize = AES_BLOCK_SIZE,
  232. .cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
  233. .cra_alignmask = 0,
  234. .cra_module = THIS_MODULE,
  235. .cra_list = LIST_HEAD_INIT(__aesni_alg.cra_list),
  236. .cra_u = {
  237. .cipher = {
  238. .cia_min_keysize = AES_MIN_KEY_SIZE,
  239. .cia_max_keysize = AES_MAX_KEY_SIZE,
  240. .cia_setkey = aes_set_key,
  241. .cia_encrypt = __aes_encrypt,
  242. .cia_decrypt = __aes_decrypt
  243. }
  244. }
  245. };
  246. static int ecb_encrypt(struct blkcipher_desc *desc,
  247. struct scatterlist *dst, struct scatterlist *src,
  248. unsigned int nbytes)
  249. {
  250. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  251. struct blkcipher_walk walk;
  252. int err;
  253. blkcipher_walk_init(&walk, dst, src, nbytes);
  254. err = blkcipher_walk_virt(desc, &walk);
  255. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  256. kernel_fpu_begin();
  257. while ((nbytes = walk.nbytes)) {
  258. aesni_ecb_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  259. nbytes & AES_BLOCK_MASK);
  260. nbytes &= AES_BLOCK_SIZE - 1;
  261. err = blkcipher_walk_done(desc, &walk, nbytes);
  262. }
  263. kernel_fpu_end();
  264. return err;
  265. }
  266. static int ecb_decrypt(struct blkcipher_desc *desc,
  267. struct scatterlist *dst, struct scatterlist *src,
  268. unsigned int nbytes)
  269. {
  270. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  271. struct blkcipher_walk walk;
  272. int err;
  273. blkcipher_walk_init(&walk, dst, src, nbytes);
  274. err = blkcipher_walk_virt(desc, &walk);
  275. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  276. kernel_fpu_begin();
  277. while ((nbytes = walk.nbytes)) {
  278. aesni_ecb_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  279. nbytes & AES_BLOCK_MASK);
  280. nbytes &= AES_BLOCK_SIZE - 1;
  281. err = blkcipher_walk_done(desc, &walk, nbytes);
  282. }
  283. kernel_fpu_end();
  284. return err;
  285. }
  286. static struct crypto_alg blk_ecb_alg = {
  287. .cra_name = "__ecb-aes-aesni",
  288. .cra_driver_name = "__driver-ecb-aes-aesni",
  289. .cra_priority = 0,
  290. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  291. .cra_blocksize = AES_BLOCK_SIZE,
  292. .cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
  293. .cra_alignmask = 0,
  294. .cra_type = &crypto_blkcipher_type,
  295. .cra_module = THIS_MODULE,
  296. .cra_list = LIST_HEAD_INIT(blk_ecb_alg.cra_list),
  297. .cra_u = {
  298. .blkcipher = {
  299. .min_keysize = AES_MIN_KEY_SIZE,
  300. .max_keysize = AES_MAX_KEY_SIZE,
  301. .setkey = aes_set_key,
  302. .encrypt = ecb_encrypt,
  303. .decrypt = ecb_decrypt,
  304. },
  305. },
  306. };
  307. static int cbc_encrypt(struct blkcipher_desc *desc,
  308. struct scatterlist *dst, struct scatterlist *src,
  309. unsigned int nbytes)
  310. {
  311. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  312. struct blkcipher_walk walk;
  313. int err;
  314. blkcipher_walk_init(&walk, dst, src, nbytes);
  315. err = blkcipher_walk_virt(desc, &walk);
  316. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  317. kernel_fpu_begin();
  318. while ((nbytes = walk.nbytes)) {
  319. aesni_cbc_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  320. nbytes & AES_BLOCK_MASK, walk.iv);
  321. nbytes &= AES_BLOCK_SIZE - 1;
  322. err = blkcipher_walk_done(desc, &walk, nbytes);
  323. }
  324. kernel_fpu_end();
  325. return err;
  326. }
  327. static int cbc_decrypt(struct blkcipher_desc *desc,
  328. struct scatterlist *dst, struct scatterlist *src,
  329. unsigned int nbytes)
  330. {
  331. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  332. struct blkcipher_walk walk;
  333. int err;
  334. blkcipher_walk_init(&walk, dst, src, nbytes);
  335. err = blkcipher_walk_virt(desc, &walk);
  336. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  337. kernel_fpu_begin();
  338. while ((nbytes = walk.nbytes)) {
  339. aesni_cbc_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  340. nbytes & AES_BLOCK_MASK, walk.iv);
  341. nbytes &= AES_BLOCK_SIZE - 1;
  342. err = blkcipher_walk_done(desc, &walk, nbytes);
  343. }
  344. kernel_fpu_end();
  345. return err;
  346. }
  347. static struct crypto_alg blk_cbc_alg = {
  348. .cra_name = "__cbc-aes-aesni",
  349. .cra_driver_name = "__driver-cbc-aes-aesni",
  350. .cra_priority = 0,
  351. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  352. .cra_blocksize = AES_BLOCK_SIZE,
  353. .cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
  354. .cra_alignmask = 0,
  355. .cra_type = &crypto_blkcipher_type,
  356. .cra_module = THIS_MODULE,
  357. .cra_list = LIST_HEAD_INIT(blk_cbc_alg.cra_list),
  358. .cra_u = {
  359. .blkcipher = {
  360. .min_keysize = AES_MIN_KEY_SIZE,
  361. .max_keysize = AES_MAX_KEY_SIZE,
  362. .setkey = aes_set_key,
  363. .encrypt = cbc_encrypt,
  364. .decrypt = cbc_decrypt,
  365. },
  366. },
  367. };
  368. #ifdef CONFIG_X86_64
  369. static void ctr_crypt_final(struct crypto_aes_ctx *ctx,
  370. struct blkcipher_walk *walk)
  371. {
  372. u8 *ctrblk = walk->iv;
  373. u8 keystream[AES_BLOCK_SIZE];
  374. u8 *src = walk->src.virt.addr;
  375. u8 *dst = walk->dst.virt.addr;
  376. unsigned int nbytes = walk->nbytes;
  377. aesni_enc(ctx, keystream, ctrblk);
  378. crypto_xor(keystream, src, nbytes);
  379. memcpy(dst, keystream, nbytes);
  380. crypto_inc(ctrblk, AES_BLOCK_SIZE);
  381. }
  382. static int ctr_crypt(struct blkcipher_desc *desc,
  383. struct scatterlist *dst, struct scatterlist *src,
  384. unsigned int nbytes)
  385. {
  386. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  387. struct blkcipher_walk walk;
  388. int err;
  389. blkcipher_walk_init(&walk, dst, src, nbytes);
  390. err = blkcipher_walk_virt_block(desc, &walk, AES_BLOCK_SIZE);
  391. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  392. kernel_fpu_begin();
  393. while ((nbytes = walk.nbytes) >= AES_BLOCK_SIZE) {
  394. aesni_ctr_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  395. nbytes & AES_BLOCK_MASK, walk.iv);
  396. nbytes &= AES_BLOCK_SIZE - 1;
  397. err = blkcipher_walk_done(desc, &walk, nbytes);
  398. }
  399. if (walk.nbytes) {
  400. ctr_crypt_final(ctx, &walk);
  401. err = blkcipher_walk_done(desc, &walk, 0);
  402. }
  403. kernel_fpu_end();
  404. return err;
  405. }
  406. static struct crypto_alg blk_ctr_alg = {
  407. .cra_name = "__ctr-aes-aesni",
  408. .cra_driver_name = "__driver-ctr-aes-aesni",
  409. .cra_priority = 0,
  410. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  411. .cra_blocksize = 1,
  412. .cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
  413. .cra_alignmask = 0,
  414. .cra_type = &crypto_blkcipher_type,
  415. .cra_module = THIS_MODULE,
  416. .cra_list = LIST_HEAD_INIT(blk_ctr_alg.cra_list),
  417. .cra_u = {
  418. .blkcipher = {
  419. .min_keysize = AES_MIN_KEY_SIZE,
  420. .max_keysize = AES_MAX_KEY_SIZE,
  421. .ivsize = AES_BLOCK_SIZE,
  422. .setkey = aes_set_key,
  423. .encrypt = ctr_crypt,
  424. .decrypt = ctr_crypt,
  425. },
  426. },
  427. };
  428. #endif
  429. static int ablk_set_key(struct crypto_ablkcipher *tfm, const u8 *key,
  430. unsigned int key_len)
  431. {
  432. struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
  433. struct crypto_ablkcipher *child = &ctx->cryptd_tfm->base;
  434. int err;
  435. crypto_ablkcipher_clear_flags(child, CRYPTO_TFM_REQ_MASK);
  436. crypto_ablkcipher_set_flags(child, crypto_ablkcipher_get_flags(tfm)
  437. & CRYPTO_TFM_REQ_MASK);
  438. err = crypto_ablkcipher_setkey(child, key, key_len);
  439. crypto_ablkcipher_set_flags(tfm, crypto_ablkcipher_get_flags(child)
  440. & CRYPTO_TFM_RES_MASK);
  441. return err;
  442. }
  443. static int ablk_encrypt(struct ablkcipher_request *req)
  444. {
  445. struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
  446. struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
  447. if (!irq_fpu_usable()) {
  448. struct ablkcipher_request *cryptd_req =
  449. ablkcipher_request_ctx(req);
  450. memcpy(cryptd_req, req, sizeof(*req));
  451. ablkcipher_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  452. return crypto_ablkcipher_encrypt(cryptd_req);
  453. } else {
  454. struct blkcipher_desc desc;
  455. desc.tfm = cryptd_ablkcipher_child(ctx->cryptd_tfm);
  456. desc.info = req->info;
  457. desc.flags = 0;
  458. return crypto_blkcipher_crt(desc.tfm)->encrypt(
  459. &desc, req->dst, req->src, req->nbytes);
  460. }
  461. }
  462. static int ablk_decrypt(struct ablkcipher_request *req)
  463. {
  464. struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
  465. struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
  466. if (!irq_fpu_usable()) {
  467. struct ablkcipher_request *cryptd_req =
  468. ablkcipher_request_ctx(req);
  469. memcpy(cryptd_req, req, sizeof(*req));
  470. ablkcipher_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  471. return crypto_ablkcipher_decrypt(cryptd_req);
  472. } else {
  473. struct blkcipher_desc desc;
  474. desc.tfm = cryptd_ablkcipher_child(ctx->cryptd_tfm);
  475. desc.info = req->info;
  476. desc.flags = 0;
  477. return crypto_blkcipher_crt(desc.tfm)->decrypt(
  478. &desc, req->dst, req->src, req->nbytes);
  479. }
  480. }
  481. static void ablk_exit(struct crypto_tfm *tfm)
  482. {
  483. struct async_aes_ctx *ctx = crypto_tfm_ctx(tfm);
  484. cryptd_free_ablkcipher(ctx->cryptd_tfm);
  485. }
  486. static void ablk_init_common(struct crypto_tfm *tfm,
  487. struct cryptd_ablkcipher *cryptd_tfm)
  488. {
  489. struct async_aes_ctx *ctx = crypto_tfm_ctx(tfm);
  490. ctx->cryptd_tfm = cryptd_tfm;
  491. tfm->crt_ablkcipher.reqsize = sizeof(struct ablkcipher_request) +
  492. crypto_ablkcipher_reqsize(&cryptd_tfm->base);
  493. }
  494. static int ablk_ecb_init(struct crypto_tfm *tfm)
  495. {
  496. struct cryptd_ablkcipher *cryptd_tfm;
  497. cryptd_tfm = cryptd_alloc_ablkcipher("__driver-ecb-aes-aesni", 0, 0);
  498. if (IS_ERR(cryptd_tfm))
  499. return PTR_ERR(cryptd_tfm);
  500. ablk_init_common(tfm, cryptd_tfm);
  501. return 0;
  502. }
  503. static struct crypto_alg ablk_ecb_alg = {
  504. .cra_name = "ecb(aes)",
  505. .cra_driver_name = "ecb-aes-aesni",
  506. .cra_priority = 400,
  507. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  508. .cra_blocksize = AES_BLOCK_SIZE,
  509. .cra_ctxsize = sizeof(struct async_aes_ctx),
  510. .cra_alignmask = 0,
  511. .cra_type = &crypto_ablkcipher_type,
  512. .cra_module = THIS_MODULE,
  513. .cra_list = LIST_HEAD_INIT(ablk_ecb_alg.cra_list),
  514. .cra_init = ablk_ecb_init,
  515. .cra_exit = ablk_exit,
  516. .cra_u = {
  517. .ablkcipher = {
  518. .min_keysize = AES_MIN_KEY_SIZE,
  519. .max_keysize = AES_MAX_KEY_SIZE,
  520. .setkey = ablk_set_key,
  521. .encrypt = ablk_encrypt,
  522. .decrypt = ablk_decrypt,
  523. },
  524. },
  525. };
  526. static int ablk_cbc_init(struct crypto_tfm *tfm)
  527. {
  528. struct cryptd_ablkcipher *cryptd_tfm;
  529. cryptd_tfm = cryptd_alloc_ablkcipher("__driver-cbc-aes-aesni", 0, 0);
  530. if (IS_ERR(cryptd_tfm))
  531. return PTR_ERR(cryptd_tfm);
  532. ablk_init_common(tfm, cryptd_tfm);
  533. return 0;
  534. }
  535. static struct crypto_alg ablk_cbc_alg = {
  536. .cra_name = "cbc(aes)",
  537. .cra_driver_name = "cbc-aes-aesni",
  538. .cra_priority = 400,
  539. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  540. .cra_blocksize = AES_BLOCK_SIZE,
  541. .cra_ctxsize = sizeof(struct async_aes_ctx),
  542. .cra_alignmask = 0,
  543. .cra_type = &crypto_ablkcipher_type,
  544. .cra_module = THIS_MODULE,
  545. .cra_list = LIST_HEAD_INIT(ablk_cbc_alg.cra_list),
  546. .cra_init = ablk_cbc_init,
  547. .cra_exit = ablk_exit,
  548. .cra_u = {
  549. .ablkcipher = {
  550. .min_keysize = AES_MIN_KEY_SIZE,
  551. .max_keysize = AES_MAX_KEY_SIZE,
  552. .ivsize = AES_BLOCK_SIZE,
  553. .setkey = ablk_set_key,
  554. .encrypt = ablk_encrypt,
  555. .decrypt = ablk_decrypt,
  556. },
  557. },
  558. };
  559. #ifdef CONFIG_X86_64
  560. static int ablk_ctr_init(struct crypto_tfm *tfm)
  561. {
  562. struct cryptd_ablkcipher *cryptd_tfm;
  563. cryptd_tfm = cryptd_alloc_ablkcipher("__driver-ctr-aes-aesni", 0, 0);
  564. if (IS_ERR(cryptd_tfm))
  565. return PTR_ERR(cryptd_tfm);
  566. ablk_init_common(tfm, cryptd_tfm);
  567. return 0;
  568. }
  569. static struct crypto_alg ablk_ctr_alg = {
  570. .cra_name = "ctr(aes)",
  571. .cra_driver_name = "ctr-aes-aesni",
  572. .cra_priority = 400,
  573. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  574. .cra_blocksize = 1,
  575. .cra_ctxsize = sizeof(struct async_aes_ctx),
  576. .cra_alignmask = 0,
  577. .cra_type = &crypto_ablkcipher_type,
  578. .cra_module = THIS_MODULE,
  579. .cra_list = LIST_HEAD_INIT(ablk_ctr_alg.cra_list),
  580. .cra_init = ablk_ctr_init,
  581. .cra_exit = ablk_exit,
  582. .cra_u = {
  583. .ablkcipher = {
  584. .min_keysize = AES_MIN_KEY_SIZE,
  585. .max_keysize = AES_MAX_KEY_SIZE,
  586. .ivsize = AES_BLOCK_SIZE,
  587. .setkey = ablk_set_key,
  588. .encrypt = ablk_encrypt,
  589. .decrypt = ablk_encrypt,
  590. .geniv = "chainiv",
  591. },
  592. },
  593. };
  594. #ifdef HAS_CTR
  595. static int ablk_rfc3686_ctr_init(struct crypto_tfm *tfm)
  596. {
  597. struct cryptd_ablkcipher *cryptd_tfm;
  598. cryptd_tfm = cryptd_alloc_ablkcipher(
  599. "rfc3686(__driver-ctr-aes-aesni)", 0, 0);
  600. if (IS_ERR(cryptd_tfm))
  601. return PTR_ERR(cryptd_tfm);
  602. ablk_init_common(tfm, cryptd_tfm);
  603. return 0;
  604. }
  605. static struct crypto_alg ablk_rfc3686_ctr_alg = {
  606. .cra_name = "rfc3686(ctr(aes))",
  607. .cra_driver_name = "rfc3686-ctr-aes-aesni",
  608. .cra_priority = 400,
  609. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  610. .cra_blocksize = 1,
  611. .cra_ctxsize = sizeof(struct async_aes_ctx),
  612. .cra_alignmask = 0,
  613. .cra_type = &crypto_ablkcipher_type,
  614. .cra_module = THIS_MODULE,
  615. .cra_list = LIST_HEAD_INIT(ablk_rfc3686_ctr_alg.cra_list),
  616. .cra_init = ablk_rfc3686_ctr_init,
  617. .cra_exit = ablk_exit,
  618. .cra_u = {
  619. .ablkcipher = {
  620. .min_keysize = AES_MIN_KEY_SIZE+CTR_RFC3686_NONCE_SIZE,
  621. .max_keysize = AES_MAX_KEY_SIZE+CTR_RFC3686_NONCE_SIZE,
  622. .ivsize = CTR_RFC3686_IV_SIZE,
  623. .setkey = ablk_set_key,
  624. .encrypt = ablk_encrypt,
  625. .decrypt = ablk_decrypt,
  626. .geniv = "seqiv",
  627. },
  628. },
  629. };
  630. #endif
  631. #endif
  632. #ifdef HAS_LRW
  633. static int ablk_lrw_init(struct crypto_tfm *tfm)
  634. {
  635. struct cryptd_ablkcipher *cryptd_tfm;
  636. cryptd_tfm = cryptd_alloc_ablkcipher("fpu(lrw(__driver-aes-aesni))",
  637. 0, 0);
  638. if (IS_ERR(cryptd_tfm))
  639. return PTR_ERR(cryptd_tfm);
  640. ablk_init_common(tfm, cryptd_tfm);
  641. return 0;
  642. }
  643. static struct crypto_alg ablk_lrw_alg = {
  644. .cra_name = "lrw(aes)",
  645. .cra_driver_name = "lrw-aes-aesni",
  646. .cra_priority = 400,
  647. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  648. .cra_blocksize = AES_BLOCK_SIZE,
  649. .cra_ctxsize = sizeof(struct async_aes_ctx),
  650. .cra_alignmask = 0,
  651. .cra_type = &crypto_ablkcipher_type,
  652. .cra_module = THIS_MODULE,
  653. .cra_list = LIST_HEAD_INIT(ablk_lrw_alg.cra_list),
  654. .cra_init = ablk_lrw_init,
  655. .cra_exit = ablk_exit,
  656. .cra_u = {
  657. .ablkcipher = {
  658. .min_keysize = AES_MIN_KEY_SIZE + AES_BLOCK_SIZE,
  659. .max_keysize = AES_MAX_KEY_SIZE + AES_BLOCK_SIZE,
  660. .ivsize = AES_BLOCK_SIZE,
  661. .setkey = ablk_set_key,
  662. .encrypt = ablk_encrypt,
  663. .decrypt = ablk_decrypt,
  664. },
  665. },
  666. };
  667. #endif
  668. #ifdef HAS_PCBC
  669. static int ablk_pcbc_init(struct crypto_tfm *tfm)
  670. {
  671. struct cryptd_ablkcipher *cryptd_tfm;
  672. cryptd_tfm = cryptd_alloc_ablkcipher("fpu(pcbc(__driver-aes-aesni))",
  673. 0, 0);
  674. if (IS_ERR(cryptd_tfm))
  675. return PTR_ERR(cryptd_tfm);
  676. ablk_init_common(tfm, cryptd_tfm);
  677. return 0;
  678. }
  679. static struct crypto_alg ablk_pcbc_alg = {
  680. .cra_name = "pcbc(aes)",
  681. .cra_driver_name = "pcbc-aes-aesni",
  682. .cra_priority = 400,
  683. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  684. .cra_blocksize = AES_BLOCK_SIZE,
  685. .cra_ctxsize = sizeof(struct async_aes_ctx),
  686. .cra_alignmask = 0,
  687. .cra_type = &crypto_ablkcipher_type,
  688. .cra_module = THIS_MODULE,
  689. .cra_list = LIST_HEAD_INIT(ablk_pcbc_alg.cra_list),
  690. .cra_init = ablk_pcbc_init,
  691. .cra_exit = ablk_exit,
  692. .cra_u = {
  693. .ablkcipher = {
  694. .min_keysize = AES_MIN_KEY_SIZE,
  695. .max_keysize = AES_MAX_KEY_SIZE,
  696. .ivsize = AES_BLOCK_SIZE,
  697. .setkey = ablk_set_key,
  698. .encrypt = ablk_encrypt,
  699. .decrypt = ablk_decrypt,
  700. },
  701. },
  702. };
  703. #endif
  704. #ifdef HAS_XTS
  705. static int ablk_xts_init(struct crypto_tfm *tfm)
  706. {
  707. struct cryptd_ablkcipher *cryptd_tfm;
  708. cryptd_tfm = cryptd_alloc_ablkcipher("fpu(xts(__driver-aes-aesni))",
  709. 0, 0);
  710. if (IS_ERR(cryptd_tfm))
  711. return PTR_ERR(cryptd_tfm);
  712. ablk_init_common(tfm, cryptd_tfm);
  713. return 0;
  714. }
  715. static struct crypto_alg ablk_xts_alg = {
  716. .cra_name = "xts(aes)",
  717. .cra_driver_name = "xts-aes-aesni",
  718. .cra_priority = 400,
  719. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  720. .cra_blocksize = AES_BLOCK_SIZE,
  721. .cra_ctxsize = sizeof(struct async_aes_ctx),
  722. .cra_alignmask = 0,
  723. .cra_type = &crypto_ablkcipher_type,
  724. .cra_module = THIS_MODULE,
  725. .cra_list = LIST_HEAD_INIT(ablk_xts_alg.cra_list),
  726. .cra_init = ablk_xts_init,
  727. .cra_exit = ablk_exit,
  728. .cra_u = {
  729. .ablkcipher = {
  730. .min_keysize = 2 * AES_MIN_KEY_SIZE,
  731. .max_keysize = 2 * AES_MAX_KEY_SIZE,
  732. .ivsize = AES_BLOCK_SIZE,
  733. .setkey = ablk_set_key,
  734. .encrypt = ablk_encrypt,
  735. .decrypt = ablk_decrypt,
  736. },
  737. },
  738. };
  739. #endif
  740. #ifdef CONFIG_X86_64
  741. static int rfc4106_init(struct crypto_tfm *tfm)
  742. {
  743. struct cryptd_aead *cryptd_tfm;
  744. struct aesni_rfc4106_gcm_ctx *ctx = (struct aesni_rfc4106_gcm_ctx *)
  745. PTR_ALIGN((u8 *)crypto_tfm_ctx(tfm), AESNI_ALIGN);
  746. struct crypto_aead *cryptd_child;
  747. struct aesni_rfc4106_gcm_ctx *child_ctx;
  748. cryptd_tfm = cryptd_alloc_aead("__driver-gcm-aes-aesni", 0, 0);
  749. if (IS_ERR(cryptd_tfm))
  750. return PTR_ERR(cryptd_tfm);
  751. cryptd_child = cryptd_aead_child(cryptd_tfm);
  752. child_ctx = aesni_rfc4106_gcm_ctx_get(cryptd_child);
  753. memcpy(child_ctx, ctx, sizeof(*ctx));
  754. ctx->cryptd_tfm = cryptd_tfm;
  755. tfm->crt_aead.reqsize = sizeof(struct aead_request)
  756. + crypto_aead_reqsize(&cryptd_tfm->base);
  757. return 0;
  758. }
  759. static void rfc4106_exit(struct crypto_tfm *tfm)
  760. {
  761. struct aesni_rfc4106_gcm_ctx *ctx =
  762. (struct aesni_rfc4106_gcm_ctx *)
  763. PTR_ALIGN((u8 *)crypto_tfm_ctx(tfm), AESNI_ALIGN);
  764. if (!IS_ERR(ctx->cryptd_tfm))
  765. cryptd_free_aead(ctx->cryptd_tfm);
  766. return;
  767. }
  768. static void
  769. rfc4106_set_hash_subkey_done(struct crypto_async_request *req, int err)
  770. {
  771. struct aesni_gcm_set_hash_subkey_result *result = req->data;
  772. if (err == -EINPROGRESS)
  773. return;
  774. result->err = err;
  775. complete(&result->completion);
  776. }
  777. static int
  778. rfc4106_set_hash_subkey(u8 *hash_subkey, const u8 *key, unsigned int key_len)
  779. {
  780. struct crypto_ablkcipher *ctr_tfm;
  781. struct ablkcipher_request *req;
  782. int ret = -EINVAL;
  783. struct aesni_hash_subkey_req_data *req_data;
  784. ctr_tfm = crypto_alloc_ablkcipher("ctr(aes)", 0, 0);
  785. if (IS_ERR(ctr_tfm))
  786. return PTR_ERR(ctr_tfm);
  787. crypto_ablkcipher_clear_flags(ctr_tfm, ~0);
  788. ret = crypto_ablkcipher_setkey(ctr_tfm, key, key_len);
  789. if (ret)
  790. goto out_free_ablkcipher;
  791. ret = -ENOMEM;
  792. req = ablkcipher_request_alloc(ctr_tfm, GFP_KERNEL);
  793. if (!req)
  794. goto out_free_ablkcipher;
  795. req_data = kmalloc(sizeof(*req_data), GFP_KERNEL);
  796. if (!req_data)
  797. goto out_free_request;
  798. memset(req_data->iv, 0, sizeof(req_data->iv));
  799. /* Clear the data in the hash sub key container to zero.*/
  800. /* We want to cipher all zeros to create the hash sub key. */
  801. memset(hash_subkey, 0, RFC4106_HASH_SUBKEY_SIZE);
  802. init_completion(&req_data->result.completion);
  803. sg_init_one(&req_data->sg, hash_subkey, RFC4106_HASH_SUBKEY_SIZE);
  804. ablkcipher_request_set_tfm(req, ctr_tfm);
  805. ablkcipher_request_set_callback(req, CRYPTO_TFM_REQ_MAY_SLEEP |
  806. CRYPTO_TFM_REQ_MAY_BACKLOG,
  807. rfc4106_set_hash_subkey_done,
  808. &req_data->result);
  809. ablkcipher_request_set_crypt(req, &req_data->sg,
  810. &req_data->sg, RFC4106_HASH_SUBKEY_SIZE, req_data->iv);
  811. ret = crypto_ablkcipher_encrypt(req);
  812. if (ret == -EINPROGRESS || ret == -EBUSY) {
  813. ret = wait_for_completion_interruptible
  814. (&req_data->result.completion);
  815. if (!ret)
  816. ret = req_data->result.err;
  817. }
  818. kfree(req_data);
  819. out_free_request:
  820. ablkcipher_request_free(req);
  821. out_free_ablkcipher:
  822. crypto_free_ablkcipher(ctr_tfm);
  823. return ret;
  824. }
  825. static int rfc4106_set_key(struct crypto_aead *parent, const u8 *key,
  826. unsigned int key_len)
  827. {
  828. int ret = 0;
  829. struct crypto_tfm *tfm = crypto_aead_tfm(parent);
  830. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(parent);
  831. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  832. struct aesni_rfc4106_gcm_ctx *child_ctx =
  833. aesni_rfc4106_gcm_ctx_get(cryptd_child);
  834. u8 *new_key_mem = NULL;
  835. if (key_len < 4) {
  836. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  837. return -EINVAL;
  838. }
  839. /*Account for 4 byte nonce at the end.*/
  840. key_len -= 4;
  841. if (key_len != AES_KEYSIZE_128) {
  842. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  843. return -EINVAL;
  844. }
  845. memcpy(ctx->nonce, key + key_len, sizeof(ctx->nonce));
  846. /*This must be on a 16 byte boundary!*/
  847. if ((unsigned long)(&(ctx->aes_key_expanded.key_enc[0])) % AESNI_ALIGN)
  848. return -EINVAL;
  849. if ((unsigned long)key % AESNI_ALIGN) {
  850. /*key is not aligned: use an auxuliar aligned pointer*/
  851. new_key_mem = kmalloc(key_len+AESNI_ALIGN, GFP_KERNEL);
  852. if (!new_key_mem)
  853. return -ENOMEM;
  854. new_key_mem = PTR_ALIGN(new_key_mem, AESNI_ALIGN);
  855. memcpy(new_key_mem, key, key_len);
  856. key = new_key_mem;
  857. }
  858. if (!irq_fpu_usable())
  859. ret = crypto_aes_expand_key(&(ctx->aes_key_expanded),
  860. key, key_len);
  861. else {
  862. kernel_fpu_begin();
  863. ret = aesni_set_key(&(ctx->aes_key_expanded), key, key_len);
  864. kernel_fpu_end();
  865. }
  866. /*This must be on a 16 byte boundary!*/
  867. if ((unsigned long)(&(ctx->hash_subkey[0])) % AESNI_ALIGN) {
  868. ret = -EINVAL;
  869. goto exit;
  870. }
  871. ret = rfc4106_set_hash_subkey(ctx->hash_subkey, key, key_len);
  872. memcpy(child_ctx, ctx, sizeof(*ctx));
  873. exit:
  874. kfree(new_key_mem);
  875. return ret;
  876. }
  877. /* This is the Integrity Check Value (aka the authentication tag length and can
  878. * be 8, 12 or 16 bytes long. */
  879. static int rfc4106_set_authsize(struct crypto_aead *parent,
  880. unsigned int authsize)
  881. {
  882. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(parent);
  883. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  884. switch (authsize) {
  885. case 8:
  886. case 12:
  887. case 16:
  888. break;
  889. default:
  890. return -EINVAL;
  891. }
  892. crypto_aead_crt(parent)->authsize = authsize;
  893. crypto_aead_crt(cryptd_child)->authsize = authsize;
  894. return 0;
  895. }
  896. static int rfc4106_encrypt(struct aead_request *req)
  897. {
  898. int ret;
  899. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  900. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  901. if (!irq_fpu_usable()) {
  902. struct aead_request *cryptd_req =
  903. (struct aead_request *) aead_request_ctx(req);
  904. memcpy(cryptd_req, req, sizeof(*req));
  905. aead_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  906. return crypto_aead_encrypt(cryptd_req);
  907. } else {
  908. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  909. kernel_fpu_begin();
  910. ret = cryptd_child->base.crt_aead.encrypt(req);
  911. kernel_fpu_end();
  912. return ret;
  913. }
  914. }
  915. static int rfc4106_decrypt(struct aead_request *req)
  916. {
  917. int ret;
  918. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  919. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  920. if (!irq_fpu_usable()) {
  921. struct aead_request *cryptd_req =
  922. (struct aead_request *) aead_request_ctx(req);
  923. memcpy(cryptd_req, req, sizeof(*req));
  924. aead_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  925. return crypto_aead_decrypt(cryptd_req);
  926. } else {
  927. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  928. kernel_fpu_begin();
  929. ret = cryptd_child->base.crt_aead.decrypt(req);
  930. kernel_fpu_end();
  931. return ret;
  932. }
  933. }
  934. static struct crypto_alg rfc4106_alg = {
  935. .cra_name = "rfc4106(gcm(aes))",
  936. .cra_driver_name = "rfc4106-gcm-aesni",
  937. .cra_priority = 400,
  938. .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
  939. .cra_blocksize = 1,
  940. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx) + AESNI_ALIGN,
  941. .cra_alignmask = 0,
  942. .cra_type = &crypto_nivaead_type,
  943. .cra_module = THIS_MODULE,
  944. .cra_list = LIST_HEAD_INIT(rfc4106_alg.cra_list),
  945. .cra_init = rfc4106_init,
  946. .cra_exit = rfc4106_exit,
  947. .cra_u = {
  948. .aead = {
  949. .setkey = rfc4106_set_key,
  950. .setauthsize = rfc4106_set_authsize,
  951. .encrypt = rfc4106_encrypt,
  952. .decrypt = rfc4106_decrypt,
  953. .geniv = "seqiv",
  954. .ivsize = 8,
  955. .maxauthsize = 16,
  956. },
  957. },
  958. };
  959. static int __driver_rfc4106_encrypt(struct aead_request *req)
  960. {
  961. u8 one_entry_in_sg = 0;
  962. u8 *src, *dst, *assoc;
  963. __be32 counter = cpu_to_be32(1);
  964. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  965. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  966. void *aes_ctx = &(ctx->aes_key_expanded);
  967. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  968. u8 iv_tab[16+AESNI_ALIGN];
  969. u8* iv = (u8 *) PTR_ALIGN((u8 *)iv_tab, AESNI_ALIGN);
  970. struct scatter_walk src_sg_walk;
  971. struct scatter_walk assoc_sg_walk;
  972. struct scatter_walk dst_sg_walk;
  973. unsigned int i;
  974. /* Assuming we are supporting rfc4106 64-bit extended */
  975. /* sequence numbers We need to have the AAD length equal */
  976. /* to 8 or 12 bytes */
  977. if (unlikely(req->assoclen != 8 && req->assoclen != 12))
  978. return -EINVAL;
  979. /* IV below built */
  980. for (i = 0; i < 4; i++)
  981. *(iv+i) = ctx->nonce[i];
  982. for (i = 0; i < 8; i++)
  983. *(iv+4+i) = req->iv[i];
  984. *((__be32 *)(iv+12)) = counter;
  985. if ((sg_is_last(req->src)) && (sg_is_last(req->assoc))) {
  986. one_entry_in_sg = 1;
  987. scatterwalk_start(&src_sg_walk, req->src);
  988. scatterwalk_start(&assoc_sg_walk, req->assoc);
  989. src = scatterwalk_map(&src_sg_walk, 0);
  990. assoc = scatterwalk_map(&assoc_sg_walk, 0);
  991. dst = src;
  992. if (unlikely(req->src != req->dst)) {
  993. scatterwalk_start(&dst_sg_walk, req->dst);
  994. dst = scatterwalk_map(&dst_sg_walk, 0);
  995. }
  996. } else {
  997. /* Allocate memory for src, dst, assoc */
  998. src = kmalloc(req->cryptlen + auth_tag_len + req->assoclen,
  999. GFP_ATOMIC);
  1000. if (unlikely(!src))
  1001. return -ENOMEM;
  1002. assoc = (src + req->cryptlen + auth_tag_len);
  1003. scatterwalk_map_and_copy(src, req->src, 0, req->cryptlen, 0);
  1004. scatterwalk_map_and_copy(assoc, req->assoc, 0,
  1005. req->assoclen, 0);
  1006. dst = src;
  1007. }
  1008. aesni_gcm_enc(aes_ctx, dst, src, (unsigned long)req->cryptlen, iv,
  1009. ctx->hash_subkey, assoc, (unsigned long)req->assoclen, dst
  1010. + ((unsigned long)req->cryptlen), auth_tag_len);
  1011. /* The authTag (aka the Integrity Check Value) needs to be written
  1012. * back to the packet. */
  1013. if (one_entry_in_sg) {
  1014. if (unlikely(req->src != req->dst)) {
  1015. scatterwalk_unmap(dst, 0);
  1016. scatterwalk_done(&dst_sg_walk, 0, 0);
  1017. }
  1018. scatterwalk_unmap(src, 0);
  1019. scatterwalk_unmap(assoc, 0);
  1020. scatterwalk_done(&src_sg_walk, 0, 0);
  1021. scatterwalk_done(&assoc_sg_walk, 0, 0);
  1022. } else {
  1023. scatterwalk_map_and_copy(dst, req->dst, 0,
  1024. req->cryptlen + auth_tag_len, 1);
  1025. kfree(src);
  1026. }
  1027. return 0;
  1028. }
  1029. static int __driver_rfc4106_decrypt(struct aead_request *req)
  1030. {
  1031. u8 one_entry_in_sg = 0;
  1032. u8 *src, *dst, *assoc;
  1033. unsigned long tempCipherLen = 0;
  1034. __be32 counter = cpu_to_be32(1);
  1035. int retval = 0;
  1036. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  1037. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  1038. void *aes_ctx = &(ctx->aes_key_expanded);
  1039. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  1040. u8 iv_and_authTag[32+AESNI_ALIGN];
  1041. u8 *iv = (u8 *) PTR_ALIGN((u8 *)iv_and_authTag, AESNI_ALIGN);
  1042. u8 *authTag = iv + 16;
  1043. struct scatter_walk src_sg_walk;
  1044. struct scatter_walk assoc_sg_walk;
  1045. struct scatter_walk dst_sg_walk;
  1046. unsigned int i;
  1047. if (unlikely((req->cryptlen < auth_tag_len) ||
  1048. (req->assoclen != 8 && req->assoclen != 12)))
  1049. return -EINVAL;
  1050. /* Assuming we are supporting rfc4106 64-bit extended */
  1051. /* sequence numbers We need to have the AAD length */
  1052. /* equal to 8 or 12 bytes */
  1053. tempCipherLen = (unsigned long)(req->cryptlen - auth_tag_len);
  1054. /* IV below built */
  1055. for (i = 0; i < 4; i++)
  1056. *(iv+i) = ctx->nonce[i];
  1057. for (i = 0; i < 8; i++)
  1058. *(iv+4+i) = req->iv[i];
  1059. *((__be32 *)(iv+12)) = counter;
  1060. if ((sg_is_last(req->src)) && (sg_is_last(req->assoc))) {
  1061. one_entry_in_sg = 1;
  1062. scatterwalk_start(&src_sg_walk, req->src);
  1063. scatterwalk_start(&assoc_sg_walk, req->assoc);
  1064. src = scatterwalk_map(&src_sg_walk, 0);
  1065. assoc = scatterwalk_map(&assoc_sg_walk, 0);
  1066. dst = src;
  1067. if (unlikely(req->src != req->dst)) {
  1068. scatterwalk_start(&dst_sg_walk, req->dst);
  1069. dst = scatterwalk_map(&dst_sg_walk, 0);
  1070. }
  1071. } else {
  1072. /* Allocate memory for src, dst, assoc */
  1073. src = kmalloc(req->cryptlen + req->assoclen, GFP_ATOMIC);
  1074. if (!src)
  1075. return -ENOMEM;
  1076. assoc = (src + req->cryptlen + auth_tag_len);
  1077. scatterwalk_map_and_copy(src, req->src, 0, req->cryptlen, 0);
  1078. scatterwalk_map_and_copy(assoc, req->assoc, 0,
  1079. req->assoclen, 0);
  1080. dst = src;
  1081. }
  1082. aesni_gcm_dec(aes_ctx, dst, src, tempCipherLen, iv,
  1083. ctx->hash_subkey, assoc, (unsigned long)req->assoclen,
  1084. authTag, auth_tag_len);
  1085. /* Compare generated tag with passed in tag. */
  1086. retval = memcmp(src + tempCipherLen, authTag, auth_tag_len) ?
  1087. -EBADMSG : 0;
  1088. if (one_entry_in_sg) {
  1089. if (unlikely(req->src != req->dst)) {
  1090. scatterwalk_unmap(dst, 0);
  1091. scatterwalk_done(&dst_sg_walk, 0, 0);
  1092. }
  1093. scatterwalk_unmap(src, 0);
  1094. scatterwalk_unmap(assoc, 0);
  1095. scatterwalk_done(&src_sg_walk, 0, 0);
  1096. scatterwalk_done(&assoc_sg_walk, 0, 0);
  1097. } else {
  1098. scatterwalk_map_and_copy(dst, req->dst, 0, req->cryptlen, 1);
  1099. kfree(src);
  1100. }
  1101. return retval;
  1102. }
  1103. static struct crypto_alg __rfc4106_alg = {
  1104. .cra_name = "__gcm-aes-aesni",
  1105. .cra_driver_name = "__driver-gcm-aes-aesni",
  1106. .cra_priority = 0,
  1107. .cra_flags = CRYPTO_ALG_TYPE_AEAD,
  1108. .cra_blocksize = 1,
  1109. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx) + AESNI_ALIGN,
  1110. .cra_alignmask = 0,
  1111. .cra_type = &crypto_aead_type,
  1112. .cra_module = THIS_MODULE,
  1113. .cra_list = LIST_HEAD_INIT(__rfc4106_alg.cra_list),
  1114. .cra_u = {
  1115. .aead = {
  1116. .encrypt = __driver_rfc4106_encrypt,
  1117. .decrypt = __driver_rfc4106_decrypt,
  1118. },
  1119. },
  1120. };
  1121. #endif
  1122. static int __init aesni_init(void)
  1123. {
  1124. int err;
  1125. if (!cpu_has_aes) {
  1126. printk(KERN_INFO "Intel AES-NI instructions are not detected.\n");
  1127. return -ENODEV;
  1128. }
  1129. if ((err = crypto_fpu_init()))
  1130. goto fpu_err;
  1131. if ((err = crypto_register_alg(&aesni_alg)))
  1132. goto aes_err;
  1133. if ((err = crypto_register_alg(&__aesni_alg)))
  1134. goto __aes_err;
  1135. if ((err = crypto_register_alg(&blk_ecb_alg)))
  1136. goto blk_ecb_err;
  1137. if ((err = crypto_register_alg(&blk_cbc_alg)))
  1138. goto blk_cbc_err;
  1139. if ((err = crypto_register_alg(&ablk_ecb_alg)))
  1140. goto ablk_ecb_err;
  1141. if ((err = crypto_register_alg(&ablk_cbc_alg)))
  1142. goto ablk_cbc_err;
  1143. #ifdef CONFIG_X86_64
  1144. if ((err = crypto_register_alg(&blk_ctr_alg)))
  1145. goto blk_ctr_err;
  1146. if ((err = crypto_register_alg(&ablk_ctr_alg)))
  1147. goto ablk_ctr_err;
  1148. if ((err = crypto_register_alg(&__rfc4106_alg)))
  1149. goto __aead_gcm_err;
  1150. if ((err = crypto_register_alg(&rfc4106_alg)))
  1151. goto aead_gcm_err;
  1152. #ifdef HAS_CTR
  1153. if ((err = crypto_register_alg(&ablk_rfc3686_ctr_alg)))
  1154. goto ablk_rfc3686_ctr_err;
  1155. #endif
  1156. #endif
  1157. #ifdef HAS_LRW
  1158. if ((err = crypto_register_alg(&ablk_lrw_alg)))
  1159. goto ablk_lrw_err;
  1160. #endif
  1161. #ifdef HAS_PCBC
  1162. if ((err = crypto_register_alg(&ablk_pcbc_alg)))
  1163. goto ablk_pcbc_err;
  1164. #endif
  1165. #ifdef HAS_XTS
  1166. if ((err = crypto_register_alg(&ablk_xts_alg)))
  1167. goto ablk_xts_err;
  1168. #endif
  1169. return err;
  1170. #ifdef HAS_XTS
  1171. ablk_xts_err:
  1172. #endif
  1173. #ifdef HAS_PCBC
  1174. crypto_unregister_alg(&ablk_pcbc_alg);
  1175. ablk_pcbc_err:
  1176. #endif
  1177. #ifdef HAS_LRW
  1178. crypto_unregister_alg(&ablk_lrw_alg);
  1179. ablk_lrw_err:
  1180. #endif
  1181. #ifdef CONFIG_X86_64
  1182. #ifdef HAS_CTR
  1183. crypto_unregister_alg(&ablk_rfc3686_ctr_alg);
  1184. ablk_rfc3686_ctr_err:
  1185. #endif
  1186. crypto_unregister_alg(&rfc4106_alg);
  1187. aead_gcm_err:
  1188. crypto_unregister_alg(&__rfc4106_alg);
  1189. __aead_gcm_err:
  1190. crypto_unregister_alg(&ablk_ctr_alg);
  1191. ablk_ctr_err:
  1192. crypto_unregister_alg(&blk_ctr_alg);
  1193. blk_ctr_err:
  1194. #endif
  1195. crypto_unregister_alg(&ablk_cbc_alg);
  1196. ablk_cbc_err:
  1197. crypto_unregister_alg(&ablk_ecb_alg);
  1198. ablk_ecb_err:
  1199. crypto_unregister_alg(&blk_cbc_alg);
  1200. blk_cbc_err:
  1201. crypto_unregister_alg(&blk_ecb_alg);
  1202. blk_ecb_err:
  1203. crypto_unregister_alg(&__aesni_alg);
  1204. __aes_err:
  1205. crypto_unregister_alg(&aesni_alg);
  1206. aes_err:
  1207. fpu_err:
  1208. return err;
  1209. }
  1210. static void __exit aesni_exit(void)
  1211. {
  1212. #ifdef HAS_XTS
  1213. crypto_unregister_alg(&ablk_xts_alg);
  1214. #endif
  1215. #ifdef HAS_PCBC
  1216. crypto_unregister_alg(&ablk_pcbc_alg);
  1217. #endif
  1218. #ifdef HAS_LRW
  1219. crypto_unregister_alg(&ablk_lrw_alg);
  1220. #endif
  1221. #ifdef CONFIG_X86_64
  1222. #ifdef HAS_CTR
  1223. crypto_unregister_alg(&ablk_rfc3686_ctr_alg);
  1224. #endif
  1225. crypto_unregister_alg(&rfc4106_alg);
  1226. crypto_unregister_alg(&__rfc4106_alg);
  1227. crypto_unregister_alg(&ablk_ctr_alg);
  1228. crypto_unregister_alg(&blk_ctr_alg);
  1229. #endif
  1230. crypto_unregister_alg(&ablk_cbc_alg);
  1231. crypto_unregister_alg(&ablk_ecb_alg);
  1232. crypto_unregister_alg(&blk_cbc_alg);
  1233. crypto_unregister_alg(&blk_ecb_alg);
  1234. crypto_unregister_alg(&__aesni_alg);
  1235. crypto_unregister_alg(&aesni_alg);
  1236. crypto_fpu_exit();
  1237. }
  1238. module_init(aesni_init);
  1239. module_exit(aesni_exit);
  1240. MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm, Intel AES-NI instructions optimized");
  1241. MODULE_LICENSE("GPL");
  1242. MODULE_ALIAS("aes");