setup.c 16 KB

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  1. /*
  2. * Renesas - AP-325RXA
  3. * (Compatible with Algo System ., LTD. - AP-320A)
  4. *
  5. * Copyright (C) 2008 Renesas Solutions Corp.
  6. * Author : Yusuke Goda <goda.yuske@renesas.com>
  7. *
  8. * This file is subject to the terms and conditions of the GNU General Public
  9. * License. See the file "COPYING" in the main directory of this archive
  10. * for more details.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/device.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/mmc/host.h>
  17. #include <linux/mmc/sh_mobile_sdhi.h>
  18. #include <linux/mtd/physmap.h>
  19. #include <linux/mtd/sh_flctl.h>
  20. #include <linux/delay.h>
  21. #include <linux/i2c.h>
  22. #include <linux/smsc911x.h>
  23. #include <linux/gpio.h>
  24. #include <media/ov772x.h>
  25. #include <media/soc_camera.h>
  26. #include <media/soc_camera_platform.h>
  27. #include <media/sh_mobile_ceu.h>
  28. #include <video/sh_mobile_lcdc.h>
  29. #include <asm/io.h>
  30. #include <asm/clock.h>
  31. #include <asm/suspend.h>
  32. #include <cpu/sh7723.h>
  33. static struct smsc911x_platform_config smsc911x_config = {
  34. .phy_interface = PHY_INTERFACE_MODE_MII,
  35. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  36. .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  37. .flags = SMSC911X_USE_32BIT,
  38. };
  39. static struct resource smsc9118_resources[] = {
  40. [0] = {
  41. .start = 0xb6080000,
  42. .end = 0xb60fffff,
  43. .flags = IORESOURCE_MEM,
  44. },
  45. [1] = {
  46. .start = 35,
  47. .end = 35,
  48. .flags = IORESOURCE_IRQ,
  49. }
  50. };
  51. static struct platform_device smsc9118_device = {
  52. .name = "smsc911x",
  53. .id = -1,
  54. .num_resources = ARRAY_SIZE(smsc9118_resources),
  55. .resource = smsc9118_resources,
  56. .dev = {
  57. .platform_data = &smsc911x_config,
  58. },
  59. };
  60. /*
  61. * AP320 and AP325RXA has CPLD data in NOR Flash(0xA80000-0xABFFFF).
  62. * If this area erased, this board can not boot.
  63. */
  64. static struct mtd_partition ap325rxa_nor_flash_partitions[] = {
  65. {
  66. .name = "uboot",
  67. .offset = 0,
  68. .size = (1 * 1024 * 1024),
  69. .mask_flags = MTD_WRITEABLE, /* Read-only */
  70. }, {
  71. .name = "kernel",
  72. .offset = MTDPART_OFS_APPEND,
  73. .size = (2 * 1024 * 1024),
  74. }, {
  75. .name = "free-area0",
  76. .offset = MTDPART_OFS_APPEND,
  77. .size = ((7 * 1024 * 1024) + (512 * 1024)),
  78. }, {
  79. .name = "CPLD-Data",
  80. .offset = MTDPART_OFS_APPEND,
  81. .mask_flags = MTD_WRITEABLE, /* Read-only */
  82. .size = (1024 * 128 * 2),
  83. }, {
  84. .name = "free-area1",
  85. .offset = MTDPART_OFS_APPEND,
  86. .size = MTDPART_SIZ_FULL,
  87. },
  88. };
  89. static struct physmap_flash_data ap325rxa_nor_flash_data = {
  90. .width = 2,
  91. .parts = ap325rxa_nor_flash_partitions,
  92. .nr_parts = ARRAY_SIZE(ap325rxa_nor_flash_partitions),
  93. };
  94. static struct resource ap325rxa_nor_flash_resources[] = {
  95. [0] = {
  96. .name = "NOR Flash",
  97. .start = 0x00000000,
  98. .end = 0x00ffffff,
  99. .flags = IORESOURCE_MEM,
  100. }
  101. };
  102. static struct platform_device ap325rxa_nor_flash_device = {
  103. .name = "physmap-flash",
  104. .resource = ap325rxa_nor_flash_resources,
  105. .num_resources = ARRAY_SIZE(ap325rxa_nor_flash_resources),
  106. .dev = {
  107. .platform_data = &ap325rxa_nor_flash_data,
  108. },
  109. };
  110. static struct mtd_partition nand_partition_info[] = {
  111. {
  112. .name = "nand_data",
  113. .offset = 0,
  114. .size = MTDPART_SIZ_FULL,
  115. },
  116. };
  117. static struct resource nand_flash_resources[] = {
  118. [0] = {
  119. .start = 0xa4530000,
  120. .end = 0xa45300ff,
  121. .flags = IORESOURCE_MEM,
  122. }
  123. };
  124. static struct sh_flctl_platform_data nand_flash_data = {
  125. .parts = nand_partition_info,
  126. .nr_parts = ARRAY_SIZE(nand_partition_info),
  127. .flcmncr_val = FCKSEL_E | TYPESEL_SET | NANWF_E,
  128. .has_hwecc = 1,
  129. };
  130. static struct platform_device nand_flash_device = {
  131. .name = "sh_flctl",
  132. .resource = nand_flash_resources,
  133. .num_resources = ARRAY_SIZE(nand_flash_resources),
  134. .dev = {
  135. .platform_data = &nand_flash_data,
  136. },
  137. };
  138. #define FPGA_LCDREG 0xB4100180
  139. #define FPGA_BKLREG 0xB4100212
  140. #define FPGA_LCDREG_VAL 0x0018
  141. #define PORT_MSELCRB 0xA4050182
  142. #define PORT_HIZCRC 0xA405015C
  143. #define PORT_DRVCRA 0xA405018A
  144. #define PORT_DRVCRB 0xA405018C
  145. static int ap320_wvga_set_brightness(void *board_data, int brightness)
  146. {
  147. if (brightness) {
  148. gpio_set_value(GPIO_PTS3, 0);
  149. __raw_writew(0x100, FPGA_BKLREG);
  150. } else {
  151. __raw_writew(0, FPGA_BKLREG);
  152. gpio_set_value(GPIO_PTS3, 1);
  153. }
  154. return 0;
  155. }
  156. static int ap320_wvga_get_brightness(void *board_data)
  157. {
  158. return gpio_get_value(GPIO_PTS3);
  159. }
  160. static void ap320_wvga_power_on(void *board_data, struct fb_info *info)
  161. {
  162. msleep(100);
  163. /* ASD AP-320/325 LCD ON */
  164. __raw_writew(FPGA_LCDREG_VAL, FPGA_LCDREG);
  165. }
  166. static void ap320_wvga_power_off(void *board_data)
  167. {
  168. /* ASD AP-320/325 LCD OFF */
  169. __raw_writew(0, FPGA_LCDREG);
  170. }
  171. static const struct fb_videomode ap325rxa_lcdc_modes[] = {
  172. {
  173. .name = "LB070WV1",
  174. .xres = 800,
  175. .yres = 480,
  176. .left_margin = 32,
  177. .right_margin = 160,
  178. .hsync_len = 8,
  179. .upper_margin = 63,
  180. .lower_margin = 80,
  181. .vsync_len = 1,
  182. .sync = 0, /* hsync and vsync are active low */
  183. },
  184. };
  185. static struct sh_mobile_lcdc_info lcdc_info = {
  186. .clock_source = LCDC_CLK_EXTERNAL,
  187. .ch[0] = {
  188. .chan = LCDC_CHAN_MAINLCD,
  189. .bpp = 16,
  190. .interface_type = RGB18,
  191. .clock_divider = 1,
  192. .lcd_cfg = ap325rxa_lcdc_modes,
  193. .num_cfg = ARRAY_SIZE(ap325rxa_lcdc_modes),
  194. .lcd_size_cfg = { /* 7.0 inch */
  195. .width = 152,
  196. .height = 91,
  197. },
  198. .board_cfg = {
  199. .display_on = ap320_wvga_power_on,
  200. .display_off = ap320_wvga_power_off,
  201. .set_brightness = ap320_wvga_set_brightness,
  202. .get_brightness = ap320_wvga_get_brightness,
  203. },
  204. .bl_info = {
  205. .name = "sh_mobile_lcdc_bl",
  206. .max_brightness = 1,
  207. },
  208. }
  209. };
  210. static struct resource lcdc_resources[] = {
  211. [0] = {
  212. .name = "LCDC",
  213. .start = 0xfe940000, /* P4-only space */
  214. .end = 0xfe942fff,
  215. .flags = IORESOURCE_MEM,
  216. },
  217. [1] = {
  218. .start = 28,
  219. .flags = IORESOURCE_IRQ,
  220. },
  221. };
  222. static struct platform_device lcdc_device = {
  223. .name = "sh_mobile_lcdc_fb",
  224. .num_resources = ARRAY_SIZE(lcdc_resources),
  225. .resource = lcdc_resources,
  226. .dev = {
  227. .platform_data = &lcdc_info,
  228. },
  229. .archdata = {
  230. .hwblk_id = HWBLK_LCDC,
  231. },
  232. };
  233. static void camera_power(int val)
  234. {
  235. gpio_set_value(GPIO_PTZ5, val); /* RST_CAM/RSTB */
  236. mdelay(10);
  237. }
  238. #ifdef CONFIG_I2C
  239. /* support for the old ncm03j camera */
  240. static unsigned char camera_ncm03j_magic[] =
  241. {
  242. 0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8,
  243. 0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36,
  244. 0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F,
  245. 0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55,
  246. 0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12,
  247. 0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0,
  248. 0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F,
  249. 0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A,
  250. 0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A,
  251. 0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A,
  252. 0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56,
  253. 0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37,
  254. 0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A,
  255. 0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56,
  256. 0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC,
  257. 0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F,
  258. };
  259. static int camera_probe(void)
  260. {
  261. struct i2c_adapter *a = i2c_get_adapter(0);
  262. struct i2c_msg msg;
  263. int ret;
  264. if (!a)
  265. return -ENODEV;
  266. camera_power(1);
  267. msg.addr = 0x6e;
  268. msg.buf = camera_ncm03j_magic;
  269. msg.len = 2;
  270. msg.flags = 0;
  271. ret = i2c_transfer(a, &msg, 1);
  272. camera_power(0);
  273. return ret;
  274. }
  275. static int camera_set_capture(struct soc_camera_platform_info *info,
  276. int enable)
  277. {
  278. struct i2c_adapter *a = i2c_get_adapter(0);
  279. struct i2c_msg msg;
  280. int ret = 0;
  281. int i;
  282. camera_power(0);
  283. if (!enable)
  284. return 0; /* no disable for now */
  285. camera_power(1);
  286. for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) {
  287. u_int8_t buf[8];
  288. msg.addr = 0x6e;
  289. msg.buf = buf;
  290. msg.len = 2;
  291. msg.flags = 0;
  292. buf[0] = camera_ncm03j_magic[i];
  293. buf[1] = camera_ncm03j_magic[i + 1];
  294. ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1);
  295. }
  296. return ret;
  297. }
  298. static int ap325rxa_camera_add(struct soc_camera_device *icd);
  299. static void ap325rxa_camera_del(struct soc_camera_device *icd);
  300. static struct soc_camera_platform_info camera_info = {
  301. .format_name = "UYVY",
  302. .format_depth = 16,
  303. .format = {
  304. .code = V4L2_MBUS_FMT_UYVY8_2X8,
  305. .colorspace = V4L2_COLORSPACE_SMPTE170M,
  306. .field = V4L2_FIELD_NONE,
  307. .width = 640,
  308. .height = 480,
  309. },
  310. .mbus_param = V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_MASTER |
  311. V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_HIGH |
  312. V4L2_MBUS_DATA_ACTIVE_HIGH,
  313. .mbus_type = V4L2_MBUS_PARALLEL,
  314. .set_capture = camera_set_capture,
  315. };
  316. static struct soc_camera_link camera_link = {
  317. .bus_id = 0,
  318. .add_device = ap325rxa_camera_add,
  319. .del_device = ap325rxa_camera_del,
  320. .module_name = "soc_camera_platform",
  321. .priv = &camera_info,
  322. };
  323. static struct platform_device *camera_device;
  324. static void ap325rxa_camera_release(struct device *dev)
  325. {
  326. soc_camera_platform_release(&camera_device);
  327. }
  328. static int ap325rxa_camera_add(struct soc_camera_device *icd)
  329. {
  330. int ret = soc_camera_platform_add(icd, &camera_device, &camera_link,
  331. ap325rxa_camera_release, 0);
  332. if (ret < 0)
  333. return ret;
  334. ret = camera_probe();
  335. if (ret < 0)
  336. soc_camera_platform_del(icd, camera_device, &camera_link);
  337. return ret;
  338. }
  339. static void ap325rxa_camera_del(struct soc_camera_device *icd)
  340. {
  341. soc_camera_platform_del(icd, camera_device, &camera_link);
  342. }
  343. #endif /* CONFIG_I2C */
  344. static int ov7725_power(struct device *dev, int mode)
  345. {
  346. camera_power(0);
  347. if (mode)
  348. camera_power(1);
  349. return 0;
  350. }
  351. static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
  352. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  353. };
  354. static struct resource ceu_resources[] = {
  355. [0] = {
  356. .name = "CEU",
  357. .start = 0xfe910000,
  358. .end = 0xfe91009f,
  359. .flags = IORESOURCE_MEM,
  360. },
  361. [1] = {
  362. .start = 52,
  363. .flags = IORESOURCE_IRQ,
  364. },
  365. [2] = {
  366. /* place holder for contiguous memory */
  367. },
  368. };
  369. static struct platform_device ceu_device = {
  370. .name = "sh_mobile_ceu",
  371. .id = 0, /* "ceu0" clock */
  372. .num_resources = ARRAY_SIZE(ceu_resources),
  373. .resource = ceu_resources,
  374. .dev = {
  375. .platform_data = &sh_mobile_ceu_info,
  376. },
  377. .archdata = {
  378. .hwblk_id = HWBLK_CEU,
  379. },
  380. };
  381. static struct resource sdhi0_cn3_resources[] = {
  382. [0] = {
  383. .name = "SDHI0",
  384. .start = 0x04ce0000,
  385. .end = 0x04ce00ff,
  386. .flags = IORESOURCE_MEM,
  387. },
  388. [1] = {
  389. .start = 100,
  390. .flags = IORESOURCE_IRQ,
  391. },
  392. };
  393. static struct sh_mobile_sdhi_info sdhi0_cn3_data = {
  394. .tmio_caps = MMC_CAP_SDIO_IRQ,
  395. };
  396. static struct platform_device sdhi0_cn3_device = {
  397. .name = "sh_mobile_sdhi",
  398. .id = 0, /* "sdhi0" clock */
  399. .num_resources = ARRAY_SIZE(sdhi0_cn3_resources),
  400. .resource = sdhi0_cn3_resources,
  401. .dev = {
  402. .platform_data = &sdhi0_cn3_data,
  403. },
  404. .archdata = {
  405. .hwblk_id = HWBLK_SDHI0,
  406. },
  407. };
  408. static struct resource sdhi1_cn7_resources[] = {
  409. [0] = {
  410. .name = "SDHI1",
  411. .start = 0x04cf0000,
  412. .end = 0x04cf00ff,
  413. .flags = IORESOURCE_MEM,
  414. },
  415. [1] = {
  416. .start = 23,
  417. .flags = IORESOURCE_IRQ,
  418. },
  419. };
  420. static struct sh_mobile_sdhi_info sdhi1_cn7_data = {
  421. .tmio_caps = MMC_CAP_SDIO_IRQ,
  422. };
  423. static struct platform_device sdhi1_cn7_device = {
  424. .name = "sh_mobile_sdhi",
  425. .id = 1, /* "sdhi1" clock */
  426. .num_resources = ARRAY_SIZE(sdhi1_cn7_resources),
  427. .resource = sdhi1_cn7_resources,
  428. .dev = {
  429. .platform_data = &sdhi1_cn7_data,
  430. },
  431. .archdata = {
  432. .hwblk_id = HWBLK_SDHI1,
  433. },
  434. };
  435. static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
  436. {
  437. I2C_BOARD_INFO("pcf8563", 0x51),
  438. },
  439. };
  440. static struct i2c_board_info ap325rxa_i2c_camera[] = {
  441. {
  442. I2C_BOARD_INFO("ov772x", 0x21),
  443. },
  444. };
  445. static struct ov772x_camera_info ov7725_info = {
  446. .flags = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP,
  447. .edgectrl = OV772X_AUTO_EDGECTRL(0xf, 0),
  448. };
  449. static struct soc_camera_link ov7725_link = {
  450. .bus_id = 0,
  451. .power = ov7725_power,
  452. .board_info = &ap325rxa_i2c_camera[0],
  453. .i2c_adapter_id = 0,
  454. .priv = &ov7725_info,
  455. };
  456. static struct platform_device ap325rxa_camera[] = {
  457. {
  458. .name = "soc-camera-pdrv",
  459. .id = 0,
  460. .dev = {
  461. .platform_data = &ov7725_link,
  462. },
  463. }, {
  464. .name = "soc-camera-pdrv",
  465. .id = 1,
  466. .dev = {
  467. .platform_data = &camera_link,
  468. },
  469. },
  470. };
  471. static struct platform_device *ap325rxa_devices[] __initdata = {
  472. &smsc9118_device,
  473. &ap325rxa_nor_flash_device,
  474. &lcdc_device,
  475. &ceu_device,
  476. &nand_flash_device,
  477. &sdhi0_cn3_device,
  478. &sdhi1_cn7_device,
  479. &ap325rxa_camera[0],
  480. &ap325rxa_camera[1],
  481. };
  482. extern char ap325rxa_sdram_enter_start;
  483. extern char ap325rxa_sdram_enter_end;
  484. extern char ap325rxa_sdram_leave_start;
  485. extern char ap325rxa_sdram_leave_end;
  486. static int __init ap325rxa_devices_setup(void)
  487. {
  488. /* register board specific self-refresh code */
  489. sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF,
  490. &ap325rxa_sdram_enter_start,
  491. &ap325rxa_sdram_enter_end,
  492. &ap325rxa_sdram_leave_start,
  493. &ap325rxa_sdram_leave_end);
  494. /* LD3 and LD4 LEDs */
  495. gpio_request(GPIO_PTX5, NULL); /* RUN */
  496. gpio_direction_output(GPIO_PTX5, 1);
  497. gpio_export(GPIO_PTX5, 0);
  498. gpio_request(GPIO_PTX4, NULL); /* INDICATOR */
  499. gpio_direction_output(GPIO_PTX4, 0);
  500. gpio_export(GPIO_PTX4, 0);
  501. /* SW1 input */
  502. gpio_request(GPIO_PTF7, NULL); /* MODE */
  503. gpio_direction_input(GPIO_PTF7);
  504. gpio_export(GPIO_PTF7, 0);
  505. /* LCDC */
  506. gpio_request(GPIO_FN_LCDD15, NULL);
  507. gpio_request(GPIO_FN_LCDD14, NULL);
  508. gpio_request(GPIO_FN_LCDD13, NULL);
  509. gpio_request(GPIO_FN_LCDD12, NULL);
  510. gpio_request(GPIO_FN_LCDD11, NULL);
  511. gpio_request(GPIO_FN_LCDD10, NULL);
  512. gpio_request(GPIO_FN_LCDD9, NULL);
  513. gpio_request(GPIO_FN_LCDD8, NULL);
  514. gpio_request(GPIO_FN_LCDD7, NULL);
  515. gpio_request(GPIO_FN_LCDD6, NULL);
  516. gpio_request(GPIO_FN_LCDD5, NULL);
  517. gpio_request(GPIO_FN_LCDD4, NULL);
  518. gpio_request(GPIO_FN_LCDD3, NULL);
  519. gpio_request(GPIO_FN_LCDD2, NULL);
  520. gpio_request(GPIO_FN_LCDD1, NULL);
  521. gpio_request(GPIO_FN_LCDD0, NULL);
  522. gpio_request(GPIO_FN_LCDLCLK_PTR, NULL);
  523. gpio_request(GPIO_FN_LCDDCK, NULL);
  524. gpio_request(GPIO_FN_LCDVEPWC, NULL);
  525. gpio_request(GPIO_FN_LCDVCPWC, NULL);
  526. gpio_request(GPIO_FN_LCDVSYN, NULL);
  527. gpio_request(GPIO_FN_LCDHSYN, NULL);
  528. gpio_request(GPIO_FN_LCDDISP, NULL);
  529. gpio_request(GPIO_FN_LCDDON, NULL);
  530. /* LCD backlight */
  531. gpio_request(GPIO_PTS3, NULL);
  532. gpio_direction_output(GPIO_PTS3, 1);
  533. /* CEU */
  534. gpio_request(GPIO_FN_VIO_CLK2, NULL);
  535. gpio_request(GPIO_FN_VIO_VD2, NULL);
  536. gpio_request(GPIO_FN_VIO_HD2, NULL);
  537. gpio_request(GPIO_FN_VIO_FLD, NULL);
  538. gpio_request(GPIO_FN_VIO_CKO, NULL);
  539. gpio_request(GPIO_FN_VIO_D15, NULL);
  540. gpio_request(GPIO_FN_VIO_D14, NULL);
  541. gpio_request(GPIO_FN_VIO_D13, NULL);
  542. gpio_request(GPIO_FN_VIO_D12, NULL);
  543. gpio_request(GPIO_FN_VIO_D11, NULL);
  544. gpio_request(GPIO_FN_VIO_D10, NULL);
  545. gpio_request(GPIO_FN_VIO_D9, NULL);
  546. gpio_request(GPIO_FN_VIO_D8, NULL);
  547. gpio_request(GPIO_PTZ7, NULL);
  548. gpio_direction_output(GPIO_PTZ7, 0); /* OE_CAM */
  549. gpio_request(GPIO_PTZ6, NULL);
  550. gpio_direction_output(GPIO_PTZ6, 0); /* STBY_CAM */
  551. gpio_request(GPIO_PTZ5, NULL);
  552. gpio_direction_output(GPIO_PTZ5, 0); /* RST_CAM */
  553. gpio_request(GPIO_PTZ4, NULL);
  554. gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */
  555. __raw_writew(__raw_readw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
  556. /* FLCTL */
  557. gpio_request(GPIO_FN_FCE, NULL);
  558. gpio_request(GPIO_FN_NAF7, NULL);
  559. gpio_request(GPIO_FN_NAF6, NULL);
  560. gpio_request(GPIO_FN_NAF5, NULL);
  561. gpio_request(GPIO_FN_NAF4, NULL);
  562. gpio_request(GPIO_FN_NAF3, NULL);
  563. gpio_request(GPIO_FN_NAF2, NULL);
  564. gpio_request(GPIO_FN_NAF1, NULL);
  565. gpio_request(GPIO_FN_NAF0, NULL);
  566. gpio_request(GPIO_FN_FCDE, NULL);
  567. gpio_request(GPIO_FN_FOE, NULL);
  568. gpio_request(GPIO_FN_FSC, NULL);
  569. gpio_request(GPIO_FN_FWE, NULL);
  570. gpio_request(GPIO_FN_FRB, NULL);
  571. __raw_writew(0, PORT_HIZCRC);
  572. __raw_writew(0xFFFF, PORT_DRVCRA);
  573. __raw_writew(0xFFFF, PORT_DRVCRB);
  574. platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
  575. /* SDHI0 - CN3 - SD CARD */
  576. gpio_request(GPIO_FN_SDHI0CD_PTD, NULL);
  577. gpio_request(GPIO_FN_SDHI0WP_PTD, NULL);
  578. gpio_request(GPIO_FN_SDHI0D3_PTD, NULL);
  579. gpio_request(GPIO_FN_SDHI0D2_PTD, NULL);
  580. gpio_request(GPIO_FN_SDHI0D1_PTD, NULL);
  581. gpio_request(GPIO_FN_SDHI0D0_PTD, NULL);
  582. gpio_request(GPIO_FN_SDHI0CMD_PTD, NULL);
  583. gpio_request(GPIO_FN_SDHI0CLK_PTD, NULL);
  584. /* SDHI1 - CN7 - MICRO SD CARD */
  585. gpio_request(GPIO_FN_SDHI1CD, NULL);
  586. gpio_request(GPIO_FN_SDHI1D3, NULL);
  587. gpio_request(GPIO_FN_SDHI1D2, NULL);
  588. gpio_request(GPIO_FN_SDHI1D1, NULL);
  589. gpio_request(GPIO_FN_SDHI1D0, NULL);
  590. gpio_request(GPIO_FN_SDHI1CMD, NULL);
  591. gpio_request(GPIO_FN_SDHI1CLK, NULL);
  592. i2c_register_board_info(0, ap325rxa_i2c_devices,
  593. ARRAY_SIZE(ap325rxa_i2c_devices));
  594. return platform_add_devices(ap325rxa_devices,
  595. ARRAY_SIZE(ap325rxa_devices));
  596. }
  597. arch_initcall(ap325rxa_devices_setup);
  598. /* Return the board specific boot mode pin configuration */
  599. static int ap325rxa_mode_pins(void)
  600. {
  601. /* MD0=0, MD1=0, MD2=0: Clock Mode 0
  602. * MD3=0: 16-bit Area0 Bus Width
  603. * MD5=1: Little Endian
  604. * TSTMD=1, MD8=1: Test Mode Disabled
  605. */
  606. return MODE_PIN5 | MODE_PIN8;
  607. }
  608. static struct sh_machine_vector mv_ap325rxa __initmv = {
  609. .mv_name = "AP-325RXA",
  610. .mv_mode_pins = ap325rxa_mode_pins,
  611. };