tlb.h 4.5 KB

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  1. #ifndef _S390_TLB_H
  2. #define _S390_TLB_H
  3. /*
  4. * TLB flushing on s390 is complicated. The following requirement
  5. * from the principles of operation is the most arduous:
  6. *
  7. * "A valid table entry must not be changed while it is attached
  8. * to any CPU and may be used for translation by that CPU except to
  9. * (1) invalidate the entry by using INVALIDATE PAGE TABLE ENTRY,
  10. * or INVALIDATE DAT TABLE ENTRY, (2) alter bits 56-63 of a page
  11. * table entry, or (3) make a change by means of a COMPARE AND SWAP
  12. * AND PURGE instruction that purges the TLB."
  13. *
  14. * The modification of a pte of an active mm struct therefore is
  15. * a two step process: i) invalidate the pte, ii) store the new pte.
  16. * This is true for the page protection bit as well.
  17. * The only possible optimization is to flush at the beginning of
  18. * a tlb_gather_mmu cycle if the mm_struct is currently not in use.
  19. *
  20. * Pages used for the page tables is a different story. FIXME: more
  21. */
  22. #include <linux/mm.h>
  23. #include <linux/pagemap.h>
  24. #include <linux/swap.h>
  25. #include <asm/processor.h>
  26. #include <asm/pgalloc.h>
  27. #include <asm/tlbflush.h>
  28. struct mmu_gather {
  29. struct mm_struct *mm;
  30. #ifdef CONFIG_HAVE_RCU_TABLE_FREE
  31. struct mmu_table_batch *batch;
  32. #endif
  33. unsigned int fullmm;
  34. unsigned int need_flush;
  35. };
  36. #ifdef CONFIG_HAVE_RCU_TABLE_FREE
  37. struct mmu_table_batch {
  38. struct rcu_head rcu;
  39. unsigned int nr;
  40. void *tables[0];
  41. };
  42. #define MAX_TABLE_BATCH \
  43. ((PAGE_SIZE - sizeof(struct mmu_table_batch)) / sizeof(void *))
  44. extern void tlb_table_flush(struct mmu_gather *tlb);
  45. extern void tlb_remove_table(struct mmu_gather *tlb, void *table);
  46. #endif
  47. static inline void tlb_gather_mmu(struct mmu_gather *tlb,
  48. struct mm_struct *mm,
  49. unsigned int full_mm_flush)
  50. {
  51. tlb->mm = mm;
  52. tlb->fullmm = full_mm_flush;
  53. tlb->need_flush = 0;
  54. #ifdef CONFIG_HAVE_RCU_TABLE_FREE
  55. tlb->batch = NULL;
  56. #endif
  57. if (tlb->fullmm)
  58. __tlb_flush_mm(mm);
  59. }
  60. static inline void tlb_flush_mmu(struct mmu_gather *tlb)
  61. {
  62. if (!tlb->need_flush)
  63. return;
  64. tlb->need_flush = 0;
  65. __tlb_flush_mm(tlb->mm);
  66. #ifdef CONFIG_HAVE_RCU_TABLE_FREE
  67. tlb_table_flush(tlb);
  68. #endif
  69. }
  70. static inline void tlb_finish_mmu(struct mmu_gather *tlb,
  71. unsigned long start, unsigned long end)
  72. {
  73. tlb_flush_mmu(tlb);
  74. }
  75. /*
  76. * Release the page cache reference for a pte removed by
  77. * tlb_ptep_clear_flush. In both flush modes the tlb for a page cache page
  78. * has already been freed, so just do free_page_and_swap_cache.
  79. */
  80. static inline int __tlb_remove_page(struct mmu_gather *tlb, struct page *page)
  81. {
  82. free_page_and_swap_cache(page);
  83. return 1; /* avoid calling tlb_flush_mmu */
  84. }
  85. static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
  86. {
  87. free_page_and_swap_cache(page);
  88. }
  89. /*
  90. * pte_free_tlb frees a pte table and clears the CRSTE for the
  91. * page table from the tlb.
  92. */
  93. static inline void pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
  94. unsigned long address)
  95. {
  96. #ifdef CONFIG_HAVE_RCU_TABLE_FREE
  97. if (!tlb->fullmm)
  98. return page_table_free_rcu(tlb, (unsigned long *) pte);
  99. #endif
  100. page_table_free(tlb->mm, (unsigned long *) pte);
  101. }
  102. /*
  103. * pmd_free_tlb frees a pmd table and clears the CRSTE for the
  104. * segment table entry from the tlb.
  105. * If the mm uses a two level page table the single pmd is freed
  106. * as the pgd. pmd_free_tlb checks the asce_limit against 2GB
  107. * to avoid the double free of the pmd in this case.
  108. */
  109. static inline void pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd,
  110. unsigned long address)
  111. {
  112. #ifdef __s390x__
  113. if (tlb->mm->context.asce_limit <= (1UL << 31))
  114. return;
  115. #ifdef CONFIG_HAVE_RCU_TABLE_FREE
  116. if (!tlb->fullmm)
  117. return tlb_remove_table(tlb, pmd);
  118. #endif
  119. crst_table_free(tlb->mm, (unsigned long *) pmd);
  120. #endif
  121. }
  122. /*
  123. * pud_free_tlb frees a pud table and clears the CRSTE for the
  124. * region third table entry from the tlb.
  125. * If the mm uses a three level page table the single pud is freed
  126. * as the pgd. pud_free_tlb checks the asce_limit against 4TB
  127. * to avoid the double free of the pud in this case.
  128. */
  129. static inline void pud_free_tlb(struct mmu_gather *tlb, pud_t *pud,
  130. unsigned long address)
  131. {
  132. #ifdef __s390x__
  133. if (tlb->mm->context.asce_limit <= (1UL << 42))
  134. return;
  135. #ifdef CONFIG_HAVE_RCU_TABLE_FREE
  136. if (!tlb->fullmm)
  137. return tlb_remove_table(tlb, pud);
  138. #endif
  139. crst_table_free(tlb->mm, (unsigned long *) pud);
  140. #endif
  141. }
  142. #define tlb_start_vma(tlb, vma) do { } while (0)
  143. #define tlb_end_vma(tlb, vma) do { } while (0)
  144. #define tlb_remove_tlb_entry(tlb, ptep, addr) do { } while (0)
  145. #define tlb_migrate_finish(mm) do { } while (0)
  146. #endif /* _S390_TLB_H */