Kconfig 9.6 KB

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  1. menu "Platform support"
  2. source "arch/powerpc/platforms/powernv/Kconfig"
  3. source "arch/powerpc/platforms/pseries/Kconfig"
  4. source "arch/powerpc/platforms/iseries/Kconfig"
  5. source "arch/powerpc/platforms/chrp/Kconfig"
  6. source "arch/powerpc/platforms/512x/Kconfig"
  7. source "arch/powerpc/platforms/52xx/Kconfig"
  8. source "arch/powerpc/platforms/powermac/Kconfig"
  9. source "arch/powerpc/platforms/prep/Kconfig"
  10. source "arch/powerpc/platforms/maple/Kconfig"
  11. source "arch/powerpc/platforms/pasemi/Kconfig"
  12. source "arch/powerpc/platforms/ps3/Kconfig"
  13. source "arch/powerpc/platforms/cell/Kconfig"
  14. source "arch/powerpc/platforms/8xx/Kconfig"
  15. source "arch/powerpc/platforms/82xx/Kconfig"
  16. source "arch/powerpc/platforms/83xx/Kconfig"
  17. source "arch/powerpc/platforms/85xx/Kconfig"
  18. source "arch/powerpc/platforms/86xx/Kconfig"
  19. source "arch/powerpc/platforms/embedded6xx/Kconfig"
  20. source "arch/powerpc/platforms/44x/Kconfig"
  21. source "arch/powerpc/platforms/40x/Kconfig"
  22. source "arch/powerpc/platforms/amigaone/Kconfig"
  23. source "arch/powerpc/platforms/wsp/Kconfig"
  24. config KVM_GUEST
  25. bool "KVM Guest support"
  26. default n
  27. ---help---
  28. This option enables various optimizations for running under the KVM
  29. hypervisor. Overhead for the kernel when not running inside KVM should
  30. be minimal.
  31. In case of doubt, say Y
  32. config PPC_NATIVE
  33. bool
  34. depends on 6xx || PPC64
  35. help
  36. Support for running natively on the hardware, i.e. without
  37. a hypervisor. This option is not user-selectable but should
  38. be selected by all platforms that need it.
  39. config PPC_OF_BOOT_TRAMPOLINE
  40. bool "Support booting from Open Firmware or yaboot"
  41. depends on 6xx || PPC64
  42. default y
  43. help
  44. Support from booting from Open Firmware or yaboot using an
  45. Open Firmware client interface. This enables the kernel to
  46. communicate with open firmware to retrieve system information
  47. such as the device tree.
  48. In case of doubt, say Y
  49. config UDBG_RTAS_CONSOLE
  50. bool "RTAS based debug console"
  51. depends on PPC_RTAS
  52. default n
  53. config PPC_SMP_MUXED_IPI
  54. bool
  55. help
  56. Select this opton if your platform supports SMP and your
  57. interrupt controller provides less than 4 interrupts to each
  58. cpu. This will enable the generic code to multiplex the 4
  59. messages on to one ipi.
  60. config PPC_UDBG_BEAT
  61. bool "BEAT based debug console"
  62. depends on PPC_CELLEB
  63. default n
  64. config IPIC
  65. bool
  66. default n
  67. config MPIC
  68. bool
  69. default n
  70. config PPC_EPAPR_HV_PIC
  71. bool
  72. default n
  73. config MPIC_WEIRD
  74. bool
  75. default n
  76. config PPC_I8259
  77. bool
  78. default n
  79. config U3_DART
  80. bool
  81. depends on PPC64
  82. default n
  83. config PPC_RTAS
  84. bool
  85. default n
  86. config RTAS_ERROR_LOGGING
  87. bool
  88. depends on PPC_RTAS
  89. default n
  90. config PPC_RTAS_DAEMON
  91. bool
  92. depends on PPC_RTAS
  93. default n
  94. config RTAS_PROC
  95. bool "Proc interface to RTAS"
  96. depends on PPC_RTAS
  97. default y
  98. config RTAS_FLASH
  99. tristate "Firmware flash interface"
  100. depends on PPC64 && RTAS_PROC
  101. config MMIO_NVRAM
  102. bool
  103. default n
  104. config MPIC_U3_HT_IRQS
  105. bool
  106. default n
  107. config MPIC_BROKEN_REGREAD
  108. bool
  109. depends on MPIC
  110. help
  111. This option enables a MPIC driver workaround for some chips
  112. that have a bug that causes some interrupt source information
  113. to not read back properly. It is safe to use on other chips as
  114. well, but enabling it uses about 8KB of memory to keep copies
  115. of the register contents in software.
  116. config IBMVIO
  117. depends on PPC_PSERIES || PPC_ISERIES
  118. bool
  119. default y
  120. config IBMEBUS
  121. depends on PPC_PSERIES
  122. bool "Support for GX bus based adapters"
  123. help
  124. Bus device driver for GX bus based adapters.
  125. config PPC_MPC106
  126. bool
  127. default n
  128. config PPC_970_NAP
  129. bool
  130. default n
  131. config PPC_P7_NAP
  132. bool
  133. default n
  134. config PPC_INDIRECT_IO
  135. bool
  136. select GENERIC_IOMAP
  137. config PPC_INDIRECT_PIO
  138. bool
  139. select PPC_INDIRECT_IO
  140. config PPC_INDIRECT_MMIO
  141. bool
  142. select PPC_INDIRECT_IO
  143. config PPC_IO_WORKAROUNDS
  144. bool
  145. config GENERIC_IOMAP
  146. bool
  147. source "drivers/cpufreq/Kconfig"
  148. menu "CPU Frequency drivers"
  149. depends on CPU_FREQ
  150. config CPU_FREQ_PMAC
  151. bool "Support for Apple PowerBooks"
  152. depends on ADB_PMU && PPC32
  153. select CPU_FREQ_TABLE
  154. help
  155. This adds support for frequency switching on Apple PowerBooks,
  156. this currently includes some models of iBook & Titanium
  157. PowerBook.
  158. config CPU_FREQ_PMAC64
  159. bool "Support for some Apple G5s"
  160. depends on PPC_PMAC && PPC64
  161. select CPU_FREQ_TABLE
  162. help
  163. This adds support for frequency switching on Apple iMac G5,
  164. and some of the more recent desktop G5 machines as well.
  165. config PPC_PASEMI_CPUFREQ
  166. bool "Support for PA Semi PWRficient"
  167. depends on PPC_PASEMI
  168. default y
  169. select CPU_FREQ_TABLE
  170. help
  171. This adds the support for frequency switching on PA Semi
  172. PWRficient processors.
  173. endmenu
  174. config PPC601_SYNC_FIX
  175. bool "Workarounds for PPC601 bugs"
  176. depends on 6xx && (PPC_PREP || PPC_PMAC)
  177. help
  178. Some versions of the PPC601 (the first PowerPC chip) have bugs which
  179. mean that extra synchronization instructions are required near
  180. certain instructions, typically those that make major changes to the
  181. CPU state. These extra instructions reduce performance slightly.
  182. If you say N here, these extra instructions will not be included,
  183. resulting in a kernel which will run faster but may not run at all
  184. on some systems with the PPC601 chip.
  185. If in doubt, say Y here.
  186. config TAU
  187. bool "On-chip CPU temperature sensor support"
  188. depends on 6xx
  189. help
  190. G3 and G4 processors have an on-chip temperature sensor called the
  191. 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
  192. temperature within 2-4 degrees Celsius. This option shows the current
  193. on-die temperature in /proc/cpuinfo if the cpu supports it.
  194. Unfortunately, on some chip revisions, this sensor is very inaccurate
  195. and in many cases, does not work at all, so don't assume the cpu
  196. temp is actually what /proc/cpuinfo says it is.
  197. config TAU_INT
  198. bool "Interrupt driven TAU driver (DANGEROUS)"
  199. depends on TAU
  200. ---help---
  201. The TAU supports an interrupt driven mode which causes an interrupt
  202. whenever the temperature goes out of range. This is the fastest way
  203. to get notified the temp has exceeded a range. With this option off,
  204. a timer is used to re-check the temperature periodically.
  205. However, on some cpus it appears that the TAU interrupt hardware
  206. is buggy and can cause a situation which would lead unexplained hard
  207. lockups.
  208. Unless you are extending the TAU driver, or enjoy kernel/hardware
  209. debugging, leave this option off.
  210. config TAU_AVERAGE
  211. bool "Average high and low temp"
  212. depends on TAU
  213. ---help---
  214. The TAU hardware can compare the temperature to an upper and lower
  215. bound. The default behavior is to show both the upper and lower
  216. bound in /proc/cpuinfo. If the range is large, the temperature is
  217. either changing a lot, or the TAU hardware is broken (likely on some
  218. G4's). If the range is small (around 4 degrees), the temperature is
  219. relatively stable. If you say Y here, a single temperature value,
  220. halfway between the upper and lower bounds, will be reported in
  221. /proc/cpuinfo.
  222. If in doubt, say N here.
  223. config QUICC_ENGINE
  224. bool "Freescale QUICC Engine (QE) Support"
  225. depends on FSL_SOC && PPC32
  226. select PPC_LIB_RHEAP
  227. select CRC32
  228. help
  229. The QUICC Engine (QE) is a new generation of communications
  230. coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
  231. Selecting this option means that you wish to build a kernel
  232. for a machine with a QE coprocessor.
  233. config QE_GPIO
  234. bool "QE GPIO support"
  235. depends on QUICC_ENGINE
  236. select GENERIC_GPIO
  237. select ARCH_REQUIRE_GPIOLIB
  238. help
  239. Say Y here if you're going to use hardware that connects to the
  240. QE GPIOs.
  241. config CPM2
  242. bool "Enable support for the CPM2 (Communications Processor Module)"
  243. depends on (FSL_SOC_BOOKE && PPC32) || 8260
  244. select CPM
  245. select PPC_LIB_RHEAP
  246. select PPC_PCI_CHOICE
  247. select ARCH_REQUIRE_GPIOLIB
  248. select GENERIC_GPIO
  249. help
  250. The CPM2 (Communications Processor Module) is a coprocessor on
  251. embedded CPUs made by Freescale. Selecting this option means that
  252. you wish to build a kernel for a machine with a CPM2 coprocessor
  253. on it (826x, 827x, 8560).
  254. config AXON_RAM
  255. tristate "Axon DDR2 memory device driver"
  256. depends on PPC_IBM_CELL_BLADE && BLOCK
  257. default m
  258. help
  259. It registers one block device per Axon's DDR2 memory bank found
  260. on a system. Block devices are called axonram?, their major and
  261. minor numbers are available in /proc/devices, /proc/partitions or
  262. in /sys/block/axonram?/dev.
  263. config FSL_ULI1575
  264. bool
  265. default n
  266. select GENERIC_ISA_DMA
  267. help
  268. Supports for the ULI1575 PCIe south bridge that exists on some
  269. Freescale reference boards. The boards all use the ULI in pretty
  270. much the same way.
  271. config CPM
  272. bool
  273. select PPC_CLOCK
  274. config OF_RTC
  275. bool
  276. help
  277. Uses information from the OF or flattened device tree to instantiate
  278. platform devices for direct mapped RTC chips like the DS1742 or DS1743.
  279. source "arch/powerpc/sysdev/bestcomm/Kconfig"
  280. config SIMPLE_GPIO
  281. bool "Support for simple, memory-mapped GPIO controllers"
  282. depends on PPC
  283. select GENERIC_GPIO
  284. select ARCH_REQUIRE_GPIOLIB
  285. help
  286. Say Y here to support simple, memory-mapped GPIO controllers.
  287. These are usually BCSRs used to control board's switches, LEDs,
  288. chip-selects, Ethernet/USB PHY's power and various other small
  289. on-board peripherals.
  290. config MCU_MPC8349EMITX
  291. bool "MPC8349E-mITX MCU driver"
  292. depends on I2C && PPC_83xx
  293. select GENERIC_GPIO
  294. select ARCH_REQUIRE_GPIOLIB
  295. help
  296. Say Y here to enable soft power-off functionality on the Freescale
  297. boards with the MPC8349E-mITX-compatible MCU chips. This driver will
  298. also register MCU GPIOs with the generic GPIO API, so you'll able
  299. to use MCU pins as GPIOs.
  300. config XILINX_PCI
  301. bool "Xilinx PCI host bridge support"
  302. depends on PCI && XILINX_VIRTEX
  303. endmenu