suspend.c 9.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448
  1. /*
  2. * MPC83xx suspend support
  3. *
  4. * Author: Scott Wood <scottwood@freescale.com>
  5. *
  6. * Copyright (c) 2006-2007 Freescale Semiconductor, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License version 2 as published
  10. * by the Free Software Foundation.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/pm.h>
  14. #include <linux/types.h>
  15. #include <linux/ioport.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/wait.h>
  18. #include <linux/kthread.h>
  19. #include <linux/freezer.h>
  20. #include <linux/suspend.h>
  21. #include <linux/fsl_devices.h>
  22. #include <linux/of_platform.h>
  23. #include <linux/export.h>
  24. #include <asm/reg.h>
  25. #include <asm/io.h>
  26. #include <asm/time.h>
  27. #include <asm/mpc6xx.h>
  28. #include <sysdev/fsl_soc.h>
  29. #define PMCCR1_NEXT_STATE 0x0C /* Next state for power management */
  30. #define PMCCR1_NEXT_STATE_SHIFT 2
  31. #define PMCCR1_CURR_STATE 0x03 /* Current state for power management*/
  32. #define IMMR_SYSCR_OFFSET 0x100
  33. #define IMMR_RCW_OFFSET 0x900
  34. #define RCW_PCI_HOST 0x80000000
  35. void mpc83xx_enter_deep_sleep(phys_addr_t immrbase);
  36. struct mpc83xx_pmc {
  37. u32 config;
  38. #define PMCCR_DLPEN 2 /* DDR SDRAM low power enable */
  39. #define PMCCR_SLPEN 1 /* System low power enable */
  40. u32 event;
  41. u32 mask;
  42. /* All but PMCI are deep-sleep only */
  43. #define PMCER_GPIO 0x100
  44. #define PMCER_PCI 0x080
  45. #define PMCER_USB 0x040
  46. #define PMCER_ETSEC1 0x020
  47. #define PMCER_ETSEC2 0x010
  48. #define PMCER_TIMER 0x008
  49. #define PMCER_INT1 0x004
  50. #define PMCER_INT2 0x002
  51. #define PMCER_PMCI 0x001
  52. #define PMCER_ALL 0x1FF
  53. /* deep-sleep only */
  54. u32 config1;
  55. #define PMCCR1_USE_STATE 0x80000000
  56. #define PMCCR1_PME_EN 0x00000080
  57. #define PMCCR1_ASSERT_PME 0x00000040
  58. #define PMCCR1_POWER_OFF 0x00000020
  59. /* deep-sleep only */
  60. u32 config2;
  61. };
  62. struct mpc83xx_rcw {
  63. u32 rcwlr;
  64. u32 rcwhr;
  65. };
  66. struct mpc83xx_clock {
  67. u32 spmr;
  68. u32 occr;
  69. u32 sccr;
  70. };
  71. struct mpc83xx_syscr {
  72. __be32 sgprl;
  73. __be32 sgprh;
  74. __be32 spridr;
  75. __be32 :32;
  76. __be32 spcr;
  77. __be32 sicrl;
  78. __be32 sicrh;
  79. };
  80. struct mpc83xx_saved {
  81. u32 sicrl;
  82. u32 sicrh;
  83. u32 sccr;
  84. };
  85. struct pmc_type {
  86. int has_deep_sleep;
  87. };
  88. static struct platform_device *pmc_dev;
  89. static int has_deep_sleep, deep_sleeping;
  90. static int pmc_irq;
  91. static struct mpc83xx_pmc __iomem *pmc_regs;
  92. static struct mpc83xx_clock __iomem *clock_regs;
  93. static struct mpc83xx_syscr __iomem *syscr_regs;
  94. static struct mpc83xx_saved saved_regs;
  95. static int is_pci_agent, wake_from_pci;
  96. static phys_addr_t immrbase;
  97. static int pci_pm_state;
  98. static DECLARE_WAIT_QUEUE_HEAD(agent_wq);
  99. int fsl_deep_sleep(void)
  100. {
  101. return deep_sleeping;
  102. }
  103. EXPORT_SYMBOL(fsl_deep_sleep);
  104. static int mpc83xx_change_state(void)
  105. {
  106. u32 curr_state;
  107. u32 reg_cfg1 = in_be32(&pmc_regs->config1);
  108. if (is_pci_agent) {
  109. pci_pm_state = (reg_cfg1 & PMCCR1_NEXT_STATE) >>
  110. PMCCR1_NEXT_STATE_SHIFT;
  111. curr_state = reg_cfg1 & PMCCR1_CURR_STATE;
  112. if (curr_state != pci_pm_state) {
  113. reg_cfg1 &= ~PMCCR1_CURR_STATE;
  114. reg_cfg1 |= pci_pm_state;
  115. out_be32(&pmc_regs->config1, reg_cfg1);
  116. wake_up(&agent_wq);
  117. return 1;
  118. }
  119. }
  120. return 0;
  121. }
  122. static irqreturn_t pmc_irq_handler(int irq, void *dev_id)
  123. {
  124. u32 event = in_be32(&pmc_regs->event);
  125. int ret = IRQ_NONE;
  126. if (mpc83xx_change_state())
  127. ret = IRQ_HANDLED;
  128. if (event) {
  129. out_be32(&pmc_regs->event, event);
  130. ret = IRQ_HANDLED;
  131. }
  132. return ret;
  133. }
  134. static void mpc83xx_suspend_restore_regs(void)
  135. {
  136. out_be32(&syscr_regs->sicrl, saved_regs.sicrl);
  137. out_be32(&syscr_regs->sicrh, saved_regs.sicrh);
  138. out_be32(&clock_regs->sccr, saved_regs.sccr);
  139. }
  140. static void mpc83xx_suspend_save_regs(void)
  141. {
  142. saved_regs.sicrl = in_be32(&syscr_regs->sicrl);
  143. saved_regs.sicrh = in_be32(&syscr_regs->sicrh);
  144. saved_regs.sccr = in_be32(&clock_regs->sccr);
  145. }
  146. static int mpc83xx_suspend_enter(suspend_state_t state)
  147. {
  148. int ret = -EAGAIN;
  149. /* Don't go to sleep if there's a race where pci_pm_state changes
  150. * between the agent thread checking it and the PM code disabling
  151. * interrupts.
  152. */
  153. if (wake_from_pci) {
  154. if (pci_pm_state != (deep_sleeping ? 3 : 2))
  155. goto out;
  156. out_be32(&pmc_regs->config1,
  157. in_be32(&pmc_regs->config1) | PMCCR1_PME_EN);
  158. }
  159. /* Put the system into low-power mode and the RAM
  160. * into self-refresh mode once the core goes to
  161. * sleep.
  162. */
  163. out_be32(&pmc_regs->config, PMCCR_SLPEN | PMCCR_DLPEN);
  164. /* If it has deep sleep (i.e. it's an 831x or compatible),
  165. * disable power to the core upon entering sleep mode. This will
  166. * require going through the boot firmware upon a wakeup event.
  167. */
  168. if (deep_sleeping) {
  169. mpc83xx_suspend_save_regs();
  170. out_be32(&pmc_regs->mask, PMCER_ALL);
  171. out_be32(&pmc_regs->config1,
  172. in_be32(&pmc_regs->config1) | PMCCR1_POWER_OFF);
  173. enable_kernel_fp();
  174. mpc83xx_enter_deep_sleep(immrbase);
  175. out_be32(&pmc_regs->config1,
  176. in_be32(&pmc_regs->config1) & ~PMCCR1_POWER_OFF);
  177. out_be32(&pmc_regs->mask, PMCER_PMCI);
  178. mpc83xx_suspend_restore_regs();
  179. } else {
  180. out_be32(&pmc_regs->mask, PMCER_PMCI);
  181. mpc6xx_enter_standby();
  182. }
  183. ret = 0;
  184. out:
  185. out_be32(&pmc_regs->config1,
  186. in_be32(&pmc_regs->config1) & ~PMCCR1_PME_EN);
  187. return ret;
  188. }
  189. static void mpc83xx_suspend_end(void)
  190. {
  191. deep_sleeping = 0;
  192. }
  193. static int mpc83xx_suspend_valid(suspend_state_t state)
  194. {
  195. return state == PM_SUSPEND_STANDBY || state == PM_SUSPEND_MEM;
  196. }
  197. static int mpc83xx_suspend_begin(suspend_state_t state)
  198. {
  199. switch (state) {
  200. case PM_SUSPEND_STANDBY:
  201. deep_sleeping = 0;
  202. return 0;
  203. case PM_SUSPEND_MEM:
  204. if (has_deep_sleep)
  205. deep_sleeping = 1;
  206. return 0;
  207. default:
  208. return -EINVAL;
  209. }
  210. }
  211. static int agent_thread_fn(void *data)
  212. {
  213. while (1) {
  214. wait_event_interruptible(agent_wq, pci_pm_state >= 2);
  215. try_to_freeze();
  216. if (signal_pending(current) || pci_pm_state < 2)
  217. continue;
  218. /* With a preemptible kernel (or SMP), this could race with
  219. * a userspace-driven suspend request. It's probably best
  220. * to avoid mixing the two with such a configuration (or
  221. * else fix it by adding a mutex to state_store that we can
  222. * synchronize with).
  223. */
  224. wake_from_pci = 1;
  225. pm_suspend(pci_pm_state == 3 ? PM_SUSPEND_MEM :
  226. PM_SUSPEND_STANDBY);
  227. wake_from_pci = 0;
  228. }
  229. return 0;
  230. }
  231. static void mpc83xx_set_agent(void)
  232. {
  233. out_be32(&pmc_regs->config1, PMCCR1_USE_STATE);
  234. out_be32(&pmc_regs->mask, PMCER_PMCI);
  235. kthread_run(agent_thread_fn, NULL, "PCI power mgt");
  236. }
  237. static int mpc83xx_is_pci_agent(void)
  238. {
  239. struct mpc83xx_rcw __iomem *rcw_regs;
  240. int ret;
  241. rcw_regs = ioremap(get_immrbase() + IMMR_RCW_OFFSET,
  242. sizeof(struct mpc83xx_rcw));
  243. if (!rcw_regs)
  244. return -ENOMEM;
  245. ret = !(in_be32(&rcw_regs->rcwhr) & RCW_PCI_HOST);
  246. iounmap(rcw_regs);
  247. return ret;
  248. }
  249. static const struct platform_suspend_ops mpc83xx_suspend_ops = {
  250. .valid = mpc83xx_suspend_valid,
  251. .begin = mpc83xx_suspend_begin,
  252. .enter = mpc83xx_suspend_enter,
  253. .end = mpc83xx_suspend_end,
  254. };
  255. static struct of_device_id pmc_match[];
  256. static int pmc_probe(struct platform_device *ofdev)
  257. {
  258. const struct of_device_id *match;
  259. struct device_node *np = ofdev->dev.of_node;
  260. struct resource res;
  261. struct pmc_type *type;
  262. int ret = 0;
  263. match = of_match_device(pmc_match, &ofdev->dev);
  264. if (!match)
  265. return -EINVAL;
  266. type = match->data;
  267. if (!of_device_is_available(np))
  268. return -ENODEV;
  269. has_deep_sleep = type->has_deep_sleep;
  270. immrbase = get_immrbase();
  271. pmc_dev = ofdev;
  272. is_pci_agent = mpc83xx_is_pci_agent();
  273. if (is_pci_agent < 0)
  274. return is_pci_agent;
  275. ret = of_address_to_resource(np, 0, &res);
  276. if (ret)
  277. return -ENODEV;
  278. pmc_irq = irq_of_parse_and_map(np, 0);
  279. if (pmc_irq != NO_IRQ) {
  280. ret = request_irq(pmc_irq, pmc_irq_handler, IRQF_SHARED,
  281. "pmc", ofdev);
  282. if (ret)
  283. return -EBUSY;
  284. }
  285. pmc_regs = ioremap(res.start, sizeof(struct mpc83xx_pmc));
  286. if (!pmc_regs) {
  287. ret = -ENOMEM;
  288. goto out;
  289. }
  290. ret = of_address_to_resource(np, 1, &res);
  291. if (ret) {
  292. ret = -ENODEV;
  293. goto out_pmc;
  294. }
  295. clock_regs = ioremap(res.start, sizeof(struct mpc83xx_pmc));
  296. if (!clock_regs) {
  297. ret = -ENOMEM;
  298. goto out_pmc;
  299. }
  300. if (has_deep_sleep) {
  301. syscr_regs = ioremap(immrbase + IMMR_SYSCR_OFFSET,
  302. sizeof(*syscr_regs));
  303. if (!syscr_regs) {
  304. ret = -ENOMEM;
  305. goto out_syscr;
  306. }
  307. }
  308. if (is_pci_agent)
  309. mpc83xx_set_agent();
  310. suspend_set_ops(&mpc83xx_suspend_ops);
  311. return 0;
  312. out_syscr:
  313. iounmap(clock_regs);
  314. out_pmc:
  315. iounmap(pmc_regs);
  316. out:
  317. if (pmc_irq != NO_IRQ)
  318. free_irq(pmc_irq, ofdev);
  319. return ret;
  320. }
  321. static int pmc_remove(struct platform_device *ofdev)
  322. {
  323. return -EPERM;
  324. };
  325. static struct pmc_type pmc_types[] = {
  326. {
  327. .has_deep_sleep = 1,
  328. },
  329. {
  330. .has_deep_sleep = 0,
  331. }
  332. };
  333. static struct of_device_id pmc_match[] = {
  334. {
  335. .compatible = "fsl,mpc8313-pmc",
  336. .data = &pmc_types[0],
  337. },
  338. {
  339. .compatible = "fsl,mpc8349-pmc",
  340. .data = &pmc_types[1],
  341. },
  342. {}
  343. };
  344. static struct platform_driver pmc_driver = {
  345. .driver = {
  346. .name = "mpc83xx-pmc",
  347. .owner = THIS_MODULE,
  348. .of_match_table = pmc_match,
  349. },
  350. .probe = pmc_probe,
  351. .remove = pmc_remove
  352. };
  353. static int pmc_init(void)
  354. {
  355. return platform_driver_register(&pmc_driver);
  356. }
  357. module_init(pmc_init);