book3s_emulate.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587
  1. /*
  2. * This program is free software; you can redistribute it and/or modify
  3. * it under the terms of the GNU General Public License, version 2, as
  4. * published by the Free Software Foundation.
  5. *
  6. * This program is distributed in the hope that it will be useful,
  7. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  8. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  9. * GNU General Public License for more details.
  10. *
  11. * You should have received a copy of the GNU General Public License
  12. * along with this program; if not, write to the Free Software
  13. * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  14. *
  15. * Copyright SUSE Linux Products GmbH 2009
  16. *
  17. * Authors: Alexander Graf <agraf@suse.de>
  18. */
  19. #include <asm/kvm_ppc.h>
  20. #include <asm/disassemble.h>
  21. #include <asm/kvm_book3s.h>
  22. #include <asm/reg.h>
  23. #define OP_19_XOP_RFID 18
  24. #define OP_19_XOP_RFI 50
  25. #define OP_31_XOP_MFMSR 83
  26. #define OP_31_XOP_MTMSR 146
  27. #define OP_31_XOP_MTMSRD 178
  28. #define OP_31_XOP_MTSR 210
  29. #define OP_31_XOP_MTSRIN 242
  30. #define OP_31_XOP_TLBIEL 274
  31. #define OP_31_XOP_TLBIE 306
  32. #define OP_31_XOP_SLBMTE 402
  33. #define OP_31_XOP_SLBIE 434
  34. #define OP_31_XOP_SLBIA 498
  35. #define OP_31_XOP_MFSR 595
  36. #define OP_31_XOP_MFSRIN 659
  37. #define OP_31_XOP_DCBA 758
  38. #define OP_31_XOP_SLBMFEV 851
  39. #define OP_31_XOP_EIOIO 854
  40. #define OP_31_XOP_SLBMFEE 915
  41. /* DCBZ is actually 1014, but we patch it to 1010 so we get a trap */
  42. #define OP_31_XOP_DCBZ 1010
  43. #define OP_LFS 48
  44. #define OP_LFD 50
  45. #define OP_STFS 52
  46. #define OP_STFD 54
  47. #define SPRN_GQR0 912
  48. #define SPRN_GQR1 913
  49. #define SPRN_GQR2 914
  50. #define SPRN_GQR3 915
  51. #define SPRN_GQR4 916
  52. #define SPRN_GQR5 917
  53. #define SPRN_GQR6 918
  54. #define SPRN_GQR7 919
  55. /* Book3S_32 defines mfsrin(v) - but that messes up our abstract
  56. * function pointers, so let's just disable the define. */
  57. #undef mfsrin
  58. enum priv_level {
  59. PRIV_PROBLEM = 0,
  60. PRIV_SUPER = 1,
  61. PRIV_HYPER = 2,
  62. };
  63. static bool spr_allowed(struct kvm_vcpu *vcpu, enum priv_level level)
  64. {
  65. /* PAPR VMs only access supervisor SPRs */
  66. if (vcpu->arch.papr_enabled && (level > PRIV_SUPER))
  67. return false;
  68. /* Limit user space to its own small SPR set */
  69. if ((vcpu->arch.shared->msr & MSR_PR) && level > PRIV_PROBLEM)
  70. return false;
  71. return true;
  72. }
  73. int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
  74. unsigned int inst, int *advance)
  75. {
  76. int emulated = EMULATE_DONE;
  77. switch (get_op(inst)) {
  78. case 19:
  79. switch (get_xop(inst)) {
  80. case OP_19_XOP_RFID:
  81. case OP_19_XOP_RFI:
  82. kvmppc_set_pc(vcpu, vcpu->arch.shared->srr0);
  83. kvmppc_set_msr(vcpu, vcpu->arch.shared->srr1);
  84. *advance = 0;
  85. break;
  86. default:
  87. emulated = EMULATE_FAIL;
  88. break;
  89. }
  90. break;
  91. case 31:
  92. switch (get_xop(inst)) {
  93. case OP_31_XOP_MFMSR:
  94. kvmppc_set_gpr(vcpu, get_rt(inst),
  95. vcpu->arch.shared->msr);
  96. break;
  97. case OP_31_XOP_MTMSRD:
  98. {
  99. ulong rs = kvmppc_get_gpr(vcpu, get_rs(inst));
  100. if (inst & 0x10000) {
  101. vcpu->arch.shared->msr &= ~(MSR_RI | MSR_EE);
  102. vcpu->arch.shared->msr |= rs & (MSR_RI | MSR_EE);
  103. } else
  104. kvmppc_set_msr(vcpu, rs);
  105. break;
  106. }
  107. case OP_31_XOP_MTMSR:
  108. kvmppc_set_msr(vcpu, kvmppc_get_gpr(vcpu, get_rs(inst)));
  109. break;
  110. case OP_31_XOP_MFSR:
  111. {
  112. int srnum;
  113. srnum = kvmppc_get_field(inst, 12 + 32, 15 + 32);
  114. if (vcpu->arch.mmu.mfsrin) {
  115. u32 sr;
  116. sr = vcpu->arch.mmu.mfsrin(vcpu, srnum);
  117. kvmppc_set_gpr(vcpu, get_rt(inst), sr);
  118. }
  119. break;
  120. }
  121. case OP_31_XOP_MFSRIN:
  122. {
  123. int srnum;
  124. srnum = (kvmppc_get_gpr(vcpu, get_rb(inst)) >> 28) & 0xf;
  125. if (vcpu->arch.mmu.mfsrin) {
  126. u32 sr;
  127. sr = vcpu->arch.mmu.mfsrin(vcpu, srnum);
  128. kvmppc_set_gpr(vcpu, get_rt(inst), sr);
  129. }
  130. break;
  131. }
  132. case OP_31_XOP_MTSR:
  133. vcpu->arch.mmu.mtsrin(vcpu,
  134. (inst >> 16) & 0xf,
  135. kvmppc_get_gpr(vcpu, get_rs(inst)));
  136. break;
  137. case OP_31_XOP_MTSRIN:
  138. vcpu->arch.mmu.mtsrin(vcpu,
  139. (kvmppc_get_gpr(vcpu, get_rb(inst)) >> 28) & 0xf,
  140. kvmppc_get_gpr(vcpu, get_rs(inst)));
  141. break;
  142. case OP_31_XOP_TLBIE:
  143. case OP_31_XOP_TLBIEL:
  144. {
  145. bool large = (inst & 0x00200000) ? true : false;
  146. ulong addr = kvmppc_get_gpr(vcpu, get_rb(inst));
  147. vcpu->arch.mmu.tlbie(vcpu, addr, large);
  148. break;
  149. }
  150. case OP_31_XOP_EIOIO:
  151. break;
  152. case OP_31_XOP_SLBMTE:
  153. if (!vcpu->arch.mmu.slbmte)
  154. return EMULATE_FAIL;
  155. vcpu->arch.mmu.slbmte(vcpu,
  156. kvmppc_get_gpr(vcpu, get_rs(inst)),
  157. kvmppc_get_gpr(vcpu, get_rb(inst)));
  158. break;
  159. case OP_31_XOP_SLBIE:
  160. if (!vcpu->arch.mmu.slbie)
  161. return EMULATE_FAIL;
  162. vcpu->arch.mmu.slbie(vcpu,
  163. kvmppc_get_gpr(vcpu, get_rb(inst)));
  164. break;
  165. case OP_31_XOP_SLBIA:
  166. if (!vcpu->arch.mmu.slbia)
  167. return EMULATE_FAIL;
  168. vcpu->arch.mmu.slbia(vcpu);
  169. break;
  170. case OP_31_XOP_SLBMFEE:
  171. if (!vcpu->arch.mmu.slbmfee) {
  172. emulated = EMULATE_FAIL;
  173. } else {
  174. ulong t, rb;
  175. rb = kvmppc_get_gpr(vcpu, get_rb(inst));
  176. t = vcpu->arch.mmu.slbmfee(vcpu, rb);
  177. kvmppc_set_gpr(vcpu, get_rt(inst), t);
  178. }
  179. break;
  180. case OP_31_XOP_SLBMFEV:
  181. if (!vcpu->arch.mmu.slbmfev) {
  182. emulated = EMULATE_FAIL;
  183. } else {
  184. ulong t, rb;
  185. rb = kvmppc_get_gpr(vcpu, get_rb(inst));
  186. t = vcpu->arch.mmu.slbmfev(vcpu, rb);
  187. kvmppc_set_gpr(vcpu, get_rt(inst), t);
  188. }
  189. break;
  190. case OP_31_XOP_DCBA:
  191. /* Gets treated as NOP */
  192. break;
  193. case OP_31_XOP_DCBZ:
  194. {
  195. ulong rb = kvmppc_get_gpr(vcpu, get_rb(inst));
  196. ulong ra = 0;
  197. ulong addr, vaddr;
  198. u32 zeros[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
  199. u32 dsisr;
  200. int r;
  201. if (get_ra(inst))
  202. ra = kvmppc_get_gpr(vcpu, get_ra(inst));
  203. addr = (ra + rb) & ~31ULL;
  204. if (!(vcpu->arch.shared->msr & MSR_SF))
  205. addr &= 0xffffffff;
  206. vaddr = addr;
  207. r = kvmppc_st(vcpu, &addr, 32, zeros, true);
  208. if ((r == -ENOENT) || (r == -EPERM)) {
  209. *advance = 0;
  210. vcpu->arch.shared->dar = vaddr;
  211. to_svcpu(vcpu)->fault_dar = vaddr;
  212. dsisr = DSISR_ISSTORE;
  213. if (r == -ENOENT)
  214. dsisr |= DSISR_NOHPTE;
  215. else if (r == -EPERM)
  216. dsisr |= DSISR_PROTFAULT;
  217. vcpu->arch.shared->dsisr = dsisr;
  218. to_svcpu(vcpu)->fault_dsisr = dsisr;
  219. kvmppc_book3s_queue_irqprio(vcpu,
  220. BOOK3S_INTERRUPT_DATA_STORAGE);
  221. }
  222. break;
  223. }
  224. default:
  225. emulated = EMULATE_FAIL;
  226. }
  227. break;
  228. default:
  229. emulated = EMULATE_FAIL;
  230. }
  231. if (emulated == EMULATE_FAIL)
  232. emulated = kvmppc_emulate_paired_single(run, vcpu);
  233. return emulated;
  234. }
  235. void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat, bool upper,
  236. u32 val)
  237. {
  238. if (upper) {
  239. /* Upper BAT */
  240. u32 bl = (val >> 2) & 0x7ff;
  241. bat->bepi_mask = (~bl << 17);
  242. bat->bepi = val & 0xfffe0000;
  243. bat->vs = (val & 2) ? 1 : 0;
  244. bat->vp = (val & 1) ? 1 : 0;
  245. bat->raw = (bat->raw & 0xffffffff00000000ULL) | val;
  246. } else {
  247. /* Lower BAT */
  248. bat->brpn = val & 0xfffe0000;
  249. bat->wimg = (val >> 3) & 0xf;
  250. bat->pp = val & 3;
  251. bat->raw = (bat->raw & 0x00000000ffffffffULL) | ((u64)val << 32);
  252. }
  253. }
  254. static struct kvmppc_bat *kvmppc_find_bat(struct kvm_vcpu *vcpu, int sprn)
  255. {
  256. struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
  257. struct kvmppc_bat *bat;
  258. switch (sprn) {
  259. case SPRN_IBAT0U ... SPRN_IBAT3L:
  260. bat = &vcpu_book3s->ibat[(sprn - SPRN_IBAT0U) / 2];
  261. break;
  262. case SPRN_IBAT4U ... SPRN_IBAT7L:
  263. bat = &vcpu_book3s->ibat[4 + ((sprn - SPRN_IBAT4U) / 2)];
  264. break;
  265. case SPRN_DBAT0U ... SPRN_DBAT3L:
  266. bat = &vcpu_book3s->dbat[(sprn - SPRN_DBAT0U) / 2];
  267. break;
  268. case SPRN_DBAT4U ... SPRN_DBAT7L:
  269. bat = &vcpu_book3s->dbat[4 + ((sprn - SPRN_DBAT4U) / 2)];
  270. break;
  271. default:
  272. BUG();
  273. }
  274. return bat;
  275. }
  276. int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
  277. {
  278. int emulated = EMULATE_DONE;
  279. ulong spr_val = kvmppc_get_gpr(vcpu, rs);
  280. switch (sprn) {
  281. case SPRN_SDR1:
  282. if (!spr_allowed(vcpu, PRIV_HYPER))
  283. goto unprivileged;
  284. to_book3s(vcpu)->sdr1 = spr_val;
  285. break;
  286. case SPRN_DSISR:
  287. vcpu->arch.shared->dsisr = spr_val;
  288. break;
  289. case SPRN_DAR:
  290. vcpu->arch.shared->dar = spr_val;
  291. break;
  292. case SPRN_HIOR:
  293. to_book3s(vcpu)->hior = spr_val;
  294. break;
  295. case SPRN_IBAT0U ... SPRN_IBAT3L:
  296. case SPRN_IBAT4U ... SPRN_IBAT7L:
  297. case SPRN_DBAT0U ... SPRN_DBAT3L:
  298. case SPRN_DBAT4U ... SPRN_DBAT7L:
  299. {
  300. struct kvmppc_bat *bat = kvmppc_find_bat(vcpu, sprn);
  301. kvmppc_set_bat(vcpu, bat, !(sprn % 2), (u32)spr_val);
  302. /* BAT writes happen so rarely that we're ok to flush
  303. * everything here */
  304. kvmppc_mmu_pte_flush(vcpu, 0, 0);
  305. kvmppc_mmu_flush_segments(vcpu);
  306. break;
  307. }
  308. case SPRN_HID0:
  309. to_book3s(vcpu)->hid[0] = spr_val;
  310. break;
  311. case SPRN_HID1:
  312. to_book3s(vcpu)->hid[1] = spr_val;
  313. break;
  314. case SPRN_HID2:
  315. to_book3s(vcpu)->hid[2] = spr_val;
  316. break;
  317. case SPRN_HID2_GEKKO:
  318. to_book3s(vcpu)->hid[2] = spr_val;
  319. /* HID2.PSE controls paired single on gekko */
  320. switch (vcpu->arch.pvr) {
  321. case 0x00080200: /* lonestar 2.0 */
  322. case 0x00088202: /* lonestar 2.2 */
  323. case 0x70000100: /* gekko 1.0 */
  324. case 0x00080100: /* gekko 2.0 */
  325. case 0x00083203: /* gekko 2.3a */
  326. case 0x00083213: /* gekko 2.3b */
  327. case 0x00083204: /* gekko 2.4 */
  328. case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */
  329. case 0x00087200: /* broadway */
  330. if (vcpu->arch.hflags & BOOK3S_HFLAG_NATIVE_PS) {
  331. /* Native paired singles */
  332. } else if (spr_val & (1 << 29)) { /* HID2.PSE */
  333. vcpu->arch.hflags |= BOOK3S_HFLAG_PAIRED_SINGLE;
  334. kvmppc_giveup_ext(vcpu, MSR_FP);
  335. } else {
  336. vcpu->arch.hflags &= ~BOOK3S_HFLAG_PAIRED_SINGLE;
  337. }
  338. break;
  339. }
  340. break;
  341. case SPRN_HID4:
  342. case SPRN_HID4_GEKKO:
  343. to_book3s(vcpu)->hid[4] = spr_val;
  344. break;
  345. case SPRN_HID5:
  346. to_book3s(vcpu)->hid[5] = spr_val;
  347. /* guest HID5 set can change is_dcbz32 */
  348. if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
  349. (mfmsr() & MSR_HV))
  350. vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
  351. break;
  352. case SPRN_GQR0:
  353. case SPRN_GQR1:
  354. case SPRN_GQR2:
  355. case SPRN_GQR3:
  356. case SPRN_GQR4:
  357. case SPRN_GQR5:
  358. case SPRN_GQR6:
  359. case SPRN_GQR7:
  360. to_book3s(vcpu)->gqr[sprn - SPRN_GQR0] = spr_val;
  361. break;
  362. case SPRN_ICTC:
  363. case SPRN_THRM1:
  364. case SPRN_THRM2:
  365. case SPRN_THRM3:
  366. case SPRN_CTRLF:
  367. case SPRN_CTRLT:
  368. case SPRN_L2CR:
  369. case SPRN_MMCR0_GEKKO:
  370. case SPRN_MMCR1_GEKKO:
  371. case SPRN_PMC1_GEKKO:
  372. case SPRN_PMC2_GEKKO:
  373. case SPRN_PMC3_GEKKO:
  374. case SPRN_PMC4_GEKKO:
  375. case SPRN_WPAR_GEKKO:
  376. break;
  377. unprivileged:
  378. default:
  379. printk(KERN_INFO "KVM: invalid SPR write: %d\n", sprn);
  380. #ifndef DEBUG_SPR
  381. emulated = EMULATE_FAIL;
  382. #endif
  383. break;
  384. }
  385. return emulated;
  386. }
  387. int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
  388. {
  389. int emulated = EMULATE_DONE;
  390. switch (sprn) {
  391. case SPRN_IBAT0U ... SPRN_IBAT3L:
  392. case SPRN_IBAT4U ... SPRN_IBAT7L:
  393. case SPRN_DBAT0U ... SPRN_DBAT3L:
  394. case SPRN_DBAT4U ... SPRN_DBAT7L:
  395. {
  396. struct kvmppc_bat *bat = kvmppc_find_bat(vcpu, sprn);
  397. if (sprn % 2)
  398. kvmppc_set_gpr(vcpu, rt, bat->raw >> 32);
  399. else
  400. kvmppc_set_gpr(vcpu, rt, bat->raw);
  401. break;
  402. }
  403. case SPRN_SDR1:
  404. if (!spr_allowed(vcpu, PRIV_HYPER))
  405. goto unprivileged;
  406. kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->sdr1);
  407. break;
  408. case SPRN_DSISR:
  409. kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->dsisr);
  410. break;
  411. case SPRN_DAR:
  412. kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->dar);
  413. break;
  414. case SPRN_HIOR:
  415. kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hior);
  416. break;
  417. case SPRN_HID0:
  418. kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[0]);
  419. break;
  420. case SPRN_HID1:
  421. kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[1]);
  422. break;
  423. case SPRN_HID2:
  424. case SPRN_HID2_GEKKO:
  425. kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[2]);
  426. break;
  427. case SPRN_HID4:
  428. case SPRN_HID4_GEKKO:
  429. kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[4]);
  430. break;
  431. case SPRN_HID5:
  432. kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[5]);
  433. break;
  434. case SPRN_CFAR:
  435. case SPRN_PURR:
  436. kvmppc_set_gpr(vcpu, rt, 0);
  437. break;
  438. case SPRN_GQR0:
  439. case SPRN_GQR1:
  440. case SPRN_GQR2:
  441. case SPRN_GQR3:
  442. case SPRN_GQR4:
  443. case SPRN_GQR5:
  444. case SPRN_GQR6:
  445. case SPRN_GQR7:
  446. kvmppc_set_gpr(vcpu, rt,
  447. to_book3s(vcpu)->gqr[sprn - SPRN_GQR0]);
  448. break;
  449. case SPRN_THRM1:
  450. case SPRN_THRM2:
  451. case SPRN_THRM3:
  452. case SPRN_CTRLF:
  453. case SPRN_CTRLT:
  454. case SPRN_L2CR:
  455. case SPRN_MMCR0_GEKKO:
  456. case SPRN_MMCR1_GEKKO:
  457. case SPRN_PMC1_GEKKO:
  458. case SPRN_PMC2_GEKKO:
  459. case SPRN_PMC3_GEKKO:
  460. case SPRN_PMC4_GEKKO:
  461. case SPRN_WPAR_GEKKO:
  462. kvmppc_set_gpr(vcpu, rt, 0);
  463. break;
  464. default:
  465. unprivileged:
  466. printk(KERN_INFO "KVM: invalid SPR read: %d\n", sprn);
  467. #ifndef DEBUG_SPR
  468. emulated = EMULATE_FAIL;
  469. #endif
  470. break;
  471. }
  472. return emulated;
  473. }
  474. u32 kvmppc_alignment_dsisr(struct kvm_vcpu *vcpu, unsigned int inst)
  475. {
  476. u32 dsisr = 0;
  477. /*
  478. * This is what the spec says about DSISR bits (not mentioned = 0):
  479. *
  480. * 12:13 [DS] Set to bits 30:31
  481. * 15:16 [X] Set to bits 29:30
  482. * 17 [X] Set to bit 25
  483. * [D/DS] Set to bit 5
  484. * 18:21 [X] Set to bits 21:24
  485. * [D/DS] Set to bits 1:4
  486. * 22:26 Set to bits 6:10 (RT/RS/FRT/FRS)
  487. * 27:31 Set to bits 11:15 (RA)
  488. */
  489. switch (get_op(inst)) {
  490. /* D-form */
  491. case OP_LFS:
  492. case OP_LFD:
  493. case OP_STFD:
  494. case OP_STFS:
  495. dsisr |= (inst >> 12) & 0x4000; /* bit 17 */
  496. dsisr |= (inst >> 17) & 0x3c00; /* bits 18:21 */
  497. break;
  498. /* X-form */
  499. case 31:
  500. dsisr |= (inst << 14) & 0x18000; /* bits 15:16 */
  501. dsisr |= (inst << 8) & 0x04000; /* bit 17 */
  502. dsisr |= (inst << 3) & 0x03c00; /* bits 18:21 */
  503. break;
  504. default:
  505. printk(KERN_INFO "KVM: Unaligned instruction 0x%x\n", inst);
  506. break;
  507. }
  508. dsisr |= (inst >> 16) & 0x03ff; /* bits 22:31 */
  509. return dsisr;
  510. }
  511. ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst)
  512. {
  513. ulong dar = 0;
  514. ulong ra;
  515. switch (get_op(inst)) {
  516. case OP_LFS:
  517. case OP_LFD:
  518. case OP_STFD:
  519. case OP_STFS:
  520. ra = get_ra(inst);
  521. if (ra)
  522. dar = kvmppc_get_gpr(vcpu, ra);
  523. dar += (s32)((s16)inst);
  524. break;
  525. case 31:
  526. ra = get_ra(inst);
  527. if (ra)
  528. dar = kvmppc_get_gpr(vcpu, ra);
  529. dar += kvmppc_get_gpr(vcpu, get_rb(inst));
  530. break;
  531. default:
  532. printk(KERN_INFO "KVM: Unaligned instruction 0x%x\n", inst);
  533. break;
  534. }
  535. return dar;
  536. }