p1010rdb.dts 5.9 KB

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  1. /*
  2. * P1010 RDB Device Tree Source
  3. *
  4. * Copyright 2011 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. /include/ "p1010si.dtsi"
  12. / {
  13. model = "fsl,P1010RDB";
  14. compatible = "fsl,P1010RDB";
  15. aliases {
  16. serial0 = &serial0;
  17. serial1 = &serial1;
  18. ethernet0 = &enet0;
  19. ethernet1 = &enet1;
  20. ethernet2 = &enet2;
  21. pci0 = &pci0;
  22. pci1 = &pci1;
  23. can0 = &can0;
  24. can1 = &can1;
  25. };
  26. memory {
  27. device_type = "memory";
  28. };
  29. ifc@ffe1e000 {
  30. /* NOR, NAND Flashes and CPLD on board */
  31. ranges = <0x0 0x0 0x0 0xee000000 0x02000000
  32. 0x1 0x0 0x0 0xff800000 0x00010000
  33. 0x3 0x0 0x0 0xffb00000 0x00000020>;
  34. nor@0,0 {
  35. #address-cells = <1>;
  36. #size-cells = <1>;
  37. compatible = "cfi-flash";
  38. reg = <0x0 0x0 0x2000000>;
  39. bank-width = <2>;
  40. device-width = <1>;
  41. partition@40000 {
  42. /* 256KB for DTB Image */
  43. reg = <0x00040000 0x00040000>;
  44. label = "NOR DTB Image";
  45. };
  46. partition@80000 {
  47. /* 7 MB for Linux Kernel Image */
  48. reg = <0x00080000 0x00700000>;
  49. label = "NOR Linux Kernel Image";
  50. };
  51. partition@800000 {
  52. /* 20MB for JFFS2 based Root file System */
  53. reg = <0x00800000 0x01400000>;
  54. label = "NOR JFFS2 Root File System";
  55. };
  56. partition@1f00000 {
  57. /* This location must not be altered */
  58. /* 512KB for u-boot Bootloader Image */
  59. /* 512KB for u-boot Environment Variables */
  60. reg = <0x01f00000 0x00100000>;
  61. label = "NOR U-Boot Image";
  62. read-only;
  63. };
  64. };
  65. nand@1,0 {
  66. #address-cells = <1>;
  67. #size-cells = <1>;
  68. compatible = "fsl,ifc-nand";
  69. reg = <0x1 0x0 0x10000>;
  70. partition@0 {
  71. /* This location must not be altered */
  72. /* 1MB for u-boot Bootloader Image */
  73. reg = <0x0 0x00100000>;
  74. label = "NAND U-Boot Image";
  75. read-only;
  76. };
  77. partition@100000 {
  78. /* 1MB for DTB Image */
  79. reg = <0x00100000 0x00100000>;
  80. label = "NAND DTB Image";
  81. };
  82. partition@200000 {
  83. /* 4MB for Linux Kernel Image */
  84. reg = <0x00200000 0x00400000>;
  85. label = "NAND Linux Kernel Image";
  86. };
  87. partition@600000 {
  88. /* 4MB for Compressed Root file System Image */
  89. reg = <0x00600000 0x00400000>;
  90. label = "NAND Compressed RFS Image";
  91. };
  92. partition@a00000 {
  93. /* 15MB for JFFS2 based Root file System */
  94. reg = <0x00a00000 0x00f00000>;
  95. label = "NAND JFFS2 Root File System";
  96. };
  97. partition@1900000 {
  98. /* 7MB for User Area */
  99. reg = <0x01900000 0x00700000>;
  100. label = "NAND User area";
  101. };
  102. };
  103. cpld@3,0 {
  104. #address-cells = <1>;
  105. #size-cells = <1>;
  106. compatible = "fsl,p1010rdb-cpld";
  107. reg = <0x3 0x0 0x0000020>;
  108. bank-width = <1>;
  109. device-width = <1>;
  110. };
  111. };
  112. soc@ffe00000 {
  113. spi@7000 {
  114. flash@0 {
  115. #address-cells = <1>;
  116. #size-cells = <1>;
  117. compatible = "spansion,s25sl12801";
  118. reg = <0>;
  119. spi-max-frequency = <50000000>;
  120. partition@0 {
  121. /* 1MB for u-boot Bootloader Image */
  122. /* 1MB for Environment */
  123. reg = <0x0 0x00100000>;
  124. label = "SPI Flash U-Boot Image";
  125. read-only;
  126. };
  127. partition@100000 {
  128. /* 512KB for DTB Image */
  129. reg = <0x00100000 0x00080000>;
  130. label = "SPI Flash DTB Image";
  131. };
  132. partition@180000 {
  133. /* 4MB for Linux Kernel Image */
  134. reg = <0x00180000 0x00400000>;
  135. label = "SPI Flash Linux Kernel Image";
  136. };
  137. partition@580000 {
  138. /* 4MB for Compressed RFS Image */
  139. reg = <0x00580000 0x00400000>;
  140. label = "SPI Flash Compressed RFSImage";
  141. };
  142. partition@980000 {
  143. /* 6.5MB for JFFS2 based RFS */
  144. reg = <0x00980000 0x00680000>;
  145. label = "SPI Flash JFFS2 RFS";
  146. };
  147. };
  148. };
  149. usb@22000 {
  150. phy_type = "utmi";
  151. };
  152. mdio@24000 {
  153. phy0: ethernet-phy@0 {
  154. interrupt-parent = <&mpic>;
  155. interrupts = <3 1>;
  156. reg = <0x1>;
  157. };
  158. phy1: ethernet-phy@1 {
  159. interrupt-parent = <&mpic>;
  160. interrupts = <2 1>;
  161. reg = <0x0>;
  162. };
  163. phy2: ethernet-phy@2 {
  164. interrupt-parent = <&mpic>;
  165. interrupts = <2 1>;
  166. reg = <0x2>;
  167. };
  168. };
  169. enet0: ethernet@b0000 {
  170. phy-handle = <&phy0>;
  171. phy-connection-type = "rgmii-id";
  172. };
  173. enet1: ethernet@b1000 {
  174. phy-handle = <&phy1>;
  175. tbi-handle = <&tbi0>;
  176. phy-connection-type = "sgmii";
  177. };
  178. enet2: ethernet@b2000 {
  179. phy-handle = <&phy2>;
  180. tbi-handle = <&tbi1>;
  181. phy-connection-type = "sgmii";
  182. };
  183. };
  184. pci0: pcie@ffe09000 {
  185. ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
  186. 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
  187. pcie@0 {
  188. reg = <0x0 0x0 0x0 0x0 0x0>;
  189. #interrupt-cells = <1>;
  190. #size-cells = <2>;
  191. #address-cells = <3>;
  192. device_type = "pci";
  193. interrupt-parent = <&mpic>;
  194. interrupts = <16 2>;
  195. interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  196. interrupt-map = <
  197. /* IDSEL 0x0 */
  198. 0000 0x0 0x0 0x1 &mpic 0x4 0x1
  199. 0000 0x0 0x0 0x2 &mpic 0x5 0x1
  200. 0000 0x0 0x0 0x3 &mpic 0x6 0x1
  201. 0000 0x0 0x0 0x4 &mpic 0x7 0x1
  202. >;
  203. ranges = <0x2000000 0x0 0xa0000000
  204. 0x2000000 0x0 0xa0000000
  205. 0x0 0x20000000
  206. 0x1000000 0x0 0x0
  207. 0x1000000 0x0 0x0
  208. 0x0 0x100000>;
  209. };
  210. };
  211. pci1: pcie@ffe0a000 {
  212. ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
  213. 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
  214. pcie@0 {
  215. reg = <0x0 0x0 0x0 0x0 0x0>;
  216. #interrupt-cells = <1>;
  217. #size-cells = <2>;
  218. #address-cells = <3>;
  219. device_type = "pci";
  220. interrupt-parent = <&mpic>;
  221. interrupts = <16 2>;
  222. interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  223. interrupt-map = <
  224. /* IDSEL 0x0 */
  225. 0000 0x0 0x0 0x1 &mpic 0x4 0x1
  226. 0000 0x0 0x0 0x2 &mpic 0x5 0x1
  227. 0000 0x0 0x0 0x3 &mpic 0x6 0x1
  228. 0000 0x0 0x0 0x4 &mpic 0x7 0x1
  229. >;
  230. ranges = <0x2000000 0x0 0x80000000
  231. 0x2000000 0x0 0x80000000
  232. 0x0 0x20000000
  233. 0x1000000 0x0 0x0
  234. 0x1000000 0x0 0x0
  235. 0x0 0x100000>;
  236. };
  237. };
  238. };