Kconfig.cpu 11 KB

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  1. comment "Processor Type"
  2. config M68000
  3. bool
  4. select CPU_HAS_NO_BITFIELDS
  5. help
  6. The Freescale (was Motorola) 68000 CPU is the first generation of
  7. the well known M68K family of processors. The CPU core as well as
  8. being available as a stand alone CPU was also used in many
  9. System-On-Chip devices (eg 68328, 68302, etc). It does not contain
  10. a paging MMU.
  11. config MCPU32
  12. bool
  13. select CPU_HAS_NO_BITFIELDS
  14. help
  15. The Freescale (was then Motorola) CPU32 is a CPU core that is
  16. based on the 68020 processor. For the most part it is used in
  17. System-On-Chip parts, and does not contain a paging MMU.
  18. config COLDFIRE
  19. bool
  20. select GENERIC_GPIO
  21. select ARCH_REQUIRE_GPIOLIB
  22. select CPU_HAS_NO_BITFIELDS
  23. help
  24. The Freescale ColdFire family of processors is a modern derivitive
  25. of the 68000 processor family. They are mainly targeted at embedded
  26. applications, and are all System-On-Chip (SOC) devices, as opposed
  27. to stand alone CPUs. They implement a subset of the original 68000
  28. processor instruction set.
  29. config M68020
  30. bool "68020 support"
  31. depends on MMU
  32. help
  33. If you anticipate running this kernel on a computer with a MC68020
  34. processor, say Y. Otherwise, say N. Note that the 68020 requires a
  35. 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
  36. Sun 3, which provides its own version.
  37. config M68030
  38. bool "68030 support"
  39. depends on MMU && !MMU_SUN3
  40. help
  41. If you anticipate running this kernel on a computer with a MC68030
  42. processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
  43. work, as it does not include an MMU (Memory Management Unit).
  44. config M68040
  45. bool "68040 support"
  46. depends on MMU && !MMU_SUN3
  47. help
  48. If you anticipate running this kernel on a computer with a MC68LC040
  49. or MC68040 processor, say Y. Otherwise, say N. Note that an
  50. MC68EC040 will not work, as it does not include an MMU (Memory
  51. Management Unit).
  52. config M68060
  53. bool "68060 support"
  54. depends on MMU && !MMU_SUN3
  55. help
  56. If you anticipate running this kernel on a computer with a MC68060
  57. processor, say Y. Otherwise, say N.
  58. config M68328
  59. bool "MC68328"
  60. depends on !MMU
  61. select M68000
  62. help
  63. Motorola 68328 processor support.
  64. config M68EZ328
  65. bool "MC68EZ328"
  66. depends on !MMU
  67. select M68000
  68. help
  69. Motorola 68EX328 processor support.
  70. config M68VZ328
  71. bool "MC68VZ328"
  72. depends on !MMU
  73. select M68000
  74. help
  75. Motorola 68VZ328 processor support.
  76. config M68360
  77. bool "MC68360"
  78. depends on !MMU
  79. select MCPU32
  80. help
  81. Motorola 68360 processor support.
  82. config M5206
  83. bool "MCF5206"
  84. depends on !MMU
  85. select COLDFIRE
  86. select COLDFIRE_SW_A7
  87. select HAVE_MBAR
  88. help
  89. Motorola ColdFire 5206 processor support.
  90. config M5206e
  91. bool "MCF5206e"
  92. depends on !MMU
  93. select COLDFIRE
  94. select COLDFIRE_SW_A7
  95. select HAVE_MBAR
  96. help
  97. Motorola ColdFire 5206e processor support.
  98. config M520x
  99. bool "MCF520x"
  100. depends on !MMU
  101. select COLDFIRE
  102. select GENERIC_CLOCKEVENTS
  103. select HAVE_CACHE_SPLIT
  104. help
  105. Freescale Coldfire 5207/5208 processor support.
  106. config M523x
  107. bool "MCF523x"
  108. depends on !MMU
  109. select COLDFIRE
  110. select GENERIC_CLOCKEVENTS
  111. select HAVE_CACHE_SPLIT
  112. select HAVE_IPSBAR
  113. help
  114. Freescale Coldfire 5230/1/2/4/5 processor support
  115. config M5249
  116. bool "MCF5249"
  117. depends on !MMU
  118. select COLDFIRE
  119. select COLDFIRE_SW_A7
  120. select HAVE_MBAR
  121. help
  122. Motorola ColdFire 5249 processor support.
  123. config M527x
  124. bool
  125. config M5271
  126. bool "MCF5271"
  127. depends on !MMU
  128. select COLDFIRE
  129. select M527x
  130. select HAVE_CACHE_SPLIT
  131. select HAVE_IPSBAR
  132. select GENERIC_CLOCKEVENTS
  133. help
  134. Freescale (Motorola) ColdFire 5270/5271 processor support.
  135. config M5272
  136. bool "MCF5272"
  137. depends on !MMU
  138. select COLDFIRE
  139. select COLDFIRE_SW_A7
  140. select HAVE_MBAR
  141. help
  142. Motorola ColdFire 5272 processor support.
  143. config M5275
  144. bool "MCF5275"
  145. depends on !MMU
  146. select COLDFIRE
  147. select M527x
  148. select HAVE_CACHE_SPLIT
  149. select HAVE_IPSBAR
  150. select GENERIC_CLOCKEVENTS
  151. help
  152. Freescale (Motorola) ColdFire 5274/5275 processor support.
  153. config M528x
  154. bool "MCF528x"
  155. depends on !MMU
  156. select COLDFIRE
  157. select GENERIC_CLOCKEVENTS
  158. select HAVE_CACHE_SPLIT
  159. select HAVE_IPSBAR
  160. help
  161. Motorola ColdFire 5280/5282 processor support.
  162. config M5307
  163. bool "MCF5307"
  164. depends on !MMU
  165. select COLDFIRE
  166. select COLDFIRE_SW_A7
  167. select HAVE_CACHE_CB
  168. select HAVE_MBAR
  169. help
  170. Motorola ColdFire 5307 processor support.
  171. config M532x
  172. bool "MCF532x"
  173. depends on !MMU
  174. select COLDFIRE
  175. select HAVE_CACHE_CB
  176. help
  177. Freescale (Motorola) ColdFire 532x processor support.
  178. config M5407
  179. bool "MCF5407"
  180. depends on !MMU
  181. select COLDFIRE
  182. select COLDFIRE_SW_A7
  183. select HAVE_CACHE_CB
  184. select HAVE_MBAR
  185. help
  186. Motorola ColdFire 5407 processor support.
  187. config M54xx
  188. bool
  189. config M547x
  190. bool "MCF547x"
  191. depends on !MMU
  192. select COLDFIRE
  193. select M54xx
  194. select HAVE_CACHE_CB
  195. select HAVE_MBAR
  196. help
  197. Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
  198. config M548x
  199. bool "MCF548x"
  200. depends on !MMU
  201. select COLDFIRE
  202. select M54xx
  203. select HAVE_CACHE_CB
  204. select HAVE_MBAR
  205. help
  206. Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
  207. comment "Processor Specific Options"
  208. config M68KFPU_EMU
  209. bool "Math emulation support (EXPERIMENTAL)"
  210. depends on MMU
  211. depends on EXPERIMENTAL
  212. help
  213. At some point in the future, this will cause floating-point math
  214. instructions to be emulated by the kernel on machines that lack a
  215. floating-point math coprocessor. Thrill-seekers and chronically
  216. sleep-deprived psychotic hacker types can say Y now, everyone else
  217. should probably wait a while.
  218. config M68KFPU_EMU_EXTRAPREC
  219. bool "Math emulation extra precision"
  220. depends on M68KFPU_EMU
  221. help
  222. The fpu uses normally a few bit more during calculations for
  223. correct rounding, the emulator can (often) do the same but this
  224. extra calculation can cost quite some time, so you can disable
  225. it here. The emulator will then "only" calculate with a 64 bit
  226. mantissa and round slightly incorrect, what is more than enough
  227. for normal usage.
  228. config M68KFPU_EMU_ONLY
  229. bool "Math emulation only kernel"
  230. depends on M68KFPU_EMU
  231. help
  232. This option prevents any floating-point instructions from being
  233. compiled into the kernel, thereby the kernel doesn't save any
  234. floating point context anymore during task switches, so this
  235. kernel will only be usable on machines without a floating-point
  236. math coprocessor. This makes the kernel a bit faster as no tests
  237. needs to be executed whether a floating-point instruction in the
  238. kernel should be executed or not.
  239. config ADVANCED
  240. bool "Advanced configuration options"
  241. depends on MMU
  242. ---help---
  243. This gives you access to some advanced options for the CPU. The
  244. defaults should be fine for most users, but these options may make
  245. it possible for you to improve performance somewhat if you know what
  246. you are doing.
  247. Note that the answer to this question won't directly affect the
  248. kernel: saying N will just cause the configurator to skip all
  249. the questions about these options.
  250. Most users should say N to this question.
  251. config RMW_INSNS
  252. bool "Use read-modify-write instructions"
  253. depends on ADVANCED
  254. ---help---
  255. This allows to use certain instructions that work with indivisible
  256. read-modify-write bus cycles. While this is faster than the
  257. workaround of disabling interrupts, it can conflict with DMA
  258. ( = direct memory access) on many Amiga systems, and it is also said
  259. to destabilize other machines. It is very likely that this will
  260. cause serious problems on any Amiga or Atari Medusa if set. The only
  261. configuration where it should work are 68030-based Ataris, where it
  262. apparently improves performance. But you've been warned! Unless you
  263. really know what you are doing, say N. Try Y only if you're quite
  264. adventurous.
  265. config SINGLE_MEMORY_CHUNK
  266. bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
  267. depends on MMU
  268. default y if SUN3
  269. select NEED_MULTIPLE_NODES
  270. help
  271. Ignore all but the first contiguous chunk of physical memory for VM
  272. purposes. This will save a few bytes kernel size and may speed up
  273. some operations. Say N if not sure.
  274. config ARCH_DISCONTIGMEM_ENABLE
  275. def_bool MMU && !SINGLE_MEMORY_CHUNK
  276. config 060_WRITETHROUGH
  277. bool "Use write-through caching for 68060 supervisor accesses"
  278. depends on ADVANCED && M68060
  279. ---help---
  280. The 68060 generally uses copyback caching of recently accessed data.
  281. Copyback caching means that memory writes will be held in an on-chip
  282. cache and only written back to memory some time later. Saying Y
  283. here will force supervisor (kernel) accesses to use writethrough
  284. caching. Writethrough caching means that data is written to memory
  285. straight away, so that cache and memory data always agree.
  286. Writethrough caching is less efficient, but is needed for some
  287. drivers on 68060 based systems where the 68060 bus snooping signal
  288. is hardwired on. The 53c710 SCSI driver is known to suffer from
  289. this problem.
  290. config M68K_L2_CACHE
  291. bool
  292. depends on MAC
  293. default y
  294. config NODES_SHIFT
  295. int
  296. default "3"
  297. depends on !SINGLE_MEMORY_CHUNK
  298. config FPU
  299. bool
  300. config COLDFIRE_SW_A7
  301. bool
  302. config HAVE_CACHE_SPLIT
  303. bool
  304. config HAVE_CACHE_CB
  305. bool
  306. config HAVE_MBAR
  307. bool
  308. config HAVE_IPSBAR
  309. bool
  310. config CLOCK_SET
  311. bool "Enable setting the CPU clock frequency"
  312. depends on COLDFIRE
  313. default n
  314. help
  315. On some CPU's you do not need to know what the core CPU clock
  316. frequency is. On these you can disable clock setting. On some
  317. traditional 68K parts, and on all ColdFire parts you need to set
  318. the appropriate CPU clock frequency. On these devices many of the
  319. onboard peripherals derive their timing from the master CPU clock
  320. frequency.
  321. config CLOCK_FREQ
  322. int "Set the core clock frequency"
  323. default "66666666"
  324. depends on CLOCK_SET
  325. help
  326. Define the CPU clock frequency in use. This is the core clock
  327. frequency, it may or may not be the same as the external clock
  328. crystal fitted to your board. Some processors have an internal
  329. PLL and can have their frequency programmed at run time, others
  330. use internal dividers. In general the kernel won't setup a PLL
  331. if it is fitted (there are some exceptions). This value will be
  332. specific to the exact CPU that you are using.
  333. config OLDMASK
  334. bool "Old mask 5307 (1H55J) silicon"
  335. depends on M5307
  336. help
  337. Build support for the older revision ColdFire 5307 silicon.
  338. Specifically this is the 1H55J mask revision.
  339. if HAVE_CACHE_SPLIT
  340. choice
  341. prompt "Split Cache Configuration"
  342. default CACHE_I
  343. config CACHE_I
  344. bool "Instruction"
  345. help
  346. Use all of the ColdFire CPU cache memory as an instruction cache.
  347. config CACHE_D
  348. bool "Data"
  349. help
  350. Use all of the ColdFire CPU cache memory as a data cache.
  351. config CACHE_BOTH
  352. bool "Both"
  353. help
  354. Split the ColdFire CPU cache, and use half as an instruction cache
  355. and half as a data cache.
  356. endchoice
  357. endif
  358. if HAVE_CACHE_CB
  359. choice
  360. prompt "Data cache mode"
  361. default CACHE_WRITETHRU
  362. config CACHE_WRITETHRU
  363. bool "Write-through"
  364. help
  365. The ColdFire CPU cache is set into Write-through mode.
  366. config CACHE_COPYBACK
  367. bool "Copy-back"
  368. help
  369. The ColdFire CPU cache is set into Copy-back mode.
  370. endchoice
  371. endif