cm_bf527.c 22 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2008-2009 Bluetechnix
  4. * 2005 National ICT Australia (NICTA)
  5. * Aidan Williams <aidan@nicta.com.au>
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/mtd/physmap.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/flash.h>
  16. #include <linux/etherdevice.h>
  17. #include <linux/i2c.h>
  18. #include <linux/irq.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/usb/musb.h>
  21. #include <asm/dma.h>
  22. #include <asm/bfin5xx_spi.h>
  23. #include <asm/reboot.h>
  24. #include <asm/nand.h>
  25. #include <asm/portmux.h>
  26. #include <asm/dpmc.h>
  27. #include <linux/spi/ad7877.h>
  28. /*
  29. * Name the Board for the /proc/cpuinfo
  30. */
  31. const char bfin_board_name[] = "Bluetechnix CM-BF527";
  32. /*
  33. * Driver needs to know address, irq and flag pin.
  34. */
  35. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  36. #include <linux/usb/isp1760.h>
  37. static struct resource bfin_isp1760_resources[] = {
  38. [0] = {
  39. .start = 0x203C0000,
  40. .end = 0x203C0000 + 0x000fffff,
  41. .flags = IORESOURCE_MEM,
  42. },
  43. [1] = {
  44. .start = IRQ_PF7,
  45. .end = IRQ_PF7,
  46. .flags = IORESOURCE_IRQ,
  47. },
  48. };
  49. static struct isp1760_platform_data isp1760_priv = {
  50. .is_isp1761 = 0,
  51. .bus_width_16 = 1,
  52. .port1_otg = 0,
  53. .analog_oc = 0,
  54. .dack_polarity_high = 0,
  55. .dreq_polarity_high = 0,
  56. };
  57. static struct platform_device bfin_isp1760_device = {
  58. .name = "isp1760",
  59. .id = 0,
  60. .dev = {
  61. .platform_data = &isp1760_priv,
  62. },
  63. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  64. .resource = bfin_isp1760_resources,
  65. };
  66. #endif
  67. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  68. static struct resource musb_resources[] = {
  69. [0] = {
  70. .start = 0xffc03800,
  71. .end = 0xffc03cff,
  72. .flags = IORESOURCE_MEM,
  73. },
  74. [1] = { /* general IRQ */
  75. .start = IRQ_USB_INT0,
  76. .end = IRQ_USB_INT0,
  77. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  78. .name = "mc"
  79. },
  80. [2] = { /* DMA IRQ */
  81. .start = IRQ_USB_DMA,
  82. .end = IRQ_USB_DMA,
  83. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  84. .name = "dma"
  85. },
  86. };
  87. static struct musb_hdrc_config musb_config = {
  88. .multipoint = 0,
  89. .dyn_fifo = 0,
  90. .soft_con = 1,
  91. .dma = 1,
  92. .num_eps = 8,
  93. .dma_channels = 8,
  94. .gpio_vrsel = GPIO_PF11,
  95. /* Some custom boards need to be active low, just set it to "0"
  96. * if it is the case.
  97. */
  98. .gpio_vrsel_active = 1,
  99. .clkin = 24, /* musb CLKIN in MHZ */
  100. };
  101. static struct musb_hdrc_platform_data musb_plat = {
  102. #if defined(CONFIG_USB_MUSB_OTG)
  103. .mode = MUSB_OTG,
  104. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  105. .mode = MUSB_HOST,
  106. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  107. .mode = MUSB_PERIPHERAL,
  108. #endif
  109. .config = &musb_config,
  110. };
  111. static u64 musb_dmamask = ~(u32)0;
  112. static struct platform_device musb_device = {
  113. .name = "musb-blackfin",
  114. .id = 0,
  115. .dev = {
  116. .dma_mask = &musb_dmamask,
  117. .coherent_dma_mask = 0xffffffff,
  118. .platform_data = &musb_plat,
  119. },
  120. .num_resources = ARRAY_SIZE(musb_resources),
  121. .resource = musb_resources,
  122. };
  123. #endif
  124. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  125. static struct mtd_partition partition_info[] = {
  126. {
  127. .name = "linux kernel(nand)",
  128. .offset = 0,
  129. .size = 4 * 1024 * 1024,
  130. },
  131. {
  132. .name = "file system(nand)",
  133. .offset = MTDPART_OFS_APPEND,
  134. .size = MTDPART_SIZ_FULL,
  135. },
  136. };
  137. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  138. .data_width = NFC_NWIDTH_8,
  139. .partitions = partition_info,
  140. .nr_partitions = ARRAY_SIZE(partition_info),
  141. .rd_dly = 3,
  142. .wr_dly = 3,
  143. };
  144. static struct resource bf5xx_nand_resources[] = {
  145. {
  146. .start = NFC_CTL,
  147. .end = NFC_DATA_RD + 2,
  148. .flags = IORESOURCE_MEM,
  149. },
  150. {
  151. .start = CH_NFC,
  152. .end = CH_NFC,
  153. .flags = IORESOURCE_IRQ,
  154. },
  155. };
  156. static struct platform_device bf5xx_nand_device = {
  157. .name = "bf5xx-nand",
  158. .id = 0,
  159. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  160. .resource = bf5xx_nand_resources,
  161. .dev = {
  162. .platform_data = &bf5xx_nand_platform,
  163. },
  164. };
  165. #endif
  166. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  167. static struct resource bfin_pcmcia_cf_resources[] = {
  168. {
  169. .start = 0x20310000, /* IO PORT */
  170. .end = 0x20312000,
  171. .flags = IORESOURCE_MEM,
  172. }, {
  173. .start = 0x20311000, /* Attribute Memory */
  174. .end = 0x20311FFF,
  175. .flags = IORESOURCE_MEM,
  176. }, {
  177. .start = IRQ_PF4,
  178. .end = IRQ_PF4,
  179. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  180. }, {
  181. .start = 6, /* Card Detect PF6 */
  182. .end = 6,
  183. .flags = IORESOURCE_IRQ,
  184. },
  185. };
  186. static struct platform_device bfin_pcmcia_cf_device = {
  187. .name = "bfin_cf_pcmcia",
  188. .id = -1,
  189. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  190. .resource = bfin_pcmcia_cf_resources,
  191. };
  192. #endif
  193. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  194. static struct platform_device rtc_device = {
  195. .name = "rtc-bfin",
  196. .id = -1,
  197. };
  198. #endif
  199. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  200. #include <linux/smc91x.h>
  201. static struct smc91x_platdata smc91x_info = {
  202. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  203. .leda = RPC_LED_100_10,
  204. .ledb = RPC_LED_TX_RX,
  205. };
  206. static struct resource smc91x_resources[] = {
  207. {
  208. .name = "smc91x-regs",
  209. .start = 0x20300300,
  210. .end = 0x20300300 + 16,
  211. .flags = IORESOURCE_MEM,
  212. }, {
  213. .start = IRQ_PF7,
  214. .end = IRQ_PF7,
  215. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  216. },
  217. };
  218. static struct platform_device smc91x_device = {
  219. .name = "smc91x",
  220. .id = 0,
  221. .num_resources = ARRAY_SIZE(smc91x_resources),
  222. .resource = smc91x_resources,
  223. .dev = {
  224. .platform_data = &smc91x_info,
  225. },
  226. };
  227. #endif
  228. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  229. static struct resource dm9000_resources[] = {
  230. [0] = {
  231. .start = 0x203FB800,
  232. .end = 0x203FB800 + 1,
  233. .flags = IORESOURCE_MEM,
  234. },
  235. [1] = {
  236. .start = 0x203FB804,
  237. .end = 0x203FB804 + 1,
  238. .flags = IORESOURCE_MEM,
  239. },
  240. [2] = {
  241. .start = IRQ_PF9,
  242. .end = IRQ_PF9,
  243. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  244. },
  245. };
  246. static struct platform_device dm9000_device = {
  247. .name = "dm9000",
  248. .id = -1,
  249. .num_resources = ARRAY_SIZE(dm9000_resources),
  250. .resource = dm9000_resources,
  251. };
  252. #endif
  253. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  254. #include <linux/bfin_mac.h>
  255. static const unsigned short bfin_mac_peripherals[] = P_RMII0;
  256. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  257. {
  258. .addr = 1,
  259. .irq = IRQ_MAC_PHYINT,
  260. },
  261. };
  262. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  263. .phydev_number = 1,
  264. .phydev_data = bfin_phydev_data,
  265. .phy_mode = PHY_INTERFACE_MODE_RMII,
  266. .mac_peripherals = bfin_mac_peripherals,
  267. };
  268. static struct platform_device bfin_mii_bus = {
  269. .name = "bfin_mii_bus",
  270. .dev = {
  271. .platform_data = &bfin_mii_bus_data,
  272. }
  273. };
  274. static struct platform_device bfin_mac_device = {
  275. .name = "bfin_mac",
  276. .dev = {
  277. .platform_data = &bfin_mii_bus,
  278. }
  279. };
  280. #endif
  281. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  282. static struct resource net2272_bfin_resources[] = {
  283. {
  284. .start = 0x20300000,
  285. .end = 0x20300000 + 0x100,
  286. .flags = IORESOURCE_MEM,
  287. }, {
  288. .start = IRQ_PF7,
  289. .end = IRQ_PF7,
  290. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  291. },
  292. };
  293. static struct platform_device net2272_bfin_device = {
  294. .name = "net2272",
  295. .id = -1,
  296. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  297. .resource = net2272_bfin_resources,
  298. };
  299. #endif
  300. #if defined(CONFIG_MTD_M25P80) \
  301. || defined(CONFIG_MTD_M25P80_MODULE)
  302. static struct mtd_partition bfin_spi_flash_partitions[] = {
  303. {
  304. .name = "bootloader(spi)",
  305. .size = 0x00040000,
  306. .offset = 0,
  307. .mask_flags = MTD_CAP_ROM
  308. }, {
  309. .name = "linux kernel(spi)",
  310. .size = MTDPART_SIZ_FULL,
  311. .offset = MTDPART_OFS_APPEND,
  312. }
  313. };
  314. static struct flash_platform_data bfin_spi_flash_data = {
  315. .name = "m25p80",
  316. .parts = bfin_spi_flash_partitions,
  317. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  318. .type = "m25p16",
  319. };
  320. /* SPI flash chip (m25p64) */
  321. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  322. .enable_dma = 0, /* use dma transfer with this chip*/
  323. };
  324. #endif
  325. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  326. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  327. .enable_dma = 0,
  328. };
  329. #endif
  330. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  331. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  332. .model = 7877,
  333. .vref_delay_usecs = 50, /* internal, no capacitor */
  334. .x_plate_ohms = 419,
  335. .y_plate_ohms = 486,
  336. .pressure_max = 1000,
  337. .pressure_min = 0,
  338. .stopacq_polarity = 1,
  339. .first_conversion_delay = 3,
  340. .acquisition_time = 1,
  341. .averaging = 1,
  342. .pen_down_acc_interval = 1,
  343. };
  344. #endif
  345. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  346. #if defined(CONFIG_MTD_M25P80) \
  347. || defined(CONFIG_MTD_M25P80_MODULE)
  348. {
  349. /* the modalias must be the same as spi device driver name */
  350. .modalias = "m25p80", /* Name of spi_driver for this device */
  351. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  352. .bus_num = 0, /* Framework bus number */
  353. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  354. .platform_data = &bfin_spi_flash_data,
  355. .controller_data = &spi_flash_chip_info,
  356. .mode = SPI_MODE_3,
  357. },
  358. #endif
  359. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  360. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  361. {
  362. .modalias = "ad183x",
  363. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  364. .bus_num = 0,
  365. .chip_select = 4,
  366. },
  367. #endif
  368. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  369. {
  370. .modalias = "mmc_spi",
  371. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  372. .bus_num = 0,
  373. .chip_select = 5,
  374. .controller_data = &mmc_spi_chip_info,
  375. .mode = SPI_MODE_3,
  376. },
  377. #endif
  378. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  379. {
  380. .modalias = "ad7877",
  381. .platform_data = &bfin_ad7877_ts_info,
  382. .irq = IRQ_PF8,
  383. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  384. .bus_num = 0,
  385. .chip_select = 2,
  386. },
  387. #endif
  388. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  389. && defined(CONFIG_SND_SOC_WM8731_SPI)
  390. {
  391. .modalias = "wm8731",
  392. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  393. .bus_num = 0,
  394. .chip_select = 5,
  395. .mode = SPI_MODE_0,
  396. },
  397. #endif
  398. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  399. {
  400. .modalias = "spidev",
  401. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  402. .bus_num = 0,
  403. .chip_select = 1,
  404. },
  405. #endif
  406. };
  407. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  408. /* SPI controller data */
  409. static struct bfin5xx_spi_master bfin_spi0_info = {
  410. .num_chipselect = 8,
  411. .enable_dma = 1, /* master has the ability to do dma transfer */
  412. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  413. };
  414. /* SPI (0) */
  415. static struct resource bfin_spi0_resource[] = {
  416. [0] = {
  417. .start = SPI0_REGBASE,
  418. .end = SPI0_REGBASE + 0xFF,
  419. .flags = IORESOURCE_MEM,
  420. },
  421. [1] = {
  422. .start = CH_SPI,
  423. .end = CH_SPI,
  424. .flags = IORESOURCE_DMA,
  425. },
  426. [2] = {
  427. .start = IRQ_SPI,
  428. .end = IRQ_SPI,
  429. .flags = IORESOURCE_IRQ,
  430. },
  431. };
  432. static struct platform_device bfin_spi0_device = {
  433. .name = "bfin-spi",
  434. .id = 0, /* Bus number */
  435. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  436. .resource = bfin_spi0_resource,
  437. .dev = {
  438. .platform_data = &bfin_spi0_info, /* Passed to driver */
  439. },
  440. };
  441. #endif /* spi master and devices */
  442. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  443. static struct mtd_partition cm_partitions[] = {
  444. {
  445. .name = "bootloader(nor)",
  446. .size = 0x40000,
  447. .offset = 0,
  448. }, {
  449. .name = "linux kernel(nor)",
  450. .size = 0x100000,
  451. .offset = MTDPART_OFS_APPEND,
  452. }, {
  453. .name = "file system(nor)",
  454. .size = MTDPART_SIZ_FULL,
  455. .offset = MTDPART_OFS_APPEND,
  456. }
  457. };
  458. static struct physmap_flash_data cm_flash_data = {
  459. .width = 2,
  460. .parts = cm_partitions,
  461. .nr_parts = ARRAY_SIZE(cm_partitions),
  462. };
  463. static unsigned cm_flash_gpios[] = { GPIO_PH9, GPIO_PG11 };
  464. static struct resource cm_flash_resource[] = {
  465. {
  466. .name = "cfi_probe",
  467. .start = 0x20000000,
  468. .end = 0x201fffff,
  469. .flags = IORESOURCE_MEM,
  470. }, {
  471. .start = (unsigned long)cm_flash_gpios,
  472. .end = ARRAY_SIZE(cm_flash_gpios),
  473. .flags = IORESOURCE_IRQ,
  474. }
  475. };
  476. static struct platform_device cm_flash_device = {
  477. .name = "gpio-addr-flash",
  478. .id = 0,
  479. .dev = {
  480. .platform_data = &cm_flash_data,
  481. },
  482. .num_resources = ARRAY_SIZE(cm_flash_resource),
  483. .resource = cm_flash_resource,
  484. };
  485. #endif
  486. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  487. #ifdef CONFIG_SERIAL_BFIN_UART0
  488. static struct resource bfin_uart0_resources[] = {
  489. {
  490. .start = UART0_THR,
  491. .end = UART0_GCTL+2,
  492. .flags = IORESOURCE_MEM,
  493. },
  494. {
  495. .start = IRQ_UART0_RX,
  496. .end = IRQ_UART0_RX+1,
  497. .flags = IORESOURCE_IRQ,
  498. },
  499. {
  500. .start = IRQ_UART0_ERROR,
  501. .end = IRQ_UART0_ERROR,
  502. .flags = IORESOURCE_IRQ,
  503. },
  504. {
  505. .start = CH_UART0_TX,
  506. .end = CH_UART0_TX,
  507. .flags = IORESOURCE_DMA,
  508. },
  509. {
  510. .start = CH_UART0_RX,
  511. .end = CH_UART0_RX,
  512. .flags = IORESOURCE_DMA,
  513. },
  514. };
  515. static unsigned short bfin_uart0_peripherals[] = {
  516. P_UART0_TX, P_UART0_RX, 0
  517. };
  518. static struct platform_device bfin_uart0_device = {
  519. .name = "bfin-uart",
  520. .id = 0,
  521. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  522. .resource = bfin_uart0_resources,
  523. .dev = {
  524. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  525. },
  526. };
  527. #endif
  528. #ifdef CONFIG_SERIAL_BFIN_UART1
  529. static struct resource bfin_uart1_resources[] = {
  530. {
  531. .start = UART1_THR,
  532. .end = UART1_GCTL+2,
  533. .flags = IORESOURCE_MEM,
  534. },
  535. {
  536. .start = IRQ_UART1_RX,
  537. .end = IRQ_UART1_RX+1,
  538. .flags = IORESOURCE_IRQ,
  539. },
  540. {
  541. .start = IRQ_UART1_ERROR,
  542. .end = IRQ_UART1_ERROR,
  543. .flags = IORESOURCE_IRQ,
  544. },
  545. {
  546. .start = CH_UART1_TX,
  547. .end = CH_UART1_TX,
  548. .flags = IORESOURCE_DMA,
  549. },
  550. {
  551. .start = CH_UART1_RX,
  552. .end = CH_UART1_RX,
  553. .flags = IORESOURCE_DMA,
  554. },
  555. #ifdef CONFIG_BFIN_UART1_CTSRTS
  556. { /* CTS pin */
  557. .start = GPIO_PF9,
  558. .end = GPIO_PF9,
  559. .flags = IORESOURCE_IO,
  560. },
  561. { /* RTS pin */
  562. .start = GPIO_PF10,
  563. .end = GPIO_PF10,
  564. .flags = IORESOURCE_IO,
  565. },
  566. #endif
  567. };
  568. static unsigned short bfin_uart1_peripherals[] = {
  569. P_UART1_TX, P_UART1_RX, 0
  570. };
  571. static struct platform_device bfin_uart1_device = {
  572. .name = "bfin-uart",
  573. .id = 1,
  574. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  575. .resource = bfin_uart1_resources,
  576. .dev = {
  577. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  578. },
  579. };
  580. #endif
  581. #endif
  582. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  583. #ifdef CONFIG_BFIN_SIR0
  584. static struct resource bfin_sir0_resources[] = {
  585. {
  586. .start = 0xFFC00400,
  587. .end = 0xFFC004FF,
  588. .flags = IORESOURCE_MEM,
  589. },
  590. {
  591. .start = IRQ_UART0_RX,
  592. .end = IRQ_UART0_RX+1,
  593. .flags = IORESOURCE_IRQ,
  594. },
  595. {
  596. .start = CH_UART0_RX,
  597. .end = CH_UART0_RX+1,
  598. .flags = IORESOURCE_DMA,
  599. },
  600. };
  601. static struct platform_device bfin_sir0_device = {
  602. .name = "bfin_sir",
  603. .id = 0,
  604. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  605. .resource = bfin_sir0_resources,
  606. };
  607. #endif
  608. #ifdef CONFIG_BFIN_SIR1
  609. static struct resource bfin_sir1_resources[] = {
  610. {
  611. .start = 0xFFC02000,
  612. .end = 0xFFC020FF,
  613. .flags = IORESOURCE_MEM,
  614. },
  615. {
  616. .start = IRQ_UART1_RX,
  617. .end = IRQ_UART1_RX+1,
  618. .flags = IORESOURCE_IRQ,
  619. },
  620. {
  621. .start = CH_UART1_RX,
  622. .end = CH_UART1_RX+1,
  623. .flags = IORESOURCE_DMA,
  624. },
  625. };
  626. static struct platform_device bfin_sir1_device = {
  627. .name = "bfin_sir",
  628. .id = 1,
  629. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  630. .resource = bfin_sir1_resources,
  631. };
  632. #endif
  633. #endif
  634. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  635. static struct resource bfin_twi0_resource[] = {
  636. [0] = {
  637. .start = TWI0_REGBASE,
  638. .end = TWI0_REGBASE,
  639. .flags = IORESOURCE_MEM,
  640. },
  641. [1] = {
  642. .start = IRQ_TWI,
  643. .end = IRQ_TWI,
  644. .flags = IORESOURCE_IRQ,
  645. },
  646. };
  647. static struct platform_device i2c_bfin_twi_device = {
  648. .name = "i2c-bfin-twi",
  649. .id = 0,
  650. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  651. .resource = bfin_twi0_resource,
  652. };
  653. #endif
  654. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  655. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  656. {
  657. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  658. },
  659. #endif
  660. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  661. {
  662. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  663. .irq = IRQ_PF8,
  664. },
  665. #endif
  666. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  667. {
  668. I2C_BOARD_INFO("bfin-adv7393", 0x2B),
  669. },
  670. #endif
  671. };
  672. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  673. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  674. static struct resource bfin_sport0_uart_resources[] = {
  675. {
  676. .start = SPORT0_TCR1,
  677. .end = SPORT0_MRCS3+4,
  678. .flags = IORESOURCE_MEM,
  679. },
  680. {
  681. .start = IRQ_SPORT0_RX,
  682. .end = IRQ_SPORT0_RX+1,
  683. .flags = IORESOURCE_IRQ,
  684. },
  685. {
  686. .start = IRQ_SPORT0_ERROR,
  687. .end = IRQ_SPORT0_ERROR,
  688. .flags = IORESOURCE_IRQ,
  689. },
  690. };
  691. static unsigned short bfin_sport0_peripherals[] = {
  692. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  693. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  694. };
  695. static struct platform_device bfin_sport0_uart_device = {
  696. .name = "bfin-sport-uart",
  697. .id = 0,
  698. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  699. .resource = bfin_sport0_uart_resources,
  700. .dev = {
  701. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  702. },
  703. };
  704. #endif
  705. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  706. static struct resource bfin_sport1_uart_resources[] = {
  707. {
  708. .start = SPORT1_TCR1,
  709. .end = SPORT1_MRCS3+4,
  710. .flags = IORESOURCE_MEM,
  711. },
  712. {
  713. .start = IRQ_SPORT1_RX,
  714. .end = IRQ_SPORT1_RX+1,
  715. .flags = IORESOURCE_IRQ,
  716. },
  717. {
  718. .start = IRQ_SPORT1_ERROR,
  719. .end = IRQ_SPORT1_ERROR,
  720. .flags = IORESOURCE_IRQ,
  721. },
  722. };
  723. static unsigned short bfin_sport1_peripherals[] = {
  724. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  725. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  726. };
  727. static struct platform_device bfin_sport1_uart_device = {
  728. .name = "bfin-sport-uart",
  729. .id = 1,
  730. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  731. .resource = bfin_sport1_uart_resources,
  732. .dev = {
  733. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  734. },
  735. };
  736. #endif
  737. #endif
  738. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  739. #include <linux/input.h>
  740. #include <linux/gpio_keys.h>
  741. #include <linux/export.h>
  742. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  743. {BTN_0, GPIO_PF14, 1, "gpio-keys: BTN0"},
  744. };
  745. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  746. .buttons = bfin_gpio_keys_table,
  747. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  748. };
  749. static struct platform_device bfin_device_gpiokeys = {
  750. .name = "gpio-keys",
  751. .dev = {
  752. .platform_data = &bfin_gpio_keys_data,
  753. },
  754. };
  755. #endif
  756. static const unsigned int cclk_vlev_datasheet[] =
  757. {
  758. VRPAIR(VLEV_100, 400000000),
  759. VRPAIR(VLEV_105, 426000000),
  760. VRPAIR(VLEV_110, 500000000),
  761. VRPAIR(VLEV_115, 533000000),
  762. VRPAIR(VLEV_120, 600000000),
  763. };
  764. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  765. .tuple_tab = cclk_vlev_datasheet,
  766. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  767. .vr_settling_time = 25 /* us */,
  768. };
  769. static struct platform_device bfin_dpmc = {
  770. .name = "bfin dpmc",
  771. .dev = {
  772. .platform_data = &bfin_dmpc_vreg_data,
  773. },
  774. };
  775. static struct platform_device *cmbf527_devices[] __initdata = {
  776. &bfin_dpmc,
  777. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  778. &bf5xx_nand_device,
  779. #endif
  780. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  781. &bfin_pcmcia_cf_device,
  782. #endif
  783. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  784. &rtc_device,
  785. #endif
  786. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  787. &bfin_isp1760_device,
  788. #endif
  789. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  790. &musb_device,
  791. #endif
  792. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  793. &smc91x_device,
  794. #endif
  795. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  796. &dm9000_device,
  797. #endif
  798. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  799. &bfin_mii_bus,
  800. &bfin_mac_device,
  801. #endif
  802. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  803. &net2272_bfin_device,
  804. #endif
  805. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  806. &bfin_spi0_device,
  807. #endif
  808. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  809. #ifdef CONFIG_SERIAL_BFIN_UART0
  810. &bfin_uart0_device,
  811. #endif
  812. #ifdef CONFIG_SERIAL_BFIN_UART1
  813. &bfin_uart1_device,
  814. #endif
  815. #endif
  816. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  817. #ifdef CONFIG_BFIN_SIR0
  818. &bfin_sir0_device,
  819. #endif
  820. #ifdef CONFIG_BFIN_SIR1
  821. &bfin_sir1_device,
  822. #endif
  823. #endif
  824. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  825. &i2c_bfin_twi_device,
  826. #endif
  827. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  828. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  829. &bfin_sport0_uart_device,
  830. #endif
  831. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  832. &bfin_sport1_uart_device,
  833. #endif
  834. #endif
  835. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  836. &bfin_device_gpiokeys,
  837. #endif
  838. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  839. &cm_flash_device,
  840. #endif
  841. };
  842. static int __init cm_init(void)
  843. {
  844. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  845. i2c_register_board_info(0, bfin_i2c_board_info,
  846. ARRAY_SIZE(bfin_i2c_board_info));
  847. platform_add_devices(cmbf527_devices, ARRAY_SIZE(cmbf527_devices));
  848. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  849. return 0;
  850. }
  851. arch_initcall(cm_init);
  852. static struct platform_device *cmbf527_early_devices[] __initdata = {
  853. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  854. #ifdef CONFIG_SERIAL_BFIN_UART0
  855. &bfin_uart0_device,
  856. #endif
  857. #ifdef CONFIG_SERIAL_BFIN_UART1
  858. &bfin_uart1_device,
  859. #endif
  860. #endif
  861. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  862. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  863. &bfin_sport0_uart_device,
  864. #endif
  865. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  866. &bfin_sport1_uart_device,
  867. #endif
  868. #endif
  869. };
  870. void __init native_machine_early_platform_add_devices(void)
  871. {
  872. printk(KERN_INFO "register early platform devices\n");
  873. early_platform_add_devices(cmbf527_early_devices,
  874. ARRAY_SIZE(cmbf527_early_devices));
  875. }
  876. void native_machine_restart(char *cmd)
  877. {
  878. /* workaround reboot hang when booting from SPI */
  879. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  880. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  881. }
  882. void bfin_get_ether_addr(char *addr)
  883. {
  884. random_ether_addr(addr);
  885. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  886. }
  887. EXPORT_SYMBOL(bfin_get_ether_addr);