tcm-bf518.c 17 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/etherdevice.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/mtd/physmap.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/flash.h>
  16. #include <linux/i2c.h>
  17. #include <linux/irq.h>
  18. #include <linux/interrupt.h>
  19. #include <asm/dma.h>
  20. #include <asm/bfin5xx_spi.h>
  21. #include <asm/reboot.h>
  22. #include <asm/portmux.h>
  23. #include <asm/dpmc.h>
  24. #include <asm/bfin_sdh.h>
  25. #include <linux/spi/ad7877.h>
  26. #include <net/dsa.h>
  27. /*
  28. * Name the Board for the /proc/cpuinfo
  29. */
  30. const char bfin_board_name[] = "Bluetechnix TCM-BF518";
  31. /*
  32. * Driver needs to know address, irq and flag pin.
  33. */
  34. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  35. static struct mtd_partition tcm_partitions[] = {
  36. {
  37. .name = "bootloader(nor)",
  38. .size = 0x40000,
  39. .offset = 0,
  40. },
  41. {
  42. .name = "linux(nor)",
  43. .size = 0x1C0000,
  44. .offset = MTDPART_OFS_APPEND,
  45. }
  46. };
  47. static struct physmap_flash_data tcm_flash_data = {
  48. .width = 2,
  49. .parts = tcm_partitions,
  50. .nr_parts = ARRAY_SIZE(tcm_partitions),
  51. };
  52. static struct resource tcm_flash_resource = {
  53. .start = 0x20000000,
  54. .end = 0x201fffff,
  55. .flags = IORESOURCE_MEM,
  56. };
  57. static struct platform_device tcm_flash_device = {
  58. .name = "physmap-flash",
  59. .id = 0,
  60. .dev = {
  61. .platform_data = &tcm_flash_data,
  62. },
  63. .num_resources = 1,
  64. .resource = &tcm_flash_resource,
  65. };
  66. #endif
  67. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  68. static struct platform_device rtc_device = {
  69. .name = "rtc-bfin",
  70. .id = -1,
  71. };
  72. #endif
  73. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  74. #include <linux/bfin_mac.h>
  75. static const unsigned short bfin_mac_peripherals[] = P_MII0;
  76. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  77. {
  78. .addr = 1,
  79. .irq = IRQ_MAC_PHYINT,
  80. },
  81. };
  82. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  83. .phydev_number = 1,
  84. .phydev_data = bfin_phydev_data,
  85. .phy_mode = PHY_INTERFACE_MODE_MII,
  86. .mac_peripherals = bfin_mac_peripherals,
  87. };
  88. static struct platform_device bfin_mii_bus = {
  89. .name = "bfin_mii_bus",
  90. .dev = {
  91. .platform_data = &bfin_mii_bus_data,
  92. }
  93. };
  94. static struct platform_device bfin_mac_device = {
  95. .name = "bfin_mac",
  96. .dev = {
  97. .platform_data = &bfin_mii_bus,
  98. }
  99. };
  100. #endif
  101. #if defined(CONFIG_MTD_M25P80) \
  102. || defined(CONFIG_MTD_M25P80_MODULE)
  103. static struct mtd_partition bfin_spi_flash_partitions[] = {
  104. {
  105. .name = "bootloader(spi)",
  106. .size = 0x00040000,
  107. .offset = 0,
  108. .mask_flags = MTD_CAP_ROM
  109. }, {
  110. .name = "linux kernel(spi)",
  111. .size = MTDPART_SIZ_FULL,
  112. .offset = MTDPART_OFS_APPEND,
  113. }
  114. };
  115. static struct flash_platform_data bfin_spi_flash_data = {
  116. .name = "m25p80",
  117. .parts = bfin_spi_flash_partitions,
  118. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  119. .type = "m25p16",
  120. };
  121. /* SPI flash chip (m25p64) */
  122. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  123. .enable_dma = 0, /* use dma transfer with this chip*/
  124. };
  125. #endif
  126. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  127. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  128. .enable_dma = 0,
  129. };
  130. #endif
  131. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  132. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  133. .model = 7877,
  134. .vref_delay_usecs = 50, /* internal, no capacitor */
  135. .x_plate_ohms = 419,
  136. .y_plate_ohms = 486,
  137. .pressure_max = 1000,
  138. .pressure_min = 0,
  139. .stopacq_polarity = 1,
  140. .first_conversion_delay = 3,
  141. .acquisition_time = 1,
  142. .averaging = 1,
  143. .pen_down_acc_interval = 1,
  144. };
  145. #endif
  146. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  147. #if defined(CONFIG_MTD_M25P80) \
  148. || defined(CONFIG_MTD_M25P80_MODULE)
  149. {
  150. /* the modalias must be the same as spi device driver name */
  151. .modalias = "m25p80", /* Name of spi_driver for this device */
  152. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  153. .bus_num = 0, /* Framework bus number */
  154. .chip_select = 2, /* SPI0_SSEL2 */
  155. .platform_data = &bfin_spi_flash_data,
  156. .controller_data = &spi_flash_chip_info,
  157. .mode = SPI_MODE_3,
  158. },
  159. #endif
  160. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  161. {
  162. .modalias = "mmc_spi",
  163. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  164. .bus_num = 0,
  165. .chip_select = 5,
  166. .controller_data = &mmc_spi_chip_info,
  167. .mode = SPI_MODE_3,
  168. },
  169. #endif
  170. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  171. {
  172. .modalias = "ad7877",
  173. .platform_data = &bfin_ad7877_ts_info,
  174. .irq = IRQ_PF8,
  175. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  176. .bus_num = 0,
  177. .chip_select = 2,
  178. },
  179. #endif
  180. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  181. && defined(CONFIG_SND_SOC_WM8731_SPI)
  182. {
  183. .modalias = "wm8731",
  184. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  185. .bus_num = 0,
  186. .chip_select = 5,
  187. .mode = SPI_MODE_0,
  188. },
  189. #endif
  190. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  191. {
  192. .modalias = "spidev",
  193. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  194. .bus_num = 0,
  195. .chip_select = 1,
  196. },
  197. #endif
  198. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  199. {
  200. .modalias = "bfin-lq035q1-spi",
  201. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  202. .bus_num = 0,
  203. .chip_select = 1,
  204. .mode = SPI_CPHA | SPI_CPOL,
  205. },
  206. #endif
  207. };
  208. /* SPI controller data */
  209. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  210. /* SPI (0) */
  211. static struct bfin5xx_spi_master bfin_spi0_info = {
  212. .num_chipselect = 6,
  213. .enable_dma = 1, /* master has the ability to do dma transfer */
  214. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  215. };
  216. static struct resource bfin_spi0_resource[] = {
  217. [0] = {
  218. .start = SPI0_REGBASE,
  219. .end = SPI0_REGBASE + 0xFF,
  220. .flags = IORESOURCE_MEM,
  221. },
  222. [1] = {
  223. .start = CH_SPI0,
  224. .end = CH_SPI0,
  225. .flags = IORESOURCE_DMA,
  226. },
  227. [2] = {
  228. .start = IRQ_SPI0,
  229. .end = IRQ_SPI0,
  230. .flags = IORESOURCE_IRQ,
  231. },
  232. };
  233. static struct platform_device bfin_spi0_device = {
  234. .name = "bfin-spi",
  235. .id = 0, /* Bus number */
  236. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  237. .resource = bfin_spi0_resource,
  238. .dev = {
  239. .platform_data = &bfin_spi0_info, /* Passed to driver */
  240. },
  241. };
  242. /* SPI (1) */
  243. static struct bfin5xx_spi_master bfin_spi1_info = {
  244. .num_chipselect = 6,
  245. .enable_dma = 1, /* master has the ability to do dma transfer */
  246. .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
  247. };
  248. static struct resource bfin_spi1_resource[] = {
  249. [0] = {
  250. .start = SPI1_REGBASE,
  251. .end = SPI1_REGBASE + 0xFF,
  252. .flags = IORESOURCE_MEM,
  253. },
  254. [1] = {
  255. .start = CH_SPI1,
  256. .end = CH_SPI1,
  257. .flags = IORESOURCE_DMA,
  258. },
  259. [2] = {
  260. .start = IRQ_SPI1,
  261. .end = IRQ_SPI1,
  262. .flags = IORESOURCE_IRQ,
  263. },
  264. };
  265. static struct platform_device bfin_spi1_device = {
  266. .name = "bfin-spi",
  267. .id = 1, /* Bus number */
  268. .num_resources = ARRAY_SIZE(bfin_spi1_resource),
  269. .resource = bfin_spi1_resource,
  270. .dev = {
  271. .platform_data = &bfin_spi1_info, /* Passed to driver */
  272. },
  273. };
  274. #endif /* spi master and devices */
  275. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  276. #ifdef CONFIG_SERIAL_BFIN_UART0
  277. static struct resource bfin_uart0_resources[] = {
  278. {
  279. .start = UART0_THR,
  280. .end = UART0_GCTL+2,
  281. .flags = IORESOURCE_MEM,
  282. },
  283. {
  284. .start = IRQ_UART0_RX,
  285. .end = IRQ_UART0_RX+1,
  286. .flags = IORESOURCE_IRQ,
  287. },
  288. {
  289. .start = IRQ_UART0_ERROR,
  290. .end = IRQ_UART0_ERROR,
  291. .flags = IORESOURCE_IRQ,
  292. },
  293. {
  294. .start = CH_UART0_TX,
  295. .end = CH_UART0_TX,
  296. .flags = IORESOURCE_DMA,
  297. },
  298. {
  299. .start = CH_UART0_RX,
  300. .end = CH_UART0_RX,
  301. .flags = IORESOURCE_DMA,
  302. },
  303. };
  304. static unsigned short bfin_uart0_peripherals[] = {
  305. P_UART0_TX, P_UART0_RX, 0
  306. };
  307. static struct platform_device bfin_uart0_device = {
  308. .name = "bfin-uart",
  309. .id = 0,
  310. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  311. .resource = bfin_uart0_resources,
  312. .dev = {
  313. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  314. },
  315. };
  316. #endif
  317. #ifdef CONFIG_SERIAL_BFIN_UART1
  318. static struct resource bfin_uart1_resources[] = {
  319. {
  320. .start = UART1_THR,
  321. .end = UART1_GCTL+2,
  322. .flags = IORESOURCE_MEM,
  323. },
  324. {
  325. .start = IRQ_UART1_RX,
  326. .end = IRQ_UART1_RX+1,
  327. .flags = IORESOURCE_IRQ,
  328. },
  329. {
  330. .start = IRQ_UART1_ERROR,
  331. .end = IRQ_UART1_ERROR,
  332. .flags = IORESOURCE_IRQ,
  333. },
  334. {
  335. .start = CH_UART1_TX,
  336. .end = CH_UART1_TX,
  337. .flags = IORESOURCE_DMA,
  338. },
  339. {
  340. .start = CH_UART1_RX,
  341. .end = CH_UART1_RX,
  342. .flags = IORESOURCE_DMA,
  343. },
  344. };
  345. static unsigned short bfin_uart1_peripherals[] = {
  346. P_UART1_TX, P_UART1_RX, 0
  347. };
  348. static struct platform_device bfin_uart1_device = {
  349. .name = "bfin-uart",
  350. .id = 1,
  351. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  352. .resource = bfin_uart1_resources,
  353. .dev = {
  354. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  355. },
  356. };
  357. #endif
  358. #endif
  359. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  360. #ifdef CONFIG_BFIN_SIR0
  361. static struct resource bfin_sir0_resources[] = {
  362. {
  363. .start = 0xFFC00400,
  364. .end = 0xFFC004FF,
  365. .flags = IORESOURCE_MEM,
  366. },
  367. {
  368. .start = IRQ_UART0_RX,
  369. .end = IRQ_UART0_RX+1,
  370. .flags = IORESOURCE_IRQ,
  371. },
  372. {
  373. .start = CH_UART0_RX,
  374. .end = CH_UART0_RX+1,
  375. .flags = IORESOURCE_DMA,
  376. },
  377. };
  378. static struct platform_device bfin_sir0_device = {
  379. .name = "bfin_sir",
  380. .id = 0,
  381. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  382. .resource = bfin_sir0_resources,
  383. };
  384. #endif
  385. #ifdef CONFIG_BFIN_SIR1
  386. static struct resource bfin_sir1_resources[] = {
  387. {
  388. .start = 0xFFC02000,
  389. .end = 0xFFC020FF,
  390. .flags = IORESOURCE_MEM,
  391. },
  392. {
  393. .start = IRQ_UART1_RX,
  394. .end = IRQ_UART1_RX+1,
  395. .flags = IORESOURCE_IRQ,
  396. },
  397. {
  398. .start = CH_UART1_RX,
  399. .end = CH_UART1_RX+1,
  400. .flags = IORESOURCE_DMA,
  401. },
  402. };
  403. static struct platform_device bfin_sir1_device = {
  404. .name = "bfin_sir",
  405. .id = 1,
  406. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  407. .resource = bfin_sir1_resources,
  408. };
  409. #endif
  410. #endif
  411. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  412. static struct resource bfin_twi0_resource[] = {
  413. [0] = {
  414. .start = TWI0_REGBASE,
  415. .end = TWI0_REGBASE,
  416. .flags = IORESOURCE_MEM,
  417. },
  418. [1] = {
  419. .start = IRQ_TWI,
  420. .end = IRQ_TWI,
  421. .flags = IORESOURCE_IRQ,
  422. },
  423. };
  424. static struct platform_device i2c_bfin_twi_device = {
  425. .name = "i2c-bfin-twi",
  426. .id = 0,
  427. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  428. .resource = bfin_twi0_resource,
  429. };
  430. #endif
  431. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  432. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  433. {
  434. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  435. },
  436. #endif
  437. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  438. {
  439. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  440. .irq = IRQ_PF8,
  441. },
  442. #endif
  443. };
  444. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  445. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  446. static struct resource bfin_sport0_uart_resources[] = {
  447. {
  448. .start = SPORT0_TCR1,
  449. .end = SPORT0_MRCS3+4,
  450. .flags = IORESOURCE_MEM,
  451. },
  452. {
  453. .start = IRQ_SPORT0_RX,
  454. .end = IRQ_SPORT0_RX+1,
  455. .flags = IORESOURCE_IRQ,
  456. },
  457. {
  458. .start = IRQ_SPORT0_ERROR,
  459. .end = IRQ_SPORT0_ERROR,
  460. .flags = IORESOURCE_IRQ,
  461. },
  462. };
  463. static unsigned short bfin_sport0_peripherals[] = {
  464. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  465. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  466. };
  467. static struct platform_device bfin_sport0_uart_device = {
  468. .name = "bfin-sport-uart",
  469. .id = 0,
  470. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  471. .resource = bfin_sport0_uart_resources,
  472. .dev = {
  473. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  474. },
  475. };
  476. #endif
  477. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  478. static struct resource bfin_sport1_uart_resources[] = {
  479. {
  480. .start = SPORT1_TCR1,
  481. .end = SPORT1_MRCS3+4,
  482. .flags = IORESOURCE_MEM,
  483. },
  484. {
  485. .start = IRQ_SPORT1_RX,
  486. .end = IRQ_SPORT1_RX+1,
  487. .flags = IORESOURCE_IRQ,
  488. },
  489. {
  490. .start = IRQ_SPORT1_ERROR,
  491. .end = IRQ_SPORT1_ERROR,
  492. .flags = IORESOURCE_IRQ,
  493. },
  494. };
  495. static unsigned short bfin_sport1_peripherals[] = {
  496. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  497. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  498. };
  499. static struct platform_device bfin_sport1_uart_device = {
  500. .name = "bfin-sport-uart",
  501. .id = 1,
  502. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  503. .resource = bfin_sport1_uart_resources,
  504. .dev = {
  505. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  506. },
  507. };
  508. #endif
  509. #endif
  510. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  511. #include <linux/input.h>
  512. #include <linux/gpio_keys.h>
  513. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  514. {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
  515. {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
  516. };
  517. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  518. .buttons = bfin_gpio_keys_table,
  519. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  520. };
  521. static struct platform_device bfin_device_gpiokeys = {
  522. .name = "gpio-keys",
  523. .dev = {
  524. .platform_data = &bfin_gpio_keys_data,
  525. },
  526. };
  527. #endif
  528. #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
  529. static struct bfin_sd_host bfin_sdh_data = {
  530. .dma_chan = CH_RSI,
  531. .irq_int0 = IRQ_RSI_INT0,
  532. .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
  533. };
  534. static struct platform_device bf51x_sdh_device = {
  535. .name = "bfin-sdh",
  536. .id = 0,
  537. .dev = {
  538. .platform_data = &bfin_sdh_data,
  539. },
  540. };
  541. #endif
  542. static const unsigned int cclk_vlev_datasheet[] =
  543. {
  544. VRPAIR(VLEV_100, 400000000),
  545. VRPAIR(VLEV_105, 426000000),
  546. VRPAIR(VLEV_110, 500000000),
  547. VRPAIR(VLEV_115, 533000000),
  548. VRPAIR(VLEV_120, 600000000),
  549. };
  550. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  551. .tuple_tab = cclk_vlev_datasheet,
  552. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  553. .vr_settling_time = 25 /* us */,
  554. };
  555. static struct platform_device bfin_dpmc = {
  556. .name = "bfin dpmc",
  557. .dev = {
  558. .platform_data = &bfin_dmpc_vreg_data,
  559. },
  560. };
  561. static struct platform_device *tcm_devices[] __initdata = {
  562. &bfin_dpmc,
  563. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  564. &rtc_device,
  565. #endif
  566. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  567. &bfin_mii_bus,
  568. &bfin_mac_device,
  569. #endif
  570. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  571. &bfin_spi0_device,
  572. &bfin_spi1_device,
  573. #endif
  574. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  575. #ifdef CONFIG_SERIAL_BFIN_UART0
  576. &bfin_uart0_device,
  577. #endif
  578. #ifdef CONFIG_SERIAL_BFIN_UART1
  579. &bfin_uart1_device,
  580. #endif
  581. #endif
  582. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  583. #ifdef CONFIG_BFIN_SIR0
  584. &bfin_sir0_device,
  585. #endif
  586. #ifdef CONFIG_BFIN_SIR1
  587. &bfin_sir1_device,
  588. #endif
  589. #endif
  590. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  591. &i2c_bfin_twi_device,
  592. #endif
  593. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  594. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  595. &bfin_sport0_uart_device,
  596. #endif
  597. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  598. &bfin_sport1_uart_device,
  599. #endif
  600. #endif
  601. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  602. &bfin_device_gpiokeys,
  603. #endif
  604. #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
  605. &bf51x_sdh_device,
  606. #endif
  607. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  608. &tcm_flash_device,
  609. #endif
  610. };
  611. static int __init tcm_init(void)
  612. {
  613. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  614. i2c_register_board_info(0, bfin_i2c_board_info,
  615. ARRAY_SIZE(bfin_i2c_board_info));
  616. platform_add_devices(tcm_devices, ARRAY_SIZE(tcm_devices));
  617. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  618. return 0;
  619. }
  620. arch_initcall(tcm_init);
  621. static struct platform_device *tcm_early_devices[] __initdata = {
  622. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  623. #ifdef CONFIG_SERIAL_BFIN_UART0
  624. &bfin_uart0_device,
  625. #endif
  626. #ifdef CONFIG_SERIAL_BFIN_UART1
  627. &bfin_uart1_device,
  628. #endif
  629. #endif
  630. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  631. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  632. &bfin_sport0_uart_device,
  633. #endif
  634. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  635. &bfin_sport1_uart_device,
  636. #endif
  637. #endif
  638. };
  639. void __init native_machine_early_platform_add_devices(void)
  640. {
  641. printk(KERN_INFO "register early platform devices\n");
  642. early_platform_add_devices(tcm_early_devices,
  643. ARRAY_SIZE(tcm_early_devices));
  644. }
  645. void native_machine_restart(char *cmd)
  646. {
  647. /* workaround reboot hang when booting from SPI */
  648. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  649. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  650. }
  651. void bfin_get_ether_addr(char *addr)
  652. {
  653. random_ether_addr(addr);
  654. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  655. }
  656. EXPORT_SYMBOL(bfin_get_ether_addr);