orinoco_plx.c 13 KB

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  1. /* orinoco_plx.c
  2. *
  3. * Driver for Prism II devices which would usually be driven by orinoco_cs,
  4. * but are connected to the PCI bus by a PLX9052.
  5. *
  6. * Current maintainers (as of 29 September 2003) are:
  7. * Pavel Roskin <proski AT gnu.org>
  8. * and David Gibson <hermes AT gibson.dropbear.id.au>
  9. *
  10. * (C) Copyright David Gibson, IBM Corp. 2001-2003.
  11. * Copyright (C) 2001 Daniel Barlow
  12. *
  13. * The contents of this file are subject to the Mozilla Public License
  14. * Version 1.1 (the "License"); you may not use this file except in
  15. * compliance with the License. You may obtain a copy of the License
  16. * at http://www.mozilla.org/MPL/
  17. *
  18. * Software distributed under the License is distributed on an "AS IS"
  19. * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See
  20. * the License for the specific language governing rights and
  21. * limitations under the License.
  22. *
  23. * Alternatively, the contents of this file may be used under the
  24. * terms of the GNU General Public License version 2 (the "GPL"), in
  25. * which case the provisions of the GPL are applicable instead of the
  26. * above. If you wish to allow the use of your version of this file
  27. * only under the terms of the GPL and not to allow others to use your
  28. * version of this file under the MPL, indicate your decision by
  29. * deleting the provisions above and replace them with the notice and
  30. * other provisions required by the GPL. If you do not delete the
  31. * provisions above, a recipient may use your version of this file
  32. * under either the MPL or the GPL.
  33. * Caution: this is experimental and probably buggy. For success and
  34. * failure reports for different cards and adaptors, see
  35. * orinoco_plx_id_table near the end of the file. If you have a
  36. * card we don't have the PCI id for, and looks like it should work,
  37. * drop me mail with the id and "it works"/"it doesn't work".
  38. *
  39. * Note: if everything gets detected fine but it doesn't actually send
  40. * or receive packets, your first port of call should probably be to
  41. * try newer firmware in the card. Especially if you're doing Ad-Hoc
  42. * modes.
  43. *
  44. * The actual driving is done by orinoco.c, this is just resource
  45. * allocation stuff. The explanation below is courtesy of Ryan Niemi
  46. * on the linux-wlan-ng list at
  47. * http://archives.neohapsis.com/archives/dev/linux-wlan/2001-q1/0026.html
  48. *
  49. * The PLX9052-based cards (WL11000 and several others) are a
  50. * different beast than the usual PCMCIA-based PRISM2 configuration
  51. * expected by wlan-ng. Here's the general details on how the WL11000
  52. * PCI adapter works:
  53. *
  54. * - Two PCI I/O address spaces, one 0x80 long which contains the
  55. * PLX9052 registers, and one that's 0x40 long mapped to the PCMCIA
  56. * slot I/O address space.
  57. *
  58. * - One PCI memory address space, mapped to the PCMCIA memory space
  59. * (containing the CIS).
  60. *
  61. * After identifying the I/O and memory space, you can read through
  62. * the memory space to confirm the CIS's device ID or manufacturer ID
  63. * to make sure it's the expected card. qKeep in mind that the PCMCIA
  64. * spec specifies the CIS as the lower 8 bits of each word read from
  65. * the CIS, so to read the bytes of the CIS, read every other byte
  66. * (0,2,4,...). Passing that test, you need to enable the I/O address
  67. * space on the PCMCIA card via the PCMCIA COR register. This is the
  68. * first byte following the CIS. In my case (which may not have any
  69. * relation to what's on the PRISM2 cards), COR was at offset 0x800
  70. * within the PCI memory space. Write 0x41 to the COR register to
  71. * enable I/O mode and to select level triggered interrupts. To
  72. * confirm you actually succeeded, read the COR register back and make
  73. * sure it actually got set to 0x41, incase you have an unexpected
  74. * card inserted.
  75. *
  76. * Following that, you can treat the second PCI I/O address space (the
  77. * one that's not 0x80 in length) as the PCMCIA I/O space.
  78. *
  79. * Note that in the Eumitcom's source for their drivers, they register
  80. * the interrupt as edge triggered when registering it with the
  81. * Windows kernel. I don't recall how to register edge triggered on
  82. * Linux (if it can be done at all). But in some experimentation, I
  83. * don't see much operational difference between using either
  84. * interrupt mode. Don't mess with the interrupt mode in the COR
  85. * register though, as the PLX9052 wants level triggers with the way
  86. * the serial EEPROM configures it on the WL11000.
  87. *
  88. * There's some other little quirks related to timing that I bumped
  89. * into, but I don't recall right now. Also, there's two variants of
  90. * the WL11000 I've seen, revision A1 and T2. These seem to differ
  91. * slightly in the timings configured in the wait-state generator in
  92. * the PLX9052. There have also been some comments from Eumitcom that
  93. * cards shouldn't be hot swapped, apparently due to risk of cooking
  94. * the PLX9052. I'm unsure why they believe this, as I can't see
  95. * anything in the design that would really cause a problem, except
  96. * for crashing drivers not written to expect it. And having developed
  97. * drivers for the WL11000, I'd say it's quite tricky to write code
  98. * that will successfully deal with a hot unplug. Very odd things
  99. * happen on the I/O side of things. But anyway, be warned. Despite
  100. * that, I've hot-swapped a number of times during debugging and
  101. * driver development for various reasons (stuck WAIT# line after the
  102. * radio card's firmware locks up).
  103. *
  104. * Hope this is enough info for someone to add PLX9052 support to the
  105. * wlan-ng card. In the case of the WL11000, the PCI ID's are
  106. * 0x1639/0x0200, with matching subsystem ID's. Other PLX9052-based
  107. * manufacturers other than Eumitcom (or on cards other than the
  108. * WL11000) may have different PCI ID's.
  109. *
  110. * If anyone needs any more specific info, let me know. I haven't had
  111. * time to implement support myself yet, and with the way things are
  112. * going, might not have time for a while..
  113. */
  114. #define DRIVER_NAME "orinoco_plx"
  115. #define PFX DRIVER_NAME ": "
  116. #include <linux/config.h>
  117. #include <linux/module.h>
  118. #include <linux/kernel.h>
  119. #include <linux/init.h>
  120. #include <linux/delay.h>
  121. #include <linux/pci.h>
  122. #include <pcmcia/cisreg.h>
  123. #include "orinoco.h"
  124. #include "orinoco_pci.h"
  125. #define COR_OFFSET (0x3e0) /* COR attribute offset of Prism2 PC card */
  126. #define COR_VALUE (COR_LEVEL_REQ | COR_FUNC_ENA) /* Enable PC card with interrupt in level trigger */
  127. #define COR_RESET (0x80) /* reset bit in the COR register */
  128. #define PLX_RESET_TIME (500) /* milliseconds */
  129. #define PLX_INTCSR 0x4c /* Interrupt Control & Status Register */
  130. #define PLX_INTCSR_INTEN (1<<6) /* Interrupt Enable bit */
  131. /*
  132. * Do a soft reset of the card using the Configuration Option Register
  133. */
  134. static int orinoco_plx_cor_reset(struct orinoco_private *priv)
  135. {
  136. hermes_t *hw = &priv->hw;
  137. struct orinoco_pci_card *card = priv->card;
  138. unsigned long timeout;
  139. u16 reg;
  140. iowrite8(COR_VALUE | COR_RESET, card->attr_io + COR_OFFSET);
  141. mdelay(1);
  142. iowrite8(COR_VALUE, card->attr_io + COR_OFFSET);
  143. mdelay(1);
  144. /* Just in case, wait more until the card is no longer busy */
  145. timeout = jiffies + (PLX_RESET_TIME * HZ / 1000);
  146. reg = hermes_read_regn(hw, CMD);
  147. while (time_before(jiffies, timeout) && (reg & HERMES_CMD_BUSY)) {
  148. mdelay(1);
  149. reg = hermes_read_regn(hw, CMD);
  150. }
  151. /* Still busy? */
  152. if (reg & HERMES_CMD_BUSY) {
  153. printk(KERN_ERR PFX "Busy timeout\n");
  154. return -ETIMEDOUT;
  155. }
  156. return 0;
  157. }
  158. static int orinoco_plx_hw_init(struct orinoco_pci_card *card)
  159. {
  160. int i;
  161. u32 csr_reg;
  162. static const u8 cis_magic[] = {
  163. 0x01, 0x03, 0x00, 0x00, 0xff, 0x17, 0x04, 0x67
  164. };
  165. printk(KERN_DEBUG PFX "CIS: ");
  166. for (i = 0; i < 16; i++) {
  167. printk("%02X:", ioread8(card->attr_io + (i << 1)));
  168. }
  169. printk("\n");
  170. /* Verify whether a supported PC card is present */
  171. /* FIXME: we probably need to be smarted about this */
  172. for (i = 0; i < sizeof(cis_magic); i++) {
  173. if (cis_magic[i] != ioread8(card->attr_io + (i << 1))) {
  174. printk(KERN_ERR PFX "The CIS value of Prism2 PC "
  175. "card is unexpected\n");
  176. return -ENODEV;
  177. }
  178. }
  179. /* bjoern: We need to tell the card to enable interrupts, in
  180. case the serial eprom didn't do this already. See the
  181. PLX9052 data book, p8-1 and 8-24 for reference. */
  182. csr_reg = ioread32(card->bridge_io + PLX_INTCSR);
  183. if (!(csr_reg & PLX_INTCSR_INTEN)) {
  184. csr_reg |= PLX_INTCSR_INTEN;
  185. iowrite32(csr_reg, card->bridge_io + PLX_INTCSR);
  186. csr_reg = ioread32(card->bridge_io + PLX_INTCSR);
  187. if (!(csr_reg & PLX_INTCSR_INTEN)) {
  188. printk(KERN_ERR PFX "Cannot enable interrupts\n");
  189. return -EIO;
  190. }
  191. }
  192. return 0;
  193. }
  194. static int orinoco_plx_init_one(struct pci_dev *pdev,
  195. const struct pci_device_id *ent)
  196. {
  197. int err;
  198. struct orinoco_private *priv;
  199. struct orinoco_pci_card *card;
  200. struct net_device *dev;
  201. void __iomem *hermes_io, *attr_io, *bridge_io;
  202. err = pci_enable_device(pdev);
  203. if (err) {
  204. printk(KERN_ERR PFX "Cannot enable PCI device\n");
  205. return err;
  206. }
  207. err = pci_request_regions(pdev, DRIVER_NAME);
  208. if (err) {
  209. printk(KERN_ERR PFX "Cannot obtain PCI resources\n");
  210. goto fail_resources;
  211. }
  212. bridge_io = pci_iomap(pdev, 1, 0);
  213. if (!bridge_io) {
  214. printk(KERN_ERR PFX "Cannot map bridge registers\n");
  215. err = -EIO;
  216. goto fail_map_bridge;
  217. }
  218. attr_io = pci_iomap(pdev, 2, 0);
  219. if (!attr_io) {
  220. printk(KERN_ERR PFX "Cannot map PCMCIA attributes\n");
  221. err = -EIO;
  222. goto fail_map_attr;
  223. }
  224. hermes_io = pci_iomap(pdev, 3, 0);
  225. if (!hermes_io) {
  226. printk(KERN_ERR PFX "Cannot map chipset registers\n");
  227. err = -EIO;
  228. goto fail_map_hermes;
  229. }
  230. /* Allocate network device */
  231. dev = alloc_orinocodev(sizeof(*card), orinoco_plx_cor_reset);
  232. if (!dev) {
  233. printk(KERN_ERR PFX "Cannot allocate network device\n");
  234. err = -ENOMEM;
  235. goto fail_alloc;
  236. }
  237. priv = netdev_priv(dev);
  238. card = priv->card;
  239. card->bridge_io = bridge_io;
  240. card->attr_io = attr_io;
  241. SET_MODULE_OWNER(dev);
  242. SET_NETDEV_DEV(dev, &pdev->dev);
  243. hermes_struct_init(&priv->hw, hermes_io, HERMES_16BIT_REGSPACING);
  244. err = request_irq(pdev->irq, orinoco_interrupt, SA_SHIRQ,
  245. dev->name, dev);
  246. if (err) {
  247. printk(KERN_ERR PFX "Cannot allocate IRQ %d\n", pdev->irq);
  248. err = -EBUSY;
  249. goto fail_irq;
  250. }
  251. orinoco_pci_setup_netdev(dev, pdev, 2);
  252. err = orinoco_plx_hw_init(card);
  253. if (err) {
  254. printk(KERN_ERR PFX "Hardware initialization failed\n");
  255. goto fail;
  256. }
  257. err = orinoco_plx_cor_reset(priv);
  258. if (err) {
  259. printk(KERN_ERR PFX "Initial reset failed\n");
  260. goto fail;
  261. }
  262. err = register_netdev(dev);
  263. if (err) {
  264. printk(KERN_ERR PFX "Cannot register network device\n");
  265. goto fail;
  266. }
  267. pci_set_drvdata(pdev, dev);
  268. return 0;
  269. fail:
  270. free_irq(pdev->irq, dev);
  271. fail_irq:
  272. pci_set_drvdata(pdev, NULL);
  273. free_orinocodev(dev);
  274. fail_alloc:
  275. pci_iounmap(pdev, hermes_io);
  276. fail_map_hermes:
  277. pci_iounmap(pdev, attr_io);
  278. fail_map_attr:
  279. pci_iounmap(pdev, bridge_io);
  280. fail_map_bridge:
  281. pci_release_regions(pdev);
  282. fail_resources:
  283. pci_disable_device(pdev);
  284. return err;
  285. }
  286. static void __devexit orinoco_plx_remove_one(struct pci_dev *pdev)
  287. {
  288. struct net_device *dev = pci_get_drvdata(pdev);
  289. struct orinoco_private *priv = netdev_priv(dev);
  290. struct orinoco_pci_card *card = priv->card;
  291. unregister_netdev(dev);
  292. free_irq(dev->irq, dev);
  293. pci_set_drvdata(pdev, NULL);
  294. free_orinocodev(dev);
  295. pci_iounmap(pdev, priv->hw.iobase);
  296. pci_iounmap(pdev, card->attr_io);
  297. pci_iounmap(pdev, card->bridge_io);
  298. pci_release_regions(pdev);
  299. pci_disable_device(pdev);
  300. }
  301. static struct pci_device_id orinoco_plx_id_table[] = {
  302. {0x111a, 0x1023, PCI_ANY_ID, PCI_ANY_ID,}, /* Siemens SpeedStream SS1023 */
  303. {0x1385, 0x4100, PCI_ANY_ID, PCI_ANY_ID,}, /* Netgear MA301 */
  304. {0x15e8, 0x0130, PCI_ANY_ID, PCI_ANY_ID,}, /* Correga - does this work? */
  305. {0x1638, 0x1100, PCI_ANY_ID, PCI_ANY_ID,}, /* SMC EZConnect SMC2602W,
  306. Eumitcom PCI WL11000,
  307. Addtron AWA-100 */
  308. {0x16ab, 0x1100, PCI_ANY_ID, PCI_ANY_ID,}, /* Global Sun Tech GL24110P */
  309. {0x16ab, 0x1101, PCI_ANY_ID, PCI_ANY_ID,}, /* Reported working, but unknown */
  310. {0x16ab, 0x1102, PCI_ANY_ID, PCI_ANY_ID,}, /* Linksys WDT11 */
  311. {0x16ec, 0x3685, PCI_ANY_ID, PCI_ANY_ID,}, /* USR 2415 */
  312. {0xec80, 0xec00, PCI_ANY_ID, PCI_ANY_ID,}, /* Belkin F5D6000 tested by
  313. Brendan W. McAdams <rit AT jacked-in.org> */
  314. {0x10b7, 0x7770, PCI_ANY_ID, PCI_ANY_ID,}, /* 3Com AirConnect PCI tested by
  315. Damien Persohn <damien AT persohn.net> */
  316. {0,},
  317. };
  318. MODULE_DEVICE_TABLE(pci, orinoco_plx_id_table);
  319. static struct pci_driver orinoco_plx_driver = {
  320. .name = DRIVER_NAME,
  321. .id_table = orinoco_plx_id_table,
  322. .probe = orinoco_plx_init_one,
  323. .remove = __devexit_p(orinoco_plx_remove_one),
  324. .suspend = orinoco_pci_suspend,
  325. .resume = orinoco_pci_resume,
  326. };
  327. static char version[] __initdata = DRIVER_NAME " " DRIVER_VERSION
  328. " (Pavel Roskin <proski@gnu.org>,"
  329. " David Gibson <hermes@gibson.dropbear.id.au>,"
  330. " Daniel Barlow <dan@telent.net>)";
  331. MODULE_AUTHOR("Daniel Barlow <dan@telent.net>");
  332. MODULE_DESCRIPTION("Driver for wireless LAN cards using the PLX9052 PCI bridge");
  333. MODULE_LICENSE("Dual MPL/GPL");
  334. static int __init orinoco_plx_init(void)
  335. {
  336. printk(KERN_DEBUG "%s\n", version);
  337. return pci_module_init(&orinoco_plx_driver);
  338. }
  339. static void __exit orinoco_plx_exit(void)
  340. {
  341. pci_unregister_driver(&orinoco_plx_driver);
  342. }
  343. module_init(orinoco_plx_init);
  344. module_exit(orinoco_plx_exit);
  345. /*
  346. * Local variables:
  347. * c-indent-level: 8
  348. * c-basic-offset: 8
  349. * tab-width: 8
  350. * End:
  351. */