omap_hwmod.c 75 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. * Copyright (C) 2011 Texas Instruments, Inc.
  6. *
  7. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  8. *
  9. * Created in collaboration with (alphabetical order): Thara Gopinath,
  10. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  11. * Sawant, Santosh Shilimkar, Richard Woodruff
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * Introduction
  18. * ------------
  19. * One way to view an OMAP SoC is as a collection of largely unrelated
  20. * IP blocks connected by interconnects. The IP blocks include
  21. * devices such as ARM processors, audio serial interfaces, UARTs,
  22. * etc. Some of these devices, like the DSP, are created by TI;
  23. * others, like the SGX, largely originate from external vendors. In
  24. * TI's documentation, on-chip devices are referred to as "OMAP
  25. * modules." Some of these IP blocks are identical across several
  26. * OMAP versions. Others are revised frequently.
  27. *
  28. * These OMAP modules are tied together by various interconnects.
  29. * Most of the address and data flow between modules is via OCP-based
  30. * interconnects such as the L3 and L4 buses; but there are other
  31. * interconnects that distribute the hardware clock tree, handle idle
  32. * and reset signaling, supply power, and connect the modules to
  33. * various pads or balls on the OMAP package.
  34. *
  35. * OMAP hwmod provides a consistent way to describe the on-chip
  36. * hardware blocks and their integration into the rest of the chip.
  37. * This description can be automatically generated from the TI
  38. * hardware database. OMAP hwmod provides a standard, consistent API
  39. * to reset, enable, idle, and disable these hardware blocks. And
  40. * hwmod provides a way for other core code, such as the Linux device
  41. * code or the OMAP power management and address space mapping code,
  42. * to query the hardware database.
  43. *
  44. * Using hwmod
  45. * -----------
  46. * Drivers won't call hwmod functions directly. That is done by the
  47. * omap_device code, and in rare occasions, by custom integration code
  48. * in arch/arm/ *omap*. The omap_device code includes functions to
  49. * build a struct platform_device using omap_hwmod data, and that is
  50. * currently how hwmod data is communicated to drivers and to the
  51. * Linux driver model. Most drivers will call omap_hwmod functions only
  52. * indirectly, via pm_runtime*() functions.
  53. *
  54. * From a layering perspective, here is where the OMAP hwmod code
  55. * fits into the kernel software stack:
  56. *
  57. * +-------------------------------+
  58. * | Device driver code |
  59. * | (e.g., drivers/) |
  60. * +-------------------------------+
  61. * | Linux driver model |
  62. * | (platform_device / |
  63. * | platform_driver data/code) |
  64. * +-------------------------------+
  65. * | OMAP core-driver integration |
  66. * |(arch/arm/mach-omap2/devices.c)|
  67. * +-------------------------------+
  68. * | omap_device code |
  69. * | (../plat-omap/omap_device.c) |
  70. * +-------------------------------+
  71. * ----> | omap_hwmod code/data | <-----
  72. * | (../mach-omap2/omap_hwmod*) |
  73. * +-------------------------------+
  74. * | OMAP clock/PRCM/register fns |
  75. * | (__raw_{read,write}l, clk*) |
  76. * +-------------------------------+
  77. *
  78. * Device drivers should not contain any OMAP-specific code or data in
  79. * them. They should only contain code to operate the IP block that
  80. * the driver is responsible for. This is because these IP blocks can
  81. * also appear in other SoCs, either from TI (such as DaVinci) or from
  82. * other manufacturers; and drivers should be reusable across other
  83. * platforms.
  84. *
  85. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  86. * devices upon boot. The goal here is for the kernel to be
  87. * completely self-reliant and independent from bootloaders. This is
  88. * to ensure a repeatable configuration, both to ensure consistent
  89. * runtime behavior, and to make it easier for others to reproduce
  90. * bugs.
  91. *
  92. * OMAP module activity states
  93. * ---------------------------
  94. * The hwmod code considers modules to be in one of several activity
  95. * states. IP blocks start out in an UNKNOWN state, then once they
  96. * are registered via the hwmod code, proceed to the REGISTERED state.
  97. * Once their clock names are resolved to clock pointers, the module
  98. * enters the CLKS_INITED state; and finally, once the module has been
  99. * reset and the integration registers programmed, the INITIALIZED state
  100. * is entered. The hwmod code will then place the module into either
  101. * the IDLE state to save power, or in the case of a critical system
  102. * module, the ENABLED state.
  103. *
  104. * OMAP core integration code can then call omap_hwmod*() functions
  105. * directly to move the module between the IDLE, ENABLED, and DISABLED
  106. * states, as needed. This is done during both the PM idle loop, and
  107. * in the OMAP core integration code's implementation of the PM runtime
  108. * functions.
  109. *
  110. * References
  111. * ----------
  112. * This is a partial list.
  113. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  114. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  115. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  116. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  117. * - Open Core Protocol Specification 2.2
  118. *
  119. * To do:
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk.h>
  133. #include <linux/delay.h>
  134. #include <linux/err.h>
  135. #include <linux/list.h>
  136. #include <linux/mutex.h>
  137. #include <linux/spinlock.h>
  138. #include <linux/slab.h>
  139. #include "common.h"
  140. #include <plat/cpu.h>
  141. #include "clockdomain.h"
  142. #include "powerdomain.h"
  143. #include <plat/clock.h>
  144. #include <plat/omap_hwmod.h>
  145. #include <plat/prcm.h>
  146. #include "cm2xxx_3xxx.h"
  147. #include "cminst44xx.h"
  148. #include "prm2xxx_3xxx.h"
  149. #include "prm44xx.h"
  150. #include "prminst44xx.h"
  151. #include "mux.h"
  152. /* Maximum microseconds to wait for OMAP module to softreset */
  153. #define MAX_MODULE_SOFTRESET_WAIT 10000
  154. /* Name of the OMAP hwmod for the MPU */
  155. #define MPU_INITIATOR_NAME "mpu"
  156. /* omap_hwmod_list contains all registered struct omap_hwmods */
  157. static LIST_HEAD(omap_hwmod_list);
  158. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  159. static struct omap_hwmod *mpu_oh;
  160. /* Private functions */
  161. /**
  162. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  163. * @oh: struct omap_hwmod *
  164. *
  165. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  166. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  167. * OCP_SYSCONFIG register or 0 upon success.
  168. */
  169. static int _update_sysc_cache(struct omap_hwmod *oh)
  170. {
  171. if (!oh->class->sysc) {
  172. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  173. return -EINVAL;
  174. }
  175. /* XXX ensure module interface clock is up */
  176. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  177. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  178. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  179. return 0;
  180. }
  181. /**
  182. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  183. * @v: OCP_SYSCONFIG value to write
  184. * @oh: struct omap_hwmod *
  185. *
  186. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  187. * one. No return value.
  188. */
  189. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  190. {
  191. if (!oh->class->sysc) {
  192. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  193. return;
  194. }
  195. /* XXX ensure module interface clock is up */
  196. /* Module might have lost context, always update cache and register */
  197. oh->_sysc_cache = v;
  198. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  199. }
  200. /**
  201. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  202. * @oh: struct omap_hwmod *
  203. * @standbymode: MIDLEMODE field bits
  204. * @v: pointer to register contents to modify
  205. *
  206. * Update the master standby mode bits in @v to be @standbymode for
  207. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  208. * upon error or 0 upon success.
  209. */
  210. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  211. u32 *v)
  212. {
  213. u32 mstandby_mask;
  214. u8 mstandby_shift;
  215. if (!oh->class->sysc ||
  216. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  217. return -EINVAL;
  218. if (!oh->class->sysc->sysc_fields) {
  219. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  220. return -EINVAL;
  221. }
  222. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  223. mstandby_mask = (0x3 << mstandby_shift);
  224. *v &= ~mstandby_mask;
  225. *v |= __ffs(standbymode) << mstandby_shift;
  226. return 0;
  227. }
  228. /**
  229. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  230. * @oh: struct omap_hwmod *
  231. * @idlemode: SIDLEMODE field bits
  232. * @v: pointer to register contents to modify
  233. *
  234. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  235. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  236. * or 0 upon success.
  237. */
  238. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  239. {
  240. u32 sidle_mask;
  241. u8 sidle_shift;
  242. if (!oh->class->sysc ||
  243. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  244. return -EINVAL;
  245. if (!oh->class->sysc->sysc_fields) {
  246. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  247. return -EINVAL;
  248. }
  249. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  250. sidle_mask = (0x3 << sidle_shift);
  251. *v &= ~sidle_mask;
  252. *v |= __ffs(idlemode) << sidle_shift;
  253. return 0;
  254. }
  255. /**
  256. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  257. * @oh: struct omap_hwmod *
  258. * @clockact: CLOCKACTIVITY field bits
  259. * @v: pointer to register contents to modify
  260. *
  261. * Update the clockactivity mode bits in @v to be @clockact for the
  262. * @oh hwmod. Used for additional powersaving on some modules. Does
  263. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  264. * success.
  265. */
  266. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  267. {
  268. u32 clkact_mask;
  269. u8 clkact_shift;
  270. if (!oh->class->sysc ||
  271. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  272. return -EINVAL;
  273. if (!oh->class->sysc->sysc_fields) {
  274. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  275. return -EINVAL;
  276. }
  277. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  278. clkact_mask = (0x3 << clkact_shift);
  279. *v &= ~clkact_mask;
  280. *v |= clockact << clkact_shift;
  281. return 0;
  282. }
  283. /**
  284. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  285. * @oh: struct omap_hwmod *
  286. * @v: pointer to register contents to modify
  287. *
  288. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  289. * error or 0 upon success.
  290. */
  291. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  292. {
  293. u32 softrst_mask;
  294. if (!oh->class->sysc ||
  295. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  296. return -EINVAL;
  297. if (!oh->class->sysc->sysc_fields) {
  298. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  299. return -EINVAL;
  300. }
  301. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  302. *v |= softrst_mask;
  303. return 0;
  304. }
  305. /**
  306. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  307. * @oh: struct omap_hwmod *
  308. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  309. * @v: pointer to register contents to modify
  310. *
  311. * Update the module autoidle bit in @v to be @autoidle for the @oh
  312. * hwmod. The autoidle bit controls whether the module can gate
  313. * internal clocks automatically when it isn't doing anything; the
  314. * exact function of this bit varies on a per-module basis. This
  315. * function does not write to the hardware. Returns -EINVAL upon
  316. * error or 0 upon success.
  317. */
  318. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  319. u32 *v)
  320. {
  321. u32 autoidle_mask;
  322. u8 autoidle_shift;
  323. if (!oh->class->sysc ||
  324. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  325. return -EINVAL;
  326. if (!oh->class->sysc->sysc_fields) {
  327. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  328. return -EINVAL;
  329. }
  330. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  331. autoidle_mask = (0x1 << autoidle_shift);
  332. *v &= ~autoidle_mask;
  333. *v |= autoidle << autoidle_shift;
  334. return 0;
  335. }
  336. /**
  337. * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
  338. * @oh: struct omap_hwmod *
  339. * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
  340. *
  341. * Set or clear the I/O pad wakeup flag in the mux entries for the
  342. * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
  343. * in memory. If the hwmod is currently idled, and the new idle
  344. * values don't match the previous ones, this function will also
  345. * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
  346. * currently idled, this function won't touch the hardware: the new
  347. * mux settings are written to the SCM PADCTRL registers when the
  348. * hwmod is idled. No return value.
  349. */
  350. static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
  351. {
  352. struct omap_device_pad *pad;
  353. bool change = false;
  354. u16 prev_idle;
  355. int j;
  356. if (!oh->mux || !oh->mux->enabled)
  357. return;
  358. for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
  359. pad = oh->mux->pads_dynamic[j];
  360. if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
  361. continue;
  362. prev_idle = pad->idle;
  363. if (set_wake)
  364. pad->idle |= OMAP_WAKEUP_EN;
  365. else
  366. pad->idle &= ~OMAP_WAKEUP_EN;
  367. if (prev_idle != pad->idle)
  368. change = true;
  369. }
  370. if (change && oh->_state == _HWMOD_STATE_IDLE)
  371. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  372. }
  373. /**
  374. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  375. * @oh: struct omap_hwmod *
  376. *
  377. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  378. * upon error or 0 upon success.
  379. */
  380. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  381. {
  382. if (!oh->class->sysc ||
  383. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  384. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  385. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  386. return -EINVAL;
  387. if (!oh->class->sysc->sysc_fields) {
  388. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  389. return -EINVAL;
  390. }
  391. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  392. *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
  393. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  394. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  395. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  396. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  397. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  398. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  399. return 0;
  400. }
  401. /**
  402. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  403. * @oh: struct omap_hwmod *
  404. *
  405. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  406. * upon error or 0 upon success.
  407. */
  408. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  409. {
  410. if (!oh->class->sysc ||
  411. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  412. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  413. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  414. return -EINVAL;
  415. if (!oh->class->sysc->sysc_fields) {
  416. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  417. return -EINVAL;
  418. }
  419. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  420. *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  421. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  422. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  423. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  424. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  425. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  426. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  427. return 0;
  428. }
  429. /**
  430. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  431. * @oh: struct omap_hwmod *
  432. *
  433. * Prevent the hardware module @oh from entering idle while the
  434. * hardare module initiator @init_oh is active. Useful when a module
  435. * will be accessed by a particular initiator (e.g., if a module will
  436. * be accessed by the IVA, there should be a sleepdep between the IVA
  437. * initiator and the module). Only applies to modules in smart-idle
  438. * mode. If the clockdomain is marked as not needing autodeps, return
  439. * 0 without doing anything. Otherwise, returns -EINVAL upon error or
  440. * passes along clkdm_add_sleepdep() value upon success.
  441. */
  442. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  443. {
  444. if (!oh->_clk)
  445. return -EINVAL;
  446. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  447. return 0;
  448. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  449. }
  450. /**
  451. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  452. * @oh: struct omap_hwmod *
  453. *
  454. * Allow the hardware module @oh to enter idle while the hardare
  455. * module initiator @init_oh is active. Useful when a module will not
  456. * be accessed by a particular initiator (e.g., if a module will not
  457. * be accessed by the IVA, there should be no sleepdep between the IVA
  458. * initiator and the module). Only applies to modules in smart-idle
  459. * mode. If the clockdomain is marked as not needing autodeps, return
  460. * 0 without doing anything. Returns -EINVAL upon error or passes
  461. * along clkdm_del_sleepdep() value upon success.
  462. */
  463. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  464. {
  465. if (!oh->_clk)
  466. return -EINVAL;
  467. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  468. return 0;
  469. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  470. }
  471. /**
  472. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  473. * @oh: struct omap_hwmod *
  474. *
  475. * Called from _init_clocks(). Populates the @oh _clk (main
  476. * functional clock pointer) if a main_clk is present. Returns 0 on
  477. * success or -EINVAL on error.
  478. */
  479. static int _init_main_clk(struct omap_hwmod *oh)
  480. {
  481. int ret = 0;
  482. if (!oh->main_clk)
  483. return 0;
  484. oh->_clk = omap_clk_get_by_name(oh->main_clk);
  485. if (!oh->_clk) {
  486. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  487. oh->name, oh->main_clk);
  488. return -EINVAL;
  489. }
  490. if (!oh->_clk->clkdm)
  491. pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
  492. oh->main_clk, oh->_clk->name);
  493. return ret;
  494. }
  495. /**
  496. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  497. * @oh: struct omap_hwmod *
  498. *
  499. * Called from _init_clocks(). Populates the @oh OCP slave interface
  500. * clock pointers. Returns 0 on success or -EINVAL on error.
  501. */
  502. static int _init_interface_clks(struct omap_hwmod *oh)
  503. {
  504. struct clk *c;
  505. int i;
  506. int ret = 0;
  507. if (oh->slaves_cnt == 0)
  508. return 0;
  509. for (i = 0; i < oh->slaves_cnt; i++) {
  510. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  511. if (!os->clk)
  512. continue;
  513. c = omap_clk_get_by_name(os->clk);
  514. if (!c) {
  515. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  516. oh->name, os->clk);
  517. ret = -EINVAL;
  518. }
  519. os->_clk = c;
  520. }
  521. return ret;
  522. }
  523. /**
  524. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  525. * @oh: struct omap_hwmod *
  526. *
  527. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  528. * clock pointers. Returns 0 on success or -EINVAL on error.
  529. */
  530. static int _init_opt_clks(struct omap_hwmod *oh)
  531. {
  532. struct omap_hwmod_opt_clk *oc;
  533. struct clk *c;
  534. int i;
  535. int ret = 0;
  536. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  537. c = omap_clk_get_by_name(oc->clk);
  538. if (!c) {
  539. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  540. oh->name, oc->clk);
  541. ret = -EINVAL;
  542. }
  543. oc->_clk = c;
  544. }
  545. return ret;
  546. }
  547. /**
  548. * _enable_clocks - enable hwmod main clock and interface clocks
  549. * @oh: struct omap_hwmod *
  550. *
  551. * Enables all clocks necessary for register reads and writes to succeed
  552. * on the hwmod @oh. Returns 0.
  553. */
  554. static int _enable_clocks(struct omap_hwmod *oh)
  555. {
  556. int i;
  557. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  558. if (oh->_clk)
  559. clk_enable(oh->_clk);
  560. if (oh->slaves_cnt > 0) {
  561. for (i = 0; i < oh->slaves_cnt; i++) {
  562. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  563. struct clk *c = os->_clk;
  564. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  565. clk_enable(c);
  566. }
  567. }
  568. /* The opt clocks are controlled by the device driver. */
  569. return 0;
  570. }
  571. /**
  572. * _disable_clocks - disable hwmod main clock and interface clocks
  573. * @oh: struct omap_hwmod *
  574. *
  575. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  576. */
  577. static int _disable_clocks(struct omap_hwmod *oh)
  578. {
  579. int i;
  580. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  581. if (oh->_clk)
  582. clk_disable(oh->_clk);
  583. if (oh->slaves_cnt > 0) {
  584. for (i = 0; i < oh->slaves_cnt; i++) {
  585. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  586. struct clk *c = os->_clk;
  587. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  588. clk_disable(c);
  589. }
  590. }
  591. /* The opt clocks are controlled by the device driver. */
  592. return 0;
  593. }
  594. static void _enable_optional_clocks(struct omap_hwmod *oh)
  595. {
  596. struct omap_hwmod_opt_clk *oc;
  597. int i;
  598. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  599. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  600. if (oc->_clk) {
  601. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  602. oc->_clk->name);
  603. clk_enable(oc->_clk);
  604. }
  605. }
  606. static void _disable_optional_clocks(struct omap_hwmod *oh)
  607. {
  608. struct omap_hwmod_opt_clk *oc;
  609. int i;
  610. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  611. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  612. if (oc->_clk) {
  613. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  614. oc->_clk->name);
  615. clk_disable(oc->_clk);
  616. }
  617. }
  618. /**
  619. * _enable_module - enable CLKCTRL modulemode on OMAP4
  620. * @oh: struct omap_hwmod *
  621. *
  622. * Enables the PRCM module mode related to the hwmod @oh.
  623. * No return value.
  624. */
  625. static void _enable_module(struct omap_hwmod *oh)
  626. {
  627. /* The module mode does not exist prior OMAP4 */
  628. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  629. return;
  630. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  631. return;
  632. pr_debug("omap_hwmod: %s: _enable_module: %d\n",
  633. oh->name, oh->prcm.omap4.modulemode);
  634. omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
  635. oh->clkdm->prcm_partition,
  636. oh->clkdm->cm_inst,
  637. oh->clkdm->clkdm_offs,
  638. oh->prcm.omap4.clkctrl_offs);
  639. }
  640. /**
  641. * _disable_module - enable CLKCTRL modulemode on OMAP4
  642. * @oh: struct omap_hwmod *
  643. *
  644. * Disable the PRCM module mode related to the hwmod @oh.
  645. * No return value.
  646. */
  647. static void _disable_module(struct omap_hwmod *oh)
  648. {
  649. /* The module mode does not exist prior OMAP4 */
  650. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  651. return;
  652. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  653. return;
  654. pr_debug("omap_hwmod: %s: _disable_module\n", oh->name);
  655. omap4_cminst_module_disable(oh->clkdm->prcm_partition,
  656. oh->clkdm->cm_inst,
  657. oh->clkdm->clkdm_offs,
  658. oh->prcm.omap4.clkctrl_offs);
  659. }
  660. /**
  661. * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
  662. * @oh: struct omap_hwmod *oh
  663. *
  664. * Count and return the number of MPU IRQs associated with the hwmod
  665. * @oh. Used to allocate struct resource data. Returns 0 if @oh is
  666. * NULL.
  667. */
  668. static int _count_mpu_irqs(struct omap_hwmod *oh)
  669. {
  670. struct omap_hwmod_irq_info *ohii;
  671. int i = 0;
  672. if (!oh || !oh->mpu_irqs)
  673. return 0;
  674. do {
  675. ohii = &oh->mpu_irqs[i++];
  676. } while (ohii->irq != -1);
  677. return i-1;
  678. }
  679. /**
  680. * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
  681. * @oh: struct omap_hwmod *oh
  682. *
  683. * Count and return the number of SDMA request lines associated with
  684. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  685. * if @oh is NULL.
  686. */
  687. static int _count_sdma_reqs(struct omap_hwmod *oh)
  688. {
  689. struct omap_hwmod_dma_info *ohdi;
  690. int i = 0;
  691. if (!oh || !oh->sdma_reqs)
  692. return 0;
  693. do {
  694. ohdi = &oh->sdma_reqs[i++];
  695. } while (ohdi->dma_req != -1);
  696. return i-1;
  697. }
  698. /**
  699. * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
  700. * @oh: struct omap_hwmod *oh
  701. *
  702. * Count and return the number of address space ranges associated with
  703. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  704. * if @oh is NULL.
  705. */
  706. static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
  707. {
  708. struct omap_hwmod_addr_space *mem;
  709. int i = 0;
  710. if (!os || !os->addr)
  711. return 0;
  712. do {
  713. mem = &os->addr[i++];
  714. } while (mem->pa_start != mem->pa_end);
  715. return i-1;
  716. }
  717. /**
  718. * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
  719. * @oh: struct omap_hwmod *
  720. *
  721. * Returns the array index of the OCP slave port that the MPU
  722. * addresses the device on, or -EINVAL upon error or not found.
  723. */
  724. static int __init _find_mpu_port_index(struct omap_hwmod *oh)
  725. {
  726. int i;
  727. int found = 0;
  728. if (!oh || oh->slaves_cnt == 0)
  729. return -EINVAL;
  730. for (i = 0; i < oh->slaves_cnt; i++) {
  731. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  732. if (os->user & OCP_USER_MPU) {
  733. found = 1;
  734. break;
  735. }
  736. }
  737. if (found)
  738. pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
  739. oh->name, i);
  740. else
  741. pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
  742. oh->name);
  743. return (found) ? i : -EINVAL;
  744. }
  745. /**
  746. * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
  747. * @oh: struct omap_hwmod *
  748. *
  749. * Return the virtual address of the base of the register target of
  750. * device @oh, or NULL on error.
  751. */
  752. static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
  753. {
  754. struct omap_hwmod_ocp_if *os;
  755. struct omap_hwmod_addr_space *mem;
  756. int i = 0, found = 0;
  757. void __iomem *va_start;
  758. if (!oh || oh->slaves_cnt == 0)
  759. return NULL;
  760. os = oh->slaves[index];
  761. if (!os->addr)
  762. return NULL;
  763. do {
  764. mem = &os->addr[i++];
  765. if (mem->flags & ADDR_TYPE_RT)
  766. found = 1;
  767. } while (!found && mem->pa_start != mem->pa_end);
  768. if (found) {
  769. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  770. if (!va_start) {
  771. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  772. return NULL;
  773. }
  774. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  775. oh->name, va_start);
  776. } else {
  777. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  778. oh->name);
  779. }
  780. return (found) ? va_start : NULL;
  781. }
  782. /**
  783. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  784. * @oh: struct omap_hwmod *
  785. *
  786. * If module is marked as SWSUP_SIDLE, force the module out of slave
  787. * idle; otherwise, configure it for smart-idle. If module is marked
  788. * as SWSUP_MSUSPEND, force the module out of master standby;
  789. * otherwise, configure it for smart-standby. No return value.
  790. */
  791. static void _enable_sysc(struct omap_hwmod *oh)
  792. {
  793. u8 idlemode, sf;
  794. u32 v;
  795. if (!oh->class->sysc)
  796. return;
  797. v = oh->_sysc_cache;
  798. sf = oh->class->sysc->sysc_flags;
  799. if (sf & SYSC_HAS_SIDLEMODE) {
  800. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  801. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  802. _set_slave_idlemode(oh, idlemode, &v);
  803. }
  804. if (sf & SYSC_HAS_MIDLEMODE) {
  805. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  806. idlemode = HWMOD_IDLEMODE_NO;
  807. } else {
  808. if (sf & SYSC_HAS_ENAWAKEUP)
  809. _enable_wakeup(oh, &v);
  810. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  811. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  812. else
  813. idlemode = HWMOD_IDLEMODE_SMART;
  814. }
  815. _set_master_standbymode(oh, idlemode, &v);
  816. }
  817. /*
  818. * XXX The clock framework should handle this, by
  819. * calling into this code. But this must wait until the
  820. * clock structures are tagged with omap_hwmod entries
  821. */
  822. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  823. (sf & SYSC_HAS_CLOCKACTIVITY))
  824. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  825. /* If slave is in SMARTIDLE, also enable wakeup */
  826. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  827. _enable_wakeup(oh, &v);
  828. _write_sysconfig(v, oh);
  829. /*
  830. * Set the autoidle bit only after setting the smartidle bit
  831. * Setting this will not have any impact on the other modules.
  832. */
  833. if (sf & SYSC_HAS_AUTOIDLE) {
  834. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  835. 0 : 1;
  836. _set_module_autoidle(oh, idlemode, &v);
  837. _write_sysconfig(v, oh);
  838. }
  839. }
  840. /**
  841. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  842. * @oh: struct omap_hwmod *
  843. *
  844. * If module is marked as SWSUP_SIDLE, force the module into slave
  845. * idle; otherwise, configure it for smart-idle. If module is marked
  846. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  847. * configure it for smart-standby. No return value.
  848. */
  849. static void _idle_sysc(struct omap_hwmod *oh)
  850. {
  851. u8 idlemode, sf;
  852. u32 v;
  853. if (!oh->class->sysc)
  854. return;
  855. v = oh->_sysc_cache;
  856. sf = oh->class->sysc->sysc_flags;
  857. if (sf & SYSC_HAS_SIDLEMODE) {
  858. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  859. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  860. _set_slave_idlemode(oh, idlemode, &v);
  861. }
  862. if (sf & SYSC_HAS_MIDLEMODE) {
  863. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  864. idlemode = HWMOD_IDLEMODE_FORCE;
  865. } else {
  866. if (sf & SYSC_HAS_ENAWAKEUP)
  867. _enable_wakeup(oh, &v);
  868. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  869. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  870. else
  871. idlemode = HWMOD_IDLEMODE_SMART;
  872. }
  873. _set_master_standbymode(oh, idlemode, &v);
  874. }
  875. /* If slave is in SMARTIDLE, also enable wakeup */
  876. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  877. _enable_wakeup(oh, &v);
  878. _write_sysconfig(v, oh);
  879. }
  880. /**
  881. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  882. * @oh: struct omap_hwmod *
  883. *
  884. * Force the module into slave idle and master suspend. No return
  885. * value.
  886. */
  887. static void _shutdown_sysc(struct omap_hwmod *oh)
  888. {
  889. u32 v;
  890. u8 sf;
  891. if (!oh->class->sysc)
  892. return;
  893. v = oh->_sysc_cache;
  894. sf = oh->class->sysc->sysc_flags;
  895. if (sf & SYSC_HAS_SIDLEMODE)
  896. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  897. if (sf & SYSC_HAS_MIDLEMODE)
  898. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  899. if (sf & SYSC_HAS_AUTOIDLE)
  900. _set_module_autoidle(oh, 1, &v);
  901. _write_sysconfig(v, oh);
  902. }
  903. /**
  904. * _lookup - find an omap_hwmod by name
  905. * @name: find an omap_hwmod by name
  906. *
  907. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  908. */
  909. static struct omap_hwmod *_lookup(const char *name)
  910. {
  911. struct omap_hwmod *oh, *temp_oh;
  912. oh = NULL;
  913. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  914. if (!strcmp(name, temp_oh->name)) {
  915. oh = temp_oh;
  916. break;
  917. }
  918. }
  919. return oh;
  920. }
  921. /**
  922. * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
  923. * @oh: struct omap_hwmod *
  924. *
  925. * Convert a clockdomain name stored in a struct omap_hwmod into a
  926. * clockdomain pointer, and save it into the struct omap_hwmod.
  927. * return -EINVAL if clkdm_name does not exist or if the lookup failed.
  928. */
  929. static int _init_clkdm(struct omap_hwmod *oh)
  930. {
  931. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  932. return 0;
  933. if (!oh->clkdm_name) {
  934. pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name);
  935. return -EINVAL;
  936. }
  937. oh->clkdm = clkdm_lookup(oh->clkdm_name);
  938. if (!oh->clkdm) {
  939. pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
  940. oh->name, oh->clkdm_name);
  941. return -EINVAL;
  942. }
  943. pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
  944. oh->name, oh->clkdm_name);
  945. return 0;
  946. }
  947. /**
  948. * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
  949. * well the clockdomain.
  950. * @oh: struct omap_hwmod *
  951. * @data: not used; pass NULL
  952. *
  953. * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
  954. * Resolves all clock names embedded in the hwmod. Returns 0 on
  955. * success, or a negative error code on failure.
  956. */
  957. static int _init_clocks(struct omap_hwmod *oh, void *data)
  958. {
  959. int ret = 0;
  960. if (oh->_state != _HWMOD_STATE_REGISTERED)
  961. return 0;
  962. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  963. ret |= _init_main_clk(oh);
  964. ret |= _init_interface_clks(oh);
  965. ret |= _init_opt_clks(oh);
  966. ret |= _init_clkdm(oh);
  967. if (!ret)
  968. oh->_state = _HWMOD_STATE_CLKS_INITED;
  969. else
  970. pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
  971. return ret;
  972. }
  973. /**
  974. * _wait_target_ready - wait for a module to leave slave idle
  975. * @oh: struct omap_hwmod *
  976. *
  977. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  978. * does not have an IDLEST bit or if the module successfully leaves
  979. * slave idle; otherwise, pass along the return value of the
  980. * appropriate *_cm*_wait_module_ready() function.
  981. */
  982. static int _wait_target_ready(struct omap_hwmod *oh)
  983. {
  984. struct omap_hwmod_ocp_if *os;
  985. int ret;
  986. if (!oh)
  987. return -EINVAL;
  988. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  989. return 0;
  990. os = oh->slaves[oh->_mpu_port_index];
  991. if (oh->flags & HWMOD_NO_IDLEST)
  992. return 0;
  993. /* XXX check module SIDLEMODE */
  994. /* XXX check clock enable states */
  995. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  996. ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  997. oh->prcm.omap2.idlest_reg_id,
  998. oh->prcm.omap2.idlest_idle_bit);
  999. } else if (cpu_is_omap44xx()) {
  1000. if (!oh->clkdm)
  1001. return -EINVAL;
  1002. ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
  1003. oh->clkdm->cm_inst,
  1004. oh->clkdm->clkdm_offs,
  1005. oh->prcm.omap4.clkctrl_offs);
  1006. } else {
  1007. BUG();
  1008. };
  1009. return ret;
  1010. }
  1011. /**
  1012. * _wait_target_disable - wait for a module to be disabled
  1013. * @oh: struct omap_hwmod *
  1014. *
  1015. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  1016. * does not have an IDLEST bit or if the module successfully enters
  1017. * slave idle; otherwise, pass along the return value of the
  1018. * appropriate *_cm*_wait_module_idle() function.
  1019. */
  1020. static int _wait_target_disable(struct omap_hwmod *oh)
  1021. {
  1022. /* TODO: For now just handle OMAP4+ */
  1023. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  1024. return 0;
  1025. if (!oh)
  1026. return -EINVAL;
  1027. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1028. return 0;
  1029. if (oh->flags & HWMOD_NO_IDLEST)
  1030. return 0;
  1031. return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
  1032. oh->clkdm->cm_inst,
  1033. oh->clkdm->clkdm_offs,
  1034. oh->prcm.omap4.clkctrl_offs);
  1035. }
  1036. /**
  1037. * _lookup_hardreset - fill register bit info for this hwmod/reset line
  1038. * @oh: struct omap_hwmod *
  1039. * @name: name of the reset line in the context of this hwmod
  1040. * @ohri: struct omap_hwmod_rst_info * that this function will fill in
  1041. *
  1042. * Return the bit position of the reset line that match the
  1043. * input name. Return -ENOENT if not found.
  1044. */
  1045. static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
  1046. struct omap_hwmod_rst_info *ohri)
  1047. {
  1048. int i;
  1049. for (i = 0; i < oh->rst_lines_cnt; i++) {
  1050. const char *rst_line = oh->rst_lines[i].name;
  1051. if (!strcmp(rst_line, name)) {
  1052. ohri->rst_shift = oh->rst_lines[i].rst_shift;
  1053. ohri->st_shift = oh->rst_lines[i].st_shift;
  1054. pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
  1055. oh->name, __func__, rst_line, ohri->rst_shift,
  1056. ohri->st_shift);
  1057. return 0;
  1058. }
  1059. }
  1060. return -ENOENT;
  1061. }
  1062. /**
  1063. * _assert_hardreset - assert the HW reset line of submodules
  1064. * contained in the hwmod module.
  1065. * @oh: struct omap_hwmod *
  1066. * @name: name of the reset line to lookup and assert
  1067. *
  1068. * Some IP like dsp, ipu or iva contain processor that require
  1069. * an HW reset line to be assert / deassert in order to enable fully
  1070. * the IP.
  1071. */
  1072. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  1073. {
  1074. struct omap_hwmod_rst_info ohri;
  1075. u8 ret;
  1076. if (!oh)
  1077. return -EINVAL;
  1078. ret = _lookup_hardreset(oh, name, &ohri);
  1079. if (IS_ERR_VALUE(ret))
  1080. return ret;
  1081. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  1082. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  1083. ohri.rst_shift);
  1084. else if (cpu_is_omap44xx())
  1085. return omap4_prminst_assert_hardreset(ohri.rst_shift,
  1086. oh->clkdm->pwrdm.ptr->prcm_partition,
  1087. oh->clkdm->pwrdm.ptr->prcm_offs,
  1088. oh->prcm.omap4.rstctrl_offs);
  1089. else
  1090. return -EINVAL;
  1091. }
  1092. /**
  1093. * _deassert_hardreset - deassert the HW reset line of submodules contained
  1094. * in the hwmod module.
  1095. * @oh: struct omap_hwmod *
  1096. * @name: name of the reset line to look up and deassert
  1097. *
  1098. * Some IP like dsp, ipu or iva contain processor that require
  1099. * an HW reset line to be assert / deassert in order to enable fully
  1100. * the IP.
  1101. */
  1102. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1103. {
  1104. struct omap_hwmod_rst_info ohri;
  1105. int ret;
  1106. if (!oh)
  1107. return -EINVAL;
  1108. ret = _lookup_hardreset(oh, name, &ohri);
  1109. if (IS_ERR_VALUE(ret))
  1110. return ret;
  1111. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1112. ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  1113. ohri.rst_shift,
  1114. ohri.st_shift);
  1115. } else if (cpu_is_omap44xx()) {
  1116. if (ohri.st_shift)
  1117. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  1118. oh->name, name);
  1119. ret = omap4_prminst_deassert_hardreset(ohri.rst_shift,
  1120. oh->clkdm->pwrdm.ptr->prcm_partition,
  1121. oh->clkdm->pwrdm.ptr->prcm_offs,
  1122. oh->prcm.omap4.rstctrl_offs);
  1123. } else {
  1124. return -EINVAL;
  1125. }
  1126. if (ret == -EBUSY)
  1127. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  1128. return ret;
  1129. }
  1130. /**
  1131. * _read_hardreset - read the HW reset line state of submodules
  1132. * contained in the hwmod module
  1133. * @oh: struct omap_hwmod *
  1134. * @name: name of the reset line to look up and read
  1135. *
  1136. * Return the state of the reset line.
  1137. */
  1138. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  1139. {
  1140. struct omap_hwmod_rst_info ohri;
  1141. u8 ret;
  1142. if (!oh)
  1143. return -EINVAL;
  1144. ret = _lookup_hardreset(oh, name, &ohri);
  1145. if (IS_ERR_VALUE(ret))
  1146. return ret;
  1147. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1148. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  1149. ohri.st_shift);
  1150. } else if (cpu_is_omap44xx()) {
  1151. return omap4_prminst_is_hardreset_asserted(ohri.rst_shift,
  1152. oh->clkdm->pwrdm.ptr->prcm_partition,
  1153. oh->clkdm->pwrdm.ptr->prcm_offs,
  1154. oh->prcm.omap4.rstctrl_offs);
  1155. } else {
  1156. return -EINVAL;
  1157. }
  1158. }
  1159. /**
  1160. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  1161. * @oh: struct omap_hwmod *
  1162. *
  1163. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  1164. * enabled for this to work. Returns -EINVAL if the hwmod cannot be
  1165. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  1166. * the module did not reset in time, or 0 upon success.
  1167. *
  1168. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  1169. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  1170. * use the SYSCONFIG softreset bit to provide the status.
  1171. *
  1172. * Note that some IP like McBSP do have reset control but don't have
  1173. * reset status.
  1174. */
  1175. static int _ocp_softreset(struct omap_hwmod *oh)
  1176. {
  1177. u32 v;
  1178. int c = 0;
  1179. int ret = 0;
  1180. if (!oh->class->sysc ||
  1181. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  1182. return -EINVAL;
  1183. /* clocks must be on for this operation */
  1184. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1185. pr_warning("omap_hwmod: %s: reset can only be entered from "
  1186. "enabled state\n", oh->name);
  1187. return -EINVAL;
  1188. }
  1189. /* For some modules, all optionnal clocks need to be enabled as well */
  1190. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1191. _enable_optional_clocks(oh);
  1192. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  1193. v = oh->_sysc_cache;
  1194. ret = _set_softreset(oh, &v);
  1195. if (ret)
  1196. goto dis_opt_clks;
  1197. _write_sysconfig(v, oh);
  1198. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  1199. omap_test_timeout((omap_hwmod_read(oh,
  1200. oh->class->sysc->syss_offs)
  1201. & SYSS_RESETDONE_MASK),
  1202. MAX_MODULE_SOFTRESET_WAIT, c);
  1203. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
  1204. omap_test_timeout(!(omap_hwmod_read(oh,
  1205. oh->class->sysc->sysc_offs)
  1206. & SYSC_TYPE2_SOFTRESET_MASK),
  1207. MAX_MODULE_SOFTRESET_WAIT, c);
  1208. if (c == MAX_MODULE_SOFTRESET_WAIT)
  1209. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  1210. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  1211. else
  1212. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  1213. /*
  1214. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  1215. * _wait_target_ready() or _reset()
  1216. */
  1217. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  1218. dis_opt_clks:
  1219. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1220. _disable_optional_clocks(oh);
  1221. return ret;
  1222. }
  1223. /**
  1224. * _reset - reset an omap_hwmod
  1225. * @oh: struct omap_hwmod *
  1226. *
  1227. * Resets an omap_hwmod @oh. The default software reset mechanism for
  1228. * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
  1229. * bit. However, some hwmods cannot be reset via this method: some
  1230. * are not targets and therefore have no OCP header registers to
  1231. * access; others (like the IVA) have idiosyncratic reset sequences.
  1232. * So for these relatively rare cases, custom reset code can be
  1233. * supplied in the struct omap_hwmod_class .reset function pointer.
  1234. * Passes along the return value from either _reset() or the custom
  1235. * reset function - these must return -EINVAL if the hwmod cannot be
  1236. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  1237. * the module did not reset in time, or 0 upon success.
  1238. */
  1239. static int _reset(struct omap_hwmod *oh)
  1240. {
  1241. int ret;
  1242. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1243. ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
  1244. return ret;
  1245. }
  1246. /**
  1247. * _enable - enable an omap_hwmod
  1248. * @oh: struct omap_hwmod *
  1249. *
  1250. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1251. * register target. Returns -EINVAL if the hwmod is in the wrong
  1252. * state or passes along the return value of _wait_target_ready().
  1253. */
  1254. static int _enable(struct omap_hwmod *oh)
  1255. {
  1256. int r;
  1257. int hwsup = 0;
  1258. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1259. /*
  1260. * hwmods with HWMOD_INIT_NO_IDLE flag set are left
  1261. * in enabled state at init.
  1262. * Now that someone is really trying to enable them,
  1263. * just ensure that the hwmod mux is set.
  1264. */
  1265. if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
  1266. /*
  1267. * If the caller has mux data populated, do the mux'ing
  1268. * which wouldn't have been done as part of the _enable()
  1269. * done during setup.
  1270. */
  1271. if (oh->mux)
  1272. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1273. oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
  1274. return 0;
  1275. }
  1276. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1277. oh->_state != _HWMOD_STATE_IDLE &&
  1278. oh->_state != _HWMOD_STATE_DISABLED) {
  1279. WARN(1, "omap_hwmod: %s: enabled state can only be entered "
  1280. "from initialized, idle, or disabled state\n", oh->name);
  1281. return -EINVAL;
  1282. }
  1283. /*
  1284. * If an IP contains only one HW reset line, then de-assert it in order
  1285. * to allow the module state transition. Otherwise the PRCM will return
  1286. * Intransition status, and the init will failed.
  1287. */
  1288. if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
  1289. oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
  1290. _deassert_hardreset(oh, oh->rst_lines[0].name);
  1291. /* Mux pins for device runtime if populated */
  1292. if (oh->mux && (!oh->mux->enabled ||
  1293. ((oh->_state == _HWMOD_STATE_IDLE) &&
  1294. oh->mux->pads_dynamic)))
  1295. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1296. _add_initiator_dep(oh, mpu_oh);
  1297. if (oh->clkdm) {
  1298. /*
  1299. * A clockdomain must be in SW_SUP before enabling
  1300. * completely the module. The clockdomain can be set
  1301. * in HW_AUTO only when the module become ready.
  1302. */
  1303. hwsup = clkdm_in_hwsup(oh->clkdm);
  1304. r = clkdm_hwmod_enable(oh->clkdm, oh);
  1305. if (r) {
  1306. WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
  1307. oh->name, oh->clkdm->name, r);
  1308. return r;
  1309. }
  1310. }
  1311. _enable_clocks(oh);
  1312. _enable_module(oh);
  1313. r = _wait_target_ready(oh);
  1314. if (!r) {
  1315. /*
  1316. * Set the clockdomain to HW_AUTO only if the target is ready,
  1317. * assuming that the previous state was HW_AUTO
  1318. */
  1319. if (oh->clkdm && hwsup)
  1320. clkdm_allow_idle(oh->clkdm);
  1321. oh->_state = _HWMOD_STATE_ENABLED;
  1322. /* Access the sysconfig only if the target is ready */
  1323. if (oh->class->sysc) {
  1324. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1325. _update_sysc_cache(oh);
  1326. _enable_sysc(oh);
  1327. }
  1328. } else {
  1329. _disable_clocks(oh);
  1330. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1331. oh->name, r);
  1332. if (oh->clkdm)
  1333. clkdm_hwmod_disable(oh->clkdm, oh);
  1334. }
  1335. return r;
  1336. }
  1337. /**
  1338. * _idle - idle an omap_hwmod
  1339. * @oh: struct omap_hwmod *
  1340. *
  1341. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1342. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1343. * state or returns 0.
  1344. */
  1345. static int _idle(struct omap_hwmod *oh)
  1346. {
  1347. int ret;
  1348. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1349. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1350. WARN(1, "omap_hwmod: %s: idle state can only be entered from "
  1351. "enabled state\n", oh->name);
  1352. return -EINVAL;
  1353. }
  1354. if (oh->class->sysc)
  1355. _idle_sysc(oh);
  1356. _del_initiator_dep(oh, mpu_oh);
  1357. _disable_module(oh);
  1358. ret = _wait_target_disable(oh);
  1359. if (ret)
  1360. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1361. oh->name);
  1362. /*
  1363. * The module must be in idle mode before disabling any parents
  1364. * clocks. Otherwise, the parent clock might be disabled before
  1365. * the module transition is done, and thus will prevent the
  1366. * transition to complete properly.
  1367. */
  1368. _disable_clocks(oh);
  1369. if (oh->clkdm)
  1370. clkdm_hwmod_disable(oh->clkdm, oh);
  1371. /* Mux pins for device idle if populated */
  1372. if (oh->mux && oh->mux->pads_dynamic)
  1373. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1374. oh->_state = _HWMOD_STATE_IDLE;
  1375. return 0;
  1376. }
  1377. /**
  1378. * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
  1379. * @oh: struct omap_hwmod *
  1380. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  1381. *
  1382. * Sets the IP block's OCP autoidle bit in hardware, and updates our
  1383. * local copy. Intended to be used by drivers that require
  1384. * direct manipulation of the AUTOIDLE bits.
  1385. * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
  1386. * along the return value from _set_module_autoidle().
  1387. *
  1388. * Any users of this function should be scrutinized carefully.
  1389. */
  1390. int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
  1391. {
  1392. u32 v;
  1393. int retval = 0;
  1394. unsigned long flags;
  1395. if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
  1396. return -EINVAL;
  1397. spin_lock_irqsave(&oh->_lock, flags);
  1398. v = oh->_sysc_cache;
  1399. retval = _set_module_autoidle(oh, autoidle, &v);
  1400. if (!retval)
  1401. _write_sysconfig(v, oh);
  1402. spin_unlock_irqrestore(&oh->_lock, flags);
  1403. return retval;
  1404. }
  1405. /**
  1406. * _shutdown - shutdown an omap_hwmod
  1407. * @oh: struct omap_hwmod *
  1408. *
  1409. * Shut down an omap_hwmod @oh. This should be called when the driver
  1410. * used for the hwmod is removed or unloaded or if the driver is not
  1411. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1412. * state or returns 0.
  1413. */
  1414. static int _shutdown(struct omap_hwmod *oh)
  1415. {
  1416. int ret;
  1417. u8 prev_state;
  1418. if (oh->_state != _HWMOD_STATE_IDLE &&
  1419. oh->_state != _HWMOD_STATE_ENABLED) {
  1420. WARN(1, "omap_hwmod: %s: disabled state can only be entered "
  1421. "from idle, or enabled state\n", oh->name);
  1422. return -EINVAL;
  1423. }
  1424. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1425. if (oh->class->pre_shutdown) {
  1426. prev_state = oh->_state;
  1427. if (oh->_state == _HWMOD_STATE_IDLE)
  1428. _enable(oh);
  1429. ret = oh->class->pre_shutdown(oh);
  1430. if (ret) {
  1431. if (prev_state == _HWMOD_STATE_IDLE)
  1432. _idle(oh);
  1433. return ret;
  1434. }
  1435. }
  1436. if (oh->class->sysc) {
  1437. if (oh->_state == _HWMOD_STATE_IDLE)
  1438. _enable(oh);
  1439. _shutdown_sysc(oh);
  1440. }
  1441. /* clocks and deps are already disabled in idle */
  1442. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1443. _del_initiator_dep(oh, mpu_oh);
  1444. /* XXX what about the other system initiators here? dma, dsp */
  1445. _disable_module(oh);
  1446. ret = _wait_target_disable(oh);
  1447. if (ret)
  1448. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1449. oh->name);
  1450. _disable_clocks(oh);
  1451. if (oh->clkdm)
  1452. clkdm_hwmod_disable(oh->clkdm, oh);
  1453. }
  1454. /* XXX Should this code also force-disable the optional clocks? */
  1455. /*
  1456. * If an IP contains only one HW reset line, then assert it
  1457. * after disabling the clocks and before shutting down the IP.
  1458. */
  1459. if (oh->rst_lines_cnt == 1)
  1460. _assert_hardreset(oh, oh->rst_lines[0].name);
  1461. /* Mux pins to safe mode or use populated off mode values */
  1462. if (oh->mux)
  1463. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1464. oh->_state = _HWMOD_STATE_DISABLED;
  1465. return 0;
  1466. }
  1467. /**
  1468. * _setup - do initial configuration of omap_hwmod
  1469. * @oh: struct omap_hwmod *
  1470. *
  1471. * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
  1472. * OCP_SYSCONFIG register. Returns 0.
  1473. */
  1474. static int _setup(struct omap_hwmod *oh, void *data)
  1475. {
  1476. int i, r;
  1477. u8 postsetup_state;
  1478. if (oh->_state != _HWMOD_STATE_CLKS_INITED)
  1479. return 0;
  1480. /* Set iclk autoidle mode */
  1481. if (oh->slaves_cnt > 0) {
  1482. for (i = 0; i < oh->slaves_cnt; i++) {
  1483. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  1484. struct clk *c = os->_clk;
  1485. if (!c)
  1486. continue;
  1487. if (os->flags & OCPIF_SWSUP_IDLE) {
  1488. /* XXX omap_iclk_deny_idle(c); */
  1489. } else {
  1490. /* XXX omap_iclk_allow_idle(c); */
  1491. clk_enable(c);
  1492. }
  1493. }
  1494. }
  1495. oh->_state = _HWMOD_STATE_INITIALIZED;
  1496. /*
  1497. * In the case of hwmod with hardreset that should not be
  1498. * de-assert at boot time, we have to keep the module
  1499. * initialized, because we cannot enable it properly with the
  1500. * reset asserted. Exit without warning because that behavior is
  1501. * expected.
  1502. */
  1503. if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
  1504. return 0;
  1505. r = _enable(oh);
  1506. if (r) {
  1507. pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
  1508. oh->name, oh->_state);
  1509. return 0;
  1510. }
  1511. if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
  1512. _reset(oh);
  1513. /*
  1514. * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
  1515. * The _enable() function should be split to
  1516. * avoid the rewrite of the OCP_SYSCONFIG register.
  1517. */
  1518. if (oh->class->sysc) {
  1519. _update_sysc_cache(oh);
  1520. _enable_sysc(oh);
  1521. }
  1522. }
  1523. postsetup_state = oh->_postsetup_state;
  1524. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  1525. postsetup_state = _HWMOD_STATE_ENABLED;
  1526. /*
  1527. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  1528. * it should be set by the core code as a runtime flag during startup
  1529. */
  1530. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  1531. (postsetup_state == _HWMOD_STATE_IDLE)) {
  1532. oh->_int_flags |= _HWMOD_SKIP_ENABLE;
  1533. postsetup_state = _HWMOD_STATE_ENABLED;
  1534. }
  1535. if (postsetup_state == _HWMOD_STATE_IDLE)
  1536. _idle(oh);
  1537. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  1538. _shutdown(oh);
  1539. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  1540. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  1541. oh->name, postsetup_state);
  1542. return 0;
  1543. }
  1544. /**
  1545. * _register - register a struct omap_hwmod
  1546. * @oh: struct omap_hwmod *
  1547. *
  1548. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  1549. * already has been registered by the same name; -EINVAL if the
  1550. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  1551. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  1552. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  1553. * success.
  1554. *
  1555. * XXX The data should be copied into bootmem, so the original data
  1556. * should be marked __initdata and freed after init. This would allow
  1557. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  1558. * that the copy process would be relatively complex due to the large number
  1559. * of substructures.
  1560. */
  1561. static int __init _register(struct omap_hwmod *oh)
  1562. {
  1563. int ms_id;
  1564. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  1565. (oh->_state != _HWMOD_STATE_UNKNOWN))
  1566. return -EINVAL;
  1567. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  1568. if (_lookup(oh->name))
  1569. return -EEXIST;
  1570. ms_id = _find_mpu_port_index(oh);
  1571. if (!IS_ERR_VALUE(ms_id))
  1572. oh->_mpu_port_index = ms_id;
  1573. else
  1574. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  1575. list_add_tail(&oh->node, &omap_hwmod_list);
  1576. spin_lock_init(&oh->_lock);
  1577. oh->_state = _HWMOD_STATE_REGISTERED;
  1578. /*
  1579. * XXX Rather than doing a strcmp(), this should test a flag
  1580. * set in the hwmod data, inserted by the autogenerator code.
  1581. */
  1582. if (!strcmp(oh->name, MPU_INITIATOR_NAME))
  1583. mpu_oh = oh;
  1584. return 0;
  1585. }
  1586. /* Public functions */
  1587. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  1588. {
  1589. if (oh->flags & HWMOD_16BIT_REG)
  1590. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  1591. else
  1592. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  1593. }
  1594. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  1595. {
  1596. if (oh->flags & HWMOD_16BIT_REG)
  1597. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  1598. else
  1599. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  1600. }
  1601. /**
  1602. * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
  1603. * @oh: struct omap_hwmod *
  1604. *
  1605. * This is a public function exposed to drivers. Some drivers may need to do
  1606. * some settings before and after resetting the device. Those drivers after
  1607. * doing the necessary settings could use this function to start a reset by
  1608. * setting the SYSCONFIG.SOFTRESET bit.
  1609. */
  1610. int omap_hwmod_softreset(struct omap_hwmod *oh)
  1611. {
  1612. u32 v;
  1613. int ret;
  1614. if (!oh || !(oh->_sysc_cache))
  1615. return -EINVAL;
  1616. v = oh->_sysc_cache;
  1617. ret = _set_softreset(oh, &v);
  1618. if (ret)
  1619. goto error;
  1620. _write_sysconfig(v, oh);
  1621. error:
  1622. return ret;
  1623. }
  1624. /**
  1625. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  1626. * @oh: struct omap_hwmod *
  1627. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  1628. *
  1629. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  1630. * local copy. Intended to be used by drivers that have some erratum
  1631. * that requires direct manipulation of the SIDLEMODE bits. Returns
  1632. * -EINVAL if @oh is null, or passes along the return value from
  1633. * _set_slave_idlemode().
  1634. *
  1635. * XXX Does this function have any current users? If not, we should
  1636. * remove it; it is better to let the rest of the hwmod code handle this.
  1637. * Any users of this function should be scrutinized carefully.
  1638. */
  1639. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  1640. {
  1641. u32 v;
  1642. int retval = 0;
  1643. if (!oh)
  1644. return -EINVAL;
  1645. v = oh->_sysc_cache;
  1646. retval = _set_slave_idlemode(oh, idlemode, &v);
  1647. if (!retval)
  1648. _write_sysconfig(v, oh);
  1649. return retval;
  1650. }
  1651. /**
  1652. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  1653. * @name: name of the omap_hwmod to look up
  1654. *
  1655. * Given a @name of an omap_hwmod, return a pointer to the registered
  1656. * struct omap_hwmod *, or NULL upon error.
  1657. */
  1658. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  1659. {
  1660. struct omap_hwmod *oh;
  1661. if (!name)
  1662. return NULL;
  1663. oh = _lookup(name);
  1664. return oh;
  1665. }
  1666. /**
  1667. * omap_hwmod_for_each - call function for each registered omap_hwmod
  1668. * @fn: pointer to a callback function
  1669. * @data: void * data to pass to callback function
  1670. *
  1671. * Call @fn for each registered omap_hwmod, passing @data to each
  1672. * function. @fn must return 0 for success or any other value for
  1673. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  1674. * will stop and the non-zero return value will be passed to the
  1675. * caller of omap_hwmod_for_each(). @fn is called with
  1676. * omap_hwmod_for_each() held.
  1677. */
  1678. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  1679. void *data)
  1680. {
  1681. struct omap_hwmod *temp_oh;
  1682. int ret = 0;
  1683. if (!fn)
  1684. return -EINVAL;
  1685. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1686. ret = (*fn)(temp_oh, data);
  1687. if (ret)
  1688. break;
  1689. }
  1690. return ret;
  1691. }
  1692. /**
  1693. * omap_hwmod_register - register an array of hwmods
  1694. * @ohs: pointer to an array of omap_hwmods to register
  1695. *
  1696. * Intended to be called early in boot before the clock framework is
  1697. * initialized. If @ohs is not null, will register all omap_hwmods
  1698. * listed in @ohs that are valid for this chip. Returns 0.
  1699. */
  1700. int __init omap_hwmod_register(struct omap_hwmod **ohs)
  1701. {
  1702. int r, i;
  1703. if (!ohs)
  1704. return 0;
  1705. i = 0;
  1706. do {
  1707. r = _register(ohs[i]);
  1708. WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
  1709. r);
  1710. } while (ohs[++i]);
  1711. return 0;
  1712. }
  1713. /*
  1714. * _populate_mpu_rt_base - populate the virtual address for a hwmod
  1715. *
  1716. * Must be called only from omap_hwmod_setup_*() so ioremap works properly.
  1717. * Assumes the caller takes care of locking if needed.
  1718. */
  1719. static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
  1720. {
  1721. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1722. return 0;
  1723. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1724. return 0;
  1725. oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
  1726. return 0;
  1727. }
  1728. /**
  1729. * omap_hwmod_setup_one - set up a single hwmod
  1730. * @oh_name: const char * name of the already-registered hwmod to set up
  1731. *
  1732. * Must be called after omap2_clk_init(). Resolves the struct clk
  1733. * names to struct clk pointers for each registered omap_hwmod. Also
  1734. * calls _setup() on each hwmod. Returns -EINVAL upon error or 0 upon
  1735. * success.
  1736. */
  1737. int __init omap_hwmod_setup_one(const char *oh_name)
  1738. {
  1739. struct omap_hwmod *oh;
  1740. int r;
  1741. pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
  1742. if (!mpu_oh) {
  1743. pr_err("omap_hwmod: %s: cannot setup_one: MPU initiator hwmod %s not yet registered\n",
  1744. oh_name, MPU_INITIATOR_NAME);
  1745. return -EINVAL;
  1746. }
  1747. oh = _lookup(oh_name);
  1748. if (!oh) {
  1749. WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
  1750. return -EINVAL;
  1751. }
  1752. if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
  1753. omap_hwmod_setup_one(MPU_INITIATOR_NAME);
  1754. r = _populate_mpu_rt_base(oh, NULL);
  1755. if (IS_ERR_VALUE(r)) {
  1756. WARN(1, "omap_hwmod: %s: couldn't set mpu_rt_base\n", oh_name);
  1757. return -EINVAL;
  1758. }
  1759. r = _init_clocks(oh, NULL);
  1760. if (IS_ERR_VALUE(r)) {
  1761. WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh_name);
  1762. return -EINVAL;
  1763. }
  1764. _setup(oh, NULL);
  1765. return 0;
  1766. }
  1767. /**
  1768. * omap_hwmod_setup - do some post-clock framework initialization
  1769. *
  1770. * Must be called after omap2_clk_init(). Resolves the struct clk names
  1771. * to struct clk pointers for each registered omap_hwmod. Also calls
  1772. * _setup() on each hwmod. Returns 0 upon success.
  1773. */
  1774. static int __init omap_hwmod_setup_all(void)
  1775. {
  1776. int r;
  1777. if (!mpu_oh) {
  1778. pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
  1779. __func__, MPU_INITIATOR_NAME);
  1780. return -EINVAL;
  1781. }
  1782. r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL);
  1783. r = omap_hwmod_for_each(_init_clocks, NULL);
  1784. WARN(IS_ERR_VALUE(r),
  1785. "omap_hwmod: %s: _init_clocks failed\n", __func__);
  1786. omap_hwmod_for_each(_setup, NULL);
  1787. return 0;
  1788. }
  1789. core_initcall(omap_hwmod_setup_all);
  1790. /**
  1791. * omap_hwmod_enable - enable an omap_hwmod
  1792. * @oh: struct omap_hwmod *
  1793. *
  1794. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  1795. * Returns -EINVAL on error or passes along the return value from _enable().
  1796. */
  1797. int omap_hwmod_enable(struct omap_hwmod *oh)
  1798. {
  1799. int r;
  1800. unsigned long flags;
  1801. if (!oh)
  1802. return -EINVAL;
  1803. spin_lock_irqsave(&oh->_lock, flags);
  1804. r = _enable(oh);
  1805. spin_unlock_irqrestore(&oh->_lock, flags);
  1806. return r;
  1807. }
  1808. /**
  1809. * omap_hwmod_idle - idle an omap_hwmod
  1810. * @oh: struct omap_hwmod *
  1811. *
  1812. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  1813. * Returns -EINVAL on error or passes along the return value from _idle().
  1814. */
  1815. int omap_hwmod_idle(struct omap_hwmod *oh)
  1816. {
  1817. unsigned long flags;
  1818. if (!oh)
  1819. return -EINVAL;
  1820. spin_lock_irqsave(&oh->_lock, flags);
  1821. _idle(oh);
  1822. spin_unlock_irqrestore(&oh->_lock, flags);
  1823. return 0;
  1824. }
  1825. /**
  1826. * omap_hwmod_shutdown - shutdown an omap_hwmod
  1827. * @oh: struct omap_hwmod *
  1828. *
  1829. * Shutdown an omap_hwmod @oh. Intended to be called by
  1830. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  1831. * the return value from _shutdown().
  1832. */
  1833. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  1834. {
  1835. unsigned long flags;
  1836. if (!oh)
  1837. return -EINVAL;
  1838. spin_lock_irqsave(&oh->_lock, flags);
  1839. _shutdown(oh);
  1840. spin_unlock_irqrestore(&oh->_lock, flags);
  1841. return 0;
  1842. }
  1843. /**
  1844. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  1845. * @oh: struct omap_hwmod *oh
  1846. *
  1847. * Intended to be called by the omap_device code.
  1848. */
  1849. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  1850. {
  1851. unsigned long flags;
  1852. spin_lock_irqsave(&oh->_lock, flags);
  1853. _enable_clocks(oh);
  1854. spin_unlock_irqrestore(&oh->_lock, flags);
  1855. return 0;
  1856. }
  1857. /**
  1858. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  1859. * @oh: struct omap_hwmod *oh
  1860. *
  1861. * Intended to be called by the omap_device code.
  1862. */
  1863. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  1864. {
  1865. unsigned long flags;
  1866. spin_lock_irqsave(&oh->_lock, flags);
  1867. _disable_clocks(oh);
  1868. spin_unlock_irqrestore(&oh->_lock, flags);
  1869. return 0;
  1870. }
  1871. /**
  1872. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  1873. * @oh: struct omap_hwmod *oh
  1874. *
  1875. * Intended to be called by drivers and core code when all posted
  1876. * writes to a device must complete before continuing further
  1877. * execution (for example, after clearing some device IRQSTATUS
  1878. * register bits)
  1879. *
  1880. * XXX what about targets with multiple OCP threads?
  1881. */
  1882. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  1883. {
  1884. BUG_ON(!oh);
  1885. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  1886. WARN(1, "omap_device: %s: OCP barrier impossible due to "
  1887. "device configuration\n", oh->name);
  1888. return;
  1889. }
  1890. /*
  1891. * Forces posted writes to complete on the OCP thread handling
  1892. * register writes
  1893. */
  1894. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  1895. }
  1896. /**
  1897. * omap_hwmod_reset - reset the hwmod
  1898. * @oh: struct omap_hwmod *
  1899. *
  1900. * Under some conditions, a driver may wish to reset the entire device.
  1901. * Called from omap_device code. Returns -EINVAL on error or passes along
  1902. * the return value from _reset().
  1903. */
  1904. int omap_hwmod_reset(struct omap_hwmod *oh)
  1905. {
  1906. int r;
  1907. unsigned long flags;
  1908. if (!oh)
  1909. return -EINVAL;
  1910. spin_lock_irqsave(&oh->_lock, flags);
  1911. r = _reset(oh);
  1912. spin_unlock_irqrestore(&oh->_lock, flags);
  1913. return r;
  1914. }
  1915. /**
  1916. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  1917. * @oh: struct omap_hwmod *
  1918. * @res: pointer to the first element of an array of struct resource to fill
  1919. *
  1920. * Count the number of struct resource array elements necessary to
  1921. * contain omap_hwmod @oh resources. Intended to be called by code
  1922. * that registers omap_devices. Intended to be used to determine the
  1923. * size of a dynamically-allocated struct resource array, before
  1924. * calling omap_hwmod_fill_resources(). Returns the number of struct
  1925. * resource array elements needed.
  1926. *
  1927. * XXX This code is not optimized. It could attempt to merge adjacent
  1928. * resource IDs.
  1929. *
  1930. */
  1931. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  1932. {
  1933. int ret, i;
  1934. ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
  1935. for (i = 0; i < oh->slaves_cnt; i++)
  1936. ret += _count_ocp_if_addr_spaces(oh->slaves[i]);
  1937. return ret;
  1938. }
  1939. /**
  1940. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  1941. * @oh: struct omap_hwmod *
  1942. * @res: pointer to the first element of an array of struct resource to fill
  1943. *
  1944. * Fill the struct resource array @res with resource data from the
  1945. * omap_hwmod @oh. Intended to be called by code that registers
  1946. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  1947. * number of array elements filled.
  1948. */
  1949. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  1950. {
  1951. int i, j, mpu_irqs_cnt, sdma_reqs_cnt;
  1952. int r = 0;
  1953. /* For each IRQ, DMA, memory area, fill in array.*/
  1954. mpu_irqs_cnt = _count_mpu_irqs(oh);
  1955. for (i = 0; i < mpu_irqs_cnt; i++) {
  1956. (res + r)->name = (oh->mpu_irqs + i)->name;
  1957. (res + r)->start = (oh->mpu_irqs + i)->irq;
  1958. (res + r)->end = (oh->mpu_irqs + i)->irq;
  1959. (res + r)->flags = IORESOURCE_IRQ;
  1960. r++;
  1961. }
  1962. sdma_reqs_cnt = _count_sdma_reqs(oh);
  1963. for (i = 0; i < sdma_reqs_cnt; i++) {
  1964. (res + r)->name = (oh->sdma_reqs + i)->name;
  1965. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  1966. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  1967. (res + r)->flags = IORESOURCE_DMA;
  1968. r++;
  1969. }
  1970. for (i = 0; i < oh->slaves_cnt; i++) {
  1971. struct omap_hwmod_ocp_if *os;
  1972. int addr_cnt;
  1973. os = oh->slaves[i];
  1974. addr_cnt = _count_ocp_if_addr_spaces(os);
  1975. for (j = 0; j < addr_cnt; j++) {
  1976. (res + r)->name = (os->addr + j)->name;
  1977. (res + r)->start = (os->addr + j)->pa_start;
  1978. (res + r)->end = (os->addr + j)->pa_end;
  1979. (res + r)->flags = IORESOURCE_MEM;
  1980. r++;
  1981. }
  1982. }
  1983. return r;
  1984. }
  1985. /**
  1986. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  1987. * @oh: struct omap_hwmod *
  1988. *
  1989. * Return the powerdomain pointer associated with the OMAP module
  1990. * @oh's main clock. If @oh does not have a main clk, return the
  1991. * powerdomain associated with the interface clock associated with the
  1992. * module's MPU port. (XXX Perhaps this should use the SDMA port
  1993. * instead?) Returns NULL on error, or a struct powerdomain * on
  1994. * success.
  1995. */
  1996. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  1997. {
  1998. struct clk *c;
  1999. if (!oh)
  2000. return NULL;
  2001. if (oh->_clk) {
  2002. c = oh->_clk;
  2003. } else {
  2004. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  2005. return NULL;
  2006. c = oh->slaves[oh->_mpu_port_index]->_clk;
  2007. }
  2008. if (!c->clkdm)
  2009. return NULL;
  2010. return c->clkdm->pwrdm.ptr;
  2011. }
  2012. /**
  2013. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  2014. * @oh: struct omap_hwmod *
  2015. *
  2016. * Returns the virtual address corresponding to the beginning of the
  2017. * module's register target, in the address range that is intended to
  2018. * be used by the MPU. Returns the virtual address upon success or NULL
  2019. * upon error.
  2020. */
  2021. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  2022. {
  2023. if (!oh)
  2024. return NULL;
  2025. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  2026. return NULL;
  2027. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  2028. return NULL;
  2029. return oh->_mpu_rt_va;
  2030. }
  2031. /**
  2032. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  2033. * @oh: struct omap_hwmod *
  2034. * @init_oh: struct omap_hwmod * (initiator)
  2035. *
  2036. * Add a sleep dependency between the initiator @init_oh and @oh.
  2037. * Intended to be called by DSP/Bridge code via platform_data for the
  2038. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  2039. * code needs to add/del initiator dependencies dynamically
  2040. * before/after accessing a device. Returns the return value from
  2041. * _add_initiator_dep().
  2042. *
  2043. * XXX Keep a usecount in the clockdomain code
  2044. */
  2045. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  2046. struct omap_hwmod *init_oh)
  2047. {
  2048. return _add_initiator_dep(oh, init_oh);
  2049. }
  2050. /*
  2051. * XXX what about functions for drivers to save/restore ocp_sysconfig
  2052. * for context save/restore operations?
  2053. */
  2054. /**
  2055. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  2056. * @oh: struct omap_hwmod *
  2057. * @init_oh: struct omap_hwmod * (initiator)
  2058. *
  2059. * Remove a sleep dependency between the initiator @init_oh and @oh.
  2060. * Intended to be called by DSP/Bridge code via platform_data for the
  2061. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  2062. * code needs to add/del initiator dependencies dynamically
  2063. * before/after accessing a device. Returns the return value from
  2064. * _del_initiator_dep().
  2065. *
  2066. * XXX Keep a usecount in the clockdomain code
  2067. */
  2068. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  2069. struct omap_hwmod *init_oh)
  2070. {
  2071. return _del_initiator_dep(oh, init_oh);
  2072. }
  2073. /**
  2074. * omap_hwmod_enable_wakeup - allow device to wake up the system
  2075. * @oh: struct omap_hwmod *
  2076. *
  2077. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  2078. * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
  2079. * registers to cause the PRCM to receive wakeup events from the
  2080. * module. Does not set any wakeup routing registers beyond this
  2081. * point - if the module is to wake up any other module or subsystem,
  2082. * that must be set separately. Called by omap_device code. Returns
  2083. * -EINVAL on error or 0 upon success.
  2084. */
  2085. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  2086. {
  2087. unsigned long flags;
  2088. u32 v;
  2089. if (!oh->class->sysc ||
  2090. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  2091. return -EINVAL;
  2092. spin_lock_irqsave(&oh->_lock, flags);
  2093. v = oh->_sysc_cache;
  2094. _enable_wakeup(oh, &v);
  2095. _write_sysconfig(v, oh);
  2096. _set_idle_ioring_wakeup(oh, true);
  2097. spin_unlock_irqrestore(&oh->_lock, flags);
  2098. return 0;
  2099. }
  2100. /**
  2101. * omap_hwmod_disable_wakeup - prevent device from waking the system
  2102. * @oh: struct omap_hwmod *
  2103. *
  2104. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  2105. * from sending wakeups to the PRCM. Eventually this should clear
  2106. * PRCM wakeup registers to cause the PRCM to ignore wakeup events
  2107. * from the module. Does not set any wakeup routing registers beyond
  2108. * this point - if the module is to wake up any other module or
  2109. * subsystem, that must be set separately. Called by omap_device
  2110. * code. Returns -EINVAL on error or 0 upon success.
  2111. */
  2112. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  2113. {
  2114. unsigned long flags;
  2115. u32 v;
  2116. if (!oh->class->sysc ||
  2117. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  2118. return -EINVAL;
  2119. spin_lock_irqsave(&oh->_lock, flags);
  2120. v = oh->_sysc_cache;
  2121. _disable_wakeup(oh, &v);
  2122. _write_sysconfig(v, oh);
  2123. _set_idle_ioring_wakeup(oh, false);
  2124. spin_unlock_irqrestore(&oh->_lock, flags);
  2125. return 0;
  2126. }
  2127. /**
  2128. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  2129. * contained in the hwmod module.
  2130. * @oh: struct omap_hwmod *
  2131. * @name: name of the reset line to lookup and assert
  2132. *
  2133. * Some IP like dsp, ipu or iva contain processor that require
  2134. * an HW reset line to be assert / deassert in order to enable fully
  2135. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  2136. * yet supported on this OMAP; otherwise, passes along the return value
  2137. * from _assert_hardreset().
  2138. */
  2139. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  2140. {
  2141. int ret;
  2142. unsigned long flags;
  2143. if (!oh)
  2144. return -EINVAL;
  2145. spin_lock_irqsave(&oh->_lock, flags);
  2146. ret = _assert_hardreset(oh, name);
  2147. spin_unlock_irqrestore(&oh->_lock, flags);
  2148. return ret;
  2149. }
  2150. /**
  2151. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  2152. * contained in the hwmod module.
  2153. * @oh: struct omap_hwmod *
  2154. * @name: name of the reset line to look up and deassert
  2155. *
  2156. * Some IP like dsp, ipu or iva contain processor that require
  2157. * an HW reset line to be assert / deassert in order to enable fully
  2158. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  2159. * yet supported on this OMAP; otherwise, passes along the return value
  2160. * from _deassert_hardreset().
  2161. */
  2162. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  2163. {
  2164. int ret;
  2165. unsigned long flags;
  2166. if (!oh)
  2167. return -EINVAL;
  2168. spin_lock_irqsave(&oh->_lock, flags);
  2169. ret = _deassert_hardreset(oh, name);
  2170. spin_unlock_irqrestore(&oh->_lock, flags);
  2171. return ret;
  2172. }
  2173. /**
  2174. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  2175. * contained in the hwmod module
  2176. * @oh: struct omap_hwmod *
  2177. * @name: name of the reset line to look up and read
  2178. *
  2179. * Return the current state of the hwmod @oh's reset line named @name:
  2180. * returns -EINVAL upon parameter error or if this operation
  2181. * is unsupported on the current OMAP; otherwise, passes along the return
  2182. * value from _read_hardreset().
  2183. */
  2184. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  2185. {
  2186. int ret;
  2187. unsigned long flags;
  2188. if (!oh)
  2189. return -EINVAL;
  2190. spin_lock_irqsave(&oh->_lock, flags);
  2191. ret = _read_hardreset(oh, name);
  2192. spin_unlock_irqrestore(&oh->_lock, flags);
  2193. return ret;
  2194. }
  2195. /**
  2196. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  2197. * @classname: struct omap_hwmod_class name to search for
  2198. * @fn: callback function pointer to call for each hwmod in class @classname
  2199. * @user: arbitrary context data to pass to the callback function
  2200. *
  2201. * For each omap_hwmod of class @classname, call @fn.
  2202. * If the callback function returns something other than
  2203. * zero, the iterator is terminated, and the callback function's return
  2204. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  2205. * if @classname or @fn are NULL, or passes back the error code from @fn.
  2206. */
  2207. int omap_hwmod_for_each_by_class(const char *classname,
  2208. int (*fn)(struct omap_hwmod *oh,
  2209. void *user),
  2210. void *user)
  2211. {
  2212. struct omap_hwmod *temp_oh;
  2213. int ret = 0;
  2214. if (!classname || !fn)
  2215. return -EINVAL;
  2216. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  2217. __func__, classname);
  2218. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  2219. if (!strcmp(temp_oh->class->name, classname)) {
  2220. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  2221. __func__, temp_oh->name);
  2222. ret = (*fn)(temp_oh, user);
  2223. if (ret)
  2224. break;
  2225. }
  2226. }
  2227. if (ret)
  2228. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  2229. __func__, ret);
  2230. return ret;
  2231. }
  2232. /**
  2233. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  2234. * @oh: struct omap_hwmod *
  2235. * @state: state that _setup() should leave the hwmod in
  2236. *
  2237. * Sets the hwmod state that @oh will enter at the end of _setup()
  2238. * (called by omap_hwmod_setup_*()). Only valid to call between
  2239. * calling omap_hwmod_register() and omap_hwmod_setup_*(). Returns
  2240. * 0 upon success or -EINVAL if there is a problem with the arguments
  2241. * or if the hwmod is in the wrong state.
  2242. */
  2243. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  2244. {
  2245. int ret;
  2246. unsigned long flags;
  2247. if (!oh)
  2248. return -EINVAL;
  2249. if (state != _HWMOD_STATE_DISABLED &&
  2250. state != _HWMOD_STATE_ENABLED &&
  2251. state != _HWMOD_STATE_IDLE)
  2252. return -EINVAL;
  2253. spin_lock_irqsave(&oh->_lock, flags);
  2254. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  2255. ret = -EINVAL;
  2256. goto ohsps_unlock;
  2257. }
  2258. oh->_postsetup_state = state;
  2259. ret = 0;
  2260. ohsps_unlock:
  2261. spin_unlock_irqrestore(&oh->_lock, flags);
  2262. return ret;
  2263. }
  2264. /**
  2265. * omap_hwmod_get_context_loss_count - get lost context count
  2266. * @oh: struct omap_hwmod *
  2267. *
  2268. * Query the powerdomain of of @oh to get the context loss
  2269. * count for this device.
  2270. *
  2271. * Returns the context loss count of the powerdomain assocated with @oh
  2272. * upon success, or zero if no powerdomain exists for @oh.
  2273. */
  2274. int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  2275. {
  2276. struct powerdomain *pwrdm;
  2277. int ret = 0;
  2278. pwrdm = omap_hwmod_get_pwrdm(oh);
  2279. if (pwrdm)
  2280. ret = pwrdm_get_context_loss_count(pwrdm);
  2281. return ret;
  2282. }
  2283. /**
  2284. * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
  2285. * @oh: struct omap_hwmod *
  2286. *
  2287. * Prevent the hwmod @oh from being reset during the setup process.
  2288. * Intended for use by board-*.c files on boards with devices that
  2289. * cannot tolerate being reset. Must be called before the hwmod has
  2290. * been set up. Returns 0 upon success or negative error code upon
  2291. * failure.
  2292. */
  2293. int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
  2294. {
  2295. if (!oh)
  2296. return -EINVAL;
  2297. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  2298. pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
  2299. oh->name);
  2300. return -EINVAL;
  2301. }
  2302. oh->flags |= HWMOD_INIT_NO_RESET;
  2303. return 0;
  2304. }
  2305. /**
  2306. * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
  2307. * @oh: struct omap_hwmod * containing hwmod mux entries
  2308. * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
  2309. * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
  2310. *
  2311. * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
  2312. * entry number @pad_idx for the hwmod @oh, trigger the interrupt
  2313. * service routine for the hwmod's mpu_irqs array index @irq_idx. If
  2314. * this function is not called for a given pad_idx, then the ISR
  2315. * associated with @oh's first MPU IRQ will be triggered when an I/O
  2316. * pad wakeup occurs on that pad. Note that @pad_idx is the index of
  2317. * the _dynamic or wakeup_ entry: if there are other entries not
  2318. * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
  2319. * entries are NOT COUNTED in the dynamic pad index. This function
  2320. * must be called separately for each pad that requires its interrupt
  2321. * to be re-routed this way. Returns -EINVAL if there is an argument
  2322. * problem or if @oh does not have hwmod mux entries or MPU IRQs;
  2323. * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
  2324. *
  2325. * XXX This function interface is fragile. Rather than using array
  2326. * indexes, which are subject to unpredictable change, it should be
  2327. * using hwmod IRQ names, and some other stable key for the hwmod mux
  2328. * pad records.
  2329. */
  2330. int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
  2331. {
  2332. int nr_irqs;
  2333. might_sleep();
  2334. if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
  2335. pad_idx >= oh->mux->nr_pads_dynamic)
  2336. return -EINVAL;
  2337. /* Check the number of available mpu_irqs */
  2338. for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
  2339. ;
  2340. if (irq_idx >= nr_irqs)
  2341. return -EINVAL;
  2342. if (!oh->mux->irqs) {
  2343. /* XXX What frees this? */
  2344. oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
  2345. GFP_KERNEL);
  2346. if (!oh->mux->irqs)
  2347. return -ENOMEM;
  2348. }
  2349. oh->mux->irqs[pad_idx] = irq_idx;
  2350. return 0;
  2351. }