cm_bf561.c 9.4 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf533/boards/cm_bf561.c
  3. * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au> Copyright 2005
  5. *
  6. * Created: 2006
  7. * Description: Board description file
  8. *
  9. * Modified:
  10. * Copyright 2004-2006 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. #include <linux/device.h>
  30. #include <linux/platform_device.h>
  31. #include <linux/mtd/mtd.h>
  32. #include <linux/mtd/partitions.h>
  33. #include <linux/spi/spi.h>
  34. #include <linux/spi/flash.h>
  35. #include <linux/usb/isp1362.h>
  36. #include <linux/ata_platform.h>
  37. #include <linux/irq.h>
  38. #include <asm/dma.h>
  39. #include <asm/bfin5xx_spi.h>
  40. #include <asm/portmux.h>
  41. /*
  42. * Name the Board for the /proc/cpuinfo
  43. */
  44. const char bfin_board_name[] = "Bluetechnix CM BF561";
  45. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  46. /* all SPI peripherals info goes here */
  47. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  48. static struct mtd_partition bfin_spi_flash_partitions[] = {
  49. {
  50. .name = "bootloader",
  51. .size = 0x00020000,
  52. .offset = 0,
  53. .mask_flags = MTD_CAP_ROM
  54. }, {
  55. .name = "kernel",
  56. .size = 0xe0000,
  57. .offset = 0x20000
  58. }, {
  59. .name = "file system",
  60. .size = 0x700000,
  61. .offset = 0x00100000,
  62. }
  63. };
  64. static struct flash_platform_data bfin_spi_flash_data = {
  65. .name = "m25p80",
  66. .parts = bfin_spi_flash_partitions,
  67. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  68. .type = "m25p64",
  69. };
  70. /* SPI flash chip (m25p64) */
  71. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  72. .enable_dma = 0, /* use dma transfer with this chip*/
  73. .bits_per_word = 8,
  74. };
  75. #endif
  76. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  77. /* SPI ADC chip */
  78. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  79. .enable_dma = 1, /* use dma transfer with this chip*/
  80. .bits_per_word = 16,
  81. };
  82. #endif
  83. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  84. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  85. .enable_dma = 0,
  86. .bits_per_word = 16,
  87. };
  88. #endif
  89. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  90. static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
  91. .enable_dma = 0,
  92. .bits_per_word = 16,
  93. };
  94. #endif
  95. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  96. static struct bfin5xx_spi_chip spi_mmc_chip_info = {
  97. .enable_dma = 1,
  98. .bits_per_word = 8,
  99. };
  100. #endif
  101. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  102. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  103. {
  104. /* the modalias must be the same as spi device driver name */
  105. .modalias = "m25p80", /* Name of spi_driver for this device */
  106. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  107. .bus_num = 0, /* Framework bus number */
  108. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  109. .platform_data = &bfin_spi_flash_data,
  110. .controller_data = &spi_flash_chip_info,
  111. .mode = SPI_MODE_3,
  112. },
  113. #endif
  114. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  115. {
  116. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  117. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  118. .bus_num = 0, /* Framework bus number */
  119. .chip_select = 1, /* Framework chip select. */
  120. .platform_data = NULL, /* No spi_driver specific config */
  121. .controller_data = &spi_adc_chip_info,
  122. },
  123. #endif
  124. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  125. {
  126. .modalias = "ad1836-spi",
  127. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  128. .bus_num = 0,
  129. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  130. .controller_data = &ad1836_spi_chip_info,
  131. },
  132. #endif
  133. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  134. {
  135. .modalias = "ad9960-spi",
  136. .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
  137. .bus_num = 0,
  138. .chip_select = 1,
  139. .controller_data = &ad9960_spi_chip_info,
  140. },
  141. #endif
  142. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  143. {
  144. .modalias = "spi_mmc",
  145. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  146. .bus_num = 0,
  147. .chip_select = CONFIG_SPI_MMC_CS_CHAN,
  148. .platform_data = NULL,
  149. .controller_data = &spi_mmc_chip_info,
  150. .mode = SPI_MODE_3,
  151. },
  152. #endif
  153. };
  154. /* SPI (0) */
  155. static struct resource bfin_spi0_resource[] = {
  156. [0] = {
  157. .start = SPI0_REGBASE,
  158. .end = SPI0_REGBASE + 0xFF,
  159. .flags = IORESOURCE_MEM,
  160. },
  161. [1] = {
  162. .start = CH_SPI,
  163. .end = CH_SPI,
  164. .flags = IORESOURCE_IRQ,
  165. }
  166. };
  167. /* SPI controller data */
  168. static struct bfin5xx_spi_master bfin_spi0_info = {
  169. .num_chipselect = 8,
  170. .enable_dma = 1, /* master has the ability to do dma transfer */
  171. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  172. };
  173. static struct platform_device bfin_spi0_device = {
  174. .name = "bfin-spi",
  175. .id = 0, /* Bus number */
  176. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  177. .resource = bfin_spi0_resource,
  178. .dev = {
  179. .platform_data = &bfin_spi0_info, /* Passed to driver */
  180. },
  181. };
  182. #endif /* spi master and devices */
  183. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  184. static struct platform_device hitachi_fb_device = {
  185. .name = "hitachi-tx09",
  186. };
  187. #endif
  188. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  189. static struct resource smc91x_resources[] = {
  190. {
  191. .name = "smc91x-regs",
  192. .start = 0x28000300,
  193. .end = 0x28000300 + 16,
  194. .flags = IORESOURCE_MEM,
  195. }, {
  196. .start = IRQ_PF0,
  197. .end = IRQ_PF0,
  198. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  199. },
  200. };
  201. static struct platform_device smc91x_device = {
  202. .name = "smc91x",
  203. .id = 0,
  204. .num_resources = ARRAY_SIZE(smc91x_resources),
  205. .resource = smc91x_resources,
  206. };
  207. #endif
  208. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  209. static struct resource isp1362_hcd_resources[] = {
  210. {
  211. .start = 0x24008000,
  212. .end = 0x24008000,
  213. .flags = IORESOURCE_MEM,
  214. }, {
  215. .start = 0x24008004,
  216. .end = 0x24008004,
  217. .flags = IORESOURCE_MEM,
  218. }, {
  219. .start = IRQ_PF47,
  220. .end = IRQ_PF47,
  221. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  222. },
  223. };
  224. static struct isp1362_platform_data isp1362_priv = {
  225. .sel15Kres = 1,
  226. .clknotstop = 0,
  227. .oc_enable = 0,
  228. .int_act_high = 0,
  229. .int_edge_triggered = 0,
  230. .remote_wakeup_connected = 0,
  231. .no_power_switching = 1,
  232. .power_switching_mode = 0,
  233. };
  234. static struct platform_device isp1362_hcd_device = {
  235. .name = "isp1362-hcd",
  236. .id = 0,
  237. .dev = {
  238. .platform_data = &isp1362_priv,
  239. },
  240. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  241. .resource = isp1362_hcd_resources,
  242. };
  243. #endif
  244. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  245. static struct resource bfin_uart_resources[] = {
  246. {
  247. .start = 0xFFC00400,
  248. .end = 0xFFC004FF,
  249. .flags = IORESOURCE_MEM,
  250. },
  251. };
  252. static struct platform_device bfin_uart_device = {
  253. .name = "bfin-uart",
  254. .id = 1,
  255. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  256. .resource = bfin_uart_resources,
  257. };
  258. #endif
  259. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  260. #define PATA_INT 119
  261. static struct pata_platform_info bfin_pata_platform_data = {
  262. .ioport_shift = 2,
  263. .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  264. };
  265. static struct resource bfin_pata_resources[] = {
  266. {
  267. .start = 0x2400C000,
  268. .end = 0x2400C001F,
  269. .flags = IORESOURCE_MEM,
  270. },
  271. {
  272. .start = 0x2400D018,
  273. .end = 0x2400D01B,
  274. .flags = IORESOURCE_MEM,
  275. },
  276. {
  277. .start = PATA_INT,
  278. .end = PATA_INT,
  279. .flags = IORESOURCE_IRQ,
  280. },
  281. };
  282. static struct platform_device bfin_pata_device = {
  283. .name = "pata_platform",
  284. .id = -1,
  285. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  286. .resource = bfin_pata_resources,
  287. .dev = {
  288. .platform_data = &bfin_pata_platform_data,
  289. }
  290. };
  291. #endif
  292. static struct platform_device *cm_bf561_devices[] __initdata = {
  293. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  294. &hitachi_fb_device,
  295. #endif
  296. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  297. &bfin_uart_device,
  298. #endif
  299. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  300. &isp1362_hcd_device,
  301. #endif
  302. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  303. &smc91x_device,
  304. #endif
  305. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  306. &bfin_spi0_device,
  307. #endif
  308. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  309. &bfin_pata_device,
  310. #endif
  311. };
  312. static int __init cm_bf561_init(void)
  313. {
  314. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  315. platform_add_devices(cm_bf561_devices, ARRAY_SIZE(cm_bf561_devices));
  316. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  317. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  318. #endif
  319. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  320. irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
  321. #endif
  322. return 0;
  323. }
  324. arch_initcall(cm_bf561_init);