mthca_mr.c 24 KB

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  1. /*
  2. * Copyright (c) 2004 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. *
  33. * $Id: mthca_mr.c 1349 2004-12-16 21:09:43Z roland $
  34. */
  35. #include <linux/slab.h>
  36. #include <linux/errno.h>
  37. #include "mthca_dev.h"
  38. #include "mthca_cmd.h"
  39. #include "mthca_memfree.h"
  40. struct mthca_mtt {
  41. struct mthca_buddy *buddy;
  42. int order;
  43. u32 first_seg;
  44. };
  45. /*
  46. * Must be packed because mtt_seg is 64 bits but only aligned to 32 bits.
  47. */
  48. struct mthca_mpt_entry {
  49. __be32 flags;
  50. __be32 page_size;
  51. __be32 key;
  52. __be32 pd;
  53. __be64 start;
  54. __be64 length;
  55. __be32 lkey;
  56. __be32 window_count;
  57. __be32 window_count_limit;
  58. __be64 mtt_seg;
  59. __be32 mtt_sz; /* Arbel only */
  60. u32 reserved[2];
  61. } __attribute__((packed));
  62. #define MTHCA_MPT_FLAG_SW_OWNS (0xfUL << 28)
  63. #define MTHCA_MPT_FLAG_MIO (1 << 17)
  64. #define MTHCA_MPT_FLAG_BIND_ENABLE (1 << 15)
  65. #define MTHCA_MPT_FLAG_PHYSICAL (1 << 9)
  66. #define MTHCA_MPT_FLAG_REGION (1 << 8)
  67. #define MTHCA_MTT_FLAG_PRESENT 1
  68. #define MTHCA_MPT_STATUS_SW 0xF0
  69. #define MTHCA_MPT_STATUS_HW 0x00
  70. #define SINAI_FMR_KEY_INC 0x1000000
  71. /*
  72. * Buddy allocator for MTT segments (currently not very efficient
  73. * since it doesn't keep a free list and just searches linearly
  74. * through the bitmaps)
  75. */
  76. static u32 mthca_buddy_alloc(struct mthca_buddy *buddy, int order)
  77. {
  78. int o;
  79. int m;
  80. u32 seg;
  81. spin_lock(&buddy->lock);
  82. for (o = order; o <= buddy->max_order; ++o) {
  83. m = 1 << (buddy->max_order - o);
  84. seg = find_first_bit(buddy->bits[o], m);
  85. if (seg < m)
  86. goto found;
  87. }
  88. spin_unlock(&buddy->lock);
  89. return -1;
  90. found:
  91. clear_bit(seg, buddy->bits[o]);
  92. while (o > order) {
  93. --o;
  94. seg <<= 1;
  95. set_bit(seg ^ 1, buddy->bits[o]);
  96. }
  97. spin_unlock(&buddy->lock);
  98. seg <<= order;
  99. return seg;
  100. }
  101. static void mthca_buddy_free(struct mthca_buddy *buddy, u32 seg, int order)
  102. {
  103. seg >>= order;
  104. spin_lock(&buddy->lock);
  105. while (test_bit(seg ^ 1, buddy->bits[order])) {
  106. clear_bit(seg ^ 1, buddy->bits[order]);
  107. seg >>= 1;
  108. ++order;
  109. }
  110. set_bit(seg, buddy->bits[order]);
  111. spin_unlock(&buddy->lock);
  112. }
  113. static int mthca_buddy_init(struct mthca_buddy *buddy, int max_order)
  114. {
  115. int i, s;
  116. buddy->max_order = max_order;
  117. spin_lock_init(&buddy->lock);
  118. buddy->bits = kzalloc((buddy->max_order + 1) * sizeof (long *),
  119. GFP_KERNEL);
  120. if (!buddy->bits)
  121. goto err_out;
  122. for (i = 0; i <= buddy->max_order; ++i) {
  123. s = BITS_TO_LONGS(1 << (buddy->max_order - i));
  124. buddy->bits[i] = kmalloc(s * sizeof (long), GFP_KERNEL);
  125. if (!buddy->bits[i])
  126. goto err_out_free;
  127. bitmap_zero(buddy->bits[i],
  128. 1 << (buddy->max_order - i));
  129. }
  130. set_bit(0, buddy->bits[buddy->max_order]);
  131. return 0;
  132. err_out_free:
  133. for (i = 0; i <= buddy->max_order; ++i)
  134. kfree(buddy->bits[i]);
  135. kfree(buddy->bits);
  136. err_out:
  137. return -ENOMEM;
  138. }
  139. static void mthca_buddy_cleanup(struct mthca_buddy *buddy)
  140. {
  141. int i;
  142. for (i = 0; i <= buddy->max_order; ++i)
  143. kfree(buddy->bits[i]);
  144. kfree(buddy->bits);
  145. }
  146. static u32 mthca_alloc_mtt_range(struct mthca_dev *dev, int order,
  147. struct mthca_buddy *buddy)
  148. {
  149. u32 seg = mthca_buddy_alloc(buddy, order);
  150. if (seg == -1)
  151. return -1;
  152. if (mthca_is_memfree(dev))
  153. if (mthca_table_get_range(dev, dev->mr_table.mtt_table, seg,
  154. seg + (1 << order) - 1)) {
  155. mthca_buddy_free(buddy, seg, order);
  156. seg = -1;
  157. }
  158. return seg;
  159. }
  160. static struct mthca_mtt *__mthca_alloc_mtt(struct mthca_dev *dev, int size,
  161. struct mthca_buddy *buddy)
  162. {
  163. struct mthca_mtt *mtt;
  164. int i;
  165. if (size <= 0)
  166. return ERR_PTR(-EINVAL);
  167. mtt = kmalloc(sizeof *mtt, GFP_KERNEL);
  168. if (!mtt)
  169. return ERR_PTR(-ENOMEM);
  170. mtt->buddy = buddy;
  171. mtt->order = 0;
  172. for (i = MTHCA_MTT_SEG_SIZE / 8; i < size; i <<= 1)
  173. ++mtt->order;
  174. mtt->first_seg = mthca_alloc_mtt_range(dev, mtt->order, buddy);
  175. if (mtt->first_seg == -1) {
  176. kfree(mtt);
  177. return ERR_PTR(-ENOMEM);
  178. }
  179. return mtt;
  180. }
  181. struct mthca_mtt *mthca_alloc_mtt(struct mthca_dev *dev, int size)
  182. {
  183. return __mthca_alloc_mtt(dev, size, &dev->mr_table.mtt_buddy);
  184. }
  185. void mthca_free_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt)
  186. {
  187. if (!mtt)
  188. return;
  189. mthca_buddy_free(mtt->buddy, mtt->first_seg, mtt->order);
  190. mthca_table_put_range(dev, dev->mr_table.mtt_table,
  191. mtt->first_seg,
  192. mtt->first_seg + (1 << mtt->order) - 1);
  193. kfree(mtt);
  194. }
  195. static int __mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt,
  196. int start_index, u64 *buffer_list, int list_len)
  197. {
  198. struct mthca_mailbox *mailbox;
  199. __be64 *mtt_entry;
  200. int err = 0;
  201. u8 status;
  202. int i;
  203. mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
  204. if (IS_ERR(mailbox))
  205. return PTR_ERR(mailbox);
  206. mtt_entry = mailbox->buf;
  207. while (list_len > 0) {
  208. mtt_entry[0] = cpu_to_be64(dev->mr_table.mtt_base +
  209. mtt->first_seg * MTHCA_MTT_SEG_SIZE +
  210. start_index * 8);
  211. mtt_entry[1] = 0;
  212. for (i = 0; i < list_len && i < MTHCA_MAILBOX_SIZE / 8 - 2; ++i)
  213. mtt_entry[i + 2] = cpu_to_be64(buffer_list[i] |
  214. MTHCA_MTT_FLAG_PRESENT);
  215. /*
  216. * If we have an odd number of entries to write, add
  217. * one more dummy entry for firmware efficiency.
  218. */
  219. if (i & 1)
  220. mtt_entry[i + 2] = 0;
  221. err = mthca_WRITE_MTT(dev, mailbox, (i + 1) & ~1, &status);
  222. if (err) {
  223. mthca_warn(dev, "WRITE_MTT failed (%d)\n", err);
  224. goto out;
  225. }
  226. if (status) {
  227. mthca_warn(dev, "WRITE_MTT returned status 0x%02x\n",
  228. status);
  229. err = -EINVAL;
  230. goto out;
  231. }
  232. list_len -= i;
  233. start_index += i;
  234. buffer_list += i;
  235. }
  236. out:
  237. mthca_free_mailbox(dev, mailbox);
  238. return err;
  239. }
  240. int mthca_write_mtt_size(struct mthca_dev *dev)
  241. {
  242. if (dev->mr_table.fmr_mtt_buddy != &dev->mr_table.mtt_buddy ||
  243. !(dev->mthca_flags & MTHCA_FLAG_FMR))
  244. /*
  245. * Be friendly to WRITE_MTT command
  246. * and leave two empty slots for the
  247. * index and reserved fields of the
  248. * mailbox.
  249. */
  250. return PAGE_SIZE / sizeof (u64) - 2;
  251. /* For Arbel, all MTTs must fit in the same page. */
  252. return mthca_is_memfree(dev) ? (PAGE_SIZE / sizeof (u64)) : 0x7ffffff;
  253. }
  254. static void mthca_tavor_write_mtt_seg(struct mthca_dev *dev,
  255. struct mthca_mtt *mtt, int start_index,
  256. u64 *buffer_list, int list_len)
  257. {
  258. u64 __iomem *mtts;
  259. int i;
  260. mtts = dev->mr_table.tavor_fmr.mtt_base + mtt->first_seg * MTHCA_MTT_SEG_SIZE +
  261. start_index * sizeof (u64);
  262. for (i = 0; i < list_len; ++i)
  263. mthca_write64_raw(cpu_to_be64(buffer_list[i] | MTHCA_MTT_FLAG_PRESENT),
  264. mtts + i);
  265. }
  266. static void mthca_arbel_write_mtt_seg(struct mthca_dev *dev,
  267. struct mthca_mtt *mtt, int start_index,
  268. u64 *buffer_list, int list_len)
  269. {
  270. __be64 *mtts;
  271. dma_addr_t dma_handle;
  272. int i;
  273. int s = start_index * sizeof (u64);
  274. /* For Arbel, all MTTs must fit in the same page. */
  275. BUG_ON(s / PAGE_SIZE != (s + list_len * sizeof(u64) - 1) / PAGE_SIZE);
  276. /* Require full segments */
  277. BUG_ON(s % MTHCA_MTT_SEG_SIZE);
  278. mtts = mthca_table_find(dev->mr_table.mtt_table, mtt->first_seg +
  279. s / MTHCA_MTT_SEG_SIZE, &dma_handle);
  280. BUG_ON(!mtts);
  281. for (i = 0; i < list_len; ++i)
  282. mtts[i] = cpu_to_be64(buffer_list[i] | MTHCA_MTT_FLAG_PRESENT);
  283. dma_sync_single(&dev->pdev->dev, dma_handle, list_len * sizeof (u64), DMA_TO_DEVICE);
  284. }
  285. int mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt,
  286. int start_index, u64 *buffer_list, int list_len)
  287. {
  288. int size = mthca_write_mtt_size(dev);
  289. int chunk;
  290. if (dev->mr_table.fmr_mtt_buddy != &dev->mr_table.mtt_buddy ||
  291. !(dev->mthca_flags & MTHCA_FLAG_FMR))
  292. return __mthca_write_mtt(dev, mtt, start_index, buffer_list, list_len);
  293. while (list_len > 0) {
  294. chunk = min(size, list_len);
  295. if (mthca_is_memfree(dev))
  296. mthca_arbel_write_mtt_seg(dev, mtt, start_index,
  297. buffer_list, chunk);
  298. else
  299. mthca_tavor_write_mtt_seg(dev, mtt, start_index,
  300. buffer_list, chunk);
  301. list_len -= chunk;
  302. start_index += chunk;
  303. buffer_list += chunk;
  304. }
  305. return 0;
  306. }
  307. static inline u32 tavor_hw_index_to_key(u32 ind)
  308. {
  309. return ind;
  310. }
  311. static inline u32 tavor_key_to_hw_index(u32 key)
  312. {
  313. return key;
  314. }
  315. static inline u32 arbel_hw_index_to_key(u32 ind)
  316. {
  317. return (ind >> 24) | (ind << 8);
  318. }
  319. static inline u32 arbel_key_to_hw_index(u32 key)
  320. {
  321. return (key << 24) | (key >> 8);
  322. }
  323. static inline u32 hw_index_to_key(struct mthca_dev *dev, u32 ind)
  324. {
  325. if (mthca_is_memfree(dev))
  326. return arbel_hw_index_to_key(ind);
  327. else
  328. return tavor_hw_index_to_key(ind);
  329. }
  330. static inline u32 key_to_hw_index(struct mthca_dev *dev, u32 key)
  331. {
  332. if (mthca_is_memfree(dev))
  333. return arbel_key_to_hw_index(key);
  334. else
  335. return tavor_key_to_hw_index(key);
  336. }
  337. static inline u32 adjust_key(struct mthca_dev *dev, u32 key)
  338. {
  339. if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
  340. return ((key << 20) & 0x800000) | (key & 0x7fffff);
  341. else
  342. return key;
  343. }
  344. int mthca_mr_alloc(struct mthca_dev *dev, u32 pd, int buffer_size_shift,
  345. u64 iova, u64 total_size, u32 access, struct mthca_mr *mr)
  346. {
  347. struct mthca_mailbox *mailbox;
  348. struct mthca_mpt_entry *mpt_entry;
  349. u32 key;
  350. int i;
  351. int err;
  352. u8 status;
  353. WARN_ON(buffer_size_shift >= 32);
  354. key = mthca_alloc(&dev->mr_table.mpt_alloc);
  355. if (key == -1)
  356. return -ENOMEM;
  357. key = adjust_key(dev, key);
  358. mr->ibmr.rkey = mr->ibmr.lkey = hw_index_to_key(dev, key);
  359. if (mthca_is_memfree(dev)) {
  360. err = mthca_table_get(dev, dev->mr_table.mpt_table, key);
  361. if (err)
  362. goto err_out_mpt_free;
  363. }
  364. mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
  365. if (IS_ERR(mailbox)) {
  366. err = PTR_ERR(mailbox);
  367. goto err_out_table;
  368. }
  369. mpt_entry = mailbox->buf;
  370. mpt_entry->flags = cpu_to_be32(MTHCA_MPT_FLAG_SW_OWNS |
  371. MTHCA_MPT_FLAG_MIO |
  372. MTHCA_MPT_FLAG_REGION |
  373. access);
  374. if (!mr->mtt)
  375. mpt_entry->flags |= cpu_to_be32(MTHCA_MPT_FLAG_PHYSICAL);
  376. mpt_entry->page_size = cpu_to_be32(buffer_size_shift - 12);
  377. mpt_entry->key = cpu_to_be32(key);
  378. mpt_entry->pd = cpu_to_be32(pd);
  379. mpt_entry->start = cpu_to_be64(iova);
  380. mpt_entry->length = cpu_to_be64(total_size);
  381. memset(&mpt_entry->lkey, 0,
  382. sizeof *mpt_entry - offsetof(struct mthca_mpt_entry, lkey));
  383. if (mr->mtt)
  384. mpt_entry->mtt_seg =
  385. cpu_to_be64(dev->mr_table.mtt_base +
  386. mr->mtt->first_seg * MTHCA_MTT_SEG_SIZE);
  387. if (0) {
  388. mthca_dbg(dev, "Dumping MPT entry %08x:\n", mr->ibmr.lkey);
  389. for (i = 0; i < sizeof (struct mthca_mpt_entry) / 4; ++i) {
  390. if (i % 4 == 0)
  391. printk("[%02x] ", i * 4);
  392. printk(" %08x", be32_to_cpu(((__be32 *) mpt_entry)[i]));
  393. if ((i + 1) % 4 == 0)
  394. printk("\n");
  395. }
  396. }
  397. err = mthca_SW2HW_MPT(dev, mailbox,
  398. key & (dev->limits.num_mpts - 1),
  399. &status);
  400. if (err) {
  401. mthca_warn(dev, "SW2HW_MPT failed (%d)\n", err);
  402. goto err_out_mailbox;
  403. } else if (status) {
  404. mthca_warn(dev, "SW2HW_MPT returned status 0x%02x\n",
  405. status);
  406. err = -EINVAL;
  407. goto err_out_mailbox;
  408. }
  409. mthca_free_mailbox(dev, mailbox);
  410. return err;
  411. err_out_mailbox:
  412. mthca_free_mailbox(dev, mailbox);
  413. err_out_table:
  414. mthca_table_put(dev, dev->mr_table.mpt_table, key);
  415. err_out_mpt_free:
  416. mthca_free(&dev->mr_table.mpt_alloc, key);
  417. return err;
  418. }
  419. int mthca_mr_alloc_notrans(struct mthca_dev *dev, u32 pd,
  420. u32 access, struct mthca_mr *mr)
  421. {
  422. mr->mtt = NULL;
  423. return mthca_mr_alloc(dev, pd, 12, 0, ~0ULL, access, mr);
  424. }
  425. int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
  426. u64 *buffer_list, int buffer_size_shift,
  427. int list_len, u64 iova, u64 total_size,
  428. u32 access, struct mthca_mr *mr)
  429. {
  430. int err;
  431. mr->mtt = mthca_alloc_mtt(dev, list_len);
  432. if (IS_ERR(mr->mtt))
  433. return PTR_ERR(mr->mtt);
  434. err = mthca_write_mtt(dev, mr->mtt, 0, buffer_list, list_len);
  435. if (err) {
  436. mthca_free_mtt(dev, mr->mtt);
  437. return err;
  438. }
  439. err = mthca_mr_alloc(dev, pd, buffer_size_shift, iova,
  440. total_size, access, mr);
  441. if (err)
  442. mthca_free_mtt(dev, mr->mtt);
  443. return err;
  444. }
  445. /* Free mr or fmr */
  446. static void mthca_free_region(struct mthca_dev *dev, u32 lkey)
  447. {
  448. mthca_table_put(dev, dev->mr_table.mpt_table,
  449. key_to_hw_index(dev, lkey));
  450. mthca_free(&dev->mr_table.mpt_alloc, key_to_hw_index(dev, lkey));
  451. }
  452. void mthca_free_mr(struct mthca_dev *dev, struct mthca_mr *mr)
  453. {
  454. int err;
  455. u8 status;
  456. err = mthca_HW2SW_MPT(dev, NULL,
  457. key_to_hw_index(dev, mr->ibmr.lkey) &
  458. (dev->limits.num_mpts - 1),
  459. &status);
  460. if (err)
  461. mthca_warn(dev, "HW2SW_MPT failed (%d)\n", err);
  462. else if (status)
  463. mthca_warn(dev, "HW2SW_MPT returned status 0x%02x\n",
  464. status);
  465. mthca_free_region(dev, mr->ibmr.lkey);
  466. mthca_free_mtt(dev, mr->mtt);
  467. }
  468. int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd,
  469. u32 access, struct mthca_fmr *mr)
  470. {
  471. struct mthca_mpt_entry *mpt_entry;
  472. struct mthca_mailbox *mailbox;
  473. u64 mtt_seg;
  474. u32 key, idx;
  475. u8 status;
  476. int list_len = mr->attr.max_pages;
  477. int err = -ENOMEM;
  478. int i;
  479. if (mr->attr.page_shift < 12 || mr->attr.page_shift >= 32)
  480. return -EINVAL;
  481. /* For Arbel, all MTTs must fit in the same page. */
  482. if (mthca_is_memfree(dev) &&
  483. mr->attr.max_pages * sizeof *mr->mem.arbel.mtts > PAGE_SIZE)
  484. return -EINVAL;
  485. mr->maps = 0;
  486. key = mthca_alloc(&dev->mr_table.mpt_alloc);
  487. if (key == -1)
  488. return -ENOMEM;
  489. key = adjust_key(dev, key);
  490. idx = key & (dev->limits.num_mpts - 1);
  491. mr->ibmr.rkey = mr->ibmr.lkey = hw_index_to_key(dev, key);
  492. if (mthca_is_memfree(dev)) {
  493. err = mthca_table_get(dev, dev->mr_table.mpt_table, key);
  494. if (err)
  495. goto err_out_mpt_free;
  496. mr->mem.arbel.mpt = mthca_table_find(dev->mr_table.mpt_table, key, NULL);
  497. BUG_ON(!mr->mem.arbel.mpt);
  498. } else
  499. mr->mem.tavor.mpt = dev->mr_table.tavor_fmr.mpt_base +
  500. sizeof *(mr->mem.tavor.mpt) * idx;
  501. mr->mtt = __mthca_alloc_mtt(dev, list_len, dev->mr_table.fmr_mtt_buddy);
  502. if (IS_ERR(mr->mtt)) {
  503. err = PTR_ERR(mr->mtt);
  504. goto err_out_table;
  505. }
  506. mtt_seg = mr->mtt->first_seg * MTHCA_MTT_SEG_SIZE;
  507. if (mthca_is_memfree(dev)) {
  508. mr->mem.arbel.mtts = mthca_table_find(dev->mr_table.mtt_table,
  509. mr->mtt->first_seg,
  510. &mr->mem.arbel.dma_handle);
  511. BUG_ON(!mr->mem.arbel.mtts);
  512. } else
  513. mr->mem.tavor.mtts = dev->mr_table.tavor_fmr.mtt_base + mtt_seg;
  514. mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
  515. if (IS_ERR(mailbox)) {
  516. err = PTR_ERR(mailbox);
  517. goto err_out_free_mtt;
  518. }
  519. mpt_entry = mailbox->buf;
  520. mpt_entry->flags = cpu_to_be32(MTHCA_MPT_FLAG_SW_OWNS |
  521. MTHCA_MPT_FLAG_MIO |
  522. MTHCA_MPT_FLAG_REGION |
  523. access);
  524. mpt_entry->page_size = cpu_to_be32(mr->attr.page_shift - 12);
  525. mpt_entry->key = cpu_to_be32(key);
  526. mpt_entry->pd = cpu_to_be32(pd);
  527. memset(&mpt_entry->start, 0,
  528. sizeof *mpt_entry - offsetof(struct mthca_mpt_entry, start));
  529. mpt_entry->mtt_seg = cpu_to_be64(dev->mr_table.mtt_base + mtt_seg);
  530. if (0) {
  531. mthca_dbg(dev, "Dumping MPT entry %08x:\n", mr->ibmr.lkey);
  532. for (i = 0; i < sizeof (struct mthca_mpt_entry) / 4; ++i) {
  533. if (i % 4 == 0)
  534. printk("[%02x] ", i * 4);
  535. printk(" %08x", be32_to_cpu(((__be32 *) mpt_entry)[i]));
  536. if ((i + 1) % 4 == 0)
  537. printk("\n");
  538. }
  539. }
  540. err = mthca_SW2HW_MPT(dev, mailbox,
  541. key & (dev->limits.num_mpts - 1),
  542. &status);
  543. if (err) {
  544. mthca_warn(dev, "SW2HW_MPT failed (%d)\n", err);
  545. goto err_out_mailbox_free;
  546. }
  547. if (status) {
  548. mthca_warn(dev, "SW2HW_MPT returned status 0x%02x\n",
  549. status);
  550. err = -EINVAL;
  551. goto err_out_mailbox_free;
  552. }
  553. mthca_free_mailbox(dev, mailbox);
  554. return 0;
  555. err_out_mailbox_free:
  556. mthca_free_mailbox(dev, mailbox);
  557. err_out_free_mtt:
  558. mthca_free_mtt(dev, mr->mtt);
  559. err_out_table:
  560. mthca_table_put(dev, dev->mr_table.mpt_table, key);
  561. err_out_mpt_free:
  562. mthca_free(&dev->mr_table.mpt_alloc, key);
  563. return err;
  564. }
  565. int mthca_free_fmr(struct mthca_dev *dev, struct mthca_fmr *fmr)
  566. {
  567. if (fmr->maps)
  568. return -EBUSY;
  569. mthca_free_region(dev, fmr->ibmr.lkey);
  570. mthca_free_mtt(dev, fmr->mtt);
  571. return 0;
  572. }
  573. static inline int mthca_check_fmr(struct mthca_fmr *fmr, u64 *page_list,
  574. int list_len, u64 iova)
  575. {
  576. int i, page_mask;
  577. if (list_len > fmr->attr.max_pages)
  578. return -EINVAL;
  579. page_mask = (1 << fmr->attr.page_shift) - 1;
  580. /* We are getting page lists, so va must be page aligned. */
  581. if (iova & page_mask)
  582. return -EINVAL;
  583. /* Trust the user not to pass misaligned data in page_list */
  584. if (0)
  585. for (i = 0; i < list_len; ++i) {
  586. if (page_list[i] & ~page_mask)
  587. return -EINVAL;
  588. }
  589. if (fmr->maps >= fmr->attr.max_maps)
  590. return -EINVAL;
  591. return 0;
  592. }
  593. int mthca_tavor_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
  594. int list_len, u64 iova)
  595. {
  596. struct mthca_fmr *fmr = to_mfmr(ibfmr);
  597. struct mthca_dev *dev = to_mdev(ibfmr->device);
  598. struct mthca_mpt_entry mpt_entry;
  599. u32 key;
  600. int i, err;
  601. err = mthca_check_fmr(fmr, page_list, list_len, iova);
  602. if (err)
  603. return err;
  604. ++fmr->maps;
  605. key = tavor_key_to_hw_index(fmr->ibmr.lkey);
  606. key += dev->limits.num_mpts;
  607. fmr->ibmr.lkey = fmr->ibmr.rkey = tavor_hw_index_to_key(key);
  608. writeb(MTHCA_MPT_STATUS_SW, fmr->mem.tavor.mpt);
  609. for (i = 0; i < list_len; ++i) {
  610. __be64 mtt_entry = cpu_to_be64(page_list[i] |
  611. MTHCA_MTT_FLAG_PRESENT);
  612. mthca_write64_raw(mtt_entry, fmr->mem.tavor.mtts + i);
  613. }
  614. mpt_entry.lkey = cpu_to_be32(key);
  615. mpt_entry.length = cpu_to_be64(list_len * (1ull << fmr->attr.page_shift));
  616. mpt_entry.start = cpu_to_be64(iova);
  617. __raw_writel((__force u32) mpt_entry.lkey, &fmr->mem.tavor.mpt->key);
  618. memcpy_toio(&fmr->mem.tavor.mpt->start, &mpt_entry.start,
  619. offsetof(struct mthca_mpt_entry, window_count) -
  620. offsetof(struct mthca_mpt_entry, start));
  621. writeb(MTHCA_MPT_STATUS_HW, fmr->mem.tavor.mpt);
  622. return 0;
  623. }
  624. int mthca_arbel_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
  625. int list_len, u64 iova)
  626. {
  627. struct mthca_fmr *fmr = to_mfmr(ibfmr);
  628. struct mthca_dev *dev = to_mdev(ibfmr->device);
  629. u32 key;
  630. int i, err;
  631. err = mthca_check_fmr(fmr, page_list, list_len, iova);
  632. if (err)
  633. return err;
  634. ++fmr->maps;
  635. key = arbel_key_to_hw_index(fmr->ibmr.lkey);
  636. if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
  637. key += SINAI_FMR_KEY_INC;
  638. else
  639. key += dev->limits.num_mpts;
  640. fmr->ibmr.lkey = fmr->ibmr.rkey = arbel_hw_index_to_key(key);
  641. *(u8 *) fmr->mem.arbel.mpt = MTHCA_MPT_STATUS_SW;
  642. wmb();
  643. for (i = 0; i < list_len; ++i)
  644. fmr->mem.arbel.mtts[i] = cpu_to_be64(page_list[i] |
  645. MTHCA_MTT_FLAG_PRESENT);
  646. dma_sync_single(&dev->pdev->dev, fmr->mem.arbel.dma_handle,
  647. list_len * sizeof(u64), DMA_TO_DEVICE);
  648. fmr->mem.arbel.mpt->key = cpu_to_be32(key);
  649. fmr->mem.arbel.mpt->lkey = cpu_to_be32(key);
  650. fmr->mem.arbel.mpt->length = cpu_to_be64(list_len * (1ull << fmr->attr.page_shift));
  651. fmr->mem.arbel.mpt->start = cpu_to_be64(iova);
  652. wmb();
  653. *(u8 *) fmr->mem.arbel.mpt = MTHCA_MPT_STATUS_HW;
  654. wmb();
  655. return 0;
  656. }
  657. void mthca_tavor_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr)
  658. {
  659. u32 key;
  660. if (!fmr->maps)
  661. return;
  662. key = tavor_key_to_hw_index(fmr->ibmr.lkey);
  663. key &= dev->limits.num_mpts - 1;
  664. fmr->ibmr.lkey = fmr->ibmr.rkey = tavor_hw_index_to_key(key);
  665. fmr->maps = 0;
  666. writeb(MTHCA_MPT_STATUS_SW, fmr->mem.tavor.mpt);
  667. }
  668. void mthca_arbel_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr)
  669. {
  670. u32 key;
  671. if (!fmr->maps)
  672. return;
  673. key = arbel_key_to_hw_index(fmr->ibmr.lkey);
  674. key &= dev->limits.num_mpts - 1;
  675. key = adjust_key(dev, key);
  676. fmr->ibmr.lkey = fmr->ibmr.rkey = arbel_hw_index_to_key(key);
  677. fmr->maps = 0;
  678. *(u8 *) fmr->mem.arbel.mpt = MTHCA_MPT_STATUS_SW;
  679. }
  680. int mthca_init_mr_table(struct mthca_dev *dev)
  681. {
  682. unsigned long addr;
  683. int mpts, mtts, err, i;
  684. err = mthca_alloc_init(&dev->mr_table.mpt_alloc,
  685. dev->limits.num_mpts,
  686. ~0, dev->limits.reserved_mrws);
  687. if (err)
  688. return err;
  689. if (!mthca_is_memfree(dev) &&
  690. (dev->mthca_flags & MTHCA_FLAG_DDR_HIDDEN))
  691. dev->limits.fmr_reserved_mtts = 0;
  692. else
  693. dev->mthca_flags |= MTHCA_FLAG_FMR;
  694. if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
  695. mthca_dbg(dev, "Memory key throughput optimization activated.\n");
  696. err = mthca_buddy_init(&dev->mr_table.mtt_buddy,
  697. fls(dev->limits.num_mtt_segs - 1));
  698. if (err)
  699. goto err_mtt_buddy;
  700. dev->mr_table.tavor_fmr.mpt_base = NULL;
  701. dev->mr_table.tavor_fmr.mtt_base = NULL;
  702. if (dev->limits.fmr_reserved_mtts) {
  703. i = fls(dev->limits.fmr_reserved_mtts - 1);
  704. if (i >= 31) {
  705. mthca_warn(dev, "Unable to reserve 2^31 FMR MTTs.\n");
  706. err = -EINVAL;
  707. goto err_fmr_mpt;
  708. }
  709. mpts = mtts = 1 << i;
  710. } else {
  711. mtts = dev->limits.num_mtt_segs;
  712. mpts = dev->limits.num_mpts;
  713. }
  714. if (!mthca_is_memfree(dev) &&
  715. (dev->mthca_flags & MTHCA_FLAG_FMR)) {
  716. addr = pci_resource_start(dev->pdev, 4) +
  717. ((pci_resource_len(dev->pdev, 4) - 1) &
  718. dev->mr_table.mpt_base);
  719. dev->mr_table.tavor_fmr.mpt_base =
  720. ioremap(addr, mpts * sizeof(struct mthca_mpt_entry));
  721. if (!dev->mr_table.tavor_fmr.mpt_base) {
  722. mthca_warn(dev, "MPT ioremap for FMR failed.\n");
  723. err = -ENOMEM;
  724. goto err_fmr_mpt;
  725. }
  726. addr = pci_resource_start(dev->pdev, 4) +
  727. ((pci_resource_len(dev->pdev, 4) - 1) &
  728. dev->mr_table.mtt_base);
  729. dev->mr_table.tavor_fmr.mtt_base =
  730. ioremap(addr, mtts * MTHCA_MTT_SEG_SIZE);
  731. if (!dev->mr_table.tavor_fmr.mtt_base) {
  732. mthca_warn(dev, "MTT ioremap for FMR failed.\n");
  733. err = -ENOMEM;
  734. goto err_fmr_mtt;
  735. }
  736. }
  737. if (dev->limits.fmr_reserved_mtts) {
  738. err = mthca_buddy_init(&dev->mr_table.tavor_fmr.mtt_buddy, fls(mtts - 1));
  739. if (err)
  740. goto err_fmr_mtt_buddy;
  741. /* Prevent regular MRs from using FMR keys */
  742. err = mthca_buddy_alloc(&dev->mr_table.mtt_buddy, fls(mtts - 1));
  743. if (err)
  744. goto err_reserve_fmr;
  745. dev->mr_table.fmr_mtt_buddy =
  746. &dev->mr_table.tavor_fmr.mtt_buddy;
  747. } else
  748. dev->mr_table.fmr_mtt_buddy = &dev->mr_table.mtt_buddy;
  749. /* FMR table is always the first, take reserved MTTs out of there */
  750. if (dev->limits.reserved_mtts) {
  751. i = fls(dev->limits.reserved_mtts - 1);
  752. if (mthca_alloc_mtt_range(dev, i,
  753. dev->mr_table.fmr_mtt_buddy) == -1) {
  754. mthca_warn(dev, "MTT table of order %d is too small.\n",
  755. dev->mr_table.fmr_mtt_buddy->max_order);
  756. err = -ENOMEM;
  757. goto err_reserve_mtts;
  758. }
  759. }
  760. return 0;
  761. err_reserve_mtts:
  762. err_reserve_fmr:
  763. if (dev->limits.fmr_reserved_mtts)
  764. mthca_buddy_cleanup(&dev->mr_table.tavor_fmr.mtt_buddy);
  765. err_fmr_mtt_buddy:
  766. if (dev->mr_table.tavor_fmr.mtt_base)
  767. iounmap(dev->mr_table.tavor_fmr.mtt_base);
  768. err_fmr_mtt:
  769. if (dev->mr_table.tavor_fmr.mpt_base)
  770. iounmap(dev->mr_table.tavor_fmr.mpt_base);
  771. err_fmr_mpt:
  772. mthca_buddy_cleanup(&dev->mr_table.mtt_buddy);
  773. err_mtt_buddy:
  774. mthca_alloc_cleanup(&dev->mr_table.mpt_alloc);
  775. return err;
  776. }
  777. void mthca_cleanup_mr_table(struct mthca_dev *dev)
  778. {
  779. /* XXX check if any MRs are still allocated? */
  780. if (dev->limits.fmr_reserved_mtts)
  781. mthca_buddy_cleanup(&dev->mr_table.tavor_fmr.mtt_buddy);
  782. mthca_buddy_cleanup(&dev->mr_table.mtt_buddy);
  783. if (dev->mr_table.tavor_fmr.mtt_base)
  784. iounmap(dev->mr_table.tavor_fmr.mtt_base);
  785. if (dev->mr_table.tavor_fmr.mpt_base)
  786. iounmap(dev->mr_table.tavor_fmr.mpt_base);
  787. mthca_alloc_cleanup(&dev->mr_table.mpt_alloc);
  788. }