hpsa.c 124 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array SAS controllers
  3. * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12. * NON INFRINGEMENT. See the GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. *
  18. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/types.h>
  24. #include <linux/pci.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/delay.h>
  28. #include <linux/fs.h>
  29. #include <linux/timer.h>
  30. #include <linux/seq_file.h>
  31. #include <linux/init.h>
  32. #include <linux/spinlock.h>
  33. #include <linux/compat.h>
  34. #include <linux/blktrace_api.h>
  35. #include <linux/uaccess.h>
  36. #include <linux/io.h>
  37. #include <linux/dma-mapping.h>
  38. #include <linux/completion.h>
  39. #include <linux/moduleparam.h>
  40. #include <scsi/scsi.h>
  41. #include <scsi/scsi_cmnd.h>
  42. #include <scsi/scsi_device.h>
  43. #include <scsi/scsi_host.h>
  44. #include <scsi/scsi_tcq.h>
  45. #include <linux/cciss_ioctl.h>
  46. #include <linux/string.h>
  47. #include <linux/bitmap.h>
  48. #include <linux/atomic.h>
  49. #include <linux/kthread.h>
  50. #include "hpsa_cmd.h"
  51. #include "hpsa.h"
  52. /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  53. #define HPSA_DRIVER_VERSION "2.0.2-1"
  54. #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  55. /* How long to wait (in milliseconds) for board to go into simple mode */
  56. #define MAX_CONFIG_WAIT 30000
  57. #define MAX_IOCTL_CONFIG_WAIT 1000
  58. /*define how many times we will try a command because of bus resets */
  59. #define MAX_CMD_RETRIES 3
  60. /* Embedded module documentation macros - see modules.h */
  61. MODULE_AUTHOR("Hewlett-Packard Company");
  62. MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  63. HPSA_DRIVER_VERSION);
  64. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  65. MODULE_VERSION(HPSA_DRIVER_VERSION);
  66. MODULE_LICENSE("GPL");
  67. static int hpsa_allow_any;
  68. module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  69. MODULE_PARM_DESC(hpsa_allow_any,
  70. "Allow hpsa driver to access unknown HP Smart Array hardware");
  71. static int hpsa_simple_mode;
  72. module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  73. MODULE_PARM_DESC(hpsa_simple_mode,
  74. "Use 'simple mode' rather than 'performant mode'");
  75. /* define the PCI info for the cards we can control */
  76. static const struct pci_device_id hpsa_pci_device_id[] = {
  77. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  78. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  79. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
  87. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
  89. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
  90. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
  91. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
  92. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  93. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  94. {0,}
  95. };
  96. MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
  97. /* board_id = Subsystem Device ID & Vendor ID
  98. * product = Marketing Name for the board
  99. * access = Address of the struct of function pointers
  100. */
  101. static struct board_type products[] = {
  102. {0x3241103C, "Smart Array P212", &SA5_access},
  103. {0x3243103C, "Smart Array P410", &SA5_access},
  104. {0x3245103C, "Smart Array P410i", &SA5_access},
  105. {0x3247103C, "Smart Array P411", &SA5_access},
  106. {0x3249103C, "Smart Array P812", &SA5_access},
  107. {0x324a103C, "Smart Array P712m", &SA5_access},
  108. {0x324b103C, "Smart Array P711m", &SA5_access},
  109. {0x3350103C, "Smart Array", &SA5_access},
  110. {0x3351103C, "Smart Array", &SA5_access},
  111. {0x3352103C, "Smart Array", &SA5_access},
  112. {0x3353103C, "Smart Array", &SA5_access},
  113. {0x3354103C, "Smart Array", &SA5_access},
  114. {0x3355103C, "Smart Array", &SA5_access},
  115. {0x3356103C, "Smart Array", &SA5_access},
  116. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  117. };
  118. static int number_of_controllers;
  119. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
  120. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
  121. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
  122. static void start_io(struct ctlr_info *h);
  123. #ifdef CONFIG_COMPAT
  124. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
  125. #endif
  126. static void cmd_free(struct ctlr_info *h, struct CommandList *c);
  127. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
  128. static struct CommandList *cmd_alloc(struct ctlr_info *h);
  129. static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
  130. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  131. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  132. int cmd_type);
  133. static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
  134. static void hpsa_scan_start(struct Scsi_Host *);
  135. static int hpsa_scan_finished(struct Scsi_Host *sh,
  136. unsigned long elapsed_time);
  137. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  138. int qdepth, int reason);
  139. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
  140. static int hpsa_slave_alloc(struct scsi_device *sdev);
  141. static void hpsa_slave_destroy(struct scsi_device *sdev);
  142. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
  143. static int check_for_unit_attention(struct ctlr_info *h,
  144. struct CommandList *c);
  145. static void check_ioctl_unit_attention(struct ctlr_info *h,
  146. struct CommandList *c);
  147. /* performant mode helper functions */
  148. static void calc_bucket_map(int *bucket, int num_buckets,
  149. int nsgs, int *bucket_map);
  150. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
  151. static inline u32 next_command(struct ctlr_info *h);
  152. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  153. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  154. u64 *cfg_offset);
  155. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  156. unsigned long *memory_bar);
  157. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
  158. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  159. void __iomem *vaddr, int wait_for_ready);
  160. #define BOARD_NOT_READY 0
  161. #define BOARD_READY 1
  162. static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
  163. {
  164. unsigned long *priv = shost_priv(sdev->host);
  165. return (struct ctlr_info *) *priv;
  166. }
  167. static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
  168. {
  169. unsigned long *priv = shost_priv(sh);
  170. return (struct ctlr_info *) *priv;
  171. }
  172. static int check_for_unit_attention(struct ctlr_info *h,
  173. struct CommandList *c)
  174. {
  175. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  176. return 0;
  177. switch (c->err_info->SenseInfo[12]) {
  178. case STATE_CHANGED:
  179. dev_warn(&h->pdev->dev, "hpsa%d: a state change "
  180. "detected, command retried\n", h->ctlr);
  181. break;
  182. case LUN_FAILED:
  183. dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
  184. "detected, action required\n", h->ctlr);
  185. break;
  186. case REPORT_LUNS_CHANGED:
  187. dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
  188. "changed, action required\n", h->ctlr);
  189. /*
  190. * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
  191. */
  192. break;
  193. case POWER_OR_RESET:
  194. dev_warn(&h->pdev->dev, "hpsa%d: a power on "
  195. "or device reset detected\n", h->ctlr);
  196. break;
  197. case UNIT_ATTENTION_CLEARED:
  198. dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
  199. "cleared by another initiator\n", h->ctlr);
  200. break;
  201. default:
  202. dev_warn(&h->pdev->dev, "hpsa%d: unknown "
  203. "unit attention detected\n", h->ctlr);
  204. break;
  205. }
  206. return 1;
  207. }
  208. static ssize_t host_store_rescan(struct device *dev,
  209. struct device_attribute *attr,
  210. const char *buf, size_t count)
  211. {
  212. struct ctlr_info *h;
  213. struct Scsi_Host *shost = class_to_shost(dev);
  214. h = shost_to_hba(shost);
  215. hpsa_scan_start(h->scsi_host);
  216. return count;
  217. }
  218. static ssize_t host_show_firmware_revision(struct device *dev,
  219. struct device_attribute *attr, char *buf)
  220. {
  221. struct ctlr_info *h;
  222. struct Scsi_Host *shost = class_to_shost(dev);
  223. unsigned char *fwrev;
  224. h = shost_to_hba(shost);
  225. if (!h->hba_inquiry_data)
  226. return 0;
  227. fwrev = &h->hba_inquiry_data[32];
  228. return snprintf(buf, 20, "%c%c%c%c\n",
  229. fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
  230. }
  231. static ssize_t host_show_commands_outstanding(struct device *dev,
  232. struct device_attribute *attr, char *buf)
  233. {
  234. struct Scsi_Host *shost = class_to_shost(dev);
  235. struct ctlr_info *h = shost_to_hba(shost);
  236. return snprintf(buf, 20, "%d\n", h->commands_outstanding);
  237. }
  238. static ssize_t host_show_transport_mode(struct device *dev,
  239. struct device_attribute *attr, char *buf)
  240. {
  241. struct ctlr_info *h;
  242. struct Scsi_Host *shost = class_to_shost(dev);
  243. h = shost_to_hba(shost);
  244. return snprintf(buf, 20, "%s\n",
  245. h->transMethod & CFGTBL_Trans_Performant ?
  246. "performant" : "simple");
  247. }
  248. /* List of controllers which cannot be hard reset on kexec with reset_devices */
  249. static u32 unresettable_controller[] = {
  250. 0x324a103C, /* Smart Array P712m */
  251. 0x324b103C, /* SmartArray P711m */
  252. 0x3223103C, /* Smart Array P800 */
  253. 0x3234103C, /* Smart Array P400 */
  254. 0x3235103C, /* Smart Array P400i */
  255. 0x3211103C, /* Smart Array E200i */
  256. 0x3212103C, /* Smart Array E200 */
  257. 0x3213103C, /* Smart Array E200i */
  258. 0x3214103C, /* Smart Array E200i */
  259. 0x3215103C, /* Smart Array E200i */
  260. 0x3237103C, /* Smart Array E500 */
  261. 0x323D103C, /* Smart Array P700m */
  262. 0x409C0E11, /* Smart Array 6400 */
  263. 0x409D0E11, /* Smart Array 6400 EM */
  264. };
  265. /* List of controllers which cannot even be soft reset */
  266. static u32 soft_unresettable_controller[] = {
  267. /* Exclude 640x boards. These are two pci devices in one slot
  268. * which share a battery backed cache module. One controls the
  269. * cache, the other accesses the cache through the one that controls
  270. * it. If we reset the one controlling the cache, the other will
  271. * likely not be happy. Just forbid resetting this conjoined mess.
  272. * The 640x isn't really supported by hpsa anyway.
  273. */
  274. 0x409C0E11, /* Smart Array 6400 */
  275. 0x409D0E11, /* Smart Array 6400 EM */
  276. };
  277. static int ctlr_is_hard_resettable(u32 board_id)
  278. {
  279. int i;
  280. for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
  281. if (unresettable_controller[i] == board_id)
  282. return 0;
  283. return 1;
  284. }
  285. static int ctlr_is_soft_resettable(u32 board_id)
  286. {
  287. int i;
  288. for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
  289. if (soft_unresettable_controller[i] == board_id)
  290. return 0;
  291. return 1;
  292. }
  293. static int ctlr_is_resettable(u32 board_id)
  294. {
  295. return ctlr_is_hard_resettable(board_id) ||
  296. ctlr_is_soft_resettable(board_id);
  297. }
  298. static ssize_t host_show_resettable(struct device *dev,
  299. struct device_attribute *attr, char *buf)
  300. {
  301. struct ctlr_info *h;
  302. struct Scsi_Host *shost = class_to_shost(dev);
  303. h = shost_to_hba(shost);
  304. return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
  305. }
  306. static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
  307. {
  308. return (scsi3addr[3] & 0xC0) == 0x40;
  309. }
  310. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  311. "UNKNOWN"
  312. };
  313. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
  314. static ssize_t raid_level_show(struct device *dev,
  315. struct device_attribute *attr, char *buf)
  316. {
  317. ssize_t l = 0;
  318. unsigned char rlevel;
  319. struct ctlr_info *h;
  320. struct scsi_device *sdev;
  321. struct hpsa_scsi_dev_t *hdev;
  322. unsigned long flags;
  323. sdev = to_scsi_device(dev);
  324. h = sdev_to_hba(sdev);
  325. spin_lock_irqsave(&h->lock, flags);
  326. hdev = sdev->hostdata;
  327. if (!hdev) {
  328. spin_unlock_irqrestore(&h->lock, flags);
  329. return -ENODEV;
  330. }
  331. /* Is this even a logical drive? */
  332. if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
  333. spin_unlock_irqrestore(&h->lock, flags);
  334. l = snprintf(buf, PAGE_SIZE, "N/A\n");
  335. return l;
  336. }
  337. rlevel = hdev->raid_level;
  338. spin_unlock_irqrestore(&h->lock, flags);
  339. if (rlevel > RAID_UNKNOWN)
  340. rlevel = RAID_UNKNOWN;
  341. l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
  342. return l;
  343. }
  344. static ssize_t lunid_show(struct device *dev,
  345. struct device_attribute *attr, char *buf)
  346. {
  347. struct ctlr_info *h;
  348. struct scsi_device *sdev;
  349. struct hpsa_scsi_dev_t *hdev;
  350. unsigned long flags;
  351. unsigned char lunid[8];
  352. sdev = to_scsi_device(dev);
  353. h = sdev_to_hba(sdev);
  354. spin_lock_irqsave(&h->lock, flags);
  355. hdev = sdev->hostdata;
  356. if (!hdev) {
  357. spin_unlock_irqrestore(&h->lock, flags);
  358. return -ENODEV;
  359. }
  360. memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
  361. spin_unlock_irqrestore(&h->lock, flags);
  362. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  363. lunid[0], lunid[1], lunid[2], lunid[3],
  364. lunid[4], lunid[5], lunid[6], lunid[7]);
  365. }
  366. static ssize_t unique_id_show(struct device *dev,
  367. struct device_attribute *attr, char *buf)
  368. {
  369. struct ctlr_info *h;
  370. struct scsi_device *sdev;
  371. struct hpsa_scsi_dev_t *hdev;
  372. unsigned long flags;
  373. unsigned char sn[16];
  374. sdev = to_scsi_device(dev);
  375. h = sdev_to_hba(sdev);
  376. spin_lock_irqsave(&h->lock, flags);
  377. hdev = sdev->hostdata;
  378. if (!hdev) {
  379. spin_unlock_irqrestore(&h->lock, flags);
  380. return -ENODEV;
  381. }
  382. memcpy(sn, hdev->device_id, sizeof(sn));
  383. spin_unlock_irqrestore(&h->lock, flags);
  384. return snprintf(buf, 16 * 2 + 2,
  385. "%02X%02X%02X%02X%02X%02X%02X%02X"
  386. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  387. sn[0], sn[1], sn[2], sn[3],
  388. sn[4], sn[5], sn[6], sn[7],
  389. sn[8], sn[9], sn[10], sn[11],
  390. sn[12], sn[13], sn[14], sn[15]);
  391. }
  392. static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
  393. static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
  394. static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
  395. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  396. static DEVICE_ATTR(firmware_revision, S_IRUGO,
  397. host_show_firmware_revision, NULL);
  398. static DEVICE_ATTR(commands_outstanding, S_IRUGO,
  399. host_show_commands_outstanding, NULL);
  400. static DEVICE_ATTR(transport_mode, S_IRUGO,
  401. host_show_transport_mode, NULL);
  402. static DEVICE_ATTR(resettable, S_IRUGO,
  403. host_show_resettable, NULL);
  404. static struct device_attribute *hpsa_sdev_attrs[] = {
  405. &dev_attr_raid_level,
  406. &dev_attr_lunid,
  407. &dev_attr_unique_id,
  408. NULL,
  409. };
  410. static struct device_attribute *hpsa_shost_attrs[] = {
  411. &dev_attr_rescan,
  412. &dev_attr_firmware_revision,
  413. &dev_attr_commands_outstanding,
  414. &dev_attr_transport_mode,
  415. &dev_attr_resettable,
  416. NULL,
  417. };
  418. static struct scsi_host_template hpsa_driver_template = {
  419. .module = THIS_MODULE,
  420. .name = "hpsa",
  421. .proc_name = "hpsa",
  422. .queuecommand = hpsa_scsi_queue_command,
  423. .scan_start = hpsa_scan_start,
  424. .scan_finished = hpsa_scan_finished,
  425. .change_queue_depth = hpsa_change_queue_depth,
  426. .this_id = -1,
  427. .use_clustering = ENABLE_CLUSTERING,
  428. .eh_device_reset_handler = hpsa_eh_device_reset_handler,
  429. .ioctl = hpsa_ioctl,
  430. .slave_alloc = hpsa_slave_alloc,
  431. .slave_destroy = hpsa_slave_destroy,
  432. #ifdef CONFIG_COMPAT
  433. .compat_ioctl = hpsa_compat_ioctl,
  434. #endif
  435. .sdev_attrs = hpsa_sdev_attrs,
  436. .shost_attrs = hpsa_shost_attrs,
  437. .max_sectors = 8192,
  438. };
  439. /* Enqueuing and dequeuing functions for cmdlists. */
  440. static inline void addQ(struct list_head *list, struct CommandList *c)
  441. {
  442. list_add_tail(&c->list, list);
  443. }
  444. static inline u32 next_command(struct ctlr_info *h)
  445. {
  446. u32 a;
  447. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  448. return h->access.command_completed(h);
  449. if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
  450. a = *(h->reply_pool_head); /* Next cmd in ring buffer */
  451. (h->reply_pool_head)++;
  452. h->commands_outstanding--;
  453. } else {
  454. a = FIFO_EMPTY;
  455. }
  456. /* Check for wraparound */
  457. if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
  458. h->reply_pool_head = h->reply_pool;
  459. h->reply_pool_wraparound ^= 1;
  460. }
  461. return a;
  462. }
  463. /* set_performant_mode: Modify the tag for cciss performant
  464. * set bit 0 for pull model, bits 3-1 for block fetch
  465. * register number
  466. */
  467. static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
  468. {
  469. if (likely(h->transMethod & CFGTBL_Trans_Performant))
  470. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  471. }
  472. static void enqueue_cmd_and_start_io(struct ctlr_info *h,
  473. struct CommandList *c)
  474. {
  475. unsigned long flags;
  476. set_performant_mode(h, c);
  477. spin_lock_irqsave(&h->lock, flags);
  478. addQ(&h->reqQ, c);
  479. h->Qdepth++;
  480. start_io(h);
  481. spin_unlock_irqrestore(&h->lock, flags);
  482. }
  483. static inline void removeQ(struct CommandList *c)
  484. {
  485. if (WARN_ON(list_empty(&c->list)))
  486. return;
  487. list_del_init(&c->list);
  488. }
  489. static inline int is_hba_lunid(unsigned char scsi3addr[])
  490. {
  491. return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
  492. }
  493. static inline int is_scsi_rev_5(struct ctlr_info *h)
  494. {
  495. if (!h->hba_inquiry_data)
  496. return 0;
  497. if ((h->hba_inquiry_data[2] & 0x07) == 5)
  498. return 1;
  499. return 0;
  500. }
  501. static int hpsa_find_target_lun(struct ctlr_info *h,
  502. unsigned char scsi3addr[], int bus, int *target, int *lun)
  503. {
  504. /* finds an unused bus, target, lun for a new physical device
  505. * assumes h->devlock is held
  506. */
  507. int i, found = 0;
  508. DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
  509. memset(&lun_taken[0], 0, HPSA_MAX_DEVICES >> 3);
  510. for (i = 0; i < h->ndevices; i++) {
  511. if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
  512. set_bit(h->dev[i]->target, lun_taken);
  513. }
  514. for (i = 0; i < HPSA_MAX_DEVICES; i++) {
  515. if (!test_bit(i, lun_taken)) {
  516. /* *bus = 1; */
  517. *target = i;
  518. *lun = 0;
  519. found = 1;
  520. break;
  521. }
  522. }
  523. return !found;
  524. }
  525. /* Add an entry into h->dev[] array. */
  526. static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
  527. struct hpsa_scsi_dev_t *device,
  528. struct hpsa_scsi_dev_t *added[], int *nadded)
  529. {
  530. /* assumes h->devlock is held */
  531. int n = h->ndevices;
  532. int i;
  533. unsigned char addr1[8], addr2[8];
  534. struct hpsa_scsi_dev_t *sd;
  535. if (n >= HPSA_MAX_DEVICES) {
  536. dev_err(&h->pdev->dev, "too many devices, some will be "
  537. "inaccessible.\n");
  538. return -1;
  539. }
  540. /* physical devices do not have lun or target assigned until now. */
  541. if (device->lun != -1)
  542. /* Logical device, lun is already assigned. */
  543. goto lun_assigned;
  544. /* If this device a non-zero lun of a multi-lun device
  545. * byte 4 of the 8-byte LUN addr will contain the logical
  546. * unit no, zero otherise.
  547. */
  548. if (device->scsi3addr[4] == 0) {
  549. /* This is not a non-zero lun of a multi-lun device */
  550. if (hpsa_find_target_lun(h, device->scsi3addr,
  551. device->bus, &device->target, &device->lun) != 0)
  552. return -1;
  553. goto lun_assigned;
  554. }
  555. /* This is a non-zero lun of a multi-lun device.
  556. * Search through our list and find the device which
  557. * has the same 8 byte LUN address, excepting byte 4.
  558. * Assign the same bus and target for this new LUN.
  559. * Use the logical unit number from the firmware.
  560. */
  561. memcpy(addr1, device->scsi3addr, 8);
  562. addr1[4] = 0;
  563. for (i = 0; i < n; i++) {
  564. sd = h->dev[i];
  565. memcpy(addr2, sd->scsi3addr, 8);
  566. addr2[4] = 0;
  567. /* differ only in byte 4? */
  568. if (memcmp(addr1, addr2, 8) == 0) {
  569. device->bus = sd->bus;
  570. device->target = sd->target;
  571. device->lun = device->scsi3addr[4];
  572. break;
  573. }
  574. }
  575. if (device->lun == -1) {
  576. dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
  577. " suspect firmware bug or unsupported hardware "
  578. "configuration.\n");
  579. return -1;
  580. }
  581. lun_assigned:
  582. h->dev[n] = device;
  583. h->ndevices++;
  584. added[*nadded] = device;
  585. (*nadded)++;
  586. /* initially, (before registering with scsi layer) we don't
  587. * know our hostno and we don't want to print anything first
  588. * time anyway (the scsi layer's inquiries will show that info)
  589. */
  590. /* if (hostno != -1) */
  591. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
  592. scsi_device_type(device->devtype), hostno,
  593. device->bus, device->target, device->lun);
  594. return 0;
  595. }
  596. /* Replace an entry from h->dev[] array. */
  597. static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
  598. int entry, struct hpsa_scsi_dev_t *new_entry,
  599. struct hpsa_scsi_dev_t *added[], int *nadded,
  600. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  601. {
  602. /* assumes h->devlock is held */
  603. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  604. removed[*nremoved] = h->dev[entry];
  605. (*nremoved)++;
  606. /*
  607. * New physical devices won't have target/lun assigned yet
  608. * so we need to preserve the values in the slot we are replacing.
  609. */
  610. if (new_entry->target == -1) {
  611. new_entry->target = h->dev[entry]->target;
  612. new_entry->lun = h->dev[entry]->lun;
  613. }
  614. h->dev[entry] = new_entry;
  615. added[*nadded] = new_entry;
  616. (*nadded)++;
  617. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
  618. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  619. new_entry->target, new_entry->lun);
  620. }
  621. /* Remove an entry from h->dev[] array. */
  622. static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
  623. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  624. {
  625. /* assumes h->devlock is held */
  626. int i;
  627. struct hpsa_scsi_dev_t *sd;
  628. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  629. sd = h->dev[entry];
  630. removed[*nremoved] = h->dev[entry];
  631. (*nremoved)++;
  632. for (i = entry; i < h->ndevices-1; i++)
  633. h->dev[i] = h->dev[i+1];
  634. h->ndevices--;
  635. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
  636. scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
  637. sd->lun);
  638. }
  639. #define SCSI3ADDR_EQ(a, b) ( \
  640. (a)[7] == (b)[7] && \
  641. (a)[6] == (b)[6] && \
  642. (a)[5] == (b)[5] && \
  643. (a)[4] == (b)[4] && \
  644. (a)[3] == (b)[3] && \
  645. (a)[2] == (b)[2] && \
  646. (a)[1] == (b)[1] && \
  647. (a)[0] == (b)[0])
  648. static void fixup_botched_add(struct ctlr_info *h,
  649. struct hpsa_scsi_dev_t *added)
  650. {
  651. /* called when scsi_add_device fails in order to re-adjust
  652. * h->dev[] to match the mid layer's view.
  653. */
  654. unsigned long flags;
  655. int i, j;
  656. spin_lock_irqsave(&h->lock, flags);
  657. for (i = 0; i < h->ndevices; i++) {
  658. if (h->dev[i] == added) {
  659. for (j = i; j < h->ndevices-1; j++)
  660. h->dev[j] = h->dev[j+1];
  661. h->ndevices--;
  662. break;
  663. }
  664. }
  665. spin_unlock_irqrestore(&h->lock, flags);
  666. kfree(added);
  667. }
  668. static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
  669. struct hpsa_scsi_dev_t *dev2)
  670. {
  671. /* we compare everything except lun and target as these
  672. * are not yet assigned. Compare parts likely
  673. * to differ first
  674. */
  675. if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
  676. sizeof(dev1->scsi3addr)) != 0)
  677. return 0;
  678. if (memcmp(dev1->device_id, dev2->device_id,
  679. sizeof(dev1->device_id)) != 0)
  680. return 0;
  681. if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
  682. return 0;
  683. if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
  684. return 0;
  685. if (dev1->devtype != dev2->devtype)
  686. return 0;
  687. if (dev1->bus != dev2->bus)
  688. return 0;
  689. return 1;
  690. }
  691. /* Find needle in haystack. If exact match found, return DEVICE_SAME,
  692. * and return needle location in *index. If scsi3addr matches, but not
  693. * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
  694. * location in *index. If needle not found, return DEVICE_NOT_FOUND.
  695. */
  696. static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
  697. struct hpsa_scsi_dev_t *haystack[], int haystack_size,
  698. int *index)
  699. {
  700. int i;
  701. #define DEVICE_NOT_FOUND 0
  702. #define DEVICE_CHANGED 1
  703. #define DEVICE_SAME 2
  704. for (i = 0; i < haystack_size; i++) {
  705. if (haystack[i] == NULL) /* previously removed. */
  706. continue;
  707. if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
  708. *index = i;
  709. if (device_is_the_same(needle, haystack[i]))
  710. return DEVICE_SAME;
  711. else
  712. return DEVICE_CHANGED;
  713. }
  714. }
  715. *index = -1;
  716. return DEVICE_NOT_FOUND;
  717. }
  718. static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
  719. struct hpsa_scsi_dev_t *sd[], int nsds)
  720. {
  721. /* sd contains scsi3 addresses and devtypes, and inquiry
  722. * data. This function takes what's in sd to be the current
  723. * reality and updates h->dev[] to reflect that reality.
  724. */
  725. int i, entry, device_change, changes = 0;
  726. struct hpsa_scsi_dev_t *csd;
  727. unsigned long flags;
  728. struct hpsa_scsi_dev_t **added, **removed;
  729. int nadded, nremoved;
  730. struct Scsi_Host *sh = NULL;
  731. added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
  732. removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
  733. if (!added || !removed) {
  734. dev_warn(&h->pdev->dev, "out of memory in "
  735. "adjust_hpsa_scsi_table\n");
  736. goto free_and_out;
  737. }
  738. spin_lock_irqsave(&h->devlock, flags);
  739. /* find any devices in h->dev[] that are not in
  740. * sd[] and remove them from h->dev[], and for any
  741. * devices which have changed, remove the old device
  742. * info and add the new device info.
  743. */
  744. i = 0;
  745. nremoved = 0;
  746. nadded = 0;
  747. while (i < h->ndevices) {
  748. csd = h->dev[i];
  749. device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
  750. if (device_change == DEVICE_NOT_FOUND) {
  751. changes++;
  752. hpsa_scsi_remove_entry(h, hostno, i,
  753. removed, &nremoved);
  754. continue; /* remove ^^^, hence i not incremented */
  755. } else if (device_change == DEVICE_CHANGED) {
  756. changes++;
  757. hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
  758. added, &nadded, removed, &nremoved);
  759. /* Set it to NULL to prevent it from being freed
  760. * at the bottom of hpsa_update_scsi_devices()
  761. */
  762. sd[entry] = NULL;
  763. }
  764. i++;
  765. }
  766. /* Now, make sure every device listed in sd[] is also
  767. * listed in h->dev[], adding them if they aren't found
  768. */
  769. for (i = 0; i < nsds; i++) {
  770. if (!sd[i]) /* if already added above. */
  771. continue;
  772. device_change = hpsa_scsi_find_entry(sd[i], h->dev,
  773. h->ndevices, &entry);
  774. if (device_change == DEVICE_NOT_FOUND) {
  775. changes++;
  776. if (hpsa_scsi_add_entry(h, hostno, sd[i],
  777. added, &nadded) != 0)
  778. break;
  779. sd[i] = NULL; /* prevent from being freed later. */
  780. } else if (device_change == DEVICE_CHANGED) {
  781. /* should never happen... */
  782. changes++;
  783. dev_warn(&h->pdev->dev,
  784. "device unexpectedly changed.\n");
  785. /* but if it does happen, we just ignore that device */
  786. }
  787. }
  788. spin_unlock_irqrestore(&h->devlock, flags);
  789. /* Don't notify scsi mid layer of any changes the first time through
  790. * (or if there are no changes) scsi_scan_host will do it later the
  791. * first time through.
  792. */
  793. if (hostno == -1 || !changes)
  794. goto free_and_out;
  795. sh = h->scsi_host;
  796. /* Notify scsi mid layer of any removed devices */
  797. for (i = 0; i < nremoved; i++) {
  798. struct scsi_device *sdev =
  799. scsi_device_lookup(sh, removed[i]->bus,
  800. removed[i]->target, removed[i]->lun);
  801. if (sdev != NULL) {
  802. scsi_remove_device(sdev);
  803. scsi_device_put(sdev);
  804. } else {
  805. /* We don't expect to get here.
  806. * future cmds to this device will get selection
  807. * timeout as if the device was gone.
  808. */
  809. dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
  810. " for removal.", hostno, removed[i]->bus,
  811. removed[i]->target, removed[i]->lun);
  812. }
  813. kfree(removed[i]);
  814. removed[i] = NULL;
  815. }
  816. /* Notify scsi mid layer of any added devices */
  817. for (i = 0; i < nadded; i++) {
  818. if (scsi_add_device(sh, added[i]->bus,
  819. added[i]->target, added[i]->lun) == 0)
  820. continue;
  821. dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
  822. "device not added.\n", hostno, added[i]->bus,
  823. added[i]->target, added[i]->lun);
  824. /* now we have to remove it from h->dev,
  825. * since it didn't get added to scsi mid layer
  826. */
  827. fixup_botched_add(h, added[i]);
  828. }
  829. free_and_out:
  830. kfree(added);
  831. kfree(removed);
  832. }
  833. /*
  834. * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
  835. * Assume's h->devlock is held.
  836. */
  837. static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
  838. int bus, int target, int lun)
  839. {
  840. int i;
  841. struct hpsa_scsi_dev_t *sd;
  842. for (i = 0; i < h->ndevices; i++) {
  843. sd = h->dev[i];
  844. if (sd->bus == bus && sd->target == target && sd->lun == lun)
  845. return sd;
  846. }
  847. return NULL;
  848. }
  849. /* link sdev->hostdata to our per-device structure. */
  850. static int hpsa_slave_alloc(struct scsi_device *sdev)
  851. {
  852. struct hpsa_scsi_dev_t *sd;
  853. unsigned long flags;
  854. struct ctlr_info *h;
  855. h = sdev_to_hba(sdev);
  856. spin_lock_irqsave(&h->devlock, flags);
  857. sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
  858. sdev_id(sdev), sdev->lun);
  859. if (sd != NULL)
  860. sdev->hostdata = sd;
  861. spin_unlock_irqrestore(&h->devlock, flags);
  862. return 0;
  863. }
  864. static void hpsa_slave_destroy(struct scsi_device *sdev)
  865. {
  866. /* nothing to do. */
  867. }
  868. static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
  869. {
  870. int i;
  871. if (!h->cmd_sg_list)
  872. return;
  873. for (i = 0; i < h->nr_cmds; i++) {
  874. kfree(h->cmd_sg_list[i]);
  875. h->cmd_sg_list[i] = NULL;
  876. }
  877. kfree(h->cmd_sg_list);
  878. h->cmd_sg_list = NULL;
  879. }
  880. static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
  881. {
  882. int i;
  883. if (h->chainsize <= 0)
  884. return 0;
  885. h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
  886. GFP_KERNEL);
  887. if (!h->cmd_sg_list)
  888. return -ENOMEM;
  889. for (i = 0; i < h->nr_cmds; i++) {
  890. h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
  891. h->chainsize, GFP_KERNEL);
  892. if (!h->cmd_sg_list[i])
  893. goto clean;
  894. }
  895. return 0;
  896. clean:
  897. hpsa_free_sg_chain_blocks(h);
  898. return -ENOMEM;
  899. }
  900. static void hpsa_map_sg_chain_block(struct ctlr_info *h,
  901. struct CommandList *c)
  902. {
  903. struct SGDescriptor *chain_sg, *chain_block;
  904. u64 temp64;
  905. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  906. chain_block = h->cmd_sg_list[c->cmdindex];
  907. chain_sg->Ext = HPSA_SG_CHAIN;
  908. chain_sg->Len = sizeof(*chain_sg) *
  909. (c->Header.SGTotal - h->max_cmd_sg_entries);
  910. temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
  911. PCI_DMA_TODEVICE);
  912. chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
  913. chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
  914. }
  915. static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
  916. struct CommandList *c)
  917. {
  918. struct SGDescriptor *chain_sg;
  919. union u64bit temp64;
  920. if (c->Header.SGTotal <= h->max_cmd_sg_entries)
  921. return;
  922. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  923. temp64.val32.lower = chain_sg->Addr.lower;
  924. temp64.val32.upper = chain_sg->Addr.upper;
  925. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  926. }
  927. static void complete_scsi_command(struct CommandList *cp)
  928. {
  929. struct scsi_cmnd *cmd;
  930. struct ctlr_info *h;
  931. struct ErrorInfo *ei;
  932. unsigned char sense_key;
  933. unsigned char asc; /* additional sense code */
  934. unsigned char ascq; /* additional sense code qualifier */
  935. unsigned long sense_data_size;
  936. ei = cp->err_info;
  937. cmd = (struct scsi_cmnd *) cp->scsi_cmd;
  938. h = cp->h;
  939. scsi_dma_unmap(cmd); /* undo the DMA mappings */
  940. if (cp->Header.SGTotal > h->max_cmd_sg_entries)
  941. hpsa_unmap_sg_chain_block(h, cp);
  942. cmd->result = (DID_OK << 16); /* host byte */
  943. cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
  944. cmd->result |= ei->ScsiStatus;
  945. /* copy the sense data whether we need to or not. */
  946. if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
  947. sense_data_size = SCSI_SENSE_BUFFERSIZE;
  948. else
  949. sense_data_size = sizeof(ei->SenseInfo);
  950. if (ei->SenseLen < sense_data_size)
  951. sense_data_size = ei->SenseLen;
  952. memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
  953. scsi_set_resid(cmd, ei->ResidualCnt);
  954. if (ei->CommandStatus == 0) {
  955. cmd->scsi_done(cmd);
  956. cmd_free(h, cp);
  957. return;
  958. }
  959. /* an error has occurred */
  960. switch (ei->CommandStatus) {
  961. case CMD_TARGET_STATUS:
  962. if (ei->ScsiStatus) {
  963. /* Get sense key */
  964. sense_key = 0xf & ei->SenseInfo[2];
  965. /* Get additional sense code */
  966. asc = ei->SenseInfo[12];
  967. /* Get addition sense code qualifier */
  968. ascq = ei->SenseInfo[13];
  969. }
  970. if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
  971. if (check_for_unit_attention(h, cp)) {
  972. cmd->result = DID_SOFT_ERROR << 16;
  973. break;
  974. }
  975. if (sense_key == ILLEGAL_REQUEST) {
  976. /*
  977. * SCSI REPORT_LUNS is commonly unsupported on
  978. * Smart Array. Suppress noisy complaint.
  979. */
  980. if (cp->Request.CDB[0] == REPORT_LUNS)
  981. break;
  982. /* If ASC/ASCQ indicate Logical Unit
  983. * Not Supported condition,
  984. */
  985. if ((asc == 0x25) && (ascq == 0x0)) {
  986. dev_warn(&h->pdev->dev, "cp %p "
  987. "has check condition\n", cp);
  988. break;
  989. }
  990. }
  991. if (sense_key == NOT_READY) {
  992. /* If Sense is Not Ready, Logical Unit
  993. * Not ready, Manual Intervention
  994. * required
  995. */
  996. if ((asc == 0x04) && (ascq == 0x03)) {
  997. dev_warn(&h->pdev->dev, "cp %p "
  998. "has check condition: unit "
  999. "not ready, manual "
  1000. "intervention required\n", cp);
  1001. break;
  1002. }
  1003. }
  1004. if (sense_key == ABORTED_COMMAND) {
  1005. /* Aborted command is retryable */
  1006. dev_warn(&h->pdev->dev, "cp %p "
  1007. "has check condition: aborted command: "
  1008. "ASC: 0x%x, ASCQ: 0x%x\n",
  1009. cp, asc, ascq);
  1010. cmd->result = DID_SOFT_ERROR << 16;
  1011. break;
  1012. }
  1013. /* Must be some other type of check condition */
  1014. dev_warn(&h->pdev->dev, "cp %p has check condition: "
  1015. "unknown type: "
  1016. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1017. "Returning result: 0x%x, "
  1018. "cmd=[%02x %02x %02x %02x %02x "
  1019. "%02x %02x %02x %02x %02x %02x "
  1020. "%02x %02x %02x %02x %02x]\n",
  1021. cp, sense_key, asc, ascq,
  1022. cmd->result,
  1023. cmd->cmnd[0], cmd->cmnd[1],
  1024. cmd->cmnd[2], cmd->cmnd[3],
  1025. cmd->cmnd[4], cmd->cmnd[5],
  1026. cmd->cmnd[6], cmd->cmnd[7],
  1027. cmd->cmnd[8], cmd->cmnd[9],
  1028. cmd->cmnd[10], cmd->cmnd[11],
  1029. cmd->cmnd[12], cmd->cmnd[13],
  1030. cmd->cmnd[14], cmd->cmnd[15]);
  1031. break;
  1032. }
  1033. /* Problem was not a check condition
  1034. * Pass it up to the upper layers...
  1035. */
  1036. if (ei->ScsiStatus) {
  1037. dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
  1038. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1039. "Returning result: 0x%x\n",
  1040. cp, ei->ScsiStatus,
  1041. sense_key, asc, ascq,
  1042. cmd->result);
  1043. } else { /* scsi status is zero??? How??? */
  1044. dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
  1045. "Returning no connection.\n", cp),
  1046. /* Ordinarily, this case should never happen,
  1047. * but there is a bug in some released firmware
  1048. * revisions that allows it to happen if, for
  1049. * example, a 4100 backplane loses power and
  1050. * the tape drive is in it. We assume that
  1051. * it's a fatal error of some kind because we
  1052. * can't show that it wasn't. We will make it
  1053. * look like selection timeout since that is
  1054. * the most common reason for this to occur,
  1055. * and it's severe enough.
  1056. */
  1057. cmd->result = DID_NO_CONNECT << 16;
  1058. }
  1059. break;
  1060. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1061. break;
  1062. case CMD_DATA_OVERRUN:
  1063. dev_warn(&h->pdev->dev, "cp %p has"
  1064. " completed with data overrun "
  1065. "reported\n", cp);
  1066. break;
  1067. case CMD_INVALID: {
  1068. /* print_bytes(cp, sizeof(*cp), 1, 0);
  1069. print_cmd(cp); */
  1070. /* We get CMD_INVALID if you address a non-existent device
  1071. * instead of a selection timeout (no response). You will
  1072. * see this if you yank out a drive, then try to access it.
  1073. * This is kind of a shame because it means that any other
  1074. * CMD_INVALID (e.g. driver bug) will get interpreted as a
  1075. * missing target. */
  1076. cmd->result = DID_NO_CONNECT << 16;
  1077. }
  1078. break;
  1079. case CMD_PROTOCOL_ERR:
  1080. dev_warn(&h->pdev->dev, "cp %p has "
  1081. "protocol error \n", cp);
  1082. break;
  1083. case CMD_HARDWARE_ERR:
  1084. cmd->result = DID_ERROR << 16;
  1085. dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
  1086. break;
  1087. case CMD_CONNECTION_LOST:
  1088. cmd->result = DID_ERROR << 16;
  1089. dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
  1090. break;
  1091. case CMD_ABORTED:
  1092. cmd->result = DID_ABORT << 16;
  1093. dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
  1094. cp, ei->ScsiStatus);
  1095. break;
  1096. case CMD_ABORT_FAILED:
  1097. cmd->result = DID_ERROR << 16;
  1098. dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
  1099. break;
  1100. case CMD_UNSOLICITED_ABORT:
  1101. cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
  1102. dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
  1103. "abort\n", cp);
  1104. break;
  1105. case CMD_TIMEOUT:
  1106. cmd->result = DID_TIME_OUT << 16;
  1107. dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
  1108. break;
  1109. case CMD_UNABORTABLE:
  1110. cmd->result = DID_ERROR << 16;
  1111. dev_warn(&h->pdev->dev, "Command unabortable\n");
  1112. break;
  1113. default:
  1114. cmd->result = DID_ERROR << 16;
  1115. dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
  1116. cp, ei->CommandStatus);
  1117. }
  1118. cmd->scsi_done(cmd);
  1119. cmd_free(h, cp);
  1120. }
  1121. static int hpsa_scsi_detect(struct ctlr_info *h)
  1122. {
  1123. struct Scsi_Host *sh;
  1124. int error;
  1125. sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
  1126. if (sh == NULL)
  1127. goto fail;
  1128. sh->io_port = 0;
  1129. sh->n_io_port = 0;
  1130. sh->this_id = -1;
  1131. sh->max_channel = 3;
  1132. sh->max_cmd_len = MAX_COMMAND_SIZE;
  1133. sh->max_lun = HPSA_MAX_LUN;
  1134. sh->max_id = HPSA_MAX_LUN;
  1135. sh->can_queue = h->nr_cmds;
  1136. sh->cmd_per_lun = h->nr_cmds;
  1137. sh->sg_tablesize = h->maxsgentries;
  1138. h->scsi_host = sh;
  1139. sh->hostdata[0] = (unsigned long) h;
  1140. sh->irq = h->intr[h->intr_mode];
  1141. sh->unique_id = sh->irq;
  1142. error = scsi_add_host(sh, &h->pdev->dev);
  1143. if (error)
  1144. goto fail_host_put;
  1145. scsi_scan_host(sh);
  1146. return 0;
  1147. fail_host_put:
  1148. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
  1149. " failed for controller %d\n", h->ctlr);
  1150. scsi_host_put(sh);
  1151. return error;
  1152. fail:
  1153. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
  1154. " failed for controller %d\n", h->ctlr);
  1155. return -ENOMEM;
  1156. }
  1157. static void hpsa_pci_unmap(struct pci_dev *pdev,
  1158. struct CommandList *c, int sg_used, int data_direction)
  1159. {
  1160. int i;
  1161. union u64bit addr64;
  1162. for (i = 0; i < sg_used; i++) {
  1163. addr64.val32.lower = c->SG[i].Addr.lower;
  1164. addr64.val32.upper = c->SG[i].Addr.upper;
  1165. pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
  1166. data_direction);
  1167. }
  1168. }
  1169. static void hpsa_map_one(struct pci_dev *pdev,
  1170. struct CommandList *cp,
  1171. unsigned char *buf,
  1172. size_t buflen,
  1173. int data_direction)
  1174. {
  1175. u64 addr64;
  1176. if (buflen == 0 || data_direction == PCI_DMA_NONE) {
  1177. cp->Header.SGList = 0;
  1178. cp->Header.SGTotal = 0;
  1179. return;
  1180. }
  1181. addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
  1182. cp->SG[0].Addr.lower =
  1183. (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
  1184. cp->SG[0].Addr.upper =
  1185. (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
  1186. cp->SG[0].Len = buflen;
  1187. cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
  1188. cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
  1189. }
  1190. static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
  1191. struct CommandList *c)
  1192. {
  1193. DECLARE_COMPLETION_ONSTACK(wait);
  1194. c->waiting = &wait;
  1195. enqueue_cmd_and_start_io(h, c);
  1196. wait_for_completion(&wait);
  1197. }
  1198. static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
  1199. struct CommandList *c, int data_direction)
  1200. {
  1201. int retry_count = 0;
  1202. do {
  1203. memset(c->err_info, 0, sizeof(*c->err_info));
  1204. hpsa_scsi_do_simple_cmd_core(h, c);
  1205. retry_count++;
  1206. } while (check_for_unit_attention(h, c) && retry_count <= 3);
  1207. hpsa_pci_unmap(h->pdev, c, 1, data_direction);
  1208. }
  1209. static void hpsa_scsi_interpret_error(struct CommandList *cp)
  1210. {
  1211. struct ErrorInfo *ei;
  1212. struct device *d = &cp->h->pdev->dev;
  1213. ei = cp->err_info;
  1214. switch (ei->CommandStatus) {
  1215. case CMD_TARGET_STATUS:
  1216. dev_warn(d, "cmd %p has completed with errors\n", cp);
  1217. dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
  1218. ei->ScsiStatus);
  1219. if (ei->ScsiStatus == 0)
  1220. dev_warn(d, "SCSI status is abnormally zero. "
  1221. "(probably indicates selection timeout "
  1222. "reported incorrectly due to a known "
  1223. "firmware bug, circa July, 2001.)\n");
  1224. break;
  1225. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1226. dev_info(d, "UNDERRUN\n");
  1227. break;
  1228. case CMD_DATA_OVERRUN:
  1229. dev_warn(d, "cp %p has completed with data overrun\n", cp);
  1230. break;
  1231. case CMD_INVALID: {
  1232. /* controller unfortunately reports SCSI passthru's
  1233. * to non-existent targets as invalid commands.
  1234. */
  1235. dev_warn(d, "cp %p is reported invalid (probably means "
  1236. "target device no longer present)\n", cp);
  1237. /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
  1238. print_cmd(cp); */
  1239. }
  1240. break;
  1241. case CMD_PROTOCOL_ERR:
  1242. dev_warn(d, "cp %p has protocol error \n", cp);
  1243. break;
  1244. case CMD_HARDWARE_ERR:
  1245. /* cmd->result = DID_ERROR << 16; */
  1246. dev_warn(d, "cp %p had hardware error\n", cp);
  1247. break;
  1248. case CMD_CONNECTION_LOST:
  1249. dev_warn(d, "cp %p had connection lost\n", cp);
  1250. break;
  1251. case CMD_ABORTED:
  1252. dev_warn(d, "cp %p was aborted\n", cp);
  1253. break;
  1254. case CMD_ABORT_FAILED:
  1255. dev_warn(d, "cp %p reports abort failed\n", cp);
  1256. break;
  1257. case CMD_UNSOLICITED_ABORT:
  1258. dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
  1259. break;
  1260. case CMD_TIMEOUT:
  1261. dev_warn(d, "cp %p timed out\n", cp);
  1262. break;
  1263. case CMD_UNABORTABLE:
  1264. dev_warn(d, "Command unabortable\n");
  1265. break;
  1266. default:
  1267. dev_warn(d, "cp %p returned unknown status %x\n", cp,
  1268. ei->CommandStatus);
  1269. }
  1270. }
  1271. static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
  1272. unsigned char page, unsigned char *buf,
  1273. unsigned char bufsize)
  1274. {
  1275. int rc = IO_OK;
  1276. struct CommandList *c;
  1277. struct ErrorInfo *ei;
  1278. c = cmd_special_alloc(h);
  1279. if (c == NULL) { /* trouble... */
  1280. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1281. return -ENOMEM;
  1282. }
  1283. fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
  1284. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1285. ei = c->err_info;
  1286. if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1287. hpsa_scsi_interpret_error(c);
  1288. rc = -1;
  1289. }
  1290. cmd_special_free(h, c);
  1291. return rc;
  1292. }
  1293. static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
  1294. {
  1295. int rc = IO_OK;
  1296. struct CommandList *c;
  1297. struct ErrorInfo *ei;
  1298. c = cmd_special_alloc(h);
  1299. if (c == NULL) { /* trouble... */
  1300. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1301. return -ENOMEM;
  1302. }
  1303. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
  1304. hpsa_scsi_do_simple_cmd_core(h, c);
  1305. /* no unmap needed here because no data xfer. */
  1306. ei = c->err_info;
  1307. if (ei->CommandStatus != 0) {
  1308. hpsa_scsi_interpret_error(c);
  1309. rc = -1;
  1310. }
  1311. cmd_special_free(h, c);
  1312. return rc;
  1313. }
  1314. static void hpsa_get_raid_level(struct ctlr_info *h,
  1315. unsigned char *scsi3addr, unsigned char *raid_level)
  1316. {
  1317. int rc;
  1318. unsigned char *buf;
  1319. *raid_level = RAID_UNKNOWN;
  1320. buf = kzalloc(64, GFP_KERNEL);
  1321. if (!buf)
  1322. return;
  1323. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
  1324. if (rc == 0)
  1325. *raid_level = buf[8];
  1326. if (*raid_level > RAID_UNKNOWN)
  1327. *raid_level = RAID_UNKNOWN;
  1328. kfree(buf);
  1329. return;
  1330. }
  1331. /* Get the device id from inquiry page 0x83 */
  1332. static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
  1333. unsigned char *device_id, int buflen)
  1334. {
  1335. int rc;
  1336. unsigned char *buf;
  1337. if (buflen > 16)
  1338. buflen = 16;
  1339. buf = kzalloc(64, GFP_KERNEL);
  1340. if (!buf)
  1341. return -1;
  1342. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
  1343. if (rc == 0)
  1344. memcpy(device_id, &buf[8], buflen);
  1345. kfree(buf);
  1346. return rc != 0;
  1347. }
  1348. static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
  1349. struct ReportLUNdata *buf, int bufsize,
  1350. int extended_response)
  1351. {
  1352. int rc = IO_OK;
  1353. struct CommandList *c;
  1354. unsigned char scsi3addr[8];
  1355. struct ErrorInfo *ei;
  1356. c = cmd_special_alloc(h);
  1357. if (c == NULL) { /* trouble... */
  1358. dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1359. return -1;
  1360. }
  1361. /* address the controller */
  1362. memset(scsi3addr, 0, sizeof(scsi3addr));
  1363. fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
  1364. buf, bufsize, 0, scsi3addr, TYPE_CMD);
  1365. if (extended_response)
  1366. c->Request.CDB[1] = extended_response;
  1367. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1368. ei = c->err_info;
  1369. if (ei->CommandStatus != 0 &&
  1370. ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1371. hpsa_scsi_interpret_error(c);
  1372. rc = -1;
  1373. }
  1374. cmd_special_free(h, c);
  1375. return rc;
  1376. }
  1377. static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
  1378. struct ReportLUNdata *buf,
  1379. int bufsize, int extended_response)
  1380. {
  1381. return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
  1382. }
  1383. static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
  1384. struct ReportLUNdata *buf, int bufsize)
  1385. {
  1386. return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
  1387. }
  1388. static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
  1389. int bus, int target, int lun)
  1390. {
  1391. device->bus = bus;
  1392. device->target = target;
  1393. device->lun = lun;
  1394. }
  1395. static int hpsa_update_device_info(struct ctlr_info *h,
  1396. unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
  1397. unsigned char *is_OBDR_device)
  1398. {
  1399. #define OBDR_SIG_OFFSET 43
  1400. #define OBDR_TAPE_SIG "$DR-10"
  1401. #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
  1402. #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
  1403. unsigned char *inq_buff;
  1404. unsigned char *obdr_sig;
  1405. inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1406. if (!inq_buff)
  1407. goto bail_out;
  1408. /* Do an inquiry to the device to see what it is. */
  1409. if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
  1410. (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
  1411. /* Inquiry failed (msg printed already) */
  1412. dev_err(&h->pdev->dev,
  1413. "hpsa_update_device_info: inquiry failed\n");
  1414. goto bail_out;
  1415. }
  1416. this_device->devtype = (inq_buff[0] & 0x1f);
  1417. memcpy(this_device->scsi3addr, scsi3addr, 8);
  1418. memcpy(this_device->vendor, &inq_buff[8],
  1419. sizeof(this_device->vendor));
  1420. memcpy(this_device->model, &inq_buff[16],
  1421. sizeof(this_device->model));
  1422. memset(this_device->device_id, 0,
  1423. sizeof(this_device->device_id));
  1424. hpsa_get_device_id(h, scsi3addr, this_device->device_id,
  1425. sizeof(this_device->device_id));
  1426. if (this_device->devtype == TYPE_DISK &&
  1427. is_logical_dev_addr_mode(scsi3addr))
  1428. hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
  1429. else
  1430. this_device->raid_level = RAID_UNKNOWN;
  1431. if (is_OBDR_device) {
  1432. /* See if this is a One-Button-Disaster-Recovery device
  1433. * by looking for "$DR-10" at offset 43 in inquiry data.
  1434. */
  1435. obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
  1436. *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
  1437. strncmp(obdr_sig, OBDR_TAPE_SIG,
  1438. OBDR_SIG_LEN) == 0);
  1439. }
  1440. kfree(inq_buff);
  1441. return 0;
  1442. bail_out:
  1443. kfree(inq_buff);
  1444. return 1;
  1445. }
  1446. static unsigned char *msa2xxx_model[] = {
  1447. "MSA2012",
  1448. "MSA2024",
  1449. "MSA2312",
  1450. "MSA2324",
  1451. "P2000 G3 SAS",
  1452. NULL,
  1453. };
  1454. static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
  1455. {
  1456. int i;
  1457. for (i = 0; msa2xxx_model[i]; i++)
  1458. if (strncmp(device->model, msa2xxx_model[i],
  1459. strlen(msa2xxx_model[i])) == 0)
  1460. return 1;
  1461. return 0;
  1462. }
  1463. /* Helper function to assign bus, target, lun mapping of devices.
  1464. * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
  1465. * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
  1466. * Logical drive target and lun are assigned at this time, but
  1467. * physical device lun and target assignment are deferred (assigned
  1468. * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
  1469. */
  1470. static void figure_bus_target_lun(struct ctlr_info *h,
  1471. u8 *lunaddrbytes, int *bus, int *target, int *lun,
  1472. struct hpsa_scsi_dev_t *device)
  1473. {
  1474. u32 lunid;
  1475. if (is_logical_dev_addr_mode(lunaddrbytes)) {
  1476. /* logical device */
  1477. if (unlikely(is_scsi_rev_5(h))) {
  1478. /* p1210m, logical drives lun assignments
  1479. * match SCSI REPORT LUNS data.
  1480. */
  1481. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1482. *bus = 0;
  1483. *target = 0;
  1484. *lun = (lunid & 0x3fff) + 1;
  1485. } else {
  1486. /* not p1210m... */
  1487. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1488. if (is_msa2xxx(h, device)) {
  1489. /* msa2xxx way, put logicals on bus 1
  1490. * and match target/lun numbers box
  1491. * reports.
  1492. */
  1493. *bus = 1;
  1494. *target = (lunid >> 16) & 0x3fff;
  1495. *lun = lunid & 0x00ff;
  1496. } else {
  1497. /* Traditional smart array way. */
  1498. *bus = 0;
  1499. *lun = 0;
  1500. *target = lunid & 0x3fff;
  1501. }
  1502. }
  1503. } else {
  1504. /* physical device */
  1505. if (is_hba_lunid(lunaddrbytes))
  1506. if (unlikely(is_scsi_rev_5(h))) {
  1507. *bus = 0; /* put p1210m ctlr at 0,0,0 */
  1508. *target = 0;
  1509. *lun = 0;
  1510. return;
  1511. } else
  1512. *bus = 3; /* traditional smartarray */
  1513. else
  1514. *bus = 2; /* physical disk */
  1515. *target = -1;
  1516. *lun = -1; /* we will fill these in later. */
  1517. }
  1518. }
  1519. /*
  1520. * If there is no lun 0 on a target, linux won't find any devices.
  1521. * For the MSA2xxx boxes, we have to manually detect the enclosure
  1522. * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
  1523. * it for some reason. *tmpdevice is the target we're adding,
  1524. * this_device is a pointer into the current element of currentsd[]
  1525. * that we're building up in update_scsi_devices(), below.
  1526. * lunzerobits is a bitmap that tracks which targets already have a
  1527. * lun 0 assigned.
  1528. * Returns 1 if an enclosure was added, 0 if not.
  1529. */
  1530. static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
  1531. struct hpsa_scsi_dev_t *tmpdevice,
  1532. struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
  1533. int bus, int target, int lun, unsigned long lunzerobits[],
  1534. int *nmsa2xxx_enclosures)
  1535. {
  1536. unsigned char scsi3addr[8];
  1537. if (test_bit(target, lunzerobits))
  1538. return 0; /* There is already a lun 0 on this target. */
  1539. if (!is_logical_dev_addr_mode(lunaddrbytes))
  1540. return 0; /* It's the logical targets that may lack lun 0. */
  1541. if (!is_msa2xxx(h, tmpdevice))
  1542. return 0; /* It's only the MSA2xxx that have this problem. */
  1543. if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
  1544. return 0;
  1545. memset(scsi3addr, 0, 8);
  1546. scsi3addr[3] = target;
  1547. if (is_hba_lunid(scsi3addr))
  1548. return 0; /* Don't add the RAID controller here. */
  1549. if (is_scsi_rev_5(h))
  1550. return 0; /* p1210m doesn't need to do this. */
  1551. if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
  1552. dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
  1553. "enclosures exceeded. Check your hardware "
  1554. "configuration.");
  1555. return 0;
  1556. }
  1557. if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
  1558. return 0;
  1559. (*nmsa2xxx_enclosures)++;
  1560. hpsa_set_bus_target_lun(this_device, bus, target, 0);
  1561. set_bit(target, lunzerobits);
  1562. return 1;
  1563. }
  1564. /*
  1565. * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
  1566. * logdev. The number of luns in physdev and logdev are returned in
  1567. * *nphysicals and *nlogicals, respectively.
  1568. * Returns 0 on success, -1 otherwise.
  1569. */
  1570. static int hpsa_gather_lun_info(struct ctlr_info *h,
  1571. int reportlunsize,
  1572. struct ReportLUNdata *physdev, u32 *nphysicals,
  1573. struct ReportLUNdata *logdev, u32 *nlogicals)
  1574. {
  1575. if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
  1576. dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
  1577. return -1;
  1578. }
  1579. *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
  1580. if (*nphysicals > HPSA_MAX_PHYS_LUN) {
  1581. dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
  1582. " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1583. *nphysicals - HPSA_MAX_PHYS_LUN);
  1584. *nphysicals = HPSA_MAX_PHYS_LUN;
  1585. }
  1586. if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
  1587. dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
  1588. return -1;
  1589. }
  1590. *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
  1591. /* Reject Logicals in excess of our max capability. */
  1592. if (*nlogicals > HPSA_MAX_LUN) {
  1593. dev_warn(&h->pdev->dev,
  1594. "maximum logical LUNs (%d) exceeded. "
  1595. "%d LUNs ignored.\n", HPSA_MAX_LUN,
  1596. *nlogicals - HPSA_MAX_LUN);
  1597. *nlogicals = HPSA_MAX_LUN;
  1598. }
  1599. if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
  1600. dev_warn(&h->pdev->dev,
  1601. "maximum logical + physical LUNs (%d) exceeded. "
  1602. "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1603. *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
  1604. *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
  1605. }
  1606. return 0;
  1607. }
  1608. u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
  1609. int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
  1610. struct ReportLUNdata *logdev_list)
  1611. {
  1612. /* Helper function, figure out where the LUN ID info is coming from
  1613. * given index i, lists of physical and logical devices, where in
  1614. * the list the raid controller is supposed to appear (first or last)
  1615. */
  1616. int logicals_start = nphysicals + (raid_ctlr_position == 0);
  1617. int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
  1618. if (i == raid_ctlr_position)
  1619. return RAID_CTLR_LUNID;
  1620. if (i < logicals_start)
  1621. return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
  1622. if (i < last_device)
  1623. return &logdev_list->LUN[i - nphysicals -
  1624. (raid_ctlr_position == 0)][0];
  1625. BUG();
  1626. return NULL;
  1627. }
  1628. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
  1629. {
  1630. /* the idea here is we could get notified
  1631. * that some devices have changed, so we do a report
  1632. * physical luns and report logical luns cmd, and adjust
  1633. * our list of devices accordingly.
  1634. *
  1635. * The scsi3addr's of devices won't change so long as the
  1636. * adapter is not reset. That means we can rescan and
  1637. * tell which devices we already know about, vs. new
  1638. * devices, vs. disappearing devices.
  1639. */
  1640. struct ReportLUNdata *physdev_list = NULL;
  1641. struct ReportLUNdata *logdev_list = NULL;
  1642. u32 nphysicals = 0;
  1643. u32 nlogicals = 0;
  1644. u32 ndev_allocated = 0;
  1645. struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
  1646. int ncurrent = 0;
  1647. int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
  1648. int i, nmsa2xxx_enclosures, ndevs_to_allocate;
  1649. int bus, target, lun;
  1650. int raid_ctlr_position;
  1651. DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
  1652. currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
  1653. physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1654. logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1655. tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
  1656. if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
  1657. dev_err(&h->pdev->dev, "out of memory\n");
  1658. goto out;
  1659. }
  1660. memset(lunzerobits, 0, sizeof(lunzerobits));
  1661. if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
  1662. logdev_list, &nlogicals))
  1663. goto out;
  1664. /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
  1665. * but each of them 4 times through different paths. The plus 1
  1666. * is for the RAID controller.
  1667. */
  1668. ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
  1669. /* Allocate the per device structures */
  1670. for (i = 0; i < ndevs_to_allocate; i++) {
  1671. if (i >= HPSA_MAX_DEVICES) {
  1672. dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
  1673. " %d devices ignored.\n", HPSA_MAX_DEVICES,
  1674. ndevs_to_allocate - HPSA_MAX_DEVICES);
  1675. break;
  1676. }
  1677. currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
  1678. if (!currentsd[i]) {
  1679. dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
  1680. __FILE__, __LINE__);
  1681. goto out;
  1682. }
  1683. ndev_allocated++;
  1684. }
  1685. if (unlikely(is_scsi_rev_5(h)))
  1686. raid_ctlr_position = 0;
  1687. else
  1688. raid_ctlr_position = nphysicals + nlogicals;
  1689. /* adjust our table of devices */
  1690. nmsa2xxx_enclosures = 0;
  1691. for (i = 0; i < nphysicals + nlogicals + 1; i++) {
  1692. u8 *lunaddrbytes, is_OBDR = 0;
  1693. /* Figure out where the LUN ID info is coming from */
  1694. lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
  1695. i, nphysicals, nlogicals, physdev_list, logdev_list);
  1696. /* skip masked physical devices. */
  1697. if (lunaddrbytes[3] & 0xC0 &&
  1698. i < nphysicals + (raid_ctlr_position == 0))
  1699. continue;
  1700. /* Get device type, vendor, model, device id */
  1701. if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
  1702. &is_OBDR))
  1703. continue; /* skip it if we can't talk to it. */
  1704. figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
  1705. tmpdevice);
  1706. this_device = currentsd[ncurrent];
  1707. /*
  1708. * For the msa2xxx boxes, we have to insert a LUN 0 which
  1709. * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
  1710. * is nonetheless an enclosure device there. We have to
  1711. * present that otherwise linux won't find anything if
  1712. * there is no lun 0.
  1713. */
  1714. if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
  1715. lunaddrbytes, bus, target, lun, lunzerobits,
  1716. &nmsa2xxx_enclosures)) {
  1717. ncurrent++;
  1718. this_device = currentsd[ncurrent];
  1719. }
  1720. *this_device = *tmpdevice;
  1721. hpsa_set_bus_target_lun(this_device, bus, target, lun);
  1722. switch (this_device->devtype) {
  1723. case TYPE_ROM:
  1724. /* We don't *really* support actual CD-ROM devices,
  1725. * just "One Button Disaster Recovery" tape drive
  1726. * which temporarily pretends to be a CD-ROM drive.
  1727. * So we check that the device is really an OBDR tape
  1728. * device by checking for "$DR-10" in bytes 43-48 of
  1729. * the inquiry data.
  1730. */
  1731. if (is_OBDR)
  1732. ncurrent++;
  1733. break;
  1734. case TYPE_DISK:
  1735. if (i < nphysicals)
  1736. break;
  1737. ncurrent++;
  1738. break;
  1739. case TYPE_TAPE:
  1740. case TYPE_MEDIUM_CHANGER:
  1741. ncurrent++;
  1742. break;
  1743. case TYPE_RAID:
  1744. /* Only present the Smartarray HBA as a RAID controller.
  1745. * If it's a RAID controller other than the HBA itself
  1746. * (an external RAID controller, MSA500 or similar)
  1747. * don't present it.
  1748. */
  1749. if (!is_hba_lunid(lunaddrbytes))
  1750. break;
  1751. ncurrent++;
  1752. break;
  1753. default:
  1754. break;
  1755. }
  1756. if (ncurrent >= HPSA_MAX_DEVICES)
  1757. break;
  1758. }
  1759. adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
  1760. out:
  1761. kfree(tmpdevice);
  1762. for (i = 0; i < ndev_allocated; i++)
  1763. kfree(currentsd[i]);
  1764. kfree(currentsd);
  1765. kfree(physdev_list);
  1766. kfree(logdev_list);
  1767. }
  1768. /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
  1769. * dma mapping and fills in the scatter gather entries of the
  1770. * hpsa command, cp.
  1771. */
  1772. static int hpsa_scatter_gather(struct ctlr_info *h,
  1773. struct CommandList *cp,
  1774. struct scsi_cmnd *cmd)
  1775. {
  1776. unsigned int len;
  1777. struct scatterlist *sg;
  1778. u64 addr64;
  1779. int use_sg, i, sg_index, chained;
  1780. struct SGDescriptor *curr_sg;
  1781. BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
  1782. use_sg = scsi_dma_map(cmd);
  1783. if (use_sg < 0)
  1784. return use_sg;
  1785. if (!use_sg)
  1786. goto sglist_finished;
  1787. curr_sg = cp->SG;
  1788. chained = 0;
  1789. sg_index = 0;
  1790. scsi_for_each_sg(cmd, sg, use_sg, i) {
  1791. if (i == h->max_cmd_sg_entries - 1 &&
  1792. use_sg > h->max_cmd_sg_entries) {
  1793. chained = 1;
  1794. curr_sg = h->cmd_sg_list[cp->cmdindex];
  1795. sg_index = 0;
  1796. }
  1797. addr64 = (u64) sg_dma_address(sg);
  1798. len = sg_dma_len(sg);
  1799. curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
  1800. curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
  1801. curr_sg->Len = len;
  1802. curr_sg->Ext = 0; /* we are not chaining */
  1803. curr_sg++;
  1804. }
  1805. if (use_sg + chained > h->maxSG)
  1806. h->maxSG = use_sg + chained;
  1807. if (chained) {
  1808. cp->Header.SGList = h->max_cmd_sg_entries;
  1809. cp->Header.SGTotal = (u16) (use_sg + 1);
  1810. hpsa_map_sg_chain_block(h, cp);
  1811. return 0;
  1812. }
  1813. sglist_finished:
  1814. cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
  1815. cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
  1816. return 0;
  1817. }
  1818. static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
  1819. void (*done)(struct scsi_cmnd *))
  1820. {
  1821. struct ctlr_info *h;
  1822. struct hpsa_scsi_dev_t *dev;
  1823. unsigned char scsi3addr[8];
  1824. struct CommandList *c;
  1825. unsigned long flags;
  1826. /* Get the ptr to our adapter structure out of cmd->host. */
  1827. h = sdev_to_hba(cmd->device);
  1828. dev = cmd->device->hostdata;
  1829. if (!dev) {
  1830. cmd->result = DID_NO_CONNECT << 16;
  1831. done(cmd);
  1832. return 0;
  1833. }
  1834. memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
  1835. /* Need a lock as this is being allocated from the pool */
  1836. spin_lock_irqsave(&h->lock, flags);
  1837. c = cmd_alloc(h);
  1838. spin_unlock_irqrestore(&h->lock, flags);
  1839. if (c == NULL) { /* trouble... */
  1840. dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
  1841. return SCSI_MLQUEUE_HOST_BUSY;
  1842. }
  1843. /* Fill in the command list header */
  1844. cmd->scsi_done = done; /* save this for use by completion code */
  1845. /* save c in case we have to abort it */
  1846. cmd->host_scribble = (unsigned char *) c;
  1847. c->cmd_type = CMD_SCSI;
  1848. c->scsi_cmd = cmd;
  1849. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1850. memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
  1851. c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
  1852. c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
  1853. /* Fill in the request block... */
  1854. c->Request.Timeout = 0;
  1855. memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
  1856. BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
  1857. c->Request.CDBLen = cmd->cmd_len;
  1858. memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
  1859. c->Request.Type.Type = TYPE_CMD;
  1860. c->Request.Type.Attribute = ATTR_SIMPLE;
  1861. switch (cmd->sc_data_direction) {
  1862. case DMA_TO_DEVICE:
  1863. c->Request.Type.Direction = XFER_WRITE;
  1864. break;
  1865. case DMA_FROM_DEVICE:
  1866. c->Request.Type.Direction = XFER_READ;
  1867. break;
  1868. case DMA_NONE:
  1869. c->Request.Type.Direction = XFER_NONE;
  1870. break;
  1871. case DMA_BIDIRECTIONAL:
  1872. /* This can happen if a buggy application does a scsi passthru
  1873. * and sets both inlen and outlen to non-zero. ( see
  1874. * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
  1875. */
  1876. c->Request.Type.Direction = XFER_RSVD;
  1877. /* This is technically wrong, and hpsa controllers should
  1878. * reject it with CMD_INVALID, which is the most correct
  1879. * response, but non-fibre backends appear to let it
  1880. * slide by, and give the same results as if this field
  1881. * were set correctly. Either way is acceptable for
  1882. * our purposes here.
  1883. */
  1884. break;
  1885. default:
  1886. dev_err(&h->pdev->dev, "unknown data direction: %d\n",
  1887. cmd->sc_data_direction);
  1888. BUG();
  1889. break;
  1890. }
  1891. if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
  1892. cmd_free(h, c);
  1893. return SCSI_MLQUEUE_HOST_BUSY;
  1894. }
  1895. enqueue_cmd_and_start_io(h, c);
  1896. /* the cmd'll come back via intr handler in complete_scsi_command() */
  1897. return 0;
  1898. }
  1899. static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
  1900. static void hpsa_scan_start(struct Scsi_Host *sh)
  1901. {
  1902. struct ctlr_info *h = shost_to_hba(sh);
  1903. unsigned long flags;
  1904. /* wait until any scan already in progress is finished. */
  1905. while (1) {
  1906. spin_lock_irqsave(&h->scan_lock, flags);
  1907. if (h->scan_finished)
  1908. break;
  1909. spin_unlock_irqrestore(&h->scan_lock, flags);
  1910. wait_event(h->scan_wait_queue, h->scan_finished);
  1911. /* Note: We don't need to worry about a race between this
  1912. * thread and driver unload because the midlayer will
  1913. * have incremented the reference count, so unload won't
  1914. * happen if we're in here.
  1915. */
  1916. }
  1917. h->scan_finished = 0; /* mark scan as in progress */
  1918. spin_unlock_irqrestore(&h->scan_lock, flags);
  1919. hpsa_update_scsi_devices(h, h->scsi_host->host_no);
  1920. spin_lock_irqsave(&h->scan_lock, flags);
  1921. h->scan_finished = 1; /* mark scan as finished. */
  1922. wake_up_all(&h->scan_wait_queue);
  1923. spin_unlock_irqrestore(&h->scan_lock, flags);
  1924. }
  1925. static int hpsa_scan_finished(struct Scsi_Host *sh,
  1926. unsigned long elapsed_time)
  1927. {
  1928. struct ctlr_info *h = shost_to_hba(sh);
  1929. unsigned long flags;
  1930. int finished;
  1931. spin_lock_irqsave(&h->scan_lock, flags);
  1932. finished = h->scan_finished;
  1933. spin_unlock_irqrestore(&h->scan_lock, flags);
  1934. return finished;
  1935. }
  1936. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  1937. int qdepth, int reason)
  1938. {
  1939. struct ctlr_info *h = sdev_to_hba(sdev);
  1940. if (reason != SCSI_QDEPTH_DEFAULT)
  1941. return -ENOTSUPP;
  1942. if (qdepth < 1)
  1943. qdepth = 1;
  1944. else
  1945. if (qdepth > h->nr_cmds)
  1946. qdepth = h->nr_cmds;
  1947. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  1948. return sdev->queue_depth;
  1949. }
  1950. static void hpsa_unregister_scsi(struct ctlr_info *h)
  1951. {
  1952. /* we are being forcibly unloaded, and may not refuse. */
  1953. scsi_remove_host(h->scsi_host);
  1954. scsi_host_put(h->scsi_host);
  1955. h->scsi_host = NULL;
  1956. }
  1957. static int hpsa_register_scsi(struct ctlr_info *h)
  1958. {
  1959. int rc;
  1960. rc = hpsa_scsi_detect(h);
  1961. if (rc != 0)
  1962. dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
  1963. " hpsa_scsi_detect(), rc is %d\n", rc);
  1964. return rc;
  1965. }
  1966. static int wait_for_device_to_become_ready(struct ctlr_info *h,
  1967. unsigned char lunaddr[])
  1968. {
  1969. int rc = 0;
  1970. int count = 0;
  1971. int waittime = 1; /* seconds */
  1972. struct CommandList *c;
  1973. c = cmd_special_alloc(h);
  1974. if (!c) {
  1975. dev_warn(&h->pdev->dev, "out of memory in "
  1976. "wait_for_device_to_become_ready.\n");
  1977. return IO_ERROR;
  1978. }
  1979. /* Send test unit ready until device ready, or give up. */
  1980. while (count < HPSA_TUR_RETRY_LIMIT) {
  1981. /* Wait for a bit. do this first, because if we send
  1982. * the TUR right away, the reset will just abort it.
  1983. */
  1984. msleep(1000 * waittime);
  1985. count++;
  1986. /* Increase wait time with each try, up to a point. */
  1987. if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
  1988. waittime = waittime * 2;
  1989. /* Send the Test Unit Ready */
  1990. fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
  1991. hpsa_scsi_do_simple_cmd_core(h, c);
  1992. /* no unmap needed here because no data xfer. */
  1993. if (c->err_info->CommandStatus == CMD_SUCCESS)
  1994. break;
  1995. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  1996. c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
  1997. (c->err_info->SenseInfo[2] == NO_SENSE ||
  1998. c->err_info->SenseInfo[2] == UNIT_ATTENTION))
  1999. break;
  2000. dev_warn(&h->pdev->dev, "waiting %d secs "
  2001. "for device to become ready.\n", waittime);
  2002. rc = 1; /* device not ready. */
  2003. }
  2004. if (rc)
  2005. dev_warn(&h->pdev->dev, "giving up on device.\n");
  2006. else
  2007. dev_warn(&h->pdev->dev, "device is ready.\n");
  2008. cmd_special_free(h, c);
  2009. return rc;
  2010. }
  2011. /* Need at least one of these error handlers to keep ../scsi/hosts.c from
  2012. * complaining. Doing a host- or bus-reset can't do anything good here.
  2013. */
  2014. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
  2015. {
  2016. int rc;
  2017. struct ctlr_info *h;
  2018. struct hpsa_scsi_dev_t *dev;
  2019. /* find the controller to which the command to be aborted was sent */
  2020. h = sdev_to_hba(scsicmd->device);
  2021. if (h == NULL) /* paranoia */
  2022. return FAILED;
  2023. dev = scsicmd->device->hostdata;
  2024. if (!dev) {
  2025. dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
  2026. "device lookup failed.\n");
  2027. return FAILED;
  2028. }
  2029. dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
  2030. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  2031. /* send a reset to the SCSI LUN which the command was sent to */
  2032. rc = hpsa_send_reset(h, dev->scsi3addr);
  2033. if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
  2034. return SUCCESS;
  2035. dev_warn(&h->pdev->dev, "resetting device failed.\n");
  2036. return FAILED;
  2037. }
  2038. /*
  2039. * For operations that cannot sleep, a command block is allocated at init,
  2040. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  2041. * which ones are free or in use. Lock must be held when calling this.
  2042. * cmd_free() is the complement.
  2043. */
  2044. static struct CommandList *cmd_alloc(struct ctlr_info *h)
  2045. {
  2046. struct CommandList *c;
  2047. int i;
  2048. union u64bit temp64;
  2049. dma_addr_t cmd_dma_handle, err_dma_handle;
  2050. do {
  2051. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  2052. if (i == h->nr_cmds)
  2053. return NULL;
  2054. } while (test_and_set_bit
  2055. (i & (BITS_PER_LONG - 1),
  2056. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  2057. c = h->cmd_pool + i;
  2058. memset(c, 0, sizeof(*c));
  2059. cmd_dma_handle = h->cmd_pool_dhandle
  2060. + i * sizeof(*c);
  2061. c->err_info = h->errinfo_pool + i;
  2062. memset(c->err_info, 0, sizeof(*c->err_info));
  2063. err_dma_handle = h->errinfo_pool_dhandle
  2064. + i * sizeof(*c->err_info);
  2065. h->nr_allocs++;
  2066. c->cmdindex = i;
  2067. INIT_LIST_HEAD(&c->list);
  2068. c->busaddr = (u32) cmd_dma_handle;
  2069. temp64.val = (u64) err_dma_handle;
  2070. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2071. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2072. c->ErrDesc.Len = sizeof(*c->err_info);
  2073. c->h = h;
  2074. return c;
  2075. }
  2076. /* For operations that can wait for kmalloc to possibly sleep,
  2077. * this routine can be called. Lock need not be held to call
  2078. * cmd_special_alloc. cmd_special_free() is the complement.
  2079. */
  2080. static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
  2081. {
  2082. struct CommandList *c;
  2083. union u64bit temp64;
  2084. dma_addr_t cmd_dma_handle, err_dma_handle;
  2085. c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
  2086. if (c == NULL)
  2087. return NULL;
  2088. memset(c, 0, sizeof(*c));
  2089. c->cmdindex = -1;
  2090. c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
  2091. &err_dma_handle);
  2092. if (c->err_info == NULL) {
  2093. pci_free_consistent(h->pdev,
  2094. sizeof(*c), c, cmd_dma_handle);
  2095. return NULL;
  2096. }
  2097. memset(c->err_info, 0, sizeof(*c->err_info));
  2098. INIT_LIST_HEAD(&c->list);
  2099. c->busaddr = (u32) cmd_dma_handle;
  2100. temp64.val = (u64) err_dma_handle;
  2101. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2102. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2103. c->ErrDesc.Len = sizeof(*c->err_info);
  2104. c->h = h;
  2105. return c;
  2106. }
  2107. static void cmd_free(struct ctlr_info *h, struct CommandList *c)
  2108. {
  2109. int i;
  2110. i = c - h->cmd_pool;
  2111. clear_bit(i & (BITS_PER_LONG - 1),
  2112. h->cmd_pool_bits + (i / BITS_PER_LONG));
  2113. h->nr_frees++;
  2114. }
  2115. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
  2116. {
  2117. union u64bit temp64;
  2118. temp64.val32.lower = c->ErrDesc.Addr.lower;
  2119. temp64.val32.upper = c->ErrDesc.Addr.upper;
  2120. pci_free_consistent(h->pdev, sizeof(*c->err_info),
  2121. c->err_info, (dma_addr_t) temp64.val);
  2122. pci_free_consistent(h->pdev, sizeof(*c),
  2123. c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
  2124. }
  2125. #ifdef CONFIG_COMPAT
  2126. static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
  2127. {
  2128. IOCTL32_Command_struct __user *arg32 =
  2129. (IOCTL32_Command_struct __user *) arg;
  2130. IOCTL_Command_struct arg64;
  2131. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  2132. int err;
  2133. u32 cp;
  2134. memset(&arg64, 0, sizeof(arg64));
  2135. err = 0;
  2136. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2137. sizeof(arg64.LUN_info));
  2138. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2139. sizeof(arg64.Request));
  2140. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2141. sizeof(arg64.error_info));
  2142. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2143. err |= get_user(cp, &arg32->buf);
  2144. arg64.buf = compat_ptr(cp);
  2145. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2146. if (err)
  2147. return -EFAULT;
  2148. err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
  2149. if (err)
  2150. return err;
  2151. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2152. sizeof(arg32->error_info));
  2153. if (err)
  2154. return -EFAULT;
  2155. return err;
  2156. }
  2157. static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
  2158. int cmd, void *arg)
  2159. {
  2160. BIG_IOCTL32_Command_struct __user *arg32 =
  2161. (BIG_IOCTL32_Command_struct __user *) arg;
  2162. BIG_IOCTL_Command_struct arg64;
  2163. BIG_IOCTL_Command_struct __user *p =
  2164. compat_alloc_user_space(sizeof(arg64));
  2165. int err;
  2166. u32 cp;
  2167. memset(&arg64, 0, sizeof(arg64));
  2168. err = 0;
  2169. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2170. sizeof(arg64.LUN_info));
  2171. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2172. sizeof(arg64.Request));
  2173. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2174. sizeof(arg64.error_info));
  2175. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2176. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  2177. err |= get_user(cp, &arg32->buf);
  2178. arg64.buf = compat_ptr(cp);
  2179. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2180. if (err)
  2181. return -EFAULT;
  2182. err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
  2183. if (err)
  2184. return err;
  2185. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2186. sizeof(arg32->error_info));
  2187. if (err)
  2188. return -EFAULT;
  2189. return err;
  2190. }
  2191. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2192. {
  2193. switch (cmd) {
  2194. case CCISS_GETPCIINFO:
  2195. case CCISS_GETINTINFO:
  2196. case CCISS_SETINTINFO:
  2197. case CCISS_GETNODENAME:
  2198. case CCISS_SETNODENAME:
  2199. case CCISS_GETHEARTBEAT:
  2200. case CCISS_GETBUSTYPES:
  2201. case CCISS_GETFIRMVER:
  2202. case CCISS_GETDRIVVER:
  2203. case CCISS_REVALIDVOLS:
  2204. case CCISS_DEREGDISK:
  2205. case CCISS_REGNEWDISK:
  2206. case CCISS_REGNEWD:
  2207. case CCISS_RESCANDISK:
  2208. case CCISS_GETLUNINFO:
  2209. return hpsa_ioctl(dev, cmd, arg);
  2210. case CCISS_PASSTHRU32:
  2211. return hpsa_ioctl32_passthru(dev, cmd, arg);
  2212. case CCISS_BIG_PASSTHRU32:
  2213. return hpsa_ioctl32_big_passthru(dev, cmd, arg);
  2214. default:
  2215. return -ENOIOCTLCMD;
  2216. }
  2217. }
  2218. #endif
  2219. static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
  2220. {
  2221. struct hpsa_pci_info pciinfo;
  2222. if (!argp)
  2223. return -EINVAL;
  2224. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  2225. pciinfo.bus = h->pdev->bus->number;
  2226. pciinfo.dev_fn = h->pdev->devfn;
  2227. pciinfo.board_id = h->board_id;
  2228. if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
  2229. return -EFAULT;
  2230. return 0;
  2231. }
  2232. static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
  2233. {
  2234. DriverVer_type DriverVer;
  2235. unsigned char vmaj, vmin, vsubmin;
  2236. int rc;
  2237. rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
  2238. &vmaj, &vmin, &vsubmin);
  2239. if (rc != 3) {
  2240. dev_info(&h->pdev->dev, "driver version string '%s' "
  2241. "unrecognized.", HPSA_DRIVER_VERSION);
  2242. vmaj = 0;
  2243. vmin = 0;
  2244. vsubmin = 0;
  2245. }
  2246. DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
  2247. if (!argp)
  2248. return -EINVAL;
  2249. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  2250. return -EFAULT;
  2251. return 0;
  2252. }
  2253. static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2254. {
  2255. IOCTL_Command_struct iocommand;
  2256. struct CommandList *c;
  2257. char *buff = NULL;
  2258. union u64bit temp64;
  2259. if (!argp)
  2260. return -EINVAL;
  2261. if (!capable(CAP_SYS_RAWIO))
  2262. return -EPERM;
  2263. if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
  2264. return -EFAULT;
  2265. if ((iocommand.buf_size < 1) &&
  2266. (iocommand.Request.Type.Direction != XFER_NONE)) {
  2267. return -EINVAL;
  2268. }
  2269. if (iocommand.buf_size > 0) {
  2270. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  2271. if (buff == NULL)
  2272. return -EFAULT;
  2273. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  2274. /* Copy the data into the buffer we created */
  2275. if (copy_from_user(buff, iocommand.buf,
  2276. iocommand.buf_size)) {
  2277. kfree(buff);
  2278. return -EFAULT;
  2279. }
  2280. } else {
  2281. memset(buff, 0, iocommand.buf_size);
  2282. }
  2283. }
  2284. c = cmd_special_alloc(h);
  2285. if (c == NULL) {
  2286. kfree(buff);
  2287. return -ENOMEM;
  2288. }
  2289. /* Fill in the command type */
  2290. c->cmd_type = CMD_IOCTL_PEND;
  2291. /* Fill in Command Header */
  2292. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2293. if (iocommand.buf_size > 0) { /* buffer to fill */
  2294. c->Header.SGList = 1;
  2295. c->Header.SGTotal = 1;
  2296. } else { /* no buffers to fill */
  2297. c->Header.SGList = 0;
  2298. c->Header.SGTotal = 0;
  2299. }
  2300. memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
  2301. /* use the kernel address the cmd block for tag */
  2302. c->Header.Tag.lower = c->busaddr;
  2303. /* Fill in Request block */
  2304. memcpy(&c->Request, &iocommand.Request,
  2305. sizeof(c->Request));
  2306. /* Fill in the scatter gather information */
  2307. if (iocommand.buf_size > 0) {
  2308. temp64.val = pci_map_single(h->pdev, buff,
  2309. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  2310. c->SG[0].Addr.lower = temp64.val32.lower;
  2311. c->SG[0].Addr.upper = temp64.val32.upper;
  2312. c->SG[0].Len = iocommand.buf_size;
  2313. c->SG[0].Ext = 0; /* we are not chaining*/
  2314. }
  2315. hpsa_scsi_do_simple_cmd_core(h, c);
  2316. if (iocommand.buf_size > 0)
  2317. hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
  2318. check_ioctl_unit_attention(h, c);
  2319. /* Copy the error information out */
  2320. memcpy(&iocommand.error_info, c->err_info,
  2321. sizeof(iocommand.error_info));
  2322. if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
  2323. kfree(buff);
  2324. cmd_special_free(h, c);
  2325. return -EFAULT;
  2326. }
  2327. if (iocommand.Request.Type.Direction == XFER_READ &&
  2328. iocommand.buf_size > 0) {
  2329. /* Copy the data out of the buffer we created */
  2330. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  2331. kfree(buff);
  2332. cmd_special_free(h, c);
  2333. return -EFAULT;
  2334. }
  2335. }
  2336. kfree(buff);
  2337. cmd_special_free(h, c);
  2338. return 0;
  2339. }
  2340. static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2341. {
  2342. BIG_IOCTL_Command_struct *ioc;
  2343. struct CommandList *c;
  2344. unsigned char **buff = NULL;
  2345. int *buff_size = NULL;
  2346. union u64bit temp64;
  2347. BYTE sg_used = 0;
  2348. int status = 0;
  2349. int i;
  2350. u32 left;
  2351. u32 sz;
  2352. BYTE __user *data_ptr;
  2353. if (!argp)
  2354. return -EINVAL;
  2355. if (!capable(CAP_SYS_RAWIO))
  2356. return -EPERM;
  2357. ioc = (BIG_IOCTL_Command_struct *)
  2358. kmalloc(sizeof(*ioc), GFP_KERNEL);
  2359. if (!ioc) {
  2360. status = -ENOMEM;
  2361. goto cleanup1;
  2362. }
  2363. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  2364. status = -EFAULT;
  2365. goto cleanup1;
  2366. }
  2367. if ((ioc->buf_size < 1) &&
  2368. (ioc->Request.Type.Direction != XFER_NONE)) {
  2369. status = -EINVAL;
  2370. goto cleanup1;
  2371. }
  2372. /* Check kmalloc limits using all SGs */
  2373. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  2374. status = -EINVAL;
  2375. goto cleanup1;
  2376. }
  2377. if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
  2378. status = -EINVAL;
  2379. goto cleanup1;
  2380. }
  2381. buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
  2382. if (!buff) {
  2383. status = -ENOMEM;
  2384. goto cleanup1;
  2385. }
  2386. buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
  2387. if (!buff_size) {
  2388. status = -ENOMEM;
  2389. goto cleanup1;
  2390. }
  2391. left = ioc->buf_size;
  2392. data_ptr = ioc->buf;
  2393. while (left) {
  2394. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  2395. buff_size[sg_used] = sz;
  2396. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  2397. if (buff[sg_used] == NULL) {
  2398. status = -ENOMEM;
  2399. goto cleanup1;
  2400. }
  2401. if (ioc->Request.Type.Direction == XFER_WRITE) {
  2402. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  2403. status = -ENOMEM;
  2404. goto cleanup1;
  2405. }
  2406. } else
  2407. memset(buff[sg_used], 0, sz);
  2408. left -= sz;
  2409. data_ptr += sz;
  2410. sg_used++;
  2411. }
  2412. c = cmd_special_alloc(h);
  2413. if (c == NULL) {
  2414. status = -ENOMEM;
  2415. goto cleanup1;
  2416. }
  2417. c->cmd_type = CMD_IOCTL_PEND;
  2418. c->Header.ReplyQueue = 0;
  2419. c->Header.SGList = c->Header.SGTotal = sg_used;
  2420. memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
  2421. c->Header.Tag.lower = c->busaddr;
  2422. memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
  2423. if (ioc->buf_size > 0) {
  2424. int i;
  2425. for (i = 0; i < sg_used; i++) {
  2426. temp64.val = pci_map_single(h->pdev, buff[i],
  2427. buff_size[i], PCI_DMA_BIDIRECTIONAL);
  2428. c->SG[i].Addr.lower = temp64.val32.lower;
  2429. c->SG[i].Addr.upper = temp64.val32.upper;
  2430. c->SG[i].Len = buff_size[i];
  2431. /* we are not chaining */
  2432. c->SG[i].Ext = 0;
  2433. }
  2434. }
  2435. hpsa_scsi_do_simple_cmd_core(h, c);
  2436. if (sg_used)
  2437. hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
  2438. check_ioctl_unit_attention(h, c);
  2439. /* Copy the error information out */
  2440. memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
  2441. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  2442. cmd_special_free(h, c);
  2443. status = -EFAULT;
  2444. goto cleanup1;
  2445. }
  2446. if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
  2447. /* Copy the data out of the buffer we created */
  2448. BYTE __user *ptr = ioc->buf;
  2449. for (i = 0; i < sg_used; i++) {
  2450. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  2451. cmd_special_free(h, c);
  2452. status = -EFAULT;
  2453. goto cleanup1;
  2454. }
  2455. ptr += buff_size[i];
  2456. }
  2457. }
  2458. cmd_special_free(h, c);
  2459. status = 0;
  2460. cleanup1:
  2461. if (buff) {
  2462. for (i = 0; i < sg_used; i++)
  2463. kfree(buff[i]);
  2464. kfree(buff);
  2465. }
  2466. kfree(buff_size);
  2467. kfree(ioc);
  2468. return status;
  2469. }
  2470. static void check_ioctl_unit_attention(struct ctlr_info *h,
  2471. struct CommandList *c)
  2472. {
  2473. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2474. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  2475. (void) check_for_unit_attention(h, c);
  2476. }
  2477. /*
  2478. * ioctl
  2479. */
  2480. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2481. {
  2482. struct ctlr_info *h;
  2483. void __user *argp = (void __user *)arg;
  2484. h = sdev_to_hba(dev);
  2485. switch (cmd) {
  2486. case CCISS_DEREGDISK:
  2487. case CCISS_REGNEWDISK:
  2488. case CCISS_REGNEWD:
  2489. hpsa_scan_start(h->scsi_host);
  2490. return 0;
  2491. case CCISS_GETPCIINFO:
  2492. return hpsa_getpciinfo_ioctl(h, argp);
  2493. case CCISS_GETDRIVVER:
  2494. return hpsa_getdrivver_ioctl(h, argp);
  2495. case CCISS_PASSTHRU:
  2496. return hpsa_passthru_ioctl(h, argp);
  2497. case CCISS_BIG_PASSTHRU:
  2498. return hpsa_big_passthru_ioctl(h, argp);
  2499. default:
  2500. return -ENOTTY;
  2501. }
  2502. }
  2503. static int __devinit hpsa_send_host_reset(struct ctlr_info *h,
  2504. unsigned char *scsi3addr, u8 reset_type)
  2505. {
  2506. struct CommandList *c;
  2507. c = cmd_alloc(h);
  2508. if (!c)
  2509. return -ENOMEM;
  2510. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
  2511. RAID_CTLR_LUNID, TYPE_MSG);
  2512. c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
  2513. c->waiting = NULL;
  2514. enqueue_cmd_and_start_io(h, c);
  2515. /* Don't wait for completion, the reset won't complete. Don't free
  2516. * the command either. This is the last command we will send before
  2517. * re-initializing everything, so it doesn't matter and won't leak.
  2518. */
  2519. return 0;
  2520. }
  2521. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  2522. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  2523. int cmd_type)
  2524. {
  2525. int pci_dir = XFER_NONE;
  2526. c->cmd_type = CMD_IOCTL_PEND;
  2527. c->Header.ReplyQueue = 0;
  2528. if (buff != NULL && size > 0) {
  2529. c->Header.SGList = 1;
  2530. c->Header.SGTotal = 1;
  2531. } else {
  2532. c->Header.SGList = 0;
  2533. c->Header.SGTotal = 0;
  2534. }
  2535. c->Header.Tag.lower = c->busaddr;
  2536. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2537. c->Request.Type.Type = cmd_type;
  2538. if (cmd_type == TYPE_CMD) {
  2539. switch (cmd) {
  2540. case HPSA_INQUIRY:
  2541. /* are we trying to read a vital product page */
  2542. if (page_code != 0) {
  2543. c->Request.CDB[1] = 0x01;
  2544. c->Request.CDB[2] = page_code;
  2545. }
  2546. c->Request.CDBLen = 6;
  2547. c->Request.Type.Attribute = ATTR_SIMPLE;
  2548. c->Request.Type.Direction = XFER_READ;
  2549. c->Request.Timeout = 0;
  2550. c->Request.CDB[0] = HPSA_INQUIRY;
  2551. c->Request.CDB[4] = size & 0xFF;
  2552. break;
  2553. case HPSA_REPORT_LOG:
  2554. case HPSA_REPORT_PHYS:
  2555. /* Talking to controller so It's a physical command
  2556. mode = 00 target = 0. Nothing to write.
  2557. */
  2558. c->Request.CDBLen = 12;
  2559. c->Request.Type.Attribute = ATTR_SIMPLE;
  2560. c->Request.Type.Direction = XFER_READ;
  2561. c->Request.Timeout = 0;
  2562. c->Request.CDB[0] = cmd;
  2563. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2564. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2565. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2566. c->Request.CDB[9] = size & 0xFF;
  2567. break;
  2568. case HPSA_CACHE_FLUSH:
  2569. c->Request.CDBLen = 12;
  2570. c->Request.Type.Attribute = ATTR_SIMPLE;
  2571. c->Request.Type.Direction = XFER_WRITE;
  2572. c->Request.Timeout = 0;
  2573. c->Request.CDB[0] = BMIC_WRITE;
  2574. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2575. break;
  2576. case TEST_UNIT_READY:
  2577. c->Request.CDBLen = 6;
  2578. c->Request.Type.Attribute = ATTR_SIMPLE;
  2579. c->Request.Type.Direction = XFER_NONE;
  2580. c->Request.Timeout = 0;
  2581. break;
  2582. default:
  2583. dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
  2584. BUG();
  2585. return;
  2586. }
  2587. } else if (cmd_type == TYPE_MSG) {
  2588. switch (cmd) {
  2589. case HPSA_DEVICE_RESET_MSG:
  2590. c->Request.CDBLen = 16;
  2591. c->Request.Type.Type = 1; /* It is a MSG not a CMD */
  2592. c->Request.Type.Attribute = ATTR_SIMPLE;
  2593. c->Request.Type.Direction = XFER_NONE;
  2594. c->Request.Timeout = 0; /* Don't time out */
  2595. memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
  2596. c->Request.CDB[0] = cmd;
  2597. c->Request.CDB[1] = 0x03; /* Reset target above */
  2598. /* If bytes 4-7 are zero, it means reset the */
  2599. /* LunID device */
  2600. c->Request.CDB[4] = 0x00;
  2601. c->Request.CDB[5] = 0x00;
  2602. c->Request.CDB[6] = 0x00;
  2603. c->Request.CDB[7] = 0x00;
  2604. break;
  2605. default:
  2606. dev_warn(&h->pdev->dev, "unknown message type %d\n",
  2607. cmd);
  2608. BUG();
  2609. }
  2610. } else {
  2611. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2612. BUG();
  2613. }
  2614. switch (c->Request.Type.Direction) {
  2615. case XFER_READ:
  2616. pci_dir = PCI_DMA_FROMDEVICE;
  2617. break;
  2618. case XFER_WRITE:
  2619. pci_dir = PCI_DMA_TODEVICE;
  2620. break;
  2621. case XFER_NONE:
  2622. pci_dir = PCI_DMA_NONE;
  2623. break;
  2624. default:
  2625. pci_dir = PCI_DMA_BIDIRECTIONAL;
  2626. }
  2627. hpsa_map_one(h->pdev, c, buff, size, pci_dir);
  2628. return;
  2629. }
  2630. /*
  2631. * Map (physical) PCI mem into (virtual) kernel space
  2632. */
  2633. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2634. {
  2635. ulong page_base = ((ulong) base) & PAGE_MASK;
  2636. ulong page_offs = ((ulong) base) - page_base;
  2637. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2638. return page_remapped ? (page_remapped + page_offs) : NULL;
  2639. }
  2640. /* Takes cmds off the submission queue and sends them to the hardware,
  2641. * then puts them on the queue of cmds waiting for completion.
  2642. */
  2643. static void start_io(struct ctlr_info *h)
  2644. {
  2645. struct CommandList *c;
  2646. while (!list_empty(&h->reqQ)) {
  2647. c = list_entry(h->reqQ.next, struct CommandList, list);
  2648. /* can't do anything if fifo is full */
  2649. if ((h->access.fifo_full(h))) {
  2650. dev_warn(&h->pdev->dev, "fifo full\n");
  2651. break;
  2652. }
  2653. /* Get the first entry from the Request Q */
  2654. removeQ(c);
  2655. h->Qdepth--;
  2656. /* Tell the controller execute command */
  2657. h->access.submit_command(h, c);
  2658. /* Put job onto the completed Q */
  2659. addQ(&h->cmpQ, c);
  2660. }
  2661. }
  2662. static inline unsigned long get_next_completion(struct ctlr_info *h)
  2663. {
  2664. return h->access.command_completed(h);
  2665. }
  2666. static inline bool interrupt_pending(struct ctlr_info *h)
  2667. {
  2668. return h->access.intr_pending(h);
  2669. }
  2670. static inline long interrupt_not_for_us(struct ctlr_info *h)
  2671. {
  2672. return (h->access.intr_pending(h) == 0) ||
  2673. (h->interrupts_enabled == 0);
  2674. }
  2675. static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
  2676. u32 raw_tag)
  2677. {
  2678. if (unlikely(tag_index >= h->nr_cmds)) {
  2679. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  2680. return 1;
  2681. }
  2682. return 0;
  2683. }
  2684. static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
  2685. {
  2686. removeQ(c);
  2687. if (likely(c->cmd_type == CMD_SCSI))
  2688. complete_scsi_command(c);
  2689. else if (c->cmd_type == CMD_IOCTL_PEND)
  2690. complete(c->waiting);
  2691. }
  2692. static inline u32 hpsa_tag_contains_index(u32 tag)
  2693. {
  2694. return tag & DIRECT_LOOKUP_BIT;
  2695. }
  2696. static inline u32 hpsa_tag_to_index(u32 tag)
  2697. {
  2698. return tag >> DIRECT_LOOKUP_SHIFT;
  2699. }
  2700. static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
  2701. {
  2702. #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
  2703. #define HPSA_SIMPLE_ERROR_BITS 0x03
  2704. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  2705. return tag & ~HPSA_SIMPLE_ERROR_BITS;
  2706. return tag & ~HPSA_PERF_ERROR_BITS;
  2707. }
  2708. /* process completion of an indexed ("direct lookup") command */
  2709. static inline u32 process_indexed_cmd(struct ctlr_info *h,
  2710. u32 raw_tag)
  2711. {
  2712. u32 tag_index;
  2713. struct CommandList *c;
  2714. tag_index = hpsa_tag_to_index(raw_tag);
  2715. if (bad_tag(h, tag_index, raw_tag))
  2716. return next_command(h);
  2717. c = h->cmd_pool + tag_index;
  2718. finish_cmd(c, raw_tag);
  2719. return next_command(h);
  2720. }
  2721. /* process completion of a non-indexed command */
  2722. static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
  2723. u32 raw_tag)
  2724. {
  2725. u32 tag;
  2726. struct CommandList *c = NULL;
  2727. tag = hpsa_tag_discard_error_bits(h, raw_tag);
  2728. list_for_each_entry(c, &h->cmpQ, list) {
  2729. if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
  2730. finish_cmd(c, raw_tag);
  2731. return next_command(h);
  2732. }
  2733. }
  2734. bad_tag(h, h->nr_cmds + 1, raw_tag);
  2735. return next_command(h);
  2736. }
  2737. /* Some controllers, like p400, will give us one interrupt
  2738. * after a soft reset, even if we turned interrupts off.
  2739. * Only need to check for this in the hpsa_xxx_discard_completions
  2740. * functions.
  2741. */
  2742. static int ignore_bogus_interrupt(struct ctlr_info *h)
  2743. {
  2744. if (likely(!reset_devices))
  2745. return 0;
  2746. if (likely(h->interrupts_enabled))
  2747. return 0;
  2748. dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
  2749. "(known firmware bug.) Ignoring.\n");
  2750. return 1;
  2751. }
  2752. static irqreturn_t hpsa_intx_discard_completions(int irq, void *dev_id)
  2753. {
  2754. struct ctlr_info *h = dev_id;
  2755. unsigned long flags;
  2756. u32 raw_tag;
  2757. if (ignore_bogus_interrupt(h))
  2758. return IRQ_NONE;
  2759. if (interrupt_not_for_us(h))
  2760. return IRQ_NONE;
  2761. spin_lock_irqsave(&h->lock, flags);
  2762. while (interrupt_pending(h)) {
  2763. raw_tag = get_next_completion(h);
  2764. while (raw_tag != FIFO_EMPTY)
  2765. raw_tag = next_command(h);
  2766. }
  2767. spin_unlock_irqrestore(&h->lock, flags);
  2768. return IRQ_HANDLED;
  2769. }
  2770. static irqreturn_t hpsa_msix_discard_completions(int irq, void *dev_id)
  2771. {
  2772. struct ctlr_info *h = dev_id;
  2773. unsigned long flags;
  2774. u32 raw_tag;
  2775. if (ignore_bogus_interrupt(h))
  2776. return IRQ_NONE;
  2777. spin_lock_irqsave(&h->lock, flags);
  2778. raw_tag = get_next_completion(h);
  2779. while (raw_tag != FIFO_EMPTY)
  2780. raw_tag = next_command(h);
  2781. spin_unlock_irqrestore(&h->lock, flags);
  2782. return IRQ_HANDLED;
  2783. }
  2784. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
  2785. {
  2786. struct ctlr_info *h = dev_id;
  2787. unsigned long flags;
  2788. u32 raw_tag;
  2789. if (interrupt_not_for_us(h))
  2790. return IRQ_NONE;
  2791. spin_lock_irqsave(&h->lock, flags);
  2792. while (interrupt_pending(h)) {
  2793. raw_tag = get_next_completion(h);
  2794. while (raw_tag != FIFO_EMPTY) {
  2795. if (hpsa_tag_contains_index(raw_tag))
  2796. raw_tag = process_indexed_cmd(h, raw_tag);
  2797. else
  2798. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2799. }
  2800. }
  2801. spin_unlock_irqrestore(&h->lock, flags);
  2802. return IRQ_HANDLED;
  2803. }
  2804. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
  2805. {
  2806. struct ctlr_info *h = dev_id;
  2807. unsigned long flags;
  2808. u32 raw_tag;
  2809. spin_lock_irqsave(&h->lock, flags);
  2810. raw_tag = get_next_completion(h);
  2811. while (raw_tag != FIFO_EMPTY) {
  2812. if (hpsa_tag_contains_index(raw_tag))
  2813. raw_tag = process_indexed_cmd(h, raw_tag);
  2814. else
  2815. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2816. }
  2817. spin_unlock_irqrestore(&h->lock, flags);
  2818. return IRQ_HANDLED;
  2819. }
  2820. /* Send a message CDB to the firmware. Careful, this only works
  2821. * in simple mode, not performant mode due to the tag lookup.
  2822. * We only ever use this immediately after a controller reset.
  2823. */
  2824. static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
  2825. unsigned char type)
  2826. {
  2827. struct Command {
  2828. struct CommandListHeader CommandHeader;
  2829. struct RequestBlock Request;
  2830. struct ErrDescriptor ErrorDescriptor;
  2831. };
  2832. struct Command *cmd;
  2833. static const size_t cmd_sz = sizeof(*cmd) +
  2834. sizeof(cmd->ErrorDescriptor);
  2835. dma_addr_t paddr64;
  2836. uint32_t paddr32, tag;
  2837. void __iomem *vaddr;
  2838. int i, err;
  2839. vaddr = pci_ioremap_bar(pdev, 0);
  2840. if (vaddr == NULL)
  2841. return -ENOMEM;
  2842. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  2843. * CCISS commands, so they must be allocated from the lower 4GiB of
  2844. * memory.
  2845. */
  2846. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  2847. if (err) {
  2848. iounmap(vaddr);
  2849. return -ENOMEM;
  2850. }
  2851. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  2852. if (cmd == NULL) {
  2853. iounmap(vaddr);
  2854. return -ENOMEM;
  2855. }
  2856. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  2857. * although there's no guarantee, we assume that the address is at
  2858. * least 4-byte aligned (most likely, it's page-aligned).
  2859. */
  2860. paddr32 = paddr64;
  2861. cmd->CommandHeader.ReplyQueue = 0;
  2862. cmd->CommandHeader.SGList = 0;
  2863. cmd->CommandHeader.SGTotal = 0;
  2864. cmd->CommandHeader.Tag.lower = paddr32;
  2865. cmd->CommandHeader.Tag.upper = 0;
  2866. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  2867. cmd->Request.CDBLen = 16;
  2868. cmd->Request.Type.Type = TYPE_MSG;
  2869. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  2870. cmd->Request.Type.Direction = XFER_NONE;
  2871. cmd->Request.Timeout = 0; /* Don't time out */
  2872. cmd->Request.CDB[0] = opcode;
  2873. cmd->Request.CDB[1] = type;
  2874. memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
  2875. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
  2876. cmd->ErrorDescriptor.Addr.upper = 0;
  2877. cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
  2878. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  2879. for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
  2880. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  2881. if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
  2882. break;
  2883. msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
  2884. }
  2885. iounmap(vaddr);
  2886. /* we leak the DMA buffer here ... no choice since the controller could
  2887. * still complete the command.
  2888. */
  2889. if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
  2890. dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
  2891. opcode, type);
  2892. return -ETIMEDOUT;
  2893. }
  2894. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  2895. if (tag & HPSA_ERROR_BIT) {
  2896. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  2897. opcode, type);
  2898. return -EIO;
  2899. }
  2900. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  2901. opcode, type);
  2902. return 0;
  2903. }
  2904. #define hpsa_noop(p) hpsa_message(p, 3, 0)
  2905. static int hpsa_controller_hard_reset(struct pci_dev *pdev,
  2906. void * __iomem vaddr, u32 use_doorbell)
  2907. {
  2908. u16 pmcsr;
  2909. int pos;
  2910. if (use_doorbell) {
  2911. /* For everything after the P600, the PCI power state method
  2912. * of resetting the controller doesn't work, so we have this
  2913. * other way using the doorbell register.
  2914. */
  2915. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  2916. writel(use_doorbell, vaddr + SA5_DOORBELL);
  2917. } else { /* Try to do it the PCI power state way */
  2918. /* Quoting from the Open CISS Specification: "The Power
  2919. * Management Control/Status Register (CSR) controls the power
  2920. * state of the device. The normal operating state is D0,
  2921. * CSR=00h. The software off state is D3, CSR=03h. To reset
  2922. * the controller, place the interface device in D3 then to D0,
  2923. * this causes a secondary PCI reset which will reset the
  2924. * controller." */
  2925. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  2926. if (pos == 0) {
  2927. dev_err(&pdev->dev,
  2928. "hpsa_reset_controller: "
  2929. "PCI PM not supported\n");
  2930. return -ENODEV;
  2931. }
  2932. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  2933. /* enter the D3hot power management state */
  2934. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  2935. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2936. pmcsr |= PCI_D3hot;
  2937. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2938. msleep(500);
  2939. /* enter the D0 power management state */
  2940. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2941. pmcsr |= PCI_D0;
  2942. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2943. }
  2944. return 0;
  2945. }
  2946. static __devinit void init_driver_version(char *driver_version, int len)
  2947. {
  2948. memset(driver_version, 0, len);
  2949. strncpy(driver_version, "hpsa " HPSA_DRIVER_VERSION, len - 1);
  2950. }
  2951. static __devinit int write_driver_ver_to_cfgtable(
  2952. struct CfgTable __iomem *cfgtable)
  2953. {
  2954. char *driver_version;
  2955. int i, size = sizeof(cfgtable->driver_version);
  2956. driver_version = kmalloc(size, GFP_KERNEL);
  2957. if (!driver_version)
  2958. return -ENOMEM;
  2959. init_driver_version(driver_version, size);
  2960. for (i = 0; i < size; i++)
  2961. writeb(driver_version[i], &cfgtable->driver_version[i]);
  2962. kfree(driver_version);
  2963. return 0;
  2964. }
  2965. static __devinit void read_driver_ver_from_cfgtable(
  2966. struct CfgTable __iomem *cfgtable, unsigned char *driver_ver)
  2967. {
  2968. int i;
  2969. for (i = 0; i < sizeof(cfgtable->driver_version); i++)
  2970. driver_ver[i] = readb(&cfgtable->driver_version[i]);
  2971. }
  2972. static __devinit int controller_reset_failed(
  2973. struct CfgTable __iomem *cfgtable)
  2974. {
  2975. char *driver_ver, *old_driver_ver;
  2976. int rc, size = sizeof(cfgtable->driver_version);
  2977. old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
  2978. if (!old_driver_ver)
  2979. return -ENOMEM;
  2980. driver_ver = old_driver_ver + size;
  2981. /* After a reset, the 32 bytes of "driver version" in the cfgtable
  2982. * should have been changed, otherwise we know the reset failed.
  2983. */
  2984. init_driver_version(old_driver_ver, size);
  2985. read_driver_ver_from_cfgtable(cfgtable, driver_ver);
  2986. rc = !memcmp(driver_ver, old_driver_ver, size);
  2987. kfree(old_driver_ver);
  2988. return rc;
  2989. }
  2990. /* This does a hard reset of the controller using PCI power management
  2991. * states or the using the doorbell register.
  2992. */
  2993. static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
  2994. {
  2995. u64 cfg_offset;
  2996. u32 cfg_base_addr;
  2997. u64 cfg_base_addr_index;
  2998. void __iomem *vaddr;
  2999. unsigned long paddr;
  3000. u32 misc_fw_support;
  3001. int rc;
  3002. struct CfgTable __iomem *cfgtable;
  3003. u32 use_doorbell;
  3004. u32 board_id;
  3005. u16 command_register;
  3006. /* For controllers as old as the P600, this is very nearly
  3007. * the same thing as
  3008. *
  3009. * pci_save_state(pci_dev);
  3010. * pci_set_power_state(pci_dev, PCI_D3hot);
  3011. * pci_set_power_state(pci_dev, PCI_D0);
  3012. * pci_restore_state(pci_dev);
  3013. *
  3014. * For controllers newer than the P600, the pci power state
  3015. * method of resetting doesn't work so we have another way
  3016. * using the doorbell register.
  3017. */
  3018. rc = hpsa_lookup_board_id(pdev, &board_id);
  3019. if (rc < 0 || !ctlr_is_resettable(board_id)) {
  3020. dev_warn(&pdev->dev, "Not resetting device.\n");
  3021. return -ENODEV;
  3022. }
  3023. /* if controller is soft- but not hard resettable... */
  3024. if (!ctlr_is_hard_resettable(board_id))
  3025. return -ENOTSUPP; /* try soft reset later. */
  3026. /* Save the PCI command register */
  3027. pci_read_config_word(pdev, 4, &command_register);
  3028. /* Turn the board off. This is so that later pci_restore_state()
  3029. * won't turn the board on before the rest of config space is ready.
  3030. */
  3031. pci_disable_device(pdev);
  3032. pci_save_state(pdev);
  3033. /* find the first memory BAR, so we can find the cfg table */
  3034. rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
  3035. if (rc)
  3036. return rc;
  3037. vaddr = remap_pci_mem(paddr, 0x250);
  3038. if (!vaddr)
  3039. return -ENOMEM;
  3040. /* find cfgtable in order to check if reset via doorbell is supported */
  3041. rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  3042. &cfg_base_addr_index, &cfg_offset);
  3043. if (rc)
  3044. goto unmap_vaddr;
  3045. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  3046. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  3047. if (!cfgtable) {
  3048. rc = -ENOMEM;
  3049. goto unmap_vaddr;
  3050. }
  3051. rc = write_driver_ver_to_cfgtable(cfgtable);
  3052. if (rc)
  3053. goto unmap_vaddr;
  3054. /* If reset via doorbell register is supported, use that.
  3055. * There are two such methods. Favor the newest method.
  3056. */
  3057. misc_fw_support = readl(&cfgtable->misc_fw_support);
  3058. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
  3059. if (use_doorbell) {
  3060. use_doorbell = DOORBELL_CTLR_RESET2;
  3061. } else {
  3062. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  3063. if (use_doorbell) {
  3064. dev_warn(&pdev->dev, "Soft reset not supported. "
  3065. "Firmware update is required.\n");
  3066. rc = -ENOTSUPP; /* try soft reset */
  3067. goto unmap_cfgtable;
  3068. }
  3069. }
  3070. rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
  3071. if (rc)
  3072. goto unmap_cfgtable;
  3073. pci_restore_state(pdev);
  3074. rc = pci_enable_device(pdev);
  3075. if (rc) {
  3076. dev_warn(&pdev->dev, "failed to enable device.\n");
  3077. goto unmap_cfgtable;
  3078. }
  3079. pci_write_config_word(pdev, 4, command_register);
  3080. /* Some devices (notably the HP Smart Array 5i Controller)
  3081. need a little pause here */
  3082. msleep(HPSA_POST_RESET_PAUSE_MSECS);
  3083. /* Wait for board to become not ready, then ready. */
  3084. dev_info(&pdev->dev, "Waiting for board to reset.\n");
  3085. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
  3086. if (rc) {
  3087. dev_warn(&pdev->dev,
  3088. "failed waiting for board to reset."
  3089. " Will try soft reset.\n");
  3090. rc = -ENOTSUPP; /* Not expected, but try soft reset later */
  3091. goto unmap_cfgtable;
  3092. }
  3093. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
  3094. if (rc) {
  3095. dev_warn(&pdev->dev,
  3096. "failed waiting for board to become ready "
  3097. "after hard reset\n");
  3098. goto unmap_cfgtable;
  3099. }
  3100. rc = controller_reset_failed(vaddr);
  3101. if (rc < 0)
  3102. goto unmap_cfgtable;
  3103. if (rc) {
  3104. dev_warn(&pdev->dev, "Unable to successfully reset "
  3105. "controller. Will try soft reset.\n");
  3106. rc = -ENOTSUPP;
  3107. } else {
  3108. dev_info(&pdev->dev, "board ready after hard reset.\n");
  3109. }
  3110. unmap_cfgtable:
  3111. iounmap(cfgtable);
  3112. unmap_vaddr:
  3113. iounmap(vaddr);
  3114. return rc;
  3115. }
  3116. /*
  3117. * We cannot read the structure directly, for portability we must use
  3118. * the io functions.
  3119. * This is for debug only.
  3120. */
  3121. static void print_cfg_table(struct device *dev, struct CfgTable *tb)
  3122. {
  3123. #ifdef HPSA_DEBUG
  3124. int i;
  3125. char temp_name[17];
  3126. dev_info(dev, "Controller Configuration information\n");
  3127. dev_info(dev, "------------------------------------\n");
  3128. for (i = 0; i < 4; i++)
  3129. temp_name[i] = readb(&(tb->Signature[i]));
  3130. temp_name[4] = '\0';
  3131. dev_info(dev, " Signature = %s\n", temp_name);
  3132. dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
  3133. dev_info(dev, " Transport methods supported = 0x%x\n",
  3134. readl(&(tb->TransportSupport)));
  3135. dev_info(dev, " Transport methods active = 0x%x\n",
  3136. readl(&(tb->TransportActive)));
  3137. dev_info(dev, " Requested transport Method = 0x%x\n",
  3138. readl(&(tb->HostWrite.TransportRequest)));
  3139. dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
  3140. readl(&(tb->HostWrite.CoalIntDelay)));
  3141. dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
  3142. readl(&(tb->HostWrite.CoalIntCount)));
  3143. dev_info(dev, " Max outstanding commands = 0x%d\n",
  3144. readl(&(tb->CmdsOutMax)));
  3145. dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  3146. for (i = 0; i < 16; i++)
  3147. temp_name[i] = readb(&(tb->ServerName[i]));
  3148. temp_name[16] = '\0';
  3149. dev_info(dev, " Server Name = %s\n", temp_name);
  3150. dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
  3151. readl(&(tb->HeartBeat)));
  3152. #endif /* HPSA_DEBUG */
  3153. }
  3154. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  3155. {
  3156. int i, offset, mem_type, bar_type;
  3157. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  3158. return 0;
  3159. offset = 0;
  3160. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  3161. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  3162. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  3163. offset += 4;
  3164. else {
  3165. mem_type = pci_resource_flags(pdev, i) &
  3166. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  3167. switch (mem_type) {
  3168. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  3169. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  3170. offset += 4; /* 32 bit */
  3171. break;
  3172. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  3173. offset += 8;
  3174. break;
  3175. default: /* reserved in PCI 2.2 */
  3176. dev_warn(&pdev->dev,
  3177. "base address is invalid\n");
  3178. return -1;
  3179. break;
  3180. }
  3181. }
  3182. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  3183. return i + 1;
  3184. }
  3185. return -1;
  3186. }
  3187. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  3188. * controllers that are capable. If not, we use IO-APIC mode.
  3189. */
  3190. static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
  3191. {
  3192. #ifdef CONFIG_PCI_MSI
  3193. int err;
  3194. struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
  3195. {0, 2}, {0, 3}
  3196. };
  3197. /* Some boards advertise MSI but don't really support it */
  3198. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  3199. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  3200. goto default_int_mode;
  3201. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  3202. dev_info(&h->pdev->dev, "MSIX\n");
  3203. err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
  3204. if (!err) {
  3205. h->intr[0] = hpsa_msix_entries[0].vector;
  3206. h->intr[1] = hpsa_msix_entries[1].vector;
  3207. h->intr[2] = hpsa_msix_entries[2].vector;
  3208. h->intr[3] = hpsa_msix_entries[3].vector;
  3209. h->msix_vector = 1;
  3210. return;
  3211. }
  3212. if (err > 0) {
  3213. dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
  3214. "available\n", err);
  3215. goto default_int_mode;
  3216. } else {
  3217. dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
  3218. err);
  3219. goto default_int_mode;
  3220. }
  3221. }
  3222. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  3223. dev_info(&h->pdev->dev, "MSI\n");
  3224. if (!pci_enable_msi(h->pdev))
  3225. h->msi_vector = 1;
  3226. else
  3227. dev_warn(&h->pdev->dev, "MSI init failed\n");
  3228. }
  3229. default_int_mode:
  3230. #endif /* CONFIG_PCI_MSI */
  3231. /* if we get here we're going to use the default interrupt mode */
  3232. h->intr[h->intr_mode] = h->pdev->irq;
  3233. }
  3234. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3235. {
  3236. int i;
  3237. u32 subsystem_vendor_id, subsystem_device_id;
  3238. subsystem_vendor_id = pdev->subsystem_vendor;
  3239. subsystem_device_id = pdev->subsystem_device;
  3240. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3241. subsystem_vendor_id;
  3242. for (i = 0; i < ARRAY_SIZE(products); i++)
  3243. if (*board_id == products[i].board_id)
  3244. return i;
  3245. if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
  3246. subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
  3247. !hpsa_allow_any) {
  3248. dev_warn(&pdev->dev, "unrecognized board ID: "
  3249. "0x%08x, ignoring.\n", *board_id);
  3250. return -ENODEV;
  3251. }
  3252. return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
  3253. }
  3254. static inline bool hpsa_board_disabled(struct pci_dev *pdev)
  3255. {
  3256. u16 command;
  3257. (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
  3258. return ((command & PCI_COMMAND_MEMORY) == 0);
  3259. }
  3260. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  3261. unsigned long *memory_bar)
  3262. {
  3263. int i;
  3264. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3265. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3266. /* addressing mode bits already removed */
  3267. *memory_bar = pci_resource_start(pdev, i);
  3268. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3269. *memory_bar);
  3270. return 0;
  3271. }
  3272. dev_warn(&pdev->dev, "no memory BAR found\n");
  3273. return -ENODEV;
  3274. }
  3275. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  3276. void __iomem *vaddr, int wait_for_ready)
  3277. {
  3278. int i, iterations;
  3279. u32 scratchpad;
  3280. if (wait_for_ready)
  3281. iterations = HPSA_BOARD_READY_ITERATIONS;
  3282. else
  3283. iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
  3284. for (i = 0; i < iterations; i++) {
  3285. scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
  3286. if (wait_for_ready) {
  3287. if (scratchpad == HPSA_FIRMWARE_READY)
  3288. return 0;
  3289. } else {
  3290. if (scratchpad != HPSA_FIRMWARE_READY)
  3291. return 0;
  3292. }
  3293. msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
  3294. }
  3295. dev_warn(&pdev->dev, "board not ready, timed out.\n");
  3296. return -ENODEV;
  3297. }
  3298. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  3299. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3300. u64 *cfg_offset)
  3301. {
  3302. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3303. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3304. *cfg_base_addr &= (u32) 0x0000ffff;
  3305. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3306. if (*cfg_base_addr_index == -1) {
  3307. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
  3308. return -ENODEV;
  3309. }
  3310. return 0;
  3311. }
  3312. static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
  3313. {
  3314. u64 cfg_offset;
  3315. u32 cfg_base_addr;
  3316. u64 cfg_base_addr_index;
  3317. u32 trans_offset;
  3318. int rc;
  3319. rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3320. &cfg_base_addr_index, &cfg_offset);
  3321. if (rc)
  3322. return rc;
  3323. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3324. cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
  3325. if (!h->cfgtable)
  3326. return -ENOMEM;
  3327. rc = write_driver_ver_to_cfgtable(h->cfgtable);
  3328. if (rc)
  3329. return rc;
  3330. /* Find performant mode table. */
  3331. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3332. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3333. cfg_base_addr_index)+cfg_offset+trans_offset,
  3334. sizeof(*h->transtable));
  3335. if (!h->transtable)
  3336. return -ENOMEM;
  3337. return 0;
  3338. }
  3339. static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
  3340. {
  3341. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3342. /* Limit commands in memory limited kdump scenario. */
  3343. if (reset_devices && h->max_commands > 32)
  3344. h->max_commands = 32;
  3345. if (h->max_commands < 16) {
  3346. dev_warn(&h->pdev->dev, "Controller reports "
  3347. "max supported commands of %d, an obvious lie. "
  3348. "Using 16. Ensure that firmware is up to date.\n",
  3349. h->max_commands);
  3350. h->max_commands = 16;
  3351. }
  3352. }
  3353. /* Interrogate the hardware for some limits:
  3354. * max commands, max SG elements without chaining, and with chaining,
  3355. * SG chain block size, etc.
  3356. */
  3357. static void __devinit hpsa_find_board_params(struct ctlr_info *h)
  3358. {
  3359. hpsa_get_max_perf_mode_cmds(h);
  3360. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3361. h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
  3362. /*
  3363. * Limit in-command s/g elements to 32 save dma'able memory.
  3364. * Howvever spec says if 0, use 31
  3365. */
  3366. h->max_cmd_sg_entries = 31;
  3367. if (h->maxsgentries > 512) {
  3368. h->max_cmd_sg_entries = 32;
  3369. h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
  3370. h->maxsgentries--; /* save one for chain pointer */
  3371. } else {
  3372. h->maxsgentries = 31; /* default to traditional values */
  3373. h->chainsize = 0;
  3374. }
  3375. }
  3376. static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
  3377. {
  3378. if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
  3379. (readb(&h->cfgtable->Signature[1]) != 'I') ||
  3380. (readb(&h->cfgtable->Signature[2]) != 'S') ||
  3381. (readb(&h->cfgtable->Signature[3]) != 'S')) {
  3382. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3383. return false;
  3384. }
  3385. return true;
  3386. }
  3387. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3388. static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
  3389. {
  3390. #ifdef CONFIG_X86
  3391. u32 prefetch;
  3392. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3393. prefetch |= 0x100;
  3394. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3395. #endif
  3396. }
  3397. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3398. * in a prefetch beyond physical memory.
  3399. */
  3400. static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
  3401. {
  3402. u32 dma_prefetch;
  3403. if (h->board_id != 0x3225103C)
  3404. return;
  3405. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3406. dma_prefetch |= 0x8000;
  3407. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3408. }
  3409. static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
  3410. {
  3411. int i;
  3412. u32 doorbell_value;
  3413. unsigned long flags;
  3414. /* under certain very rare conditions, this can take awhile.
  3415. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3416. * as we enter this code.)
  3417. */
  3418. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3419. spin_lock_irqsave(&h->lock, flags);
  3420. doorbell_value = readl(h->vaddr + SA5_DOORBELL);
  3421. spin_unlock_irqrestore(&h->lock, flags);
  3422. if (!(doorbell_value & CFGTBL_ChangeReq))
  3423. break;
  3424. /* delay and try again */
  3425. usleep_range(10000, 20000);
  3426. }
  3427. }
  3428. static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
  3429. {
  3430. u32 trans_support;
  3431. trans_support = readl(&(h->cfgtable->TransportSupport));
  3432. if (!(trans_support & SIMPLE_MODE))
  3433. return -ENOTSUPP;
  3434. h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
  3435. /* Update the field, and then ring the doorbell */
  3436. writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
  3437. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3438. hpsa_wait_for_mode_change_ack(h);
  3439. print_cfg_table(&h->pdev->dev, h->cfgtable);
  3440. if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3441. dev_warn(&h->pdev->dev,
  3442. "unable to get board into simple mode\n");
  3443. return -ENODEV;
  3444. }
  3445. h->transMethod = CFGTBL_Trans_Simple;
  3446. return 0;
  3447. }
  3448. static int __devinit hpsa_pci_init(struct ctlr_info *h)
  3449. {
  3450. int prod_index, err;
  3451. prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
  3452. if (prod_index < 0)
  3453. return -ENODEV;
  3454. h->product_name = products[prod_index].product_name;
  3455. h->access = *(products[prod_index].access);
  3456. if (hpsa_board_disabled(h->pdev)) {
  3457. dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
  3458. return -ENODEV;
  3459. }
  3460. err = pci_enable_device(h->pdev);
  3461. if (err) {
  3462. dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
  3463. return err;
  3464. }
  3465. err = pci_request_regions(h->pdev, "hpsa");
  3466. if (err) {
  3467. dev_err(&h->pdev->dev,
  3468. "cannot obtain PCI resources, aborting\n");
  3469. return err;
  3470. }
  3471. hpsa_interrupt_mode(h);
  3472. err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
  3473. if (err)
  3474. goto err_out_free_res;
  3475. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3476. if (!h->vaddr) {
  3477. err = -ENOMEM;
  3478. goto err_out_free_res;
  3479. }
  3480. err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
  3481. if (err)
  3482. goto err_out_free_res;
  3483. err = hpsa_find_cfgtables(h);
  3484. if (err)
  3485. goto err_out_free_res;
  3486. hpsa_find_board_params(h);
  3487. if (!hpsa_CISS_signature_present(h)) {
  3488. err = -ENODEV;
  3489. goto err_out_free_res;
  3490. }
  3491. hpsa_enable_scsi_prefetch(h);
  3492. hpsa_p600_dma_prefetch_quirk(h);
  3493. err = hpsa_enter_simple_mode(h);
  3494. if (err)
  3495. goto err_out_free_res;
  3496. return 0;
  3497. err_out_free_res:
  3498. if (h->transtable)
  3499. iounmap(h->transtable);
  3500. if (h->cfgtable)
  3501. iounmap(h->cfgtable);
  3502. if (h->vaddr)
  3503. iounmap(h->vaddr);
  3504. /*
  3505. * Deliberately omit pci_disable_device(): it does something nasty to
  3506. * Smart Array controllers that pci_enable_device does not undo
  3507. */
  3508. pci_release_regions(h->pdev);
  3509. return err;
  3510. }
  3511. static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
  3512. {
  3513. int rc;
  3514. #define HBA_INQUIRY_BYTE_COUNT 64
  3515. h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
  3516. if (!h->hba_inquiry_data)
  3517. return;
  3518. rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
  3519. h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
  3520. if (rc != 0) {
  3521. kfree(h->hba_inquiry_data);
  3522. h->hba_inquiry_data = NULL;
  3523. }
  3524. }
  3525. static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
  3526. {
  3527. int rc, i;
  3528. if (!reset_devices)
  3529. return 0;
  3530. /* Reset the controller with a PCI power-cycle or via doorbell */
  3531. rc = hpsa_kdump_hard_reset_controller(pdev);
  3532. /* -ENOTSUPP here means we cannot reset the controller
  3533. * but it's already (and still) up and running in
  3534. * "performant mode". Or, it might be 640x, which can't reset
  3535. * due to concerns about shared bbwc between 6402/6404 pair.
  3536. */
  3537. if (rc == -ENOTSUPP)
  3538. return rc; /* just try to do the kdump anyhow. */
  3539. if (rc)
  3540. return -ENODEV;
  3541. /* Now try to get the controller to respond to a no-op */
  3542. dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
  3543. for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
  3544. if (hpsa_noop(pdev) == 0)
  3545. break;
  3546. else
  3547. dev_warn(&pdev->dev, "no-op failed%s\n",
  3548. (i < 11 ? "; re-trying" : ""));
  3549. }
  3550. return 0;
  3551. }
  3552. static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h)
  3553. {
  3554. h->cmd_pool_bits = kzalloc(
  3555. DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
  3556. sizeof(unsigned long), GFP_KERNEL);
  3557. h->cmd_pool = pci_alloc_consistent(h->pdev,
  3558. h->nr_cmds * sizeof(*h->cmd_pool),
  3559. &(h->cmd_pool_dhandle));
  3560. h->errinfo_pool = pci_alloc_consistent(h->pdev,
  3561. h->nr_cmds * sizeof(*h->errinfo_pool),
  3562. &(h->errinfo_pool_dhandle));
  3563. if ((h->cmd_pool_bits == NULL)
  3564. || (h->cmd_pool == NULL)
  3565. || (h->errinfo_pool == NULL)) {
  3566. dev_err(&h->pdev->dev, "out of memory in %s", __func__);
  3567. return -ENOMEM;
  3568. }
  3569. return 0;
  3570. }
  3571. static void hpsa_free_cmd_pool(struct ctlr_info *h)
  3572. {
  3573. kfree(h->cmd_pool_bits);
  3574. if (h->cmd_pool)
  3575. pci_free_consistent(h->pdev,
  3576. h->nr_cmds * sizeof(struct CommandList),
  3577. h->cmd_pool, h->cmd_pool_dhandle);
  3578. if (h->errinfo_pool)
  3579. pci_free_consistent(h->pdev,
  3580. h->nr_cmds * sizeof(struct ErrorInfo),
  3581. h->errinfo_pool,
  3582. h->errinfo_pool_dhandle);
  3583. }
  3584. static int hpsa_request_irq(struct ctlr_info *h,
  3585. irqreturn_t (*msixhandler)(int, void *),
  3586. irqreturn_t (*intxhandler)(int, void *))
  3587. {
  3588. int rc;
  3589. if (h->msix_vector || h->msi_vector)
  3590. rc = request_irq(h->intr[h->intr_mode], msixhandler,
  3591. IRQF_DISABLED, h->devname, h);
  3592. else
  3593. rc = request_irq(h->intr[h->intr_mode], intxhandler,
  3594. IRQF_DISABLED, h->devname, h);
  3595. if (rc) {
  3596. dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
  3597. h->intr[h->intr_mode], h->devname);
  3598. return -ENODEV;
  3599. }
  3600. return 0;
  3601. }
  3602. static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h)
  3603. {
  3604. if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
  3605. HPSA_RESET_TYPE_CONTROLLER)) {
  3606. dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
  3607. return -EIO;
  3608. }
  3609. dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
  3610. if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
  3611. dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
  3612. return -1;
  3613. }
  3614. dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
  3615. if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
  3616. dev_warn(&h->pdev->dev, "Board failed to become ready "
  3617. "after soft reset.\n");
  3618. return -1;
  3619. }
  3620. return 0;
  3621. }
  3622. static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
  3623. {
  3624. free_irq(h->intr[h->intr_mode], h);
  3625. #ifdef CONFIG_PCI_MSI
  3626. if (h->msix_vector)
  3627. pci_disable_msix(h->pdev);
  3628. else if (h->msi_vector)
  3629. pci_disable_msi(h->pdev);
  3630. #endif /* CONFIG_PCI_MSI */
  3631. hpsa_free_sg_chain_blocks(h);
  3632. hpsa_free_cmd_pool(h);
  3633. kfree(h->blockFetchTable);
  3634. pci_free_consistent(h->pdev, h->reply_pool_size,
  3635. h->reply_pool, h->reply_pool_dhandle);
  3636. if (h->vaddr)
  3637. iounmap(h->vaddr);
  3638. if (h->transtable)
  3639. iounmap(h->transtable);
  3640. if (h->cfgtable)
  3641. iounmap(h->cfgtable);
  3642. pci_release_regions(h->pdev);
  3643. kfree(h);
  3644. }
  3645. static int __devinit hpsa_init_one(struct pci_dev *pdev,
  3646. const struct pci_device_id *ent)
  3647. {
  3648. int dac, rc;
  3649. struct ctlr_info *h;
  3650. int try_soft_reset = 0;
  3651. unsigned long flags;
  3652. if (number_of_controllers == 0)
  3653. printk(KERN_INFO DRIVER_NAME "\n");
  3654. rc = hpsa_init_reset_devices(pdev);
  3655. if (rc) {
  3656. if (rc != -ENOTSUPP)
  3657. return rc;
  3658. /* If the reset fails in a particular way (it has no way to do
  3659. * a proper hard reset, so returns -ENOTSUPP) we can try to do
  3660. * a soft reset once we get the controller configured up to the
  3661. * point that it can accept a command.
  3662. */
  3663. try_soft_reset = 1;
  3664. rc = 0;
  3665. }
  3666. reinit_after_soft_reset:
  3667. /* Command structures must be aligned on a 32-byte boundary because
  3668. * the 5 lower bits of the address are used by the hardware. and by
  3669. * the driver. See comments in hpsa.h for more info.
  3670. */
  3671. #define COMMANDLIST_ALIGNMENT 32
  3672. BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
  3673. h = kzalloc(sizeof(*h), GFP_KERNEL);
  3674. if (!h)
  3675. return -ENOMEM;
  3676. h->pdev = pdev;
  3677. h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
  3678. INIT_LIST_HEAD(&h->cmpQ);
  3679. INIT_LIST_HEAD(&h->reqQ);
  3680. spin_lock_init(&h->lock);
  3681. spin_lock_init(&h->scan_lock);
  3682. rc = hpsa_pci_init(h);
  3683. if (rc != 0)
  3684. goto clean1;
  3685. sprintf(h->devname, "hpsa%d", number_of_controllers);
  3686. h->ctlr = number_of_controllers;
  3687. number_of_controllers++;
  3688. /* configure PCI DMA stuff */
  3689. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  3690. if (rc == 0) {
  3691. dac = 1;
  3692. } else {
  3693. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3694. if (rc == 0) {
  3695. dac = 0;
  3696. } else {
  3697. dev_err(&pdev->dev, "no suitable DMA available\n");
  3698. goto clean1;
  3699. }
  3700. }
  3701. /* make sure the board interrupts are off */
  3702. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3703. if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
  3704. goto clean2;
  3705. dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
  3706. h->devname, pdev->device,
  3707. h->intr[h->intr_mode], dac ? "" : " not");
  3708. if (hpsa_allocate_cmd_pool(h))
  3709. goto clean4;
  3710. if (hpsa_allocate_sg_chain_blocks(h))
  3711. goto clean4;
  3712. init_waitqueue_head(&h->scan_wait_queue);
  3713. h->scan_finished = 1; /* no scan currently in progress */
  3714. pci_set_drvdata(pdev, h);
  3715. h->ndevices = 0;
  3716. h->scsi_host = NULL;
  3717. spin_lock_init(&h->devlock);
  3718. hpsa_put_ctlr_into_performant_mode(h);
  3719. /* At this point, the controller is ready to take commands.
  3720. * Now, if reset_devices and the hard reset didn't work, try
  3721. * the soft reset and see if that works.
  3722. */
  3723. if (try_soft_reset) {
  3724. /* This is kind of gross. We may or may not get a completion
  3725. * from the soft reset command, and if we do, then the value
  3726. * from the fifo may or may not be valid. So, we wait 10 secs
  3727. * after the reset throwing away any completions we get during
  3728. * that time. Unregister the interrupt handler and register
  3729. * fake ones to scoop up any residual completions.
  3730. */
  3731. spin_lock_irqsave(&h->lock, flags);
  3732. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3733. spin_unlock_irqrestore(&h->lock, flags);
  3734. free_irq(h->intr[h->intr_mode], h);
  3735. rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
  3736. hpsa_intx_discard_completions);
  3737. if (rc) {
  3738. dev_warn(&h->pdev->dev, "Failed to request_irq after "
  3739. "soft reset.\n");
  3740. goto clean4;
  3741. }
  3742. rc = hpsa_kdump_soft_reset(h);
  3743. if (rc)
  3744. /* Neither hard nor soft reset worked, we're hosed. */
  3745. goto clean4;
  3746. dev_info(&h->pdev->dev, "Board READY.\n");
  3747. dev_info(&h->pdev->dev,
  3748. "Waiting for stale completions to drain.\n");
  3749. h->access.set_intr_mask(h, HPSA_INTR_ON);
  3750. msleep(10000);
  3751. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3752. rc = controller_reset_failed(h->cfgtable);
  3753. if (rc)
  3754. dev_info(&h->pdev->dev,
  3755. "Soft reset appears to have failed.\n");
  3756. /* since the controller's reset, we have to go back and re-init
  3757. * everything. Easiest to just forget what we've done and do it
  3758. * all over again.
  3759. */
  3760. hpsa_undo_allocations_after_kdump_soft_reset(h);
  3761. try_soft_reset = 0;
  3762. if (rc)
  3763. /* don't go to clean4, we already unallocated */
  3764. return -ENODEV;
  3765. goto reinit_after_soft_reset;
  3766. }
  3767. /* Turn the interrupts on so we can service requests */
  3768. h->access.set_intr_mask(h, HPSA_INTR_ON);
  3769. hpsa_hba_inquiry(h);
  3770. hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
  3771. return 1;
  3772. clean4:
  3773. hpsa_free_sg_chain_blocks(h);
  3774. hpsa_free_cmd_pool(h);
  3775. free_irq(h->intr[h->intr_mode], h);
  3776. clean2:
  3777. clean1:
  3778. kfree(h);
  3779. return rc;
  3780. }
  3781. static void hpsa_flush_cache(struct ctlr_info *h)
  3782. {
  3783. char *flush_buf;
  3784. struct CommandList *c;
  3785. flush_buf = kzalloc(4, GFP_KERNEL);
  3786. if (!flush_buf)
  3787. return;
  3788. c = cmd_special_alloc(h);
  3789. if (!c) {
  3790. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  3791. goto out_of_memory;
  3792. }
  3793. fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
  3794. RAID_CTLR_LUNID, TYPE_CMD);
  3795. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
  3796. if (c->err_info->CommandStatus != 0)
  3797. dev_warn(&h->pdev->dev,
  3798. "error flushing cache on controller\n");
  3799. cmd_special_free(h, c);
  3800. out_of_memory:
  3801. kfree(flush_buf);
  3802. }
  3803. static void hpsa_shutdown(struct pci_dev *pdev)
  3804. {
  3805. struct ctlr_info *h;
  3806. h = pci_get_drvdata(pdev);
  3807. /* Turn board interrupts off and send the flush cache command
  3808. * sendcmd will turn off interrupt, and send the flush...
  3809. * To write all data in the battery backed cache to disks
  3810. */
  3811. hpsa_flush_cache(h);
  3812. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3813. free_irq(h->intr[h->intr_mode], h);
  3814. #ifdef CONFIG_PCI_MSI
  3815. if (h->msix_vector)
  3816. pci_disable_msix(h->pdev);
  3817. else if (h->msi_vector)
  3818. pci_disable_msi(h->pdev);
  3819. #endif /* CONFIG_PCI_MSI */
  3820. }
  3821. static void __devexit hpsa_remove_one(struct pci_dev *pdev)
  3822. {
  3823. struct ctlr_info *h;
  3824. if (pci_get_drvdata(pdev) == NULL) {
  3825. dev_err(&pdev->dev, "unable to remove device \n");
  3826. return;
  3827. }
  3828. h = pci_get_drvdata(pdev);
  3829. hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
  3830. hpsa_shutdown(pdev);
  3831. iounmap(h->vaddr);
  3832. iounmap(h->transtable);
  3833. iounmap(h->cfgtable);
  3834. hpsa_free_sg_chain_blocks(h);
  3835. pci_free_consistent(h->pdev,
  3836. h->nr_cmds * sizeof(struct CommandList),
  3837. h->cmd_pool, h->cmd_pool_dhandle);
  3838. pci_free_consistent(h->pdev,
  3839. h->nr_cmds * sizeof(struct ErrorInfo),
  3840. h->errinfo_pool, h->errinfo_pool_dhandle);
  3841. pci_free_consistent(h->pdev, h->reply_pool_size,
  3842. h->reply_pool, h->reply_pool_dhandle);
  3843. kfree(h->cmd_pool_bits);
  3844. kfree(h->blockFetchTable);
  3845. kfree(h->hba_inquiry_data);
  3846. /*
  3847. * Deliberately omit pci_disable_device(): it does something nasty to
  3848. * Smart Array controllers that pci_enable_device does not undo
  3849. */
  3850. pci_release_regions(pdev);
  3851. pci_set_drvdata(pdev, NULL);
  3852. kfree(h);
  3853. }
  3854. static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
  3855. __attribute__((unused)) pm_message_t state)
  3856. {
  3857. return -ENOSYS;
  3858. }
  3859. static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
  3860. {
  3861. return -ENOSYS;
  3862. }
  3863. static struct pci_driver hpsa_pci_driver = {
  3864. .name = "hpsa",
  3865. .probe = hpsa_init_one,
  3866. .remove = __devexit_p(hpsa_remove_one),
  3867. .id_table = hpsa_pci_device_id, /* id_table */
  3868. .shutdown = hpsa_shutdown,
  3869. .suspend = hpsa_suspend,
  3870. .resume = hpsa_resume,
  3871. };
  3872. /* Fill in bucket_map[], given nsgs (the max number of
  3873. * scatter gather elements supported) and bucket[],
  3874. * which is an array of 8 integers. The bucket[] array
  3875. * contains 8 different DMA transfer sizes (in 16
  3876. * byte increments) which the controller uses to fetch
  3877. * commands. This function fills in bucket_map[], which
  3878. * maps a given number of scatter gather elements to one of
  3879. * the 8 DMA transfer sizes. The point of it is to allow the
  3880. * controller to only do as much DMA as needed to fetch the
  3881. * command, with the DMA transfer size encoded in the lower
  3882. * bits of the command address.
  3883. */
  3884. static void calc_bucket_map(int bucket[], int num_buckets,
  3885. int nsgs, int *bucket_map)
  3886. {
  3887. int i, j, b, size;
  3888. /* even a command with 0 SGs requires 4 blocks */
  3889. #define MINIMUM_TRANSFER_BLOCKS 4
  3890. #define NUM_BUCKETS 8
  3891. /* Note, bucket_map must have nsgs+1 entries. */
  3892. for (i = 0; i <= nsgs; i++) {
  3893. /* Compute size of a command with i SG entries */
  3894. size = i + MINIMUM_TRANSFER_BLOCKS;
  3895. b = num_buckets; /* Assume the biggest bucket */
  3896. /* Find the bucket that is just big enough */
  3897. for (j = 0; j < 8; j++) {
  3898. if (bucket[j] >= size) {
  3899. b = j;
  3900. break;
  3901. }
  3902. }
  3903. /* for a command with i SG entries, use bucket b. */
  3904. bucket_map[i] = b;
  3905. }
  3906. }
  3907. static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,
  3908. u32 use_short_tags)
  3909. {
  3910. int i;
  3911. unsigned long register_value;
  3912. /* This is a bit complicated. There are 8 registers on
  3913. * the controller which we write to to tell it 8 different
  3914. * sizes of commands which there may be. It's a way of
  3915. * reducing the DMA done to fetch each command. Encoded into
  3916. * each command's tag are 3 bits which communicate to the controller
  3917. * which of the eight sizes that command fits within. The size of
  3918. * each command depends on how many scatter gather entries there are.
  3919. * Each SG entry requires 16 bytes. The eight registers are programmed
  3920. * with the number of 16-byte blocks a command of that size requires.
  3921. * The smallest command possible requires 5 such 16 byte blocks.
  3922. * the largest command possible requires MAXSGENTRIES + 4 16-byte
  3923. * blocks. Note, this only extends to the SG entries contained
  3924. * within the command block, and does not extend to chained blocks
  3925. * of SG elements. bft[] contains the eight values we write to
  3926. * the registers. They are not evenly distributed, but have more
  3927. * sizes for small commands, and fewer sizes for larger commands.
  3928. */
  3929. int bft[8] = {5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
  3930. BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
  3931. /* 5 = 1 s/g entry or 4k
  3932. * 6 = 2 s/g entry or 8k
  3933. * 8 = 4 s/g entry or 16k
  3934. * 10 = 6 s/g entry or 24k
  3935. */
  3936. h->reply_pool_wraparound = 1; /* spec: init to 1 */
  3937. /* Controller spec: zero out this buffer. */
  3938. memset(h->reply_pool, 0, h->reply_pool_size);
  3939. h->reply_pool_head = h->reply_pool;
  3940. bft[7] = h->max_sg_entries + 4;
  3941. calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
  3942. for (i = 0; i < 8; i++)
  3943. writel(bft[i], &h->transtable->BlockFetch[i]);
  3944. /* size of controller ring buffer */
  3945. writel(h->max_commands, &h->transtable->RepQSize);
  3946. writel(1, &h->transtable->RepQCount);
  3947. writel(0, &h->transtable->RepQCtrAddrLow32);
  3948. writel(0, &h->transtable->RepQCtrAddrHigh32);
  3949. writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
  3950. writel(0, &h->transtable->RepQAddr0High32);
  3951. writel(CFGTBL_Trans_Performant | use_short_tags,
  3952. &(h->cfgtable->HostWrite.TransportRequest));
  3953. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3954. hpsa_wait_for_mode_change_ack(h);
  3955. register_value = readl(&(h->cfgtable->TransportActive));
  3956. if (!(register_value & CFGTBL_Trans_Performant)) {
  3957. dev_warn(&h->pdev->dev, "unable to get board into"
  3958. " performant mode\n");
  3959. return;
  3960. }
  3961. /* Change the access methods to the performant access methods */
  3962. h->access = SA5_performant_access;
  3963. h->transMethod = CFGTBL_Trans_Performant;
  3964. }
  3965. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
  3966. {
  3967. u32 trans_support;
  3968. if (hpsa_simple_mode)
  3969. return;
  3970. trans_support = readl(&(h->cfgtable->TransportSupport));
  3971. if (!(trans_support & PERFORMANT_MODE))
  3972. return;
  3973. hpsa_get_max_perf_mode_cmds(h);
  3974. h->max_sg_entries = 32;
  3975. /* Performant mode ring buffer and supporting data structures */
  3976. h->reply_pool_size = h->max_commands * sizeof(u64);
  3977. h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
  3978. &(h->reply_pool_dhandle));
  3979. /* Need a block fetch table for performant mode */
  3980. h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
  3981. sizeof(u32)), GFP_KERNEL);
  3982. if ((h->reply_pool == NULL)
  3983. || (h->blockFetchTable == NULL))
  3984. goto clean_up;
  3985. hpsa_enter_performant_mode(h,
  3986. trans_support & CFGTBL_Trans_use_short_tags);
  3987. return;
  3988. clean_up:
  3989. if (h->reply_pool)
  3990. pci_free_consistent(h->pdev, h->reply_pool_size,
  3991. h->reply_pool, h->reply_pool_dhandle);
  3992. kfree(h->blockFetchTable);
  3993. }
  3994. /*
  3995. * This is it. Register the PCI driver information for the cards we control
  3996. * the OS will call our registered routines when it finds one of our cards.
  3997. */
  3998. static int __init hpsa_init(void)
  3999. {
  4000. return pci_register_driver(&hpsa_pci_driver);
  4001. }
  4002. static void __exit hpsa_cleanup(void)
  4003. {
  4004. pci_unregister_driver(&hpsa_pci_driver);
  4005. }
  4006. module_init(hpsa_init);
  4007. module_exit(hpsa_cleanup);