head.S 2.2 KB

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  1. /* $Id: head.S,v 1.7 2003/09/01 17:58:19 lethal Exp $
  2. *
  3. * arch/sh/kernel/head.S
  4. *
  5. * Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima
  6. *
  7. * This file is subject to the terms and conditions of the GNU General Public
  8. * License. See the file "COPYING" in the main directory of this archive
  9. * for more details.
  10. *
  11. * Head.S contains the SH exception handlers and startup code.
  12. */
  13. #include <linux/linkage.h>
  14. #ifdef CONFIG_CPU_SH4A
  15. #define SYNCO() synco
  16. #define PREFI(label, reg) \
  17. mov.l label, reg; \
  18. prefi @reg
  19. #else
  20. #define SYNCO()
  21. #define PREFI(label, reg)
  22. #endif
  23. .section .empty_zero_page, "aw"
  24. ENTRY(empty_zero_page)
  25. .long 1 /* MOUNT_ROOT_RDONLY */
  26. .long 0 /* RAMDISK_FLAGS */
  27. .long 0x0200 /* ORIG_ROOT_DEV */
  28. .long 1 /* LOADER_TYPE */
  29. .long 0x00360000 /* INITRD_START */
  30. .long 0x000a0000 /* INITRD_SIZE */
  31. .long 0
  32. .balign 4096,0,4096
  33. .text
  34. /*
  35. * Condition at the entry of _stext:
  36. *
  37. * BSC has already been initialized.
  38. * INTC may or may not be initialized.
  39. * VBR may or may not be initialized.
  40. * MMU may or may not be initialized.
  41. * Cache may or may not be initialized.
  42. * Hardware (including on-chip modules) may or may not be initialized.
  43. *
  44. */
  45. ENTRY(_stext)
  46. ! Initialize Status Register
  47. mov.l 1f, r0 ! MD=1, RB=0, BL=0, IMASK=0xF
  48. ldc r0, sr
  49. ! Initialize global interrupt mask
  50. mov #0, r0
  51. ldc r0, r6_bank
  52. /*
  53. * Prefetch if possible to reduce cache miss penalty.
  54. *
  55. * We do this early on for SH-4A as a micro-optimization,
  56. * as later on we will have speculative execution enabled
  57. * and this will become less of an issue.
  58. */
  59. PREFI(5f, r0)
  60. PREFI(6f, r0)
  61. !
  62. mov.l 2f, r0
  63. mov r0, r15 ! Set initial r15 (stack pointer)
  64. mov #0x20, r1 !
  65. shll8 r1 ! r1 = 8192
  66. sub r1, r0 !
  67. ldc r0, r7_bank ! ... and initial thread_info
  68. ! Clear BSS area
  69. mov.l 3f, r1
  70. add #4, r1
  71. mov.l 4f, r2
  72. mov #0, r0
  73. 9: cmp/hs r2, r1
  74. bf/s 9b ! while (r1 < r2)
  75. mov.l r0,@-r2
  76. ! Additional CPU initialization
  77. mov.l 6f, r0
  78. jsr @r0
  79. nop
  80. SYNCO() ! Wait for pending instructions..
  81. ! Start kernel
  82. mov.l 5f, r0
  83. jmp @r0
  84. nop
  85. .balign 4
  86. 1: .long 0x400080F0 ! MD=1, RB=0, BL=0, FD=1, IMASK=0xF
  87. 2: .long init_thread_union+8192
  88. 3: .long __bss_start
  89. 4: .long _end
  90. 5: .long start_kernel
  91. 6: .long sh_cpu_init