be_main.c 58 KB

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  1. /*
  2. * Copyright (C) 2005 - 2009 ServerEngines
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License version 2
  7. * as published by the Free Software Foundation. The full GNU General
  8. * Public License is included in this distribution in the file called COPYING.
  9. *
  10. * Contact Information:
  11. * linux-drivers@serverengines.com
  12. *
  13. * ServerEngines
  14. * 209 N. Fair Oaks Ave
  15. * Sunnyvale, CA 94085
  16. */
  17. #include "be.h"
  18. #include "be_cmds.h"
  19. #include <asm/div64.h>
  20. MODULE_VERSION(DRV_VER);
  21. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  22. MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
  23. MODULE_AUTHOR("ServerEngines Corporation");
  24. MODULE_LICENSE("GPL");
  25. static unsigned int rx_frag_size = 2048;
  26. module_param(rx_frag_size, uint, S_IRUGO);
  27. MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
  28. static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
  29. { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
  30. { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
  31. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
  32. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
  33. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
  34. { 0 }
  35. };
  36. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  37. static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
  38. {
  39. struct be_dma_mem *mem = &q->dma_mem;
  40. if (mem->va)
  41. pci_free_consistent(adapter->pdev, mem->size,
  42. mem->va, mem->dma);
  43. }
  44. static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
  45. u16 len, u16 entry_size)
  46. {
  47. struct be_dma_mem *mem = &q->dma_mem;
  48. memset(q, 0, sizeof(*q));
  49. q->len = len;
  50. q->entry_size = entry_size;
  51. mem->size = len * entry_size;
  52. mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
  53. if (!mem->va)
  54. return -1;
  55. memset(mem->va, 0, mem->size);
  56. return 0;
  57. }
  58. static void be_intr_set(struct be_adapter *adapter, bool enable)
  59. {
  60. u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
  61. u32 reg = ioread32(addr);
  62. u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  63. if (!enabled && enable)
  64. reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  65. else if (enabled && !enable)
  66. reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  67. else
  68. return;
  69. iowrite32(reg, addr);
  70. }
  71. static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
  72. {
  73. u32 val = 0;
  74. val |= qid & DB_RQ_RING_ID_MASK;
  75. val |= posted << DB_RQ_NUM_POSTED_SHIFT;
  76. iowrite32(val, adapter->db + DB_RQ_OFFSET);
  77. }
  78. static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
  79. {
  80. u32 val = 0;
  81. val |= qid & DB_TXULP_RING_ID_MASK;
  82. val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
  83. iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
  84. }
  85. static void be_eq_notify(struct be_adapter *adapter, u16 qid,
  86. bool arm, bool clear_int, u16 num_popped)
  87. {
  88. u32 val = 0;
  89. val |= qid & DB_EQ_RING_ID_MASK;
  90. if (arm)
  91. val |= 1 << DB_EQ_REARM_SHIFT;
  92. if (clear_int)
  93. val |= 1 << DB_EQ_CLR_SHIFT;
  94. val |= 1 << DB_EQ_EVNT_SHIFT;
  95. val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
  96. iowrite32(val, adapter->db + DB_EQ_OFFSET);
  97. }
  98. void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
  99. {
  100. u32 val = 0;
  101. val |= qid & DB_CQ_RING_ID_MASK;
  102. if (arm)
  103. val |= 1 << DB_CQ_REARM_SHIFT;
  104. val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
  105. iowrite32(val, adapter->db + DB_CQ_OFFSET);
  106. }
  107. static int be_mac_addr_set(struct net_device *netdev, void *p)
  108. {
  109. struct be_adapter *adapter = netdev_priv(netdev);
  110. struct sockaddr *addr = p;
  111. int status = 0;
  112. if (!is_valid_ether_addr(addr->sa_data))
  113. return -EADDRNOTAVAIL;
  114. status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
  115. if (status)
  116. return status;
  117. status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
  118. adapter->if_handle, &adapter->pmac_id);
  119. if (!status)
  120. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  121. return status;
  122. }
  123. void netdev_stats_update(struct be_adapter *adapter)
  124. {
  125. struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
  126. struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
  127. struct be_port_rxf_stats *port_stats =
  128. &rxf_stats->port[adapter->port_num];
  129. struct net_device_stats *dev_stats = &adapter->netdev->stats;
  130. struct be_erx_stats *erx_stats = &hw_stats->erx;
  131. dev_stats->rx_packets = port_stats->rx_total_frames;
  132. dev_stats->tx_packets = port_stats->tx_unicastframes +
  133. port_stats->tx_multicastframes + port_stats->tx_broadcastframes;
  134. dev_stats->rx_bytes = (u64) port_stats->rx_bytes_msd << 32 |
  135. (u64) port_stats->rx_bytes_lsd;
  136. dev_stats->tx_bytes = (u64) port_stats->tx_bytes_msd << 32 |
  137. (u64) port_stats->tx_bytes_lsd;
  138. /* bad pkts received */
  139. dev_stats->rx_errors = port_stats->rx_crc_errors +
  140. port_stats->rx_alignment_symbol_errors +
  141. port_stats->rx_in_range_errors +
  142. port_stats->rx_out_range_errors +
  143. port_stats->rx_frame_too_long +
  144. port_stats->rx_dropped_too_small +
  145. port_stats->rx_dropped_too_short +
  146. port_stats->rx_dropped_header_too_small +
  147. port_stats->rx_dropped_tcp_length +
  148. port_stats->rx_dropped_runt +
  149. port_stats->rx_tcp_checksum_errs +
  150. port_stats->rx_ip_checksum_errs +
  151. port_stats->rx_udp_checksum_errs;
  152. /* no space in linux buffers: best possible approximation */
  153. dev_stats->rx_dropped =
  154. erx_stats->rx_drops_no_fragments[adapter->rx_obj.q.id];
  155. /* detailed rx errors */
  156. dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
  157. port_stats->rx_out_range_errors +
  158. port_stats->rx_frame_too_long;
  159. /* receive ring buffer overflow */
  160. dev_stats->rx_over_errors = 0;
  161. dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
  162. /* frame alignment errors */
  163. dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
  164. /* receiver fifo overrun */
  165. /* drops_no_pbuf is no per i/f, it's per BE card */
  166. dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
  167. port_stats->rx_input_fifo_overflow +
  168. rxf_stats->rx_drops_no_pbuf;
  169. /* receiver missed packetd */
  170. dev_stats->rx_missed_errors = 0;
  171. /* packet transmit problems */
  172. dev_stats->tx_errors = 0;
  173. /* no space available in linux */
  174. dev_stats->tx_dropped = 0;
  175. dev_stats->multicast = port_stats->rx_multicast_frames;
  176. dev_stats->collisions = 0;
  177. /* detailed tx_errors */
  178. dev_stats->tx_aborted_errors = 0;
  179. dev_stats->tx_carrier_errors = 0;
  180. dev_stats->tx_fifo_errors = 0;
  181. dev_stats->tx_heartbeat_errors = 0;
  182. dev_stats->tx_window_errors = 0;
  183. }
  184. void be_link_status_update(struct be_adapter *adapter, bool link_up)
  185. {
  186. struct net_device *netdev = adapter->netdev;
  187. /* If link came up or went down */
  188. if (adapter->link_up != link_up) {
  189. if (link_up) {
  190. netif_start_queue(netdev);
  191. netif_carrier_on(netdev);
  192. printk(KERN_INFO "%s: Link up\n", netdev->name);
  193. } else {
  194. netif_stop_queue(netdev);
  195. netif_carrier_off(netdev);
  196. printk(KERN_INFO "%s: Link down\n", netdev->name);
  197. }
  198. adapter->link_up = link_up;
  199. }
  200. }
  201. /* Update the EQ delay n BE based on the RX frags consumed / sec */
  202. static void be_rx_eqd_update(struct be_adapter *adapter)
  203. {
  204. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  205. struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
  206. ulong now = jiffies;
  207. u32 eqd;
  208. if (!rx_eq->enable_aic)
  209. return;
  210. /* Wrapped around */
  211. if (time_before(now, stats->rx_fps_jiffies)) {
  212. stats->rx_fps_jiffies = now;
  213. return;
  214. }
  215. /* Update once a second */
  216. if ((now - stats->rx_fps_jiffies) < HZ)
  217. return;
  218. stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
  219. ((now - stats->rx_fps_jiffies) / HZ);
  220. stats->rx_fps_jiffies = now;
  221. stats->be_prev_rx_frags = stats->be_rx_frags;
  222. eqd = stats->be_rx_fps / 110000;
  223. eqd = eqd << 3;
  224. if (eqd > rx_eq->max_eqd)
  225. eqd = rx_eq->max_eqd;
  226. if (eqd < rx_eq->min_eqd)
  227. eqd = rx_eq->min_eqd;
  228. if (eqd < 10)
  229. eqd = 0;
  230. if (eqd != rx_eq->cur_eqd)
  231. be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
  232. rx_eq->cur_eqd = eqd;
  233. }
  234. static struct net_device_stats *be_get_stats(struct net_device *dev)
  235. {
  236. return &dev->stats;
  237. }
  238. static u32 be_calc_rate(u64 bytes, unsigned long ticks)
  239. {
  240. u64 rate = bytes;
  241. do_div(rate, ticks / HZ);
  242. rate <<= 3; /* bytes/sec -> bits/sec */
  243. do_div(rate, 1000000ul); /* MB/Sec */
  244. return rate;
  245. }
  246. static void be_tx_rate_update(struct be_adapter *adapter)
  247. {
  248. struct be_drvr_stats *stats = drvr_stats(adapter);
  249. ulong now = jiffies;
  250. /* Wrapped around? */
  251. if (time_before(now, stats->be_tx_jiffies)) {
  252. stats->be_tx_jiffies = now;
  253. return;
  254. }
  255. /* Update tx rate once in two seconds */
  256. if ((now - stats->be_tx_jiffies) > 2 * HZ) {
  257. stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
  258. - stats->be_tx_bytes_prev,
  259. now - stats->be_tx_jiffies);
  260. stats->be_tx_jiffies = now;
  261. stats->be_tx_bytes_prev = stats->be_tx_bytes;
  262. }
  263. }
  264. static void be_tx_stats_update(struct be_adapter *adapter,
  265. u32 wrb_cnt, u32 copied, bool stopped)
  266. {
  267. struct be_drvr_stats *stats = drvr_stats(adapter);
  268. stats->be_tx_reqs++;
  269. stats->be_tx_wrbs += wrb_cnt;
  270. stats->be_tx_bytes += copied;
  271. if (stopped)
  272. stats->be_tx_stops++;
  273. }
  274. /* Determine number of WRB entries needed to xmit data in an skb */
  275. static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
  276. {
  277. int cnt = (skb->len > skb->data_len);
  278. cnt += skb_shinfo(skb)->nr_frags;
  279. /* to account for hdr wrb */
  280. cnt++;
  281. if (cnt & 1) {
  282. /* add a dummy to make it an even num */
  283. cnt++;
  284. *dummy = true;
  285. } else
  286. *dummy = false;
  287. BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
  288. return cnt;
  289. }
  290. static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
  291. {
  292. wrb->frag_pa_hi = upper_32_bits(addr);
  293. wrb->frag_pa_lo = addr & 0xFFFFFFFF;
  294. wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
  295. }
  296. static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
  297. bool vlan, u32 wrb_cnt, u32 len)
  298. {
  299. memset(hdr, 0, sizeof(*hdr));
  300. AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
  301. if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
  302. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
  303. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
  304. hdr, skb_shinfo(skb)->gso_size);
  305. } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
  306. if (is_tcp_pkt(skb))
  307. AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
  308. else if (is_udp_pkt(skb))
  309. AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
  310. }
  311. if (vlan && vlan_tx_tag_present(skb)) {
  312. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
  313. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
  314. hdr, vlan_tx_tag_get(skb));
  315. }
  316. AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
  317. AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
  318. AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
  319. AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
  320. }
  321. static int make_tx_wrbs(struct be_adapter *adapter,
  322. struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
  323. {
  324. u64 busaddr;
  325. u32 i, copied = 0;
  326. struct pci_dev *pdev = adapter->pdev;
  327. struct sk_buff *first_skb = skb;
  328. struct be_queue_info *txq = &adapter->tx_obj.q;
  329. struct be_eth_wrb *wrb;
  330. struct be_eth_hdr_wrb *hdr;
  331. hdr = queue_head_node(txq);
  332. atomic_add(wrb_cnt, &txq->used);
  333. queue_head_inc(txq);
  334. if (skb_dma_map(&pdev->dev, skb, DMA_TO_DEVICE)) {
  335. dev_err(&pdev->dev, "TX DMA mapping failed\n");
  336. return 0;
  337. }
  338. if (skb->len > skb->data_len) {
  339. int len = skb->len - skb->data_len;
  340. wrb = queue_head_node(txq);
  341. busaddr = skb_shinfo(skb)->dma_head;
  342. wrb_fill(wrb, busaddr, len);
  343. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  344. queue_head_inc(txq);
  345. copied += len;
  346. }
  347. for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
  348. struct skb_frag_struct *frag =
  349. &skb_shinfo(skb)->frags[i];
  350. busaddr = skb_shinfo(skb)->dma_maps[i];
  351. wrb = queue_head_node(txq);
  352. wrb_fill(wrb, busaddr, frag->size);
  353. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  354. queue_head_inc(txq);
  355. copied += frag->size;
  356. }
  357. if (dummy_wrb) {
  358. wrb = queue_head_node(txq);
  359. wrb_fill(wrb, 0, 0);
  360. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  361. queue_head_inc(txq);
  362. }
  363. wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
  364. wrb_cnt, copied);
  365. be_dws_cpu_to_le(hdr, sizeof(*hdr));
  366. return copied;
  367. }
  368. static netdev_tx_t be_xmit(struct sk_buff *skb,
  369. struct net_device *netdev)
  370. {
  371. struct be_adapter *adapter = netdev_priv(netdev);
  372. struct be_tx_obj *tx_obj = &adapter->tx_obj;
  373. struct be_queue_info *txq = &tx_obj->q;
  374. u32 wrb_cnt = 0, copied = 0;
  375. u32 start = txq->head;
  376. bool dummy_wrb, stopped = false;
  377. wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
  378. copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
  379. if (copied) {
  380. /* record the sent skb in the sent_skb table */
  381. BUG_ON(tx_obj->sent_skb_list[start]);
  382. tx_obj->sent_skb_list[start] = skb;
  383. /* Ensure txq has space for the next skb; Else stop the queue
  384. * *BEFORE* ringing the tx doorbell, so that we serialze the
  385. * tx compls of the current transmit which'll wake up the queue
  386. */
  387. if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
  388. txq->len) {
  389. netif_stop_queue(netdev);
  390. stopped = true;
  391. }
  392. be_txq_notify(adapter, txq->id, wrb_cnt);
  393. be_tx_stats_update(adapter, wrb_cnt, copied, stopped);
  394. } else {
  395. txq->head = start;
  396. dev_kfree_skb_any(skb);
  397. }
  398. return NETDEV_TX_OK;
  399. }
  400. static int be_change_mtu(struct net_device *netdev, int new_mtu)
  401. {
  402. struct be_adapter *adapter = netdev_priv(netdev);
  403. if (new_mtu < BE_MIN_MTU ||
  404. new_mtu > BE_MAX_JUMBO_FRAME_SIZE) {
  405. dev_info(&adapter->pdev->dev,
  406. "MTU must be between %d and %d bytes\n",
  407. BE_MIN_MTU, BE_MAX_JUMBO_FRAME_SIZE);
  408. return -EINVAL;
  409. }
  410. dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
  411. netdev->mtu, new_mtu);
  412. netdev->mtu = new_mtu;
  413. return 0;
  414. }
  415. /*
  416. * if there are BE_NUM_VLANS_SUPPORTED or lesser number of VLANS configured,
  417. * program them in BE. If more than BE_NUM_VLANS_SUPPORTED are configured,
  418. * set the BE in promiscuous VLAN mode.
  419. */
  420. static int be_vid_config(struct be_adapter *adapter)
  421. {
  422. u16 vtag[BE_NUM_VLANS_SUPPORTED];
  423. u16 ntags = 0, i;
  424. int status;
  425. if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED) {
  426. /* Construct VLAN Table to give to HW */
  427. for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
  428. if (adapter->vlan_tag[i]) {
  429. vtag[ntags] = cpu_to_le16(i);
  430. ntags++;
  431. }
  432. }
  433. status = be_cmd_vlan_config(adapter, adapter->if_handle,
  434. vtag, ntags, 1, 0);
  435. } else {
  436. status = be_cmd_vlan_config(adapter, adapter->if_handle,
  437. NULL, 0, 1, 1);
  438. }
  439. return status;
  440. }
  441. static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
  442. {
  443. struct be_adapter *adapter = netdev_priv(netdev);
  444. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  445. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  446. be_eq_notify(adapter, rx_eq->q.id, false, false, 0);
  447. be_eq_notify(adapter, tx_eq->q.id, false, false, 0);
  448. adapter->vlan_grp = grp;
  449. be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
  450. be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
  451. }
  452. static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
  453. {
  454. struct be_adapter *adapter = netdev_priv(netdev);
  455. adapter->num_vlans++;
  456. adapter->vlan_tag[vid] = 1;
  457. be_vid_config(adapter);
  458. }
  459. static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
  460. {
  461. struct be_adapter *adapter = netdev_priv(netdev);
  462. adapter->num_vlans--;
  463. adapter->vlan_tag[vid] = 0;
  464. vlan_group_set_device(adapter->vlan_grp, vid, NULL);
  465. be_vid_config(adapter);
  466. }
  467. static void be_set_multicast_list(struct net_device *netdev)
  468. {
  469. struct be_adapter *adapter = netdev_priv(netdev);
  470. if (netdev->flags & IFF_PROMISC) {
  471. be_cmd_promiscuous_config(adapter, adapter->port_num, 1);
  472. adapter->promiscuous = true;
  473. goto done;
  474. }
  475. /* BE was previously in promiscous mode; disable it */
  476. if (adapter->promiscuous) {
  477. adapter->promiscuous = false;
  478. be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
  479. }
  480. /* Enable multicast promisc if num configured exceeds what we support */
  481. if (netdev->flags & IFF_ALLMULTI || netdev->mc_count > BE_MAX_MC) {
  482. be_cmd_multicast_set(adapter, adapter->if_handle, NULL, 0,
  483. &adapter->mc_cmd_mem);
  484. goto done;
  485. }
  486. be_cmd_multicast_set(adapter, adapter->if_handle, netdev->mc_list,
  487. netdev->mc_count, &adapter->mc_cmd_mem);
  488. done:
  489. return;
  490. }
  491. static void be_rx_rate_update(struct be_adapter *adapter)
  492. {
  493. struct be_drvr_stats *stats = drvr_stats(adapter);
  494. ulong now = jiffies;
  495. /* Wrapped around */
  496. if (time_before(now, stats->be_rx_jiffies)) {
  497. stats->be_rx_jiffies = now;
  498. return;
  499. }
  500. /* Update the rate once in two seconds */
  501. if ((now - stats->be_rx_jiffies) < 2 * HZ)
  502. return;
  503. stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
  504. - stats->be_rx_bytes_prev,
  505. now - stats->be_rx_jiffies);
  506. stats->be_rx_jiffies = now;
  507. stats->be_rx_bytes_prev = stats->be_rx_bytes;
  508. }
  509. static void be_rx_stats_update(struct be_adapter *adapter,
  510. u32 pktsize, u16 numfrags)
  511. {
  512. struct be_drvr_stats *stats = drvr_stats(adapter);
  513. stats->be_rx_compl++;
  514. stats->be_rx_frags += numfrags;
  515. stats->be_rx_bytes += pktsize;
  516. }
  517. static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
  518. {
  519. u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
  520. l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
  521. ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
  522. ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
  523. if (ip_version) {
  524. tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
  525. udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
  526. }
  527. ipv6_chk = (ip_version && (tcpf || udpf));
  528. return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
  529. }
  530. static struct be_rx_page_info *
  531. get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
  532. {
  533. struct be_rx_page_info *rx_page_info;
  534. struct be_queue_info *rxq = &adapter->rx_obj.q;
  535. rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
  536. BUG_ON(!rx_page_info->page);
  537. if (rx_page_info->last_page_user)
  538. pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus),
  539. adapter->big_page_size, PCI_DMA_FROMDEVICE);
  540. atomic_dec(&rxq->used);
  541. return rx_page_info;
  542. }
  543. /* Throwaway the data in the Rx completion */
  544. static void be_rx_compl_discard(struct be_adapter *adapter,
  545. struct be_eth_rx_compl *rxcp)
  546. {
  547. struct be_queue_info *rxq = &adapter->rx_obj.q;
  548. struct be_rx_page_info *page_info;
  549. u16 rxq_idx, i, num_rcvd;
  550. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  551. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  552. for (i = 0; i < num_rcvd; i++) {
  553. page_info = get_rx_page_info(adapter, rxq_idx);
  554. put_page(page_info->page);
  555. memset(page_info, 0, sizeof(*page_info));
  556. index_inc(&rxq_idx, rxq->len);
  557. }
  558. }
  559. /*
  560. * skb_fill_rx_data forms a complete skb for an ether frame
  561. * indicated by rxcp.
  562. */
  563. static void skb_fill_rx_data(struct be_adapter *adapter,
  564. struct sk_buff *skb, struct be_eth_rx_compl *rxcp)
  565. {
  566. struct be_queue_info *rxq = &adapter->rx_obj.q;
  567. struct be_rx_page_info *page_info;
  568. u16 rxq_idx, i, num_rcvd, j;
  569. u32 pktsize, hdr_len, curr_frag_len, size;
  570. u8 *start;
  571. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  572. pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  573. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  574. page_info = get_rx_page_info(adapter, rxq_idx);
  575. start = page_address(page_info->page) + page_info->page_offset;
  576. prefetch(start);
  577. /* Copy data in the first descriptor of this completion */
  578. curr_frag_len = min(pktsize, rx_frag_size);
  579. /* Copy the header portion into skb_data */
  580. hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
  581. memcpy(skb->data, start, hdr_len);
  582. skb->len = curr_frag_len;
  583. if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
  584. /* Complete packet has now been moved to data */
  585. put_page(page_info->page);
  586. skb->data_len = 0;
  587. skb->tail += curr_frag_len;
  588. } else {
  589. skb_shinfo(skb)->nr_frags = 1;
  590. skb_shinfo(skb)->frags[0].page = page_info->page;
  591. skb_shinfo(skb)->frags[0].page_offset =
  592. page_info->page_offset + hdr_len;
  593. skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
  594. skb->data_len = curr_frag_len - hdr_len;
  595. skb->tail += hdr_len;
  596. }
  597. memset(page_info, 0, sizeof(*page_info));
  598. if (pktsize <= rx_frag_size) {
  599. BUG_ON(num_rcvd != 1);
  600. goto done;
  601. }
  602. /* More frags present for this completion */
  603. size = pktsize;
  604. for (i = 1, j = 0; i < num_rcvd; i++) {
  605. size -= curr_frag_len;
  606. index_inc(&rxq_idx, rxq->len);
  607. page_info = get_rx_page_info(adapter, rxq_idx);
  608. curr_frag_len = min(size, rx_frag_size);
  609. /* Coalesce all frags from the same physical page in one slot */
  610. if (page_info->page_offset == 0) {
  611. /* Fresh page */
  612. j++;
  613. skb_shinfo(skb)->frags[j].page = page_info->page;
  614. skb_shinfo(skb)->frags[j].page_offset =
  615. page_info->page_offset;
  616. skb_shinfo(skb)->frags[j].size = 0;
  617. skb_shinfo(skb)->nr_frags++;
  618. } else {
  619. put_page(page_info->page);
  620. }
  621. skb_shinfo(skb)->frags[j].size += curr_frag_len;
  622. skb->len += curr_frag_len;
  623. skb->data_len += curr_frag_len;
  624. memset(page_info, 0, sizeof(*page_info));
  625. }
  626. BUG_ON(j > MAX_SKB_FRAGS);
  627. done:
  628. be_rx_stats_update(adapter, pktsize, num_rcvd);
  629. return;
  630. }
  631. /* Process the RX completion indicated by rxcp when GRO is disabled */
  632. static void be_rx_compl_process(struct be_adapter *adapter,
  633. struct be_eth_rx_compl *rxcp)
  634. {
  635. struct sk_buff *skb;
  636. u32 vlanf, vid;
  637. u8 vtm;
  638. vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  639. vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
  640. /* vlanf could be wrongly set in some cards.
  641. * ignore if vtm is not set */
  642. if ((adapter->cap == 0x400) && !vtm)
  643. vlanf = 0;
  644. skb = netdev_alloc_skb_ip_align(adapter->netdev, BE_HDR_LEN);
  645. if (!skb) {
  646. if (net_ratelimit())
  647. dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
  648. be_rx_compl_discard(adapter, rxcp);
  649. return;
  650. }
  651. skb_fill_rx_data(adapter, skb, rxcp);
  652. if (do_pkt_csum(rxcp, adapter->rx_csum))
  653. skb->ip_summed = CHECKSUM_NONE;
  654. else
  655. skb->ip_summed = CHECKSUM_UNNECESSARY;
  656. skb->truesize = skb->len + sizeof(struct sk_buff);
  657. skb->protocol = eth_type_trans(skb, adapter->netdev);
  658. skb->dev = adapter->netdev;
  659. if (vlanf) {
  660. if (!adapter->vlan_grp || adapter->num_vlans == 0) {
  661. kfree_skb(skb);
  662. return;
  663. }
  664. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  665. vid = be16_to_cpu(vid);
  666. vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
  667. } else {
  668. netif_receive_skb(skb);
  669. }
  670. return;
  671. }
  672. /* Process the RX completion indicated by rxcp when GRO is enabled */
  673. static void be_rx_compl_process_gro(struct be_adapter *adapter,
  674. struct be_eth_rx_compl *rxcp)
  675. {
  676. struct be_rx_page_info *page_info;
  677. struct sk_buff *skb = NULL;
  678. struct be_queue_info *rxq = &adapter->rx_obj.q;
  679. struct be_eq_obj *eq_obj = &adapter->rx_eq;
  680. u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
  681. u16 i, rxq_idx = 0, vid, j;
  682. u8 vtm;
  683. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  684. pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  685. vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  686. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  687. vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
  688. /* vlanf could be wrongly set in some cards.
  689. * ignore if vtm is not set */
  690. if ((adapter->cap == 0x400) && !vtm)
  691. vlanf = 0;
  692. skb = napi_get_frags(&eq_obj->napi);
  693. if (!skb) {
  694. be_rx_compl_discard(adapter, rxcp);
  695. return;
  696. }
  697. remaining = pkt_size;
  698. for (i = 0, j = -1; i < num_rcvd; i++) {
  699. page_info = get_rx_page_info(adapter, rxq_idx);
  700. curr_frag_len = min(remaining, rx_frag_size);
  701. /* Coalesce all frags from the same physical page in one slot */
  702. if (i == 0 || page_info->page_offset == 0) {
  703. /* First frag or Fresh page */
  704. j++;
  705. skb_shinfo(skb)->frags[j].page = page_info->page;
  706. skb_shinfo(skb)->frags[j].page_offset =
  707. page_info->page_offset;
  708. skb_shinfo(skb)->frags[j].size = 0;
  709. } else {
  710. put_page(page_info->page);
  711. }
  712. skb_shinfo(skb)->frags[j].size += curr_frag_len;
  713. remaining -= curr_frag_len;
  714. index_inc(&rxq_idx, rxq->len);
  715. memset(page_info, 0, sizeof(*page_info));
  716. }
  717. BUG_ON(j > MAX_SKB_FRAGS);
  718. skb_shinfo(skb)->nr_frags = j + 1;
  719. skb->len = pkt_size;
  720. skb->data_len = pkt_size;
  721. skb->truesize += pkt_size;
  722. skb->ip_summed = CHECKSUM_UNNECESSARY;
  723. if (likely(!vlanf)) {
  724. napi_gro_frags(&eq_obj->napi);
  725. } else {
  726. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  727. vid = be16_to_cpu(vid);
  728. if (!adapter->vlan_grp || adapter->num_vlans == 0)
  729. return;
  730. vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid);
  731. }
  732. be_rx_stats_update(adapter, pkt_size, num_rcvd);
  733. return;
  734. }
  735. static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
  736. {
  737. struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
  738. if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
  739. return NULL;
  740. be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
  741. queue_tail_inc(&adapter->rx_obj.cq);
  742. return rxcp;
  743. }
  744. /* To reset the valid bit, we need to reset the whole word as
  745. * when walking the queue the valid entries are little-endian
  746. * and invalid entries are host endian
  747. */
  748. static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
  749. {
  750. rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
  751. }
  752. static inline struct page *be_alloc_pages(u32 size)
  753. {
  754. gfp_t alloc_flags = GFP_ATOMIC;
  755. u32 order = get_order(size);
  756. if (order > 0)
  757. alloc_flags |= __GFP_COMP;
  758. return alloc_pages(alloc_flags, order);
  759. }
  760. /*
  761. * Allocate a page, split it to fragments of size rx_frag_size and post as
  762. * receive buffers to BE
  763. */
  764. static void be_post_rx_frags(struct be_adapter *adapter)
  765. {
  766. struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
  767. struct be_rx_page_info *page_info = NULL;
  768. struct be_queue_info *rxq = &adapter->rx_obj.q;
  769. struct page *pagep = NULL;
  770. struct be_eth_rx_d *rxd;
  771. u64 page_dmaaddr = 0, frag_dmaaddr;
  772. u32 posted, page_offset = 0;
  773. page_info = &page_info_tbl[rxq->head];
  774. for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
  775. if (!pagep) {
  776. pagep = be_alloc_pages(adapter->big_page_size);
  777. if (unlikely(!pagep)) {
  778. drvr_stats(adapter)->be_ethrx_post_fail++;
  779. break;
  780. }
  781. page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
  782. adapter->big_page_size,
  783. PCI_DMA_FROMDEVICE);
  784. page_info->page_offset = 0;
  785. } else {
  786. get_page(pagep);
  787. page_info->page_offset = page_offset + rx_frag_size;
  788. }
  789. page_offset = page_info->page_offset;
  790. page_info->page = pagep;
  791. pci_unmap_addr_set(page_info, bus, page_dmaaddr);
  792. frag_dmaaddr = page_dmaaddr + page_info->page_offset;
  793. rxd = queue_head_node(rxq);
  794. rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
  795. rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
  796. queue_head_inc(rxq);
  797. /* Any space left in the current big page for another frag? */
  798. if ((page_offset + rx_frag_size + rx_frag_size) >
  799. adapter->big_page_size) {
  800. pagep = NULL;
  801. page_info->last_page_user = true;
  802. }
  803. page_info = &page_info_tbl[rxq->head];
  804. }
  805. if (pagep)
  806. page_info->last_page_user = true;
  807. if (posted) {
  808. atomic_add(posted, &rxq->used);
  809. be_rxq_notify(adapter, rxq->id, posted);
  810. } else if (atomic_read(&rxq->used) == 0) {
  811. /* Let be_worker replenish when memory is available */
  812. adapter->rx_post_starved = true;
  813. }
  814. return;
  815. }
  816. static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
  817. {
  818. struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
  819. if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
  820. return NULL;
  821. be_dws_le_to_cpu(txcp, sizeof(*txcp));
  822. txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
  823. queue_tail_inc(tx_cq);
  824. return txcp;
  825. }
  826. static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
  827. {
  828. struct be_queue_info *txq = &adapter->tx_obj.q;
  829. struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
  830. struct sk_buff *sent_skb;
  831. u16 cur_index, num_wrbs = 0;
  832. cur_index = txq->tail;
  833. sent_skb = sent_skbs[cur_index];
  834. BUG_ON(!sent_skb);
  835. sent_skbs[cur_index] = NULL;
  836. do {
  837. cur_index = txq->tail;
  838. num_wrbs++;
  839. queue_tail_inc(txq);
  840. } while (cur_index != last_index);
  841. atomic_sub(num_wrbs, &txq->used);
  842. skb_dma_unmap(&adapter->pdev->dev, sent_skb, DMA_TO_DEVICE);
  843. kfree_skb(sent_skb);
  844. }
  845. static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
  846. {
  847. struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
  848. if (!eqe->evt)
  849. return NULL;
  850. eqe->evt = le32_to_cpu(eqe->evt);
  851. queue_tail_inc(&eq_obj->q);
  852. return eqe;
  853. }
  854. static int event_handle(struct be_adapter *adapter,
  855. struct be_eq_obj *eq_obj)
  856. {
  857. struct be_eq_entry *eqe;
  858. u16 num = 0;
  859. while ((eqe = event_get(eq_obj)) != NULL) {
  860. eqe->evt = 0;
  861. num++;
  862. }
  863. /* Deal with any spurious interrupts that come
  864. * without events
  865. */
  866. be_eq_notify(adapter, eq_obj->q.id, true, true, num);
  867. if (num)
  868. napi_schedule(&eq_obj->napi);
  869. return num;
  870. }
  871. /* Just read and notify events without processing them.
  872. * Used at the time of destroying event queues */
  873. static void be_eq_clean(struct be_adapter *adapter,
  874. struct be_eq_obj *eq_obj)
  875. {
  876. struct be_eq_entry *eqe;
  877. u16 num = 0;
  878. while ((eqe = event_get(eq_obj)) != NULL) {
  879. eqe->evt = 0;
  880. num++;
  881. }
  882. if (num)
  883. be_eq_notify(adapter, eq_obj->q.id, false, true, num);
  884. }
  885. static void be_rx_q_clean(struct be_adapter *adapter)
  886. {
  887. struct be_rx_page_info *page_info;
  888. struct be_queue_info *rxq = &adapter->rx_obj.q;
  889. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  890. struct be_eth_rx_compl *rxcp;
  891. u16 tail;
  892. /* First cleanup pending rx completions */
  893. while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
  894. be_rx_compl_discard(adapter, rxcp);
  895. be_rx_compl_reset(rxcp);
  896. be_cq_notify(adapter, rx_cq->id, true, 1);
  897. }
  898. /* Then free posted rx buffer that were not used */
  899. tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
  900. for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
  901. page_info = get_rx_page_info(adapter, tail);
  902. put_page(page_info->page);
  903. memset(page_info, 0, sizeof(*page_info));
  904. }
  905. BUG_ON(atomic_read(&rxq->used));
  906. }
  907. static void be_tx_compl_clean(struct be_adapter *adapter)
  908. {
  909. struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
  910. struct be_queue_info *txq = &adapter->tx_obj.q;
  911. struct be_eth_tx_compl *txcp;
  912. u16 end_idx, cmpl = 0, timeo = 0;
  913. /* Wait for a max of 200ms for all the tx-completions to arrive. */
  914. do {
  915. while ((txcp = be_tx_compl_get(tx_cq))) {
  916. end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
  917. wrb_index, txcp);
  918. be_tx_compl_process(adapter, end_idx);
  919. cmpl++;
  920. }
  921. if (cmpl) {
  922. be_cq_notify(adapter, tx_cq->id, false, cmpl);
  923. cmpl = 0;
  924. }
  925. if (atomic_read(&txq->used) == 0 || ++timeo > 200)
  926. break;
  927. mdelay(1);
  928. } while (true);
  929. if (atomic_read(&txq->used))
  930. dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
  931. atomic_read(&txq->used));
  932. }
  933. static void be_mcc_queues_destroy(struct be_adapter *adapter)
  934. {
  935. struct be_queue_info *q;
  936. q = &adapter->mcc_obj.q;
  937. if (q->created)
  938. be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
  939. be_queue_free(adapter, q);
  940. q = &adapter->mcc_obj.cq;
  941. if (q->created)
  942. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  943. be_queue_free(adapter, q);
  944. }
  945. /* Must be called only after TX qs are created as MCC shares TX EQ */
  946. static int be_mcc_queues_create(struct be_adapter *adapter)
  947. {
  948. struct be_queue_info *q, *cq;
  949. /* Alloc MCC compl queue */
  950. cq = &adapter->mcc_obj.cq;
  951. if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
  952. sizeof(struct be_mcc_compl)))
  953. goto err;
  954. /* Ask BE to create MCC compl queue; share TX's eq */
  955. if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
  956. goto mcc_cq_free;
  957. /* Alloc MCC queue */
  958. q = &adapter->mcc_obj.q;
  959. if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
  960. goto mcc_cq_destroy;
  961. /* Ask BE to create MCC queue */
  962. if (be_cmd_mccq_create(adapter, q, cq))
  963. goto mcc_q_free;
  964. return 0;
  965. mcc_q_free:
  966. be_queue_free(adapter, q);
  967. mcc_cq_destroy:
  968. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  969. mcc_cq_free:
  970. be_queue_free(adapter, cq);
  971. err:
  972. return -1;
  973. }
  974. static void be_tx_queues_destroy(struct be_adapter *adapter)
  975. {
  976. struct be_queue_info *q;
  977. q = &adapter->tx_obj.q;
  978. if (q->created)
  979. be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
  980. be_queue_free(adapter, q);
  981. q = &adapter->tx_obj.cq;
  982. if (q->created)
  983. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  984. be_queue_free(adapter, q);
  985. /* Clear any residual events */
  986. be_eq_clean(adapter, &adapter->tx_eq);
  987. q = &adapter->tx_eq.q;
  988. if (q->created)
  989. be_cmd_q_destroy(adapter, q, QTYPE_EQ);
  990. be_queue_free(adapter, q);
  991. }
  992. static int be_tx_queues_create(struct be_adapter *adapter)
  993. {
  994. struct be_queue_info *eq, *q, *cq;
  995. adapter->tx_eq.max_eqd = 0;
  996. adapter->tx_eq.min_eqd = 0;
  997. adapter->tx_eq.cur_eqd = 96;
  998. adapter->tx_eq.enable_aic = false;
  999. /* Alloc Tx Event queue */
  1000. eq = &adapter->tx_eq.q;
  1001. if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
  1002. return -1;
  1003. /* Ask BE to create Tx Event queue */
  1004. if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
  1005. goto tx_eq_free;
  1006. /* Alloc TX eth compl queue */
  1007. cq = &adapter->tx_obj.cq;
  1008. if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
  1009. sizeof(struct be_eth_tx_compl)))
  1010. goto tx_eq_destroy;
  1011. /* Ask BE to create Tx eth compl queue */
  1012. if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
  1013. goto tx_cq_free;
  1014. /* Alloc TX eth queue */
  1015. q = &adapter->tx_obj.q;
  1016. if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
  1017. goto tx_cq_destroy;
  1018. /* Ask BE to create Tx eth queue */
  1019. if (be_cmd_txq_create(adapter, q, cq))
  1020. goto tx_q_free;
  1021. return 0;
  1022. tx_q_free:
  1023. be_queue_free(adapter, q);
  1024. tx_cq_destroy:
  1025. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  1026. tx_cq_free:
  1027. be_queue_free(adapter, cq);
  1028. tx_eq_destroy:
  1029. be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
  1030. tx_eq_free:
  1031. be_queue_free(adapter, eq);
  1032. return -1;
  1033. }
  1034. static void be_rx_queues_destroy(struct be_adapter *adapter)
  1035. {
  1036. struct be_queue_info *q;
  1037. q = &adapter->rx_obj.q;
  1038. if (q->created) {
  1039. be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
  1040. be_rx_q_clean(adapter);
  1041. }
  1042. be_queue_free(adapter, q);
  1043. q = &adapter->rx_obj.cq;
  1044. if (q->created)
  1045. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  1046. be_queue_free(adapter, q);
  1047. /* Clear any residual events */
  1048. be_eq_clean(adapter, &adapter->rx_eq);
  1049. q = &adapter->rx_eq.q;
  1050. if (q->created)
  1051. be_cmd_q_destroy(adapter, q, QTYPE_EQ);
  1052. be_queue_free(adapter, q);
  1053. }
  1054. static int be_rx_queues_create(struct be_adapter *adapter)
  1055. {
  1056. struct be_queue_info *eq, *q, *cq;
  1057. int rc;
  1058. adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
  1059. adapter->rx_eq.max_eqd = BE_MAX_EQD;
  1060. adapter->rx_eq.min_eqd = 0;
  1061. adapter->rx_eq.cur_eqd = 0;
  1062. adapter->rx_eq.enable_aic = true;
  1063. /* Alloc Rx Event queue */
  1064. eq = &adapter->rx_eq.q;
  1065. rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
  1066. sizeof(struct be_eq_entry));
  1067. if (rc)
  1068. return rc;
  1069. /* Ask BE to create Rx Event queue */
  1070. rc = be_cmd_eq_create(adapter, eq, adapter->rx_eq.cur_eqd);
  1071. if (rc)
  1072. goto rx_eq_free;
  1073. /* Alloc RX eth compl queue */
  1074. cq = &adapter->rx_obj.cq;
  1075. rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
  1076. sizeof(struct be_eth_rx_compl));
  1077. if (rc)
  1078. goto rx_eq_destroy;
  1079. /* Ask BE to create Rx eth compl queue */
  1080. rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
  1081. if (rc)
  1082. goto rx_cq_free;
  1083. /* Alloc RX eth queue */
  1084. q = &adapter->rx_obj.q;
  1085. rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
  1086. if (rc)
  1087. goto rx_cq_destroy;
  1088. /* Ask BE to create Rx eth queue */
  1089. rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
  1090. BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
  1091. if (rc)
  1092. goto rx_q_free;
  1093. return 0;
  1094. rx_q_free:
  1095. be_queue_free(adapter, q);
  1096. rx_cq_destroy:
  1097. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  1098. rx_cq_free:
  1099. be_queue_free(adapter, cq);
  1100. rx_eq_destroy:
  1101. be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
  1102. rx_eq_free:
  1103. be_queue_free(adapter, eq);
  1104. return rc;
  1105. }
  1106. /* There are 8 evt ids per func. Retruns the evt id's bit number */
  1107. static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id)
  1108. {
  1109. return eq_id - 8 * be_pci_func(adapter);
  1110. }
  1111. static irqreturn_t be_intx(int irq, void *dev)
  1112. {
  1113. struct be_adapter *adapter = dev;
  1114. int isr;
  1115. isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
  1116. be_pci_func(adapter) * CEV_ISR_SIZE);
  1117. if (!isr)
  1118. return IRQ_NONE;
  1119. event_handle(adapter, &adapter->tx_eq);
  1120. event_handle(adapter, &adapter->rx_eq);
  1121. return IRQ_HANDLED;
  1122. }
  1123. static irqreturn_t be_msix_rx(int irq, void *dev)
  1124. {
  1125. struct be_adapter *adapter = dev;
  1126. event_handle(adapter, &adapter->rx_eq);
  1127. return IRQ_HANDLED;
  1128. }
  1129. static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
  1130. {
  1131. struct be_adapter *adapter = dev;
  1132. event_handle(adapter, &adapter->tx_eq);
  1133. return IRQ_HANDLED;
  1134. }
  1135. static inline bool do_gro(struct be_adapter *adapter,
  1136. struct be_eth_rx_compl *rxcp)
  1137. {
  1138. int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
  1139. int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
  1140. if (err)
  1141. drvr_stats(adapter)->be_rxcp_err++;
  1142. return (tcp_frame && !err) ? true : false;
  1143. }
  1144. int be_poll_rx(struct napi_struct *napi, int budget)
  1145. {
  1146. struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
  1147. struct be_adapter *adapter =
  1148. container_of(rx_eq, struct be_adapter, rx_eq);
  1149. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  1150. struct be_eth_rx_compl *rxcp;
  1151. u32 work_done;
  1152. adapter->stats.drvr_stats.be_rx_polls++;
  1153. for (work_done = 0; work_done < budget; work_done++) {
  1154. rxcp = be_rx_compl_get(adapter);
  1155. if (!rxcp)
  1156. break;
  1157. if (do_gro(adapter, rxcp))
  1158. be_rx_compl_process_gro(adapter, rxcp);
  1159. else
  1160. be_rx_compl_process(adapter, rxcp);
  1161. be_rx_compl_reset(rxcp);
  1162. }
  1163. /* Refill the queue */
  1164. if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
  1165. be_post_rx_frags(adapter);
  1166. /* All consumed */
  1167. if (work_done < budget) {
  1168. napi_complete(napi);
  1169. be_cq_notify(adapter, rx_cq->id, true, work_done);
  1170. } else {
  1171. /* More to be consumed; continue with interrupts disabled */
  1172. be_cq_notify(adapter, rx_cq->id, false, work_done);
  1173. }
  1174. return work_done;
  1175. }
  1176. void be_process_tx(struct be_adapter *adapter)
  1177. {
  1178. struct be_queue_info *txq = &adapter->tx_obj.q;
  1179. struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
  1180. struct be_eth_tx_compl *txcp;
  1181. u32 num_cmpl = 0;
  1182. u16 end_idx;
  1183. while ((txcp = be_tx_compl_get(tx_cq))) {
  1184. end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
  1185. wrb_index, txcp);
  1186. be_tx_compl_process(adapter, end_idx);
  1187. num_cmpl++;
  1188. }
  1189. if (num_cmpl) {
  1190. be_cq_notify(adapter, tx_cq->id, true, num_cmpl);
  1191. /* As Tx wrbs have been freed up, wake up netdev queue if
  1192. * it was stopped due to lack of tx wrbs.
  1193. */
  1194. if (netif_queue_stopped(adapter->netdev) &&
  1195. atomic_read(&txq->used) < txq->len / 2) {
  1196. netif_wake_queue(adapter->netdev);
  1197. }
  1198. drvr_stats(adapter)->be_tx_events++;
  1199. drvr_stats(adapter)->be_tx_compl += num_cmpl;
  1200. }
  1201. }
  1202. /* As TX and MCC share the same EQ check for both TX and MCC completions.
  1203. * For TX/MCC we don't honour budget; consume everything
  1204. */
  1205. static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
  1206. {
  1207. struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
  1208. struct be_adapter *adapter =
  1209. container_of(tx_eq, struct be_adapter, tx_eq);
  1210. napi_complete(napi);
  1211. be_process_tx(adapter);
  1212. be_process_mcc(adapter);
  1213. return 1;
  1214. }
  1215. static void be_worker(struct work_struct *work)
  1216. {
  1217. struct be_adapter *adapter =
  1218. container_of(work, struct be_adapter, work.work);
  1219. be_cmd_get_stats(adapter, &adapter->stats.cmd);
  1220. /* Set EQ delay */
  1221. be_rx_eqd_update(adapter);
  1222. be_tx_rate_update(adapter);
  1223. be_rx_rate_update(adapter);
  1224. if (adapter->rx_post_starved) {
  1225. adapter->rx_post_starved = false;
  1226. be_post_rx_frags(adapter);
  1227. }
  1228. schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
  1229. }
  1230. static void be_msix_disable(struct be_adapter *adapter)
  1231. {
  1232. if (adapter->msix_enabled) {
  1233. pci_disable_msix(adapter->pdev);
  1234. adapter->msix_enabled = false;
  1235. }
  1236. }
  1237. static void be_msix_enable(struct be_adapter *adapter)
  1238. {
  1239. int i, status;
  1240. for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
  1241. adapter->msix_entries[i].entry = i;
  1242. status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
  1243. BE_NUM_MSIX_VECTORS);
  1244. if (status == 0)
  1245. adapter->msix_enabled = true;
  1246. return;
  1247. }
  1248. static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
  1249. {
  1250. return adapter->msix_entries[
  1251. be_evt_bit_get(adapter, eq_id)].vector;
  1252. }
  1253. static int be_request_irq(struct be_adapter *adapter,
  1254. struct be_eq_obj *eq_obj,
  1255. void *handler, char *desc)
  1256. {
  1257. struct net_device *netdev = adapter->netdev;
  1258. int vec;
  1259. sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
  1260. vec = be_msix_vec_get(adapter, eq_obj->q.id);
  1261. return request_irq(vec, handler, 0, eq_obj->desc, adapter);
  1262. }
  1263. static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj)
  1264. {
  1265. int vec = be_msix_vec_get(adapter, eq_obj->q.id);
  1266. free_irq(vec, adapter);
  1267. }
  1268. static int be_msix_register(struct be_adapter *adapter)
  1269. {
  1270. int status;
  1271. status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx");
  1272. if (status)
  1273. goto err;
  1274. status = be_request_irq(adapter, &adapter->rx_eq, be_msix_rx, "rx");
  1275. if (status)
  1276. goto free_tx_irq;
  1277. return 0;
  1278. free_tx_irq:
  1279. be_free_irq(adapter, &adapter->tx_eq);
  1280. err:
  1281. dev_warn(&adapter->pdev->dev,
  1282. "MSIX Request IRQ failed - err %d\n", status);
  1283. pci_disable_msix(adapter->pdev);
  1284. adapter->msix_enabled = false;
  1285. return status;
  1286. }
  1287. static int be_irq_register(struct be_adapter *adapter)
  1288. {
  1289. struct net_device *netdev = adapter->netdev;
  1290. int status;
  1291. if (adapter->msix_enabled) {
  1292. status = be_msix_register(adapter);
  1293. if (status == 0)
  1294. goto done;
  1295. }
  1296. /* INTx */
  1297. netdev->irq = adapter->pdev->irq;
  1298. status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
  1299. adapter);
  1300. if (status) {
  1301. dev_err(&adapter->pdev->dev,
  1302. "INTx request IRQ failed - err %d\n", status);
  1303. return status;
  1304. }
  1305. done:
  1306. adapter->isr_registered = true;
  1307. return 0;
  1308. }
  1309. static void be_irq_unregister(struct be_adapter *adapter)
  1310. {
  1311. struct net_device *netdev = adapter->netdev;
  1312. if (!adapter->isr_registered)
  1313. return;
  1314. /* INTx */
  1315. if (!adapter->msix_enabled) {
  1316. free_irq(netdev->irq, adapter);
  1317. goto done;
  1318. }
  1319. /* MSIx */
  1320. be_free_irq(adapter, &adapter->tx_eq);
  1321. be_free_irq(adapter, &adapter->rx_eq);
  1322. done:
  1323. adapter->isr_registered = false;
  1324. return;
  1325. }
  1326. static int be_open(struct net_device *netdev)
  1327. {
  1328. struct be_adapter *adapter = netdev_priv(netdev);
  1329. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1330. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1331. bool link_up;
  1332. int status;
  1333. u8 mac_speed;
  1334. u16 link_speed;
  1335. /* First time posting */
  1336. be_post_rx_frags(adapter);
  1337. napi_enable(&rx_eq->napi);
  1338. napi_enable(&tx_eq->napi);
  1339. be_irq_register(adapter);
  1340. be_intr_set(adapter, true);
  1341. /* The evt queues are created in unarmed state; arm them */
  1342. be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
  1343. be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
  1344. /* Rx compl queue may be in unarmed state; rearm it */
  1345. be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0);
  1346. status = be_cmd_link_status_query(adapter, &link_up, &mac_speed,
  1347. &link_speed);
  1348. if (status)
  1349. goto ret_sts;
  1350. be_link_status_update(adapter, link_up);
  1351. status = be_vid_config(adapter);
  1352. if (status)
  1353. goto ret_sts;
  1354. status = be_cmd_set_flow_control(adapter,
  1355. adapter->tx_fc, adapter->rx_fc);
  1356. if (status)
  1357. goto ret_sts;
  1358. schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
  1359. ret_sts:
  1360. return status;
  1361. }
  1362. static int be_setup(struct be_adapter *adapter)
  1363. {
  1364. struct net_device *netdev = adapter->netdev;
  1365. u32 cap_flags, en_flags;
  1366. int status;
  1367. cap_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
  1368. BE_IF_FLAGS_MCAST_PROMISCUOUS |
  1369. BE_IF_FLAGS_PROMISCUOUS |
  1370. BE_IF_FLAGS_PASS_L3L4_ERRORS;
  1371. en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
  1372. BE_IF_FLAGS_PASS_L3L4_ERRORS;
  1373. status = be_cmd_if_create(adapter, cap_flags, en_flags,
  1374. netdev->dev_addr, false/* pmac_invalid */,
  1375. &adapter->if_handle, &adapter->pmac_id);
  1376. if (status != 0)
  1377. goto do_none;
  1378. status = be_tx_queues_create(adapter);
  1379. if (status != 0)
  1380. goto if_destroy;
  1381. status = be_rx_queues_create(adapter);
  1382. if (status != 0)
  1383. goto tx_qs_destroy;
  1384. status = be_mcc_queues_create(adapter);
  1385. if (status != 0)
  1386. goto rx_qs_destroy;
  1387. return 0;
  1388. rx_qs_destroy:
  1389. be_rx_queues_destroy(adapter);
  1390. tx_qs_destroy:
  1391. be_tx_queues_destroy(adapter);
  1392. if_destroy:
  1393. be_cmd_if_destroy(adapter, adapter->if_handle);
  1394. do_none:
  1395. return status;
  1396. }
  1397. static int be_clear(struct be_adapter *adapter)
  1398. {
  1399. be_mcc_queues_destroy(adapter);
  1400. be_rx_queues_destroy(adapter);
  1401. be_tx_queues_destroy(adapter);
  1402. be_cmd_if_destroy(adapter, adapter->if_handle);
  1403. /* tell fw we're done with firing cmds */
  1404. be_cmd_fw_clean(adapter);
  1405. return 0;
  1406. }
  1407. static int be_close(struct net_device *netdev)
  1408. {
  1409. struct be_adapter *adapter = netdev_priv(netdev);
  1410. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1411. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1412. int vec;
  1413. cancel_delayed_work_sync(&adapter->work);
  1414. netif_stop_queue(netdev);
  1415. netif_carrier_off(netdev);
  1416. adapter->link_up = false;
  1417. be_intr_set(adapter, false);
  1418. if (adapter->msix_enabled) {
  1419. vec = be_msix_vec_get(adapter, tx_eq->q.id);
  1420. synchronize_irq(vec);
  1421. vec = be_msix_vec_get(adapter, rx_eq->q.id);
  1422. synchronize_irq(vec);
  1423. } else {
  1424. synchronize_irq(netdev->irq);
  1425. }
  1426. be_irq_unregister(adapter);
  1427. napi_disable(&rx_eq->napi);
  1428. napi_disable(&tx_eq->napi);
  1429. /* Wait for all pending tx completions to arrive so that
  1430. * all tx skbs are freed.
  1431. */
  1432. be_tx_compl_clean(adapter);
  1433. return 0;
  1434. }
  1435. #define FW_FILE_HDR_SIGN "ServerEngines Corp. "
  1436. char flash_cookie[2][16] = {"*** SE FLAS",
  1437. "H DIRECTORY *** "};
  1438. static bool be_flash_redboot(struct be_adapter *adapter,
  1439. const u8 *p)
  1440. {
  1441. u32 crc_offset;
  1442. u8 flashed_crc[4];
  1443. int status;
  1444. crc_offset = FLASH_REDBOOT_START + FLASH_REDBOOT_IMAGE_MAX_SIZE - 4
  1445. + sizeof(struct flash_file_hdr) - 32*1024;
  1446. p += crc_offset;
  1447. status = be_cmd_get_flash_crc(adapter, flashed_crc);
  1448. if (status) {
  1449. dev_err(&adapter->pdev->dev,
  1450. "could not get crc from flash, not flashing redboot\n");
  1451. return false;
  1452. }
  1453. /*update redboot only if crc does not match*/
  1454. if (!memcmp(flashed_crc, p, 4))
  1455. return false;
  1456. else
  1457. return true;
  1458. }
  1459. static int be_flash_image(struct be_adapter *adapter,
  1460. const struct firmware *fw,
  1461. struct be_dma_mem *flash_cmd, u32 flash_type)
  1462. {
  1463. int status;
  1464. u32 flash_op, image_offset = 0, total_bytes, image_size = 0;
  1465. int num_bytes;
  1466. const u8 *p = fw->data;
  1467. struct be_cmd_write_flashrom *req = flash_cmd->va;
  1468. switch (flash_type) {
  1469. case FLASHROM_TYPE_ISCSI_ACTIVE:
  1470. image_offset = FLASH_iSCSI_PRIMARY_IMAGE_START;
  1471. image_size = FLASH_IMAGE_MAX_SIZE;
  1472. break;
  1473. case FLASHROM_TYPE_ISCSI_BACKUP:
  1474. image_offset = FLASH_iSCSI_BACKUP_IMAGE_START;
  1475. image_size = FLASH_IMAGE_MAX_SIZE;
  1476. break;
  1477. case FLASHROM_TYPE_FCOE_FW_ACTIVE:
  1478. image_offset = FLASH_FCoE_PRIMARY_IMAGE_START;
  1479. image_size = FLASH_IMAGE_MAX_SIZE;
  1480. break;
  1481. case FLASHROM_TYPE_FCOE_FW_BACKUP:
  1482. image_offset = FLASH_FCoE_BACKUP_IMAGE_START;
  1483. image_size = FLASH_IMAGE_MAX_SIZE;
  1484. break;
  1485. case FLASHROM_TYPE_BIOS:
  1486. image_offset = FLASH_iSCSI_BIOS_START;
  1487. image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
  1488. break;
  1489. case FLASHROM_TYPE_FCOE_BIOS:
  1490. image_offset = FLASH_FCoE_BIOS_START;
  1491. image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
  1492. break;
  1493. case FLASHROM_TYPE_PXE_BIOS:
  1494. image_offset = FLASH_PXE_BIOS_START;
  1495. image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
  1496. break;
  1497. case FLASHROM_TYPE_REDBOOT:
  1498. if (!be_flash_redboot(adapter, fw->data))
  1499. return 0;
  1500. image_offset = FLASH_REDBOOT_ISM_START;
  1501. image_size = FLASH_REDBOOT_IMAGE_MAX_SIZE;
  1502. break;
  1503. default:
  1504. return 0;
  1505. }
  1506. p += sizeof(struct flash_file_hdr) + image_offset;
  1507. if (p + image_size > fw->data + fw->size)
  1508. return -1;
  1509. total_bytes = image_size;
  1510. while (total_bytes) {
  1511. if (total_bytes > 32*1024)
  1512. num_bytes = 32*1024;
  1513. else
  1514. num_bytes = total_bytes;
  1515. total_bytes -= num_bytes;
  1516. if (!total_bytes)
  1517. flash_op = FLASHROM_OPER_FLASH;
  1518. else
  1519. flash_op = FLASHROM_OPER_SAVE;
  1520. memcpy(req->params.data_buf, p, num_bytes);
  1521. p += num_bytes;
  1522. status = be_cmd_write_flashrom(adapter, flash_cmd,
  1523. flash_type, flash_op, num_bytes);
  1524. if (status) {
  1525. dev_err(&adapter->pdev->dev,
  1526. "cmd to write to flash rom failed. type/op %d/%d\n",
  1527. flash_type, flash_op);
  1528. return -1;
  1529. }
  1530. yield();
  1531. }
  1532. return 0;
  1533. }
  1534. int be_load_fw(struct be_adapter *adapter, u8 *func)
  1535. {
  1536. char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
  1537. const struct firmware *fw;
  1538. struct flash_file_hdr *fhdr;
  1539. struct flash_section_info *fsec = NULL;
  1540. struct be_dma_mem flash_cmd;
  1541. int status;
  1542. const u8 *p;
  1543. bool entry_found = false;
  1544. int flash_type;
  1545. char fw_ver[FW_VER_LEN];
  1546. char fw_cfg;
  1547. status = be_cmd_get_fw_ver(adapter, fw_ver);
  1548. if (status)
  1549. return status;
  1550. fw_cfg = *(fw_ver + 2);
  1551. if (fw_cfg == '0')
  1552. fw_cfg = '1';
  1553. strcpy(fw_file, func);
  1554. status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
  1555. if (status)
  1556. goto fw_exit;
  1557. p = fw->data;
  1558. fhdr = (struct flash_file_hdr *) p;
  1559. if (memcmp(fhdr->sign, FW_FILE_HDR_SIGN, strlen(FW_FILE_HDR_SIGN))) {
  1560. dev_err(&adapter->pdev->dev,
  1561. "Firmware(%s) load error (signature did not match)\n",
  1562. fw_file);
  1563. status = -1;
  1564. goto fw_exit;
  1565. }
  1566. dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
  1567. p += sizeof(struct flash_file_hdr);
  1568. while (p < (fw->data + fw->size)) {
  1569. fsec = (struct flash_section_info *)p;
  1570. if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie))) {
  1571. entry_found = true;
  1572. break;
  1573. }
  1574. p += 32;
  1575. }
  1576. if (!entry_found) {
  1577. status = -1;
  1578. dev_err(&adapter->pdev->dev,
  1579. "Flash cookie not found in firmware image\n");
  1580. goto fw_exit;
  1581. }
  1582. flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
  1583. flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size,
  1584. &flash_cmd.dma);
  1585. if (!flash_cmd.va) {
  1586. status = -ENOMEM;
  1587. dev_err(&adapter->pdev->dev,
  1588. "Memory allocation failure while flashing\n");
  1589. goto fw_exit;
  1590. }
  1591. for (flash_type = FLASHROM_TYPE_ISCSI_ACTIVE;
  1592. flash_type <= FLASHROM_TYPE_FCOE_FW_BACKUP; flash_type++) {
  1593. status = be_flash_image(adapter, fw, &flash_cmd,
  1594. flash_type);
  1595. if (status)
  1596. break;
  1597. }
  1598. pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va,
  1599. flash_cmd.dma);
  1600. if (status) {
  1601. dev_err(&adapter->pdev->dev, "Firmware load error\n");
  1602. goto fw_exit;
  1603. }
  1604. dev_info(&adapter->pdev->dev, "Firmware flashed succesfully\n");
  1605. fw_exit:
  1606. release_firmware(fw);
  1607. return status;
  1608. }
  1609. static struct net_device_ops be_netdev_ops = {
  1610. .ndo_open = be_open,
  1611. .ndo_stop = be_close,
  1612. .ndo_start_xmit = be_xmit,
  1613. .ndo_get_stats = be_get_stats,
  1614. .ndo_set_rx_mode = be_set_multicast_list,
  1615. .ndo_set_mac_address = be_mac_addr_set,
  1616. .ndo_change_mtu = be_change_mtu,
  1617. .ndo_validate_addr = eth_validate_addr,
  1618. .ndo_vlan_rx_register = be_vlan_register,
  1619. .ndo_vlan_rx_add_vid = be_vlan_add_vid,
  1620. .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
  1621. };
  1622. static void be_netdev_init(struct net_device *netdev)
  1623. {
  1624. struct be_adapter *adapter = netdev_priv(netdev);
  1625. netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
  1626. NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_HW_CSUM |
  1627. NETIF_F_GRO;
  1628. netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM;
  1629. netdev->flags |= IFF_MULTICAST;
  1630. adapter->rx_csum = true;
  1631. /* Default settings for Rx and Tx flow control */
  1632. adapter->rx_fc = true;
  1633. adapter->tx_fc = true;
  1634. netif_set_gso_max_size(netdev, 65535);
  1635. BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
  1636. SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
  1637. netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
  1638. BE_NAPI_WEIGHT);
  1639. netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
  1640. BE_NAPI_WEIGHT);
  1641. netif_carrier_off(netdev);
  1642. netif_stop_queue(netdev);
  1643. }
  1644. static void be_unmap_pci_bars(struct be_adapter *adapter)
  1645. {
  1646. if (adapter->csr)
  1647. iounmap(adapter->csr);
  1648. if (adapter->db)
  1649. iounmap(adapter->db);
  1650. if (adapter->pcicfg)
  1651. iounmap(adapter->pcicfg);
  1652. }
  1653. static int be_map_pci_bars(struct be_adapter *adapter)
  1654. {
  1655. u8 __iomem *addr;
  1656. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
  1657. pci_resource_len(adapter->pdev, 2));
  1658. if (addr == NULL)
  1659. return -ENOMEM;
  1660. adapter->csr = addr;
  1661. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4),
  1662. 128 * 1024);
  1663. if (addr == NULL)
  1664. goto pci_map_err;
  1665. adapter->db = addr;
  1666. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 1),
  1667. pci_resource_len(adapter->pdev, 1));
  1668. if (addr == NULL)
  1669. goto pci_map_err;
  1670. adapter->pcicfg = addr;
  1671. return 0;
  1672. pci_map_err:
  1673. be_unmap_pci_bars(adapter);
  1674. return -ENOMEM;
  1675. }
  1676. static void be_ctrl_cleanup(struct be_adapter *adapter)
  1677. {
  1678. struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
  1679. be_unmap_pci_bars(adapter);
  1680. if (mem->va)
  1681. pci_free_consistent(adapter->pdev, mem->size,
  1682. mem->va, mem->dma);
  1683. mem = &adapter->mc_cmd_mem;
  1684. if (mem->va)
  1685. pci_free_consistent(adapter->pdev, mem->size,
  1686. mem->va, mem->dma);
  1687. }
  1688. static int be_ctrl_init(struct be_adapter *adapter)
  1689. {
  1690. struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
  1691. struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
  1692. struct be_dma_mem *mc_cmd_mem = &adapter->mc_cmd_mem;
  1693. int status;
  1694. status = be_map_pci_bars(adapter);
  1695. if (status)
  1696. goto done;
  1697. mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
  1698. mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
  1699. mbox_mem_alloc->size, &mbox_mem_alloc->dma);
  1700. if (!mbox_mem_alloc->va) {
  1701. status = -ENOMEM;
  1702. goto unmap_pci_bars;
  1703. }
  1704. mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
  1705. mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
  1706. mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
  1707. memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
  1708. mc_cmd_mem->size = sizeof(struct be_cmd_req_mcast_mac_config);
  1709. mc_cmd_mem->va = pci_alloc_consistent(adapter->pdev, mc_cmd_mem->size,
  1710. &mc_cmd_mem->dma);
  1711. if (mc_cmd_mem->va == NULL) {
  1712. status = -ENOMEM;
  1713. goto free_mbox;
  1714. }
  1715. memset(mc_cmd_mem->va, 0, mc_cmd_mem->size);
  1716. spin_lock_init(&adapter->mbox_lock);
  1717. spin_lock_init(&adapter->mcc_lock);
  1718. spin_lock_init(&adapter->mcc_cq_lock);
  1719. return 0;
  1720. free_mbox:
  1721. pci_free_consistent(adapter->pdev, mbox_mem_alloc->size,
  1722. mbox_mem_alloc->va, mbox_mem_alloc->dma);
  1723. unmap_pci_bars:
  1724. be_unmap_pci_bars(adapter);
  1725. done:
  1726. return status;
  1727. }
  1728. static void be_stats_cleanup(struct be_adapter *adapter)
  1729. {
  1730. struct be_stats_obj *stats = &adapter->stats;
  1731. struct be_dma_mem *cmd = &stats->cmd;
  1732. if (cmd->va)
  1733. pci_free_consistent(adapter->pdev, cmd->size,
  1734. cmd->va, cmd->dma);
  1735. }
  1736. static int be_stats_init(struct be_adapter *adapter)
  1737. {
  1738. struct be_stats_obj *stats = &adapter->stats;
  1739. struct be_dma_mem *cmd = &stats->cmd;
  1740. cmd->size = sizeof(struct be_cmd_req_get_stats);
  1741. cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
  1742. if (cmd->va == NULL)
  1743. return -1;
  1744. return 0;
  1745. }
  1746. static void __devexit be_remove(struct pci_dev *pdev)
  1747. {
  1748. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1749. if (!adapter)
  1750. return;
  1751. unregister_netdev(adapter->netdev);
  1752. be_clear(adapter);
  1753. be_stats_cleanup(adapter);
  1754. be_ctrl_cleanup(adapter);
  1755. be_msix_disable(adapter);
  1756. pci_set_drvdata(pdev, NULL);
  1757. pci_release_regions(pdev);
  1758. pci_disable_device(pdev);
  1759. free_netdev(adapter->netdev);
  1760. }
  1761. static int be_get_config(struct be_adapter *adapter)
  1762. {
  1763. int status;
  1764. u8 mac[ETH_ALEN];
  1765. status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
  1766. if (status)
  1767. return status;
  1768. status = be_cmd_query_fw_cfg(adapter,
  1769. &adapter->port_num, &adapter->cap);
  1770. if (status)
  1771. return status;
  1772. memset(mac, 0, ETH_ALEN);
  1773. status = be_cmd_mac_addr_query(adapter, mac,
  1774. MAC_ADDRESS_TYPE_NETWORK, true /*permanent */, 0);
  1775. if (status)
  1776. return status;
  1777. if (!is_valid_ether_addr(mac))
  1778. return -EADDRNOTAVAIL;
  1779. memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
  1780. memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
  1781. return 0;
  1782. }
  1783. static int __devinit be_probe(struct pci_dev *pdev,
  1784. const struct pci_device_id *pdev_id)
  1785. {
  1786. int status = 0;
  1787. struct be_adapter *adapter;
  1788. struct net_device *netdev;
  1789. status = pci_enable_device(pdev);
  1790. if (status)
  1791. goto do_none;
  1792. status = pci_request_regions(pdev, DRV_NAME);
  1793. if (status)
  1794. goto disable_dev;
  1795. pci_set_master(pdev);
  1796. netdev = alloc_etherdev(sizeof(struct be_adapter));
  1797. if (netdev == NULL) {
  1798. status = -ENOMEM;
  1799. goto rel_reg;
  1800. }
  1801. adapter = netdev_priv(netdev);
  1802. adapter->pdev = pdev;
  1803. pci_set_drvdata(pdev, adapter);
  1804. adapter->netdev = netdev;
  1805. be_netdev_init(netdev);
  1806. SET_NETDEV_DEV(netdev, &pdev->dev);
  1807. be_msix_enable(adapter);
  1808. status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  1809. if (!status) {
  1810. netdev->features |= NETIF_F_HIGHDMA;
  1811. } else {
  1812. status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  1813. if (status) {
  1814. dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
  1815. goto free_netdev;
  1816. }
  1817. }
  1818. status = be_ctrl_init(adapter);
  1819. if (status)
  1820. goto free_netdev;
  1821. /* sync up with fw's ready state */
  1822. status = be_cmd_POST(adapter);
  1823. if (status)
  1824. goto ctrl_clean;
  1825. /* tell fw we're ready to fire cmds */
  1826. status = be_cmd_fw_init(adapter);
  1827. if (status)
  1828. goto ctrl_clean;
  1829. status = be_cmd_reset_function(adapter);
  1830. if (status)
  1831. goto ctrl_clean;
  1832. status = be_stats_init(adapter);
  1833. if (status)
  1834. goto ctrl_clean;
  1835. status = be_get_config(adapter);
  1836. if (status)
  1837. goto stats_clean;
  1838. INIT_DELAYED_WORK(&adapter->work, be_worker);
  1839. status = be_setup(adapter);
  1840. if (status)
  1841. goto stats_clean;
  1842. status = register_netdev(netdev);
  1843. if (status != 0)
  1844. goto unsetup;
  1845. dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
  1846. return 0;
  1847. unsetup:
  1848. be_clear(adapter);
  1849. stats_clean:
  1850. be_stats_cleanup(adapter);
  1851. ctrl_clean:
  1852. be_ctrl_cleanup(adapter);
  1853. free_netdev:
  1854. be_msix_disable(adapter);
  1855. free_netdev(adapter->netdev);
  1856. pci_set_drvdata(pdev, NULL);
  1857. rel_reg:
  1858. pci_release_regions(pdev);
  1859. disable_dev:
  1860. pci_disable_device(pdev);
  1861. do_none:
  1862. dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
  1863. return status;
  1864. }
  1865. static int be_suspend(struct pci_dev *pdev, pm_message_t state)
  1866. {
  1867. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1868. struct net_device *netdev = adapter->netdev;
  1869. netif_device_detach(netdev);
  1870. if (netif_running(netdev)) {
  1871. rtnl_lock();
  1872. be_close(netdev);
  1873. rtnl_unlock();
  1874. }
  1875. be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
  1876. be_clear(adapter);
  1877. pci_save_state(pdev);
  1878. pci_disable_device(pdev);
  1879. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  1880. return 0;
  1881. }
  1882. static int be_resume(struct pci_dev *pdev)
  1883. {
  1884. int status = 0;
  1885. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1886. struct net_device *netdev = adapter->netdev;
  1887. netif_device_detach(netdev);
  1888. status = pci_enable_device(pdev);
  1889. if (status)
  1890. return status;
  1891. pci_set_power_state(pdev, 0);
  1892. pci_restore_state(pdev);
  1893. /* tell fw we're ready to fire cmds */
  1894. status = be_cmd_fw_init(adapter);
  1895. if (status)
  1896. return status;
  1897. be_setup(adapter);
  1898. if (netif_running(netdev)) {
  1899. rtnl_lock();
  1900. be_open(netdev);
  1901. rtnl_unlock();
  1902. }
  1903. netif_device_attach(netdev);
  1904. return 0;
  1905. }
  1906. static struct pci_driver be_driver = {
  1907. .name = DRV_NAME,
  1908. .id_table = be_dev_ids,
  1909. .probe = be_probe,
  1910. .remove = be_remove,
  1911. .suspend = be_suspend,
  1912. .resume = be_resume
  1913. };
  1914. static int __init be_init_module(void)
  1915. {
  1916. if (rx_frag_size != 8192 && rx_frag_size != 4096
  1917. && rx_frag_size != 2048) {
  1918. printk(KERN_WARNING DRV_NAME
  1919. " : Module param rx_frag_size must be 2048/4096/8192."
  1920. " Using 2048\n");
  1921. rx_frag_size = 2048;
  1922. }
  1923. return pci_register_driver(&be_driver);
  1924. }
  1925. module_init(be_init_module);
  1926. static void __exit be_exit_module(void)
  1927. {
  1928. pci_unregister_driver(&be_driver);
  1929. }
  1930. module_exit(be_exit_module);