core.h 25 KB

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  1. /*
  2. * core.h -- Core Driver for Wolfson WM8350 PMIC
  3. *
  4. * Copyright 2007 Wolfson Microelectronics PLC
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. *
  11. */
  12. #ifndef __LINUX_MFD_WM8350_CORE_H_
  13. #define __LINUX_MFD_WM8350_CORE_H_
  14. #include <linux/kernel.h>
  15. #include <linux/mutex.h>
  16. #include <linux/workqueue.h>
  17. #include <linux/mfd/wm8350/audio.h>
  18. #include <linux/mfd/wm8350/gpio.h>
  19. #include <linux/mfd/wm8350/pmic.h>
  20. #include <linux/mfd/wm8350/rtc.h>
  21. #include <linux/mfd/wm8350/supply.h>
  22. #include <linux/mfd/wm8350/wdt.h>
  23. /*
  24. * Register values.
  25. */
  26. #define WM8350_RESET_ID 0x00
  27. #define WM8350_ID 0x01
  28. #define WM8350_REVISION 0x02
  29. #define WM8350_SYSTEM_CONTROL_1 0x03
  30. #define WM8350_SYSTEM_CONTROL_2 0x04
  31. #define WM8350_SYSTEM_HIBERNATE 0x05
  32. #define WM8350_INTERFACE_CONTROL 0x06
  33. #define WM8350_POWER_MGMT_1 0x08
  34. #define WM8350_POWER_MGMT_2 0x09
  35. #define WM8350_POWER_MGMT_3 0x0A
  36. #define WM8350_POWER_MGMT_4 0x0B
  37. #define WM8350_POWER_MGMT_5 0x0C
  38. #define WM8350_POWER_MGMT_6 0x0D
  39. #define WM8350_POWER_MGMT_7 0x0E
  40. #define WM8350_SYSTEM_INTERRUPTS 0x18
  41. #define WM8350_INT_STATUS_1 0x19
  42. #define WM8350_INT_STATUS_2 0x1A
  43. #define WM8350_POWER_UP_INT_STATUS 0x1B
  44. #define WM8350_UNDER_VOLTAGE_INT_STATUS 0x1C
  45. #define WM8350_OVER_CURRENT_INT_STATUS 0x1D
  46. #define WM8350_GPIO_INT_STATUS 0x1E
  47. #define WM8350_COMPARATOR_INT_STATUS 0x1F
  48. #define WM8350_SYSTEM_INTERRUPTS_MASK 0x20
  49. #define WM8350_INT_STATUS_1_MASK 0x21
  50. #define WM8350_INT_STATUS_2_MASK 0x22
  51. #define WM8350_POWER_UP_INT_STATUS_MASK 0x23
  52. #define WM8350_UNDER_VOLTAGE_INT_STATUS_MASK 0x24
  53. #define WM8350_OVER_CURRENT_INT_STATUS_MASK 0x25
  54. #define WM8350_GPIO_INT_STATUS_MASK 0x26
  55. #define WM8350_COMPARATOR_INT_STATUS_MASK 0x27
  56. #define WM8350_MISC_OVERRIDES 0xE3
  57. #define WM8350_COMPARATOR_OVERRIDES 0xE7
  58. #define WM8350_STATE_MACHINE_STATUS 0xE9
  59. #define WM8350_MAX_REGISTER 0xFF
  60. /*
  61. * Field Definitions.
  62. */
  63. /*
  64. * R0 (0x00) - Reset/ID
  65. */
  66. #define WM8350_SW_RESET_CHIP_ID_MASK 0xFFFF
  67. /*
  68. * R1 (0x01) - ID
  69. */
  70. #define WM8350_CHIP_REV_MASK 0x7000
  71. #define WM8350_CONF_STS_MASK 0x0C00
  72. #define WM8350_CUST_ID_MASK 0x00FF
  73. /*
  74. * R2 (0x02) - Revision
  75. */
  76. #define WM8350_MASK_REV_MASK 0x00FF
  77. /*
  78. * R3 (0x03) - System Control 1
  79. */
  80. #define WM8350_CHIP_ON 0x8000
  81. #define WM8350_POWERCYCLE 0x2000
  82. #define WM8350_VCC_FAULT_OV 0x1000
  83. #define WM8350_REG_RSTB_TIME_MASK 0x0C00
  84. #define WM8350_BG_SLEEP 0x0200
  85. #define WM8350_MEM_VALID 0x0020
  86. #define WM8350_CHIP_SET_UP 0x0010
  87. #define WM8350_ON_DEB_T 0x0008
  88. #define WM8350_ON_POL 0x0002
  89. #define WM8350_IRQ_POL 0x0001
  90. /*
  91. * R4 (0x04) - System Control 2
  92. */
  93. #define WM8350_USB_SUSPEND_8MA 0x8000
  94. #define WM8350_USB_SUSPEND 0x4000
  95. #define WM8350_USB_MSTR 0x2000
  96. #define WM8350_USB_MSTR_SRC 0x1000
  97. #define WM8350_USB_500MA 0x0800
  98. #define WM8350_USB_NOLIM 0x0400
  99. /*
  100. * R5 (0x05) - System Hibernate
  101. */
  102. #define WM8350_HIBERNATE 0x8000
  103. #define WM8350_WDOG_HIB_MODE 0x0080
  104. #define WM8350_REG_HIB_STARTUP_SEQ 0x0040
  105. #define WM8350_REG_RESET_HIB_MODE 0x0020
  106. #define WM8350_RST_HIB_MODE 0x0010
  107. #define WM8350_IRQ_HIB_MODE 0x0008
  108. #define WM8350_MEMRST_HIB_MODE 0x0004
  109. #define WM8350_PCCOMP_HIB_MODE 0x0002
  110. #define WM8350_TEMPMON_HIB_MODE 0x0001
  111. /*
  112. * R6 (0x06) - Interface Control
  113. */
  114. #define WM8350_USE_DEV_PINS 0x8000
  115. #define WM8350_USE_DEV_PINS_MASK 0x8000
  116. #define WM8350_USE_DEV_PINS_SHIFT 15
  117. #define WM8350_DEV_ADDR_MASK 0x6000
  118. #define WM8350_DEV_ADDR_SHIFT 13
  119. #define WM8350_CONFIG_DONE 0x1000
  120. #define WM8350_CONFIG_DONE_MASK 0x1000
  121. #define WM8350_CONFIG_DONE_SHIFT 12
  122. #define WM8350_RECONFIG_AT_ON 0x0800
  123. #define WM8350_RECONFIG_AT_ON_MASK 0x0800
  124. #define WM8350_RECONFIG_AT_ON_SHIFT 11
  125. #define WM8350_AUTOINC 0x0200
  126. #define WM8350_AUTOINC_MASK 0x0200
  127. #define WM8350_AUTOINC_SHIFT 9
  128. #define WM8350_ARA 0x0100
  129. #define WM8350_ARA_MASK 0x0100
  130. #define WM8350_ARA_SHIFT 8
  131. #define WM8350_SPI_CFG 0x0008
  132. #define WM8350_SPI_CFG_MASK 0x0008
  133. #define WM8350_SPI_CFG_SHIFT 3
  134. #define WM8350_SPI_4WIRE 0x0004
  135. #define WM8350_SPI_4WIRE_MASK 0x0004
  136. #define WM8350_SPI_4WIRE_SHIFT 2
  137. #define WM8350_SPI_3WIRE 0x0002
  138. #define WM8350_SPI_3WIRE_MASK 0x0002
  139. #define WM8350_SPI_3WIRE_SHIFT 1
  140. /* Bit values for R06 (0x06) */
  141. #define WM8350_USE_DEV_PINS_PRIMARY 0
  142. #define WM8350_USE_DEV_PINS_DEV 1
  143. #define WM8350_DEV_ADDR_34 0
  144. #define WM8350_DEV_ADDR_36 1
  145. #define WM8350_DEV_ADDR_3C 2
  146. #define WM8350_DEV_ADDR_3E 3
  147. #define WM8350_CONFIG_DONE_OFF 0
  148. #define WM8350_CONFIG_DONE_DONE 1
  149. #define WM8350_RECONFIG_AT_ON_OFF 0
  150. #define WM8350_RECONFIG_AT_ON_ON 1
  151. #define WM8350_AUTOINC_OFF 0
  152. #define WM8350_AUTOINC_ON 1
  153. #define WM8350_ARA_OFF 0
  154. #define WM8350_ARA_ON 1
  155. #define WM8350_SPI_CFG_CMOS 0
  156. #define WM8350_SPI_CFG_OD 1
  157. #define WM8350_SPI_4WIRE_3WIRE 0
  158. #define WM8350_SPI_4WIRE_4WIRE 1
  159. #define WM8350_SPI_3WIRE_I2C 0
  160. #define WM8350_SPI_3WIRE_SPI 1
  161. /*
  162. * R8 (0x08) - Power mgmt (1)
  163. */
  164. #define WM8350_CODEC_ISEL_MASK 0xC000
  165. #define WM8350_VBUFEN 0x2000
  166. #define WM8350_OUTPUT_DRAIN_EN 0x0400
  167. #define WM8350_MIC_DET_ENA 0x0100
  168. #define WM8350_BIASEN 0x0020
  169. #define WM8350_MICBEN 0x0010
  170. #define WM8350_VMIDEN 0x0004
  171. #define WM8350_VMID_MASK 0x0003
  172. #define WM8350_VMID_SHIFT 0
  173. /*
  174. * R9 (0x09) - Power mgmt (2)
  175. */
  176. #define WM8350_IN3R_ENA 0x0800
  177. #define WM8350_IN3L_ENA 0x0400
  178. #define WM8350_INR_ENA 0x0200
  179. #define WM8350_INL_ENA 0x0100
  180. #define WM8350_MIXINR_ENA 0x0080
  181. #define WM8350_MIXINL_ENA 0x0040
  182. #define WM8350_OUT4_ENA 0x0020
  183. #define WM8350_OUT3_ENA 0x0010
  184. #define WM8350_MIXOUTR_ENA 0x0002
  185. #define WM8350_MIXOUTL_ENA 0x0001
  186. /*
  187. * R10 (0x0A) - Power mgmt (3)
  188. */
  189. #define WM8350_IN3R_TO_OUT2R 0x0080
  190. #define WM8350_OUT2R_ENA 0x0008
  191. #define WM8350_OUT2L_ENA 0x0004
  192. #define WM8350_OUT1R_ENA 0x0002
  193. #define WM8350_OUT1L_ENA 0x0001
  194. /*
  195. * R11 (0x0B) - Power mgmt (4)
  196. */
  197. #define WM8350_SYSCLK_ENA 0x4000
  198. #define WM8350_ADC_HPF_ENA 0x2000
  199. #define WM8350_FLL_ENA 0x0800
  200. #define WM8350_FLL_OSC_ENA 0x0400
  201. #define WM8350_TOCLK_ENA 0x0100
  202. #define WM8350_DACR_ENA 0x0020
  203. #define WM8350_DACL_ENA 0x0010
  204. #define WM8350_ADCR_ENA 0x0008
  205. #define WM8350_ADCL_ENA 0x0004
  206. /*
  207. * R12 (0x0C) - Power mgmt (5)
  208. */
  209. #define WM8350_CODEC_ENA 0x1000
  210. #define WM8350_RTC_TICK_ENA 0x0800
  211. #define WM8350_OSC32K_ENA 0x0400
  212. #define WM8350_CHG_ENA 0x0200
  213. #define WM8350_ACC_DET_ENA 0x0100
  214. #define WM8350_AUXADC_ENA 0x0080
  215. #define WM8350_DCMP4_ENA 0x0008
  216. #define WM8350_DCMP3_ENA 0x0004
  217. #define WM8350_DCMP2_ENA 0x0002
  218. #define WM8350_DCMP1_ENA 0x0001
  219. /*
  220. * R13 (0x0D) - Power mgmt (6)
  221. */
  222. #define WM8350_LS_ENA 0x8000
  223. #define WM8350_LDO4_ENA 0x0800
  224. #define WM8350_LDO3_ENA 0x0400
  225. #define WM8350_LDO2_ENA 0x0200
  226. #define WM8350_LDO1_ENA 0x0100
  227. #define WM8350_DC6_ENA 0x0020
  228. #define WM8350_DC5_ENA 0x0010
  229. #define WM8350_DC4_ENA 0x0008
  230. #define WM8350_DC3_ENA 0x0004
  231. #define WM8350_DC2_ENA 0x0002
  232. #define WM8350_DC1_ENA 0x0001
  233. /*
  234. * R14 (0x0E) - Power mgmt (7)
  235. */
  236. #define WM8350_CS2_ENA 0x0002
  237. #define WM8350_CS1_ENA 0x0001
  238. /*
  239. * R24 (0x18) - System Interrupts
  240. */
  241. #define WM8350_OC_INT 0x2000
  242. #define WM8350_UV_INT 0x1000
  243. #define WM8350_PUTO_INT 0x0800
  244. #define WM8350_CS_INT 0x0200
  245. #define WM8350_EXT_INT 0x0100
  246. #define WM8350_CODEC_INT 0x0080
  247. #define WM8350_GP_INT 0x0040
  248. #define WM8350_AUXADC_INT 0x0020
  249. #define WM8350_RTC_INT 0x0010
  250. #define WM8350_SYS_INT 0x0008
  251. #define WM8350_CHG_INT 0x0004
  252. #define WM8350_USB_INT 0x0002
  253. #define WM8350_WKUP_INT 0x0001
  254. /*
  255. * R25 (0x19) - Interrupt Status 1
  256. */
  257. #define WM8350_CHG_BAT_HOT_EINT 0x8000
  258. #define WM8350_CHG_BAT_COLD_EINT 0x4000
  259. #define WM8350_CHG_BAT_FAIL_EINT 0x2000
  260. #define WM8350_CHG_TO_EINT 0x1000
  261. #define WM8350_CHG_END_EINT 0x0800
  262. #define WM8350_CHG_START_EINT 0x0400
  263. #define WM8350_CHG_FAST_RDY_EINT 0x0200
  264. #define WM8350_RTC_PER_EINT 0x0080
  265. #define WM8350_RTC_SEC_EINT 0x0040
  266. #define WM8350_RTC_ALM_EINT 0x0020
  267. #define WM8350_CHG_VBATT_LT_3P9_EINT 0x0004
  268. #define WM8350_CHG_VBATT_LT_3P1_EINT 0x0002
  269. #define WM8350_CHG_VBATT_LT_2P85_EINT 0x0001
  270. /*
  271. * R26 (0x1A) - Interrupt Status 2
  272. */
  273. #define WM8350_CS1_EINT 0x2000
  274. #define WM8350_CS2_EINT 0x1000
  275. #define WM8350_USB_LIMIT_EINT 0x0400
  276. #define WM8350_AUXADC_DATARDY_EINT 0x0100
  277. #define WM8350_AUXADC_DCOMP4_EINT 0x0080
  278. #define WM8350_AUXADC_DCOMP3_EINT 0x0040
  279. #define WM8350_AUXADC_DCOMP2_EINT 0x0020
  280. #define WM8350_AUXADC_DCOMP1_EINT 0x0010
  281. #define WM8350_SYS_HYST_COMP_FAIL_EINT 0x0008
  282. #define WM8350_SYS_CHIP_GT115_EINT 0x0004
  283. #define WM8350_SYS_CHIP_GT140_EINT 0x0002
  284. #define WM8350_SYS_WDOG_TO_EINT 0x0001
  285. /*
  286. * R27 (0x1B) - Power Up Interrupt Status
  287. */
  288. #define WM8350_PUTO_LDO4_EINT 0x0800
  289. #define WM8350_PUTO_LDO3_EINT 0x0400
  290. #define WM8350_PUTO_LDO2_EINT 0x0200
  291. #define WM8350_PUTO_LDO1_EINT 0x0100
  292. #define WM8350_PUTO_DC6_EINT 0x0020
  293. #define WM8350_PUTO_DC5_EINT 0x0010
  294. #define WM8350_PUTO_DC4_EINT 0x0008
  295. #define WM8350_PUTO_DC3_EINT 0x0004
  296. #define WM8350_PUTO_DC2_EINT 0x0002
  297. #define WM8350_PUTO_DC1_EINT 0x0001
  298. /*
  299. * R28 (0x1C) - Under Voltage Interrupt status
  300. */
  301. #define WM8350_UV_LDO4_EINT 0x0800
  302. #define WM8350_UV_LDO3_EINT 0x0400
  303. #define WM8350_UV_LDO2_EINT 0x0200
  304. #define WM8350_UV_LDO1_EINT 0x0100
  305. #define WM8350_UV_DC6_EINT 0x0020
  306. #define WM8350_UV_DC5_EINT 0x0010
  307. #define WM8350_UV_DC4_EINT 0x0008
  308. #define WM8350_UV_DC3_EINT 0x0004
  309. #define WM8350_UV_DC2_EINT 0x0002
  310. #define WM8350_UV_DC1_EINT 0x0001
  311. /*
  312. * R29 (0x1D) - Over Current Interrupt status
  313. */
  314. #define WM8350_OC_LS_EINT 0x8000
  315. /*
  316. * R30 (0x1E) - GPIO Interrupt Status
  317. */
  318. #define WM8350_GP12_EINT 0x1000
  319. #define WM8350_GP11_EINT 0x0800
  320. #define WM8350_GP10_EINT 0x0400
  321. #define WM8350_GP9_EINT 0x0200
  322. #define WM8350_GP8_EINT 0x0100
  323. #define WM8350_GP7_EINT 0x0080
  324. #define WM8350_GP6_EINT 0x0040
  325. #define WM8350_GP5_EINT 0x0020
  326. #define WM8350_GP4_EINT 0x0010
  327. #define WM8350_GP3_EINT 0x0008
  328. #define WM8350_GP2_EINT 0x0004
  329. #define WM8350_GP1_EINT 0x0002
  330. #define WM8350_GP0_EINT 0x0001
  331. /*
  332. * R31 (0x1F) - Comparator Interrupt Status
  333. */
  334. #define WM8350_EXT_USB_FB_EINT 0x8000
  335. #define WM8350_EXT_WALL_FB_EINT 0x4000
  336. #define WM8350_EXT_BAT_FB_EINT 0x2000
  337. #define WM8350_CODEC_JCK_DET_L_EINT 0x0800
  338. #define WM8350_CODEC_JCK_DET_R_EINT 0x0400
  339. #define WM8350_CODEC_MICSCD_EINT 0x0200
  340. #define WM8350_CODEC_MICD_EINT 0x0100
  341. #define WM8350_WKUP_OFF_STATE_EINT 0x0040
  342. #define WM8350_WKUP_HIB_STATE_EINT 0x0020
  343. #define WM8350_WKUP_CONV_FAULT_EINT 0x0010
  344. #define WM8350_WKUP_WDOG_RST_EINT 0x0008
  345. #define WM8350_WKUP_GP_PWR_ON_EINT 0x0004
  346. #define WM8350_WKUP_ONKEY_EINT 0x0002
  347. #define WM8350_WKUP_GP_WAKEUP_EINT 0x0001
  348. /*
  349. * R32 (0x20) - System Interrupts Mask
  350. */
  351. #define WM8350_IM_OC_INT 0x2000
  352. #define WM8350_IM_UV_INT 0x1000
  353. #define WM8350_IM_PUTO_INT 0x0800
  354. #define WM8350_IM_SPARE_INT 0x0400
  355. #define WM8350_IM_CS_INT 0x0200
  356. #define WM8350_IM_EXT_INT 0x0100
  357. #define WM8350_IM_CODEC_INT 0x0080
  358. #define WM8350_IM_GP_INT 0x0040
  359. #define WM8350_IM_AUXADC_INT 0x0020
  360. #define WM8350_IM_RTC_INT 0x0010
  361. #define WM8350_IM_SYS_INT 0x0008
  362. #define WM8350_IM_CHG_INT 0x0004
  363. #define WM8350_IM_USB_INT 0x0002
  364. #define WM8350_IM_WKUP_INT 0x0001
  365. /*
  366. * R33 (0x21) - Interrupt Status 1 Mask
  367. */
  368. #define WM8350_IM_CHG_BAT_HOT_EINT 0x8000
  369. #define WM8350_IM_CHG_BAT_COLD_EINT 0x4000
  370. #define WM8350_IM_CHG_BAT_FAIL_EINT 0x2000
  371. #define WM8350_IM_CHG_TO_EINT 0x1000
  372. #define WM8350_IM_CHG_END_EINT 0x0800
  373. #define WM8350_IM_CHG_START_EINT 0x0400
  374. #define WM8350_IM_CHG_FAST_RDY_EINT 0x0200
  375. #define WM8350_IM_RTC_PER_EINT 0x0080
  376. #define WM8350_IM_RTC_SEC_EINT 0x0040
  377. #define WM8350_IM_RTC_ALM_EINT 0x0020
  378. #define WM8350_IM_CHG_VBATT_LT_3P9_EINT 0x0004
  379. #define WM8350_IM_CHG_VBATT_LT_3P1_EINT 0x0002
  380. #define WM8350_IM_CHG_VBATT_LT_2P85_EINT 0x0001
  381. /*
  382. * R34 (0x22) - Interrupt Status 2 Mask
  383. */
  384. #define WM8350_IM_SPARE2_EINT 0x8000
  385. #define WM8350_IM_SPARE1_EINT 0x4000
  386. #define WM8350_IM_CS1_EINT 0x2000
  387. #define WM8350_IM_CS2_EINT 0x1000
  388. #define WM8350_IM_USB_LIMIT_EINT 0x0400
  389. #define WM8350_IM_AUXADC_DATARDY_EINT 0x0100
  390. #define WM8350_IM_AUXADC_DCOMP4_EINT 0x0080
  391. #define WM8350_IM_AUXADC_DCOMP3_EINT 0x0040
  392. #define WM8350_IM_AUXADC_DCOMP2_EINT 0x0020
  393. #define WM8350_IM_AUXADC_DCOMP1_EINT 0x0010
  394. #define WM8350_IM_SYS_HYST_COMP_FAIL_EINT 0x0008
  395. #define WM8350_IM_SYS_CHIP_GT115_EINT 0x0004
  396. #define WM8350_IM_SYS_CHIP_GT140_EINT 0x0002
  397. #define WM8350_IM_SYS_WDOG_TO_EINT 0x0001
  398. /*
  399. * R35 (0x23) - Power Up Interrupt Status Mask
  400. */
  401. #define WM8350_IM_PUTO_LDO4_EINT 0x0800
  402. #define WM8350_IM_PUTO_LDO3_EINT 0x0400
  403. #define WM8350_IM_PUTO_LDO2_EINT 0x0200
  404. #define WM8350_IM_PUTO_LDO1_EINT 0x0100
  405. #define WM8350_IM_PUTO_DC6_EINT 0x0020
  406. #define WM8350_IM_PUTO_DC5_EINT 0x0010
  407. #define WM8350_IM_PUTO_DC4_EINT 0x0008
  408. #define WM8350_IM_PUTO_DC3_EINT 0x0004
  409. #define WM8350_IM_PUTO_DC2_EINT 0x0002
  410. #define WM8350_IM_PUTO_DC1_EINT 0x0001
  411. /*
  412. * R36 (0x24) - Under Voltage Interrupt status Mask
  413. */
  414. #define WM8350_IM_UV_LDO4_EINT 0x0800
  415. #define WM8350_IM_UV_LDO3_EINT 0x0400
  416. #define WM8350_IM_UV_LDO2_EINT 0x0200
  417. #define WM8350_IM_UV_LDO1_EINT 0x0100
  418. #define WM8350_IM_UV_DC6_EINT 0x0020
  419. #define WM8350_IM_UV_DC5_EINT 0x0010
  420. #define WM8350_IM_UV_DC4_EINT 0x0008
  421. #define WM8350_IM_UV_DC3_EINT 0x0004
  422. #define WM8350_IM_UV_DC2_EINT 0x0002
  423. #define WM8350_IM_UV_DC1_EINT 0x0001
  424. /*
  425. * R37 (0x25) - Over Current Interrupt status Mask
  426. */
  427. #define WM8350_IM_OC_LS_EINT 0x8000
  428. /*
  429. * R38 (0x26) - GPIO Interrupt Status Mask
  430. */
  431. #define WM8350_IM_GP12_EINT 0x1000
  432. #define WM8350_IM_GP11_EINT 0x0800
  433. #define WM8350_IM_GP10_EINT 0x0400
  434. #define WM8350_IM_GP9_EINT 0x0200
  435. #define WM8350_IM_GP8_EINT 0x0100
  436. #define WM8350_IM_GP7_EINT 0x0080
  437. #define WM8350_IM_GP6_EINT 0x0040
  438. #define WM8350_IM_GP5_EINT 0x0020
  439. #define WM8350_IM_GP4_EINT 0x0010
  440. #define WM8350_IM_GP3_EINT 0x0008
  441. #define WM8350_IM_GP2_EINT 0x0004
  442. #define WM8350_IM_GP1_EINT 0x0002
  443. #define WM8350_IM_GP0_EINT 0x0001
  444. /*
  445. * R39 (0x27) - Comparator Interrupt Status Mask
  446. */
  447. #define WM8350_IM_EXT_USB_FB_EINT 0x8000
  448. #define WM8350_IM_EXT_WALL_FB_EINT 0x4000
  449. #define WM8350_IM_EXT_BAT_FB_EINT 0x2000
  450. #define WM8350_IM_CODEC_JCK_DET_L_EINT 0x0800
  451. #define WM8350_IM_CODEC_JCK_DET_R_EINT 0x0400
  452. #define WM8350_IM_CODEC_MICSCD_EINT 0x0200
  453. #define WM8350_IM_CODEC_MICD_EINT 0x0100
  454. #define WM8350_IM_WKUP_OFF_STATE_EINT 0x0040
  455. #define WM8350_IM_WKUP_HIB_STATE_EINT 0x0020
  456. #define WM8350_IM_WKUP_CONV_FAULT_EINT 0x0010
  457. #define WM8350_IM_WKUP_WDOG_RST_EINT 0x0008
  458. #define WM8350_IM_WKUP_GP_PWR_ON_EINT 0x0004
  459. #define WM8350_IM_WKUP_ONKEY_EINT 0x0002
  460. #define WM8350_IM_WKUP_GP_WAKEUP_EINT 0x0001
  461. /*
  462. * R220 (0xDC) - RAM BIST 1
  463. */
  464. #define WM8350_READ_STATUS 0x0800
  465. #define WM8350_TSTRAM_CLK 0x0100
  466. #define WM8350_TSTRAM_CLK_ENA 0x0080
  467. #define WM8350_STARTSEQ 0x0040
  468. #define WM8350_READ_SRC 0x0020
  469. #define WM8350_COUNT_DIR 0x0010
  470. #define WM8350_TSTRAM_MODE_MASK 0x000E
  471. #define WM8350_TSTRAM_ENA 0x0001
  472. /*
  473. * R225 (0xE1) - DCDC/LDO status
  474. */
  475. #define WM8350_LS_STS 0x8000
  476. #define WM8350_LDO4_STS 0x0800
  477. #define WM8350_LDO3_STS 0x0400
  478. #define WM8350_LDO2_STS 0x0200
  479. #define WM8350_LDO1_STS 0x0100
  480. #define WM8350_DC6_STS 0x0020
  481. #define WM8350_DC5_STS 0x0010
  482. #define WM8350_DC4_STS 0x0008
  483. #define WM8350_DC3_STS 0x0004
  484. #define WM8350_DC2_STS 0x0002
  485. #define WM8350_DC1_STS 0x0001
  486. /*
  487. * R227 (0xE3) - Misc Overrides
  488. */
  489. #define WM8350_USB_LIMIT_OVRDE 0x0400
  490. /*
  491. * R227 (0xE7) - Comparator Overrides
  492. */
  493. #define WM8350_USB_FB_OVRDE 0x8000
  494. #define WM8350_WALL_FB_OVRDE 0x4000
  495. #define WM8350_BATT_FB_OVRDE 0x2000
  496. /*
  497. * R233 (0xE9) - State Machinine Status
  498. */
  499. #define WM8350_USB_SM_MASK 0x0700
  500. #define WM8350_USB_SM_SHIFT 8
  501. #define WM8350_USB_SM_100_SLV 1
  502. #define WM8350_USB_SM_500_SLV 5
  503. #define WM8350_USB_SM_STDBY_SLV 7
  504. /* WM8350 wake up conditions */
  505. #define WM8350_IRQ_WKUP_OFF_STATE 43
  506. #define WM8350_IRQ_WKUP_HIB_STATE 44
  507. #define WM8350_IRQ_WKUP_CONV_FAULT 45
  508. #define WM8350_IRQ_WKUP_WDOG_RST 46
  509. #define WM8350_IRQ_WKUP_GP_PWR_ON 47
  510. #define WM8350_IRQ_WKUP_ONKEY 48
  511. #define WM8350_IRQ_WKUP_GP_WAKEUP 49
  512. /* wm8350 chip revisions */
  513. #define WM8350_REV_E 0x4
  514. #define WM8350_REV_F 0x5
  515. #define WM8350_REV_G 0x6
  516. #define WM8350_REV_H 0x7
  517. #define WM8350_NUM_IRQ 63
  518. struct wm8350_reg_access {
  519. u16 readable; /* Mask of readable bits */
  520. u16 writable; /* Mask of writable bits */
  521. u16 vol; /* Mask of volatile bits */
  522. };
  523. extern const struct wm8350_reg_access wm8350_reg_io_map[];
  524. extern const u16 wm8350_mode0_defaults[];
  525. extern const u16 wm8350_mode1_defaults[];
  526. extern const u16 wm8350_mode2_defaults[];
  527. extern const u16 wm8350_mode3_defaults[];
  528. struct wm8350;
  529. struct wm8350_irq {
  530. void (*handler) (struct wm8350 *, int, void *);
  531. void *data;
  532. };
  533. struct wm8350 {
  534. struct device *dev;
  535. /* device IO */
  536. union {
  537. struct i2c_client *i2c_client;
  538. struct spi_device *spi_device;
  539. };
  540. int (*read_dev)(struct wm8350 *wm8350, char reg, int size, void *dest);
  541. int (*write_dev)(struct wm8350 *wm8350, char reg, int size,
  542. void *src);
  543. u16 *reg_cache;
  544. struct mutex auxadc_mutex;
  545. /* Interrupt handling */
  546. struct work_struct irq_work;
  547. struct mutex irq_mutex; /* IRQ table mutex */
  548. struct wm8350_irq irq[WM8350_NUM_IRQ];
  549. int chip_irq;
  550. /* Client devices */
  551. struct wm8350_codec codec;
  552. struct wm8350_gpio gpio;
  553. struct wm8350_pmic pmic;
  554. struct wm8350_power power;
  555. struct wm8350_rtc rtc;
  556. struct wm8350_wdt wdt;
  557. };
  558. /**
  559. * Data to be supplied by the platform to initialise the WM8350.
  560. *
  561. * @init: Function called during driver initialisation. Should be
  562. * used by the platform to configure GPIO functions and similar.
  563. */
  564. struct wm8350_platform_data {
  565. int (*init)(struct wm8350 *wm8350);
  566. };
  567. /*
  568. * WM8350 device initialisation and exit.
  569. */
  570. int wm8350_device_init(struct wm8350 *wm8350, int irq,
  571. struct wm8350_platform_data *pdata);
  572. void wm8350_device_exit(struct wm8350 *wm8350);
  573. /*
  574. * WM8350 device IO
  575. */
  576. int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask);
  577. int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask);
  578. u16 wm8350_reg_read(struct wm8350 *wm8350, int reg);
  579. int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val);
  580. int wm8350_reg_lock(struct wm8350 *wm8350);
  581. int wm8350_reg_unlock(struct wm8350 *wm8350);
  582. int wm8350_block_read(struct wm8350 *wm8350, int reg, int size, u16 *dest);
  583. int wm8350_block_write(struct wm8350 *wm8350, int reg, int size, u16 *src);
  584. /*
  585. * WM8350 internal interrupts
  586. */
  587. int wm8350_register_irq(struct wm8350 *wm8350, int irq,
  588. void (*handler) (struct wm8350 *, int, void *),
  589. void *data);
  590. int wm8350_free_irq(struct wm8350 *wm8350, int irq);
  591. int wm8350_mask_irq(struct wm8350 *wm8350, int irq);
  592. int wm8350_unmask_irq(struct wm8350 *wm8350, int irq);
  593. #endif