fsl-diu-fb.c 44 KB

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  1. /*
  2. * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
  3. *
  4. * Freescale DIU Frame Buffer device driver
  5. *
  6. * Authors: Hongjun Chen <hong-jun.chen@freescale.com>
  7. * Paul Widmer <paul.widmer@freescale.com>
  8. * Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
  9. * York Sun <yorksun@freescale.com>
  10. *
  11. * Based on imxfb.c Copyright (C) 2004 S.Hauer, Pengutronix
  12. *
  13. * This program is free software; you can redistribute it and/or modify it
  14. * under the terms of the GNU General Public License as published by the
  15. * Free Software Foundation; either version 2 of the License, or (at your
  16. * option) any later version.
  17. *
  18. */
  19. #include <linux/module.h>
  20. #include <linux/kernel.h>
  21. #include <linux/errno.h>
  22. #include <linux/string.h>
  23. #include <linux/slab.h>
  24. #include <linux/fb.h>
  25. #include <linux/init.h>
  26. #include <linux/dma-mapping.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/clk.h>
  30. #include <linux/uaccess.h>
  31. #include <linux/vmalloc.h>
  32. #include <linux/spinlock.h>
  33. #include <sysdev/fsl_soc.h>
  34. #include <linux/fsl-diu-fb.h>
  35. #include "edid.h"
  36. #define NUM_AOIS 5 /* 1 for plane 0, 2 for planes 1 & 2 each */
  37. /* HW cursor parameters */
  38. #define MAX_CURS 32
  39. /* INT_STATUS/INT_MASK field descriptions */
  40. #define INT_VSYNC 0x01 /* Vsync interrupt */
  41. #define INT_VSYNC_WB 0x02 /* Vsync interrupt for write back operation */
  42. #define INT_UNDRUN 0x04 /* Under run exception interrupt */
  43. #define INT_PARERR 0x08 /* Display parameters error interrupt */
  44. #define INT_LS_BF_VS 0x10 /* Lines before vsync. interrupt */
  45. /*
  46. * List of supported video modes
  47. *
  48. * The first entry is the default video mode. The remain entries are in
  49. * order if increasing resolution and frequency. The 320x240-60 mode is
  50. * the initial AOI for the second and third planes.
  51. */
  52. static struct fb_videomode __devinitdata fsl_diu_mode_db[] = {
  53. {
  54. .refresh = 60,
  55. .xres = 1024,
  56. .yres = 768,
  57. .pixclock = 15385,
  58. .left_margin = 160,
  59. .right_margin = 24,
  60. .upper_margin = 29,
  61. .lower_margin = 3,
  62. .hsync_len = 136,
  63. .vsync_len = 6,
  64. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  65. .vmode = FB_VMODE_NONINTERLACED
  66. },
  67. {
  68. .refresh = 60,
  69. .xres = 320,
  70. .yres = 240,
  71. .pixclock = 79440,
  72. .left_margin = 16,
  73. .right_margin = 16,
  74. .upper_margin = 16,
  75. .lower_margin = 5,
  76. .hsync_len = 48,
  77. .vsync_len = 1,
  78. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  79. .vmode = FB_VMODE_NONINTERLACED
  80. },
  81. {
  82. .refresh = 60,
  83. .xres = 640,
  84. .yres = 480,
  85. .pixclock = 39722,
  86. .left_margin = 48,
  87. .right_margin = 16,
  88. .upper_margin = 33,
  89. .lower_margin = 10,
  90. .hsync_len = 96,
  91. .vsync_len = 2,
  92. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  93. .vmode = FB_VMODE_NONINTERLACED
  94. },
  95. {
  96. .refresh = 72,
  97. .xres = 640,
  98. .yres = 480,
  99. .pixclock = 32052,
  100. .left_margin = 128,
  101. .right_margin = 24,
  102. .upper_margin = 28,
  103. .lower_margin = 9,
  104. .hsync_len = 40,
  105. .vsync_len = 3,
  106. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  107. .vmode = FB_VMODE_NONINTERLACED
  108. },
  109. {
  110. .refresh = 75,
  111. .xres = 640,
  112. .yres = 480,
  113. .pixclock = 31747,
  114. .left_margin = 120,
  115. .right_margin = 16,
  116. .upper_margin = 16,
  117. .lower_margin = 1,
  118. .hsync_len = 64,
  119. .vsync_len = 3,
  120. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  121. .vmode = FB_VMODE_NONINTERLACED
  122. },
  123. {
  124. .refresh = 90,
  125. .xres = 640,
  126. .yres = 480,
  127. .pixclock = 25057,
  128. .left_margin = 120,
  129. .right_margin = 32,
  130. .upper_margin = 14,
  131. .lower_margin = 25,
  132. .hsync_len = 40,
  133. .vsync_len = 14,
  134. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  135. .vmode = FB_VMODE_NONINTERLACED
  136. },
  137. {
  138. .refresh = 100,
  139. .xres = 640,
  140. .yres = 480,
  141. .pixclock = 22272,
  142. .left_margin = 48,
  143. .right_margin = 32,
  144. .upper_margin = 17,
  145. .lower_margin = 22,
  146. .hsync_len = 128,
  147. .vsync_len = 12,
  148. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  149. .vmode = FB_VMODE_NONINTERLACED
  150. },
  151. {
  152. .refresh = 60,
  153. .xres = 800,
  154. .yres = 480,
  155. .pixclock = 33805,
  156. .left_margin = 96,
  157. .right_margin = 24,
  158. .upper_margin = 10,
  159. .lower_margin = 3,
  160. .hsync_len = 72,
  161. .vsync_len = 7,
  162. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  163. .vmode = FB_VMODE_NONINTERLACED
  164. },
  165. {
  166. .refresh = 60,
  167. .xres = 800,
  168. .yres = 600,
  169. .pixclock = 25000,
  170. .left_margin = 88,
  171. .right_margin = 40,
  172. .upper_margin = 23,
  173. .lower_margin = 1,
  174. .hsync_len = 128,
  175. .vsync_len = 4,
  176. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  177. .vmode = FB_VMODE_NONINTERLACED
  178. },
  179. {
  180. .refresh = 60,
  181. .xres = 854,
  182. .yres = 480,
  183. .pixclock = 31518,
  184. .left_margin = 104,
  185. .right_margin = 16,
  186. .upper_margin = 13,
  187. .lower_margin = 1,
  188. .hsync_len = 88,
  189. .vsync_len = 3,
  190. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  191. .vmode = FB_VMODE_NONINTERLACED
  192. },
  193. {
  194. .refresh = 70,
  195. .xres = 1024,
  196. .yres = 768,
  197. .pixclock = 16886,
  198. .left_margin = 3,
  199. .right_margin = 3,
  200. .upper_margin = 2,
  201. .lower_margin = 2,
  202. .hsync_len = 40,
  203. .vsync_len = 18,
  204. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  205. .vmode = FB_VMODE_NONINTERLACED
  206. },
  207. {
  208. .refresh = 75,
  209. .xres = 1024,
  210. .yres = 768,
  211. .pixclock = 15009,
  212. .left_margin = 3,
  213. .right_margin = 3,
  214. .upper_margin = 2,
  215. .lower_margin = 2,
  216. .hsync_len = 80,
  217. .vsync_len = 32,
  218. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  219. .vmode = FB_VMODE_NONINTERLACED
  220. },
  221. {
  222. .refresh = 60,
  223. .xres = 1280,
  224. .yres = 480,
  225. .pixclock = 18939,
  226. .left_margin = 353,
  227. .right_margin = 47,
  228. .upper_margin = 39,
  229. .lower_margin = 4,
  230. .hsync_len = 8,
  231. .vsync_len = 2,
  232. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  233. .vmode = FB_VMODE_NONINTERLACED
  234. },
  235. {
  236. .refresh = 60,
  237. .xres = 1280,
  238. .yres = 720,
  239. .pixclock = 13426,
  240. .left_margin = 192,
  241. .right_margin = 64,
  242. .upper_margin = 22,
  243. .lower_margin = 1,
  244. .hsync_len = 136,
  245. .vsync_len = 3,
  246. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  247. .vmode = FB_VMODE_NONINTERLACED
  248. },
  249. {
  250. .refresh = 60,
  251. .xres = 1280,
  252. .yres = 1024,
  253. .pixclock = 9375,
  254. .left_margin = 38,
  255. .right_margin = 128,
  256. .upper_margin = 2,
  257. .lower_margin = 7,
  258. .hsync_len = 216,
  259. .vsync_len = 37,
  260. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  261. .vmode = FB_VMODE_NONINTERLACED
  262. },
  263. {
  264. .refresh = 70,
  265. .xres = 1280,
  266. .yres = 1024,
  267. .pixclock = 9380,
  268. .left_margin = 6,
  269. .right_margin = 6,
  270. .upper_margin = 4,
  271. .lower_margin = 4,
  272. .hsync_len = 60,
  273. .vsync_len = 94,
  274. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  275. .vmode = FB_VMODE_NONINTERLACED
  276. },
  277. {
  278. .refresh = 75,
  279. .xres = 1280,
  280. .yres = 1024,
  281. .pixclock = 9380,
  282. .left_margin = 6,
  283. .right_margin = 6,
  284. .upper_margin = 4,
  285. .lower_margin = 4,
  286. .hsync_len = 60,
  287. .vsync_len = 15,
  288. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  289. .vmode = FB_VMODE_NONINTERLACED
  290. },
  291. {
  292. .refresh = 60,
  293. .xres = 1920,
  294. .yres = 1080,
  295. .pixclock = 5787,
  296. .left_margin = 328,
  297. .right_margin = 120,
  298. .upper_margin = 34,
  299. .lower_margin = 1,
  300. .hsync_len = 208,
  301. .vsync_len = 3,
  302. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  303. .vmode = FB_VMODE_NONINTERLACED
  304. },
  305. };
  306. static char *fb_mode;
  307. static unsigned long default_bpp = 32;
  308. static enum fsl_diu_monitor_port monitor_port;
  309. static char *monitor_string;
  310. #if defined(CONFIG_NOT_COHERENT_CACHE)
  311. static u8 *coherence_data;
  312. static size_t coherence_data_size;
  313. static unsigned int d_cache_line_size;
  314. #endif
  315. static DEFINE_SPINLOCK(diu_lock);
  316. enum mfb_index {
  317. PLANE0 = 0, /* Plane 0, only one AOI that fills the screen */
  318. PLANE1_AOI0, /* Plane 1, first AOI */
  319. PLANE1_AOI1, /* Plane 1, second AOI */
  320. PLANE2_AOI0, /* Plane 2, first AOI */
  321. PLANE2_AOI1, /* Plane 2, second AOI */
  322. };
  323. struct mfb_info {
  324. enum mfb_index index;
  325. char *id;
  326. int registered;
  327. unsigned long pseudo_palette[16];
  328. struct diu_ad *ad;
  329. int cursor_reset;
  330. unsigned char g_alpha;
  331. unsigned int count;
  332. int x_aoi_d; /* aoi display x offset to physical screen */
  333. int y_aoi_d; /* aoi display y offset to physical screen */
  334. struct fsl_diu_data *parent;
  335. u8 *edid_data;
  336. };
  337. /**
  338. * struct fsl_diu_data - per-DIU data structure
  339. * @dma_addr: DMA address of this structure
  340. * @fsl_diu_info: fb_info objects, one per AOI
  341. * @dev_attr: sysfs structure
  342. * @irq: IRQ
  343. * @fb_enabled: TRUE if the DIU is enabled, FALSE if not
  344. * @monitor_port: the monitor port this DIU is connected to
  345. * @diu_reg: pointer to the DIU hardware registers
  346. * @reg_lock: spinlock for register access
  347. * @dummy_aoi: video buffer for the 4x4 32-bit dummy AOI
  348. * dummy_ad: DIU Area Descriptor for the dummy AOI
  349. * @ad[]: Area Descriptors for each real AOI
  350. * @gamma: gamma color table
  351. * @cursor: hardware cursor data
  352. *
  353. * This data structure must be allocated with 32-byte alignment, so that the
  354. * internal fields can be aligned properly.
  355. */
  356. struct fsl_diu_data {
  357. dma_addr_t dma_addr;
  358. struct fb_info fsl_diu_info[NUM_AOIS];
  359. struct mfb_info mfb[NUM_AOIS];
  360. struct device_attribute dev_attr;
  361. unsigned int irq;
  362. int fb_enabled;
  363. enum fsl_diu_monitor_port monitor_port;
  364. struct diu __iomem *diu_reg;
  365. spinlock_t reg_lock;
  366. u8 dummy_aoi[4 * 4 * 4];
  367. struct diu_ad dummy_ad __aligned(8);
  368. struct diu_ad ad[NUM_AOIS] __aligned(8);
  369. u8 gamma[256 * 3] __aligned(32);
  370. u8 cursor[MAX_CURS * MAX_CURS * 2] __aligned(32);
  371. } __aligned(32);
  372. /* Determine the DMA address of a member of the fsl_diu_data structure */
  373. #define DMA_ADDR(p, f) ((p)->dma_addr + offsetof(struct fsl_diu_data, f))
  374. static struct mfb_info mfb_template[] = {
  375. {
  376. .index = PLANE0,
  377. .id = "Panel0",
  378. .registered = 0,
  379. .count = 0,
  380. .x_aoi_d = 0,
  381. .y_aoi_d = 0,
  382. },
  383. {
  384. .index = PLANE1_AOI0,
  385. .id = "Panel1 AOI0",
  386. .registered = 0,
  387. .g_alpha = 0xff,
  388. .count = 0,
  389. .x_aoi_d = 0,
  390. .y_aoi_d = 0,
  391. },
  392. {
  393. .index = PLANE1_AOI1,
  394. .id = "Panel1 AOI1",
  395. .registered = 0,
  396. .g_alpha = 0xff,
  397. .count = 0,
  398. .x_aoi_d = 0,
  399. .y_aoi_d = 480,
  400. },
  401. {
  402. .index = PLANE2_AOI0,
  403. .id = "Panel2 AOI0",
  404. .registered = 0,
  405. .g_alpha = 0xff,
  406. .count = 0,
  407. .x_aoi_d = 640,
  408. .y_aoi_d = 0,
  409. },
  410. {
  411. .index = PLANE2_AOI1,
  412. .id = "Panel2 AOI1",
  413. .registered = 0,
  414. .g_alpha = 0xff,
  415. .count = 0,
  416. .x_aoi_d = 640,
  417. .y_aoi_d = 480,
  418. },
  419. };
  420. /**
  421. * fsl_diu_name_to_port - convert a port name to a monitor port enum
  422. *
  423. * Takes the name of a monitor port ("dvi", "lvds", or "dlvds") and returns
  424. * the enum fsl_diu_monitor_port that corresponds to that string.
  425. *
  426. * For compatibility with older versions, a number ("0", "1", or "2") is also
  427. * supported.
  428. *
  429. * If the string is unknown, DVI is assumed.
  430. *
  431. * If the particular port is not supported by the platform, another port
  432. * (platform-specific) is chosen instead.
  433. */
  434. static enum fsl_diu_monitor_port fsl_diu_name_to_port(const char *s)
  435. {
  436. enum fsl_diu_monitor_port port = FSL_DIU_PORT_DVI;
  437. unsigned long val;
  438. if (s) {
  439. if (!strict_strtoul(s, 10, &val) && (val <= 2))
  440. port = (enum fsl_diu_monitor_port) val;
  441. else if (strncmp(s, "lvds", 4) == 0)
  442. port = FSL_DIU_PORT_LVDS;
  443. else if (strncmp(s, "dlvds", 5) == 0)
  444. port = FSL_DIU_PORT_DLVDS;
  445. }
  446. return diu_ops.valid_monitor_port(port);
  447. }
  448. /**
  449. * fsl_diu_alloc - allocate memory for the DIU
  450. * @size: number of bytes to allocate
  451. * @param: returned physical address of memory
  452. *
  453. * This function allocates a physically-contiguous block of memory.
  454. */
  455. static void *fsl_diu_alloc(size_t size, phys_addr_t *phys)
  456. {
  457. void *virt;
  458. virt = alloc_pages_exact(size, GFP_DMA | __GFP_ZERO);
  459. if (virt)
  460. *phys = virt_to_phys(virt);
  461. return virt;
  462. }
  463. /**
  464. * fsl_diu_free - release DIU memory
  465. * @virt: pointer returned by fsl_diu_alloc()
  466. * @size: number of bytes allocated by fsl_diu_alloc()
  467. *
  468. * This function releases memory allocated by fsl_diu_alloc().
  469. */
  470. static void fsl_diu_free(void *virt, size_t size)
  471. {
  472. if (virt && size)
  473. free_pages_exact(virt, size);
  474. }
  475. /*
  476. * Workaround for failed writing desc register of planes.
  477. * Needed with MPC5121 DIU rev 2.0 silicon.
  478. */
  479. void wr_reg_wa(u32 *reg, u32 val)
  480. {
  481. do {
  482. out_be32(reg, val);
  483. } while (in_be32(reg) != val);
  484. }
  485. static void fsl_diu_enable_panel(struct fb_info *info)
  486. {
  487. struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par;
  488. struct diu_ad *ad = mfbi->ad;
  489. struct fsl_diu_data *data = mfbi->parent;
  490. struct diu __iomem *hw = data->diu_reg;
  491. switch (mfbi->index) {
  492. case PLANE0:
  493. if (hw->desc[0] != ad->paddr)
  494. wr_reg_wa(&hw->desc[0], ad->paddr);
  495. break;
  496. case PLANE1_AOI0:
  497. cmfbi = &data->mfb[2];
  498. if (hw->desc[1] != ad->paddr) { /* AOI0 closed */
  499. if (cmfbi->count > 0) /* AOI1 open */
  500. ad->next_ad =
  501. cpu_to_le32(cmfbi->ad->paddr);
  502. else
  503. ad->next_ad = 0;
  504. wr_reg_wa(&hw->desc[1], ad->paddr);
  505. }
  506. break;
  507. case PLANE2_AOI0:
  508. cmfbi = &data->mfb[4];
  509. if (hw->desc[2] != ad->paddr) { /* AOI0 closed */
  510. if (cmfbi->count > 0) /* AOI1 open */
  511. ad->next_ad =
  512. cpu_to_le32(cmfbi->ad->paddr);
  513. else
  514. ad->next_ad = 0;
  515. wr_reg_wa(&hw->desc[2], ad->paddr);
  516. }
  517. break;
  518. case PLANE1_AOI1:
  519. pmfbi = &data->mfb[1];
  520. ad->next_ad = 0;
  521. if (hw->desc[1] == data->dummy_ad.paddr)
  522. wr_reg_wa(&hw->desc[1], ad->paddr);
  523. else /* AOI0 open */
  524. pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
  525. break;
  526. case PLANE2_AOI1:
  527. pmfbi = &data->mfb[3];
  528. ad->next_ad = 0;
  529. if (hw->desc[2] == data->dummy_ad.paddr)
  530. wr_reg_wa(&hw->desc[2], ad->paddr);
  531. else /* AOI0 was open */
  532. pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
  533. break;
  534. }
  535. }
  536. static void fsl_diu_disable_panel(struct fb_info *info)
  537. {
  538. struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par;
  539. struct diu_ad *ad = mfbi->ad;
  540. struct fsl_diu_data *data = mfbi->parent;
  541. struct diu __iomem *hw = data->diu_reg;
  542. switch (mfbi->index) {
  543. case PLANE0:
  544. if (hw->desc[0] != data->dummy_ad.paddr)
  545. wr_reg_wa(&hw->desc[0], data->dummy_ad.paddr);
  546. break;
  547. case PLANE1_AOI0:
  548. cmfbi = &data->mfb[2];
  549. if (cmfbi->count > 0) /* AOI1 is open */
  550. wr_reg_wa(&hw->desc[1], cmfbi->ad->paddr);
  551. /* move AOI1 to the first */
  552. else /* AOI1 was closed */
  553. wr_reg_wa(&hw->desc[1], data->dummy_ad.paddr);
  554. /* close AOI 0 */
  555. break;
  556. case PLANE2_AOI0:
  557. cmfbi = &data->mfb[4];
  558. if (cmfbi->count > 0) /* AOI1 is open */
  559. wr_reg_wa(&hw->desc[2], cmfbi->ad->paddr);
  560. /* move AOI1 to the first */
  561. else /* AOI1 was closed */
  562. wr_reg_wa(&hw->desc[2], data->dummy_ad.paddr);
  563. /* close AOI 0 */
  564. break;
  565. case PLANE1_AOI1:
  566. pmfbi = &data->mfb[1];
  567. if (hw->desc[1] != ad->paddr) {
  568. /* AOI1 is not the first in the chain */
  569. if (pmfbi->count > 0)
  570. /* AOI0 is open, must be the first */
  571. pmfbi->ad->next_ad = 0;
  572. } else /* AOI1 is the first in the chain */
  573. wr_reg_wa(&hw->desc[1], data->dummy_ad.paddr);
  574. /* close AOI 1 */
  575. break;
  576. case PLANE2_AOI1:
  577. pmfbi = &data->mfb[3];
  578. if (hw->desc[2] != ad->paddr) {
  579. /* AOI1 is not the first in the chain */
  580. if (pmfbi->count > 0)
  581. /* AOI0 is open, must be the first */
  582. pmfbi->ad->next_ad = 0;
  583. } else /* AOI1 is the first in the chain */
  584. wr_reg_wa(&hw->desc[2], data->dummy_ad.paddr);
  585. /* close AOI 1 */
  586. break;
  587. }
  588. }
  589. static void enable_lcdc(struct fb_info *info)
  590. {
  591. struct mfb_info *mfbi = info->par;
  592. struct fsl_diu_data *data = mfbi->parent;
  593. struct diu __iomem *hw = data->diu_reg;
  594. if (!data->fb_enabled) {
  595. out_be32(&hw->diu_mode, MFB_MODE1);
  596. data->fb_enabled++;
  597. }
  598. }
  599. static void disable_lcdc(struct fb_info *info)
  600. {
  601. struct mfb_info *mfbi = info->par;
  602. struct fsl_diu_data *data = mfbi->parent;
  603. struct diu __iomem *hw = data->diu_reg;
  604. if (data->fb_enabled) {
  605. out_be32(&hw->diu_mode, 0);
  606. data->fb_enabled = 0;
  607. }
  608. }
  609. static void adjust_aoi_size_position(struct fb_var_screeninfo *var,
  610. struct fb_info *info)
  611. {
  612. struct mfb_info *lower_aoi_mfbi, *upper_aoi_mfbi, *mfbi = info->par;
  613. struct fsl_diu_data *data = mfbi->parent;
  614. int available_height, upper_aoi_bottom;
  615. enum mfb_index index = mfbi->index;
  616. int lower_aoi_is_open, upper_aoi_is_open;
  617. __u32 base_plane_width, base_plane_height, upper_aoi_height;
  618. base_plane_width = data->fsl_diu_info[0].var.xres;
  619. base_plane_height = data->fsl_diu_info[0].var.yres;
  620. if (mfbi->x_aoi_d < 0)
  621. mfbi->x_aoi_d = 0;
  622. if (mfbi->y_aoi_d < 0)
  623. mfbi->y_aoi_d = 0;
  624. switch (index) {
  625. case PLANE0:
  626. if (mfbi->x_aoi_d != 0)
  627. mfbi->x_aoi_d = 0;
  628. if (mfbi->y_aoi_d != 0)
  629. mfbi->y_aoi_d = 0;
  630. break;
  631. case PLANE1_AOI0:
  632. case PLANE2_AOI0:
  633. lower_aoi_mfbi = data->fsl_diu_info[index+1].par;
  634. lower_aoi_is_open = lower_aoi_mfbi->count > 0 ? 1 : 0;
  635. if (var->xres > base_plane_width)
  636. var->xres = base_plane_width;
  637. if ((mfbi->x_aoi_d + var->xres) > base_plane_width)
  638. mfbi->x_aoi_d = base_plane_width - var->xres;
  639. if (lower_aoi_is_open)
  640. available_height = lower_aoi_mfbi->y_aoi_d;
  641. else
  642. available_height = base_plane_height;
  643. if (var->yres > available_height)
  644. var->yres = available_height;
  645. if ((mfbi->y_aoi_d + var->yres) > available_height)
  646. mfbi->y_aoi_d = available_height - var->yres;
  647. break;
  648. case PLANE1_AOI1:
  649. case PLANE2_AOI1:
  650. upper_aoi_mfbi = data->fsl_diu_info[index-1].par;
  651. upper_aoi_height = data->fsl_diu_info[index-1].var.yres;
  652. upper_aoi_bottom = upper_aoi_mfbi->y_aoi_d + upper_aoi_height;
  653. upper_aoi_is_open = upper_aoi_mfbi->count > 0 ? 1 : 0;
  654. if (var->xres > base_plane_width)
  655. var->xres = base_plane_width;
  656. if ((mfbi->x_aoi_d + var->xres) > base_plane_width)
  657. mfbi->x_aoi_d = base_plane_width - var->xres;
  658. if (mfbi->y_aoi_d < 0)
  659. mfbi->y_aoi_d = 0;
  660. if (upper_aoi_is_open) {
  661. if (mfbi->y_aoi_d < upper_aoi_bottom)
  662. mfbi->y_aoi_d = upper_aoi_bottom;
  663. available_height = base_plane_height
  664. - upper_aoi_bottom;
  665. } else
  666. available_height = base_plane_height;
  667. if (var->yres > available_height)
  668. var->yres = available_height;
  669. if ((mfbi->y_aoi_d + var->yres) > base_plane_height)
  670. mfbi->y_aoi_d = base_plane_height - var->yres;
  671. break;
  672. }
  673. }
  674. /*
  675. * Checks to see if the hardware supports the state requested by var passed
  676. * in. This function does not alter the hardware state! If the var passed in
  677. * is slightly off by what the hardware can support then we alter the var
  678. * PASSED in to what we can do. If the hardware doesn't support mode change
  679. * a -EINVAL will be returned by the upper layers.
  680. */
  681. static int fsl_diu_check_var(struct fb_var_screeninfo *var,
  682. struct fb_info *info)
  683. {
  684. if (var->xres_virtual < var->xres)
  685. var->xres_virtual = var->xres;
  686. if (var->yres_virtual < var->yres)
  687. var->yres_virtual = var->yres;
  688. if (var->xoffset < 0)
  689. var->xoffset = 0;
  690. if (var->yoffset < 0)
  691. var->yoffset = 0;
  692. if (var->xoffset + info->var.xres > info->var.xres_virtual)
  693. var->xoffset = info->var.xres_virtual - info->var.xres;
  694. if (var->yoffset + info->var.yres > info->var.yres_virtual)
  695. var->yoffset = info->var.yres_virtual - info->var.yres;
  696. if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) &&
  697. (var->bits_per_pixel != 16))
  698. var->bits_per_pixel = default_bpp;
  699. switch (var->bits_per_pixel) {
  700. case 16:
  701. var->red.length = 5;
  702. var->red.offset = 11;
  703. var->red.msb_right = 0;
  704. var->green.length = 6;
  705. var->green.offset = 5;
  706. var->green.msb_right = 0;
  707. var->blue.length = 5;
  708. var->blue.offset = 0;
  709. var->blue.msb_right = 0;
  710. var->transp.length = 0;
  711. var->transp.offset = 0;
  712. var->transp.msb_right = 0;
  713. break;
  714. case 24:
  715. var->red.length = 8;
  716. var->red.offset = 0;
  717. var->red.msb_right = 0;
  718. var->green.length = 8;
  719. var->green.offset = 8;
  720. var->green.msb_right = 0;
  721. var->blue.length = 8;
  722. var->blue.offset = 16;
  723. var->blue.msb_right = 0;
  724. var->transp.length = 0;
  725. var->transp.offset = 0;
  726. var->transp.msb_right = 0;
  727. break;
  728. case 32:
  729. var->red.length = 8;
  730. var->red.offset = 16;
  731. var->red.msb_right = 0;
  732. var->green.length = 8;
  733. var->green.offset = 8;
  734. var->green.msb_right = 0;
  735. var->blue.length = 8;
  736. var->blue.offset = 0;
  737. var->blue.msb_right = 0;
  738. var->transp.length = 8;
  739. var->transp.offset = 24;
  740. var->transp.msb_right = 0;
  741. break;
  742. }
  743. var->height = -1;
  744. var->width = -1;
  745. var->grayscale = 0;
  746. /* Copy nonstd field to/from sync for fbset usage */
  747. var->sync |= var->nonstd;
  748. var->nonstd |= var->sync;
  749. adjust_aoi_size_position(var, info);
  750. return 0;
  751. }
  752. static void set_fix(struct fb_info *info)
  753. {
  754. struct fb_fix_screeninfo *fix = &info->fix;
  755. struct fb_var_screeninfo *var = &info->var;
  756. struct mfb_info *mfbi = info->par;
  757. strncpy(fix->id, mfbi->id, sizeof(fix->id));
  758. fix->line_length = var->xres_virtual * var->bits_per_pixel / 8;
  759. fix->type = FB_TYPE_PACKED_PIXELS;
  760. fix->accel = FB_ACCEL_NONE;
  761. fix->visual = FB_VISUAL_TRUECOLOR;
  762. fix->xpanstep = 1;
  763. fix->ypanstep = 1;
  764. }
  765. static void update_lcdc(struct fb_info *info)
  766. {
  767. struct fb_var_screeninfo *var = &info->var;
  768. struct mfb_info *mfbi = info->par;
  769. struct fsl_diu_data *data = mfbi->parent;
  770. struct diu __iomem *hw;
  771. int i, j;
  772. u8 *gamma_table_base;
  773. u32 temp;
  774. hw = data->diu_reg;
  775. diu_ops.set_monitor_port(data->monitor_port);
  776. gamma_table_base = data->gamma;
  777. /* Prep for DIU init - gamma table, cursor table */
  778. for (i = 0; i <= 2; i++)
  779. for (j = 0; j <= 255; j++)
  780. *gamma_table_base++ = j;
  781. diu_ops.set_gamma_table(data->monitor_port, data->gamma);
  782. disable_lcdc(info);
  783. /* Program DIU registers */
  784. out_be32(&hw->gamma, DMA_ADDR(data, gamma));
  785. out_be32(&hw->cursor, DMA_ADDR(data, cursor));
  786. out_be32(&hw->bgnd, 0x007F7F7F); /* BGND */
  787. out_be32(&hw->bgnd_wb, 0); /* BGND_WB */
  788. out_be32(&hw->disp_size, (var->yres << 16 | var->xres));
  789. /* DISP SIZE */
  790. out_be32(&hw->wb_size, 0); /* WB SIZE */
  791. out_be32(&hw->wb_mem_addr, 0); /* WB MEM ADDR */
  792. /* Horizontal and vertical configuration register */
  793. temp = var->left_margin << 22 | /* BP_H */
  794. var->hsync_len << 11 | /* PW_H */
  795. var->right_margin; /* FP_H */
  796. out_be32(&hw->hsyn_para, temp);
  797. temp = var->upper_margin << 22 | /* BP_V */
  798. var->vsync_len << 11 | /* PW_V */
  799. var->lower_margin; /* FP_V */
  800. out_be32(&hw->vsyn_para, temp);
  801. diu_ops.set_pixel_clock(var->pixclock);
  802. out_be32(&hw->syn_pol, 0); /* SYNC SIGNALS POLARITY */
  803. out_be32(&hw->thresholds, 0x00037800); /* The Thresholds */
  804. out_be32(&hw->int_status, 0); /* INTERRUPT STATUS */
  805. out_be32(&hw->plut, 0x01F5F666);
  806. /* Enable the DIU */
  807. enable_lcdc(info);
  808. }
  809. static int map_video_memory(struct fb_info *info)
  810. {
  811. phys_addr_t phys;
  812. u32 smem_len = info->fix.line_length * info->var.yres_virtual;
  813. info->screen_base = fsl_diu_alloc(smem_len, &phys);
  814. if (info->screen_base == NULL) {
  815. dev_err(info->dev, "unable to allocate fb memory\n");
  816. return -ENOMEM;
  817. }
  818. mutex_lock(&info->mm_lock);
  819. info->fix.smem_start = (unsigned long) phys;
  820. info->fix.smem_len = smem_len;
  821. mutex_unlock(&info->mm_lock);
  822. info->screen_size = info->fix.smem_len;
  823. return 0;
  824. }
  825. static void unmap_video_memory(struct fb_info *info)
  826. {
  827. fsl_diu_free(info->screen_base, info->fix.smem_len);
  828. mutex_lock(&info->mm_lock);
  829. info->screen_base = NULL;
  830. info->fix.smem_start = 0;
  831. info->fix.smem_len = 0;
  832. mutex_unlock(&info->mm_lock);
  833. }
  834. /*
  835. * Using the fb_var_screeninfo in fb_info we set the aoi of this
  836. * particular framebuffer. It is a light version of fsl_diu_set_par.
  837. */
  838. static int fsl_diu_set_aoi(struct fb_info *info)
  839. {
  840. struct fb_var_screeninfo *var = &info->var;
  841. struct mfb_info *mfbi = info->par;
  842. struct diu_ad *ad = mfbi->ad;
  843. /* AOI should not be greater than display size */
  844. ad->offset_xyi = cpu_to_le32((var->yoffset << 16) | var->xoffset);
  845. ad->offset_xyd = cpu_to_le32((mfbi->y_aoi_d << 16) | mfbi->x_aoi_d);
  846. return 0;
  847. }
  848. /*
  849. * Using the fb_var_screeninfo in fb_info we set the resolution of this
  850. * particular framebuffer. This function alters the fb_fix_screeninfo stored
  851. * in fb_info. It does not alter var in fb_info since we are using that
  852. * data. This means we depend on the data in var inside fb_info to be
  853. * supported by the hardware. fsl_diu_check_var is always called before
  854. * fsl_diu_set_par to ensure this.
  855. */
  856. static int fsl_diu_set_par(struct fb_info *info)
  857. {
  858. unsigned long len;
  859. struct fb_var_screeninfo *var = &info->var;
  860. struct mfb_info *mfbi = info->par;
  861. struct fsl_diu_data *data = mfbi->parent;
  862. struct diu_ad *ad = mfbi->ad;
  863. struct diu __iomem *hw;
  864. hw = data->diu_reg;
  865. set_fix(info);
  866. mfbi->cursor_reset = 1;
  867. len = info->var.yres_virtual * info->fix.line_length;
  868. /* Alloc & dealloc each time resolution/bpp change */
  869. if (len != info->fix.smem_len) {
  870. if (info->fix.smem_start)
  871. unmap_video_memory(info);
  872. /* Memory allocation for framebuffer */
  873. if (map_video_memory(info)) {
  874. dev_err(info->dev, "unable to allocate fb memory 1\n");
  875. return -ENOMEM;
  876. }
  877. }
  878. ad->pix_fmt = diu_ops.get_pixel_format(data->monitor_port,
  879. var->bits_per_pixel);
  880. ad->addr = cpu_to_le32(info->fix.smem_start);
  881. ad->src_size_g_alpha = cpu_to_le32((var->yres_virtual << 12) |
  882. var->xres_virtual) | mfbi->g_alpha;
  883. /* AOI should not be greater than display size */
  884. ad->aoi_size = cpu_to_le32((var->yres << 16) | var->xres);
  885. ad->offset_xyi = cpu_to_le32((var->yoffset << 16) | var->xoffset);
  886. ad->offset_xyd = cpu_to_le32((mfbi->y_aoi_d << 16) | mfbi->x_aoi_d);
  887. /* Disable chroma keying function */
  888. ad->ckmax_r = 0;
  889. ad->ckmax_g = 0;
  890. ad->ckmax_b = 0;
  891. ad->ckmin_r = 255;
  892. ad->ckmin_g = 255;
  893. ad->ckmin_b = 255;
  894. if (mfbi->index == PLANE0)
  895. update_lcdc(info);
  896. return 0;
  897. }
  898. static inline __u32 CNVT_TOHW(__u32 val, __u32 width)
  899. {
  900. return ((val << width) + 0x7FFF - val) >> 16;
  901. }
  902. /*
  903. * Set a single color register. The values supplied have a 16 bit magnitude
  904. * which needs to be scaled in this function for the hardware. Things to take
  905. * into consideration are how many color registers, if any, are supported with
  906. * the current color visual. With truecolor mode no color palettes are
  907. * supported. Here a pseudo palette is created which we store the value in
  908. * pseudo_palette in struct fb_info. For pseudocolor mode we have a limited
  909. * color palette.
  910. */
  911. static int fsl_diu_setcolreg(unsigned int regno, unsigned int red,
  912. unsigned int green, unsigned int blue,
  913. unsigned int transp, struct fb_info *info)
  914. {
  915. int ret = 1;
  916. /*
  917. * If greyscale is true, then we convert the RGB value
  918. * to greyscale no matter what visual we are using.
  919. */
  920. if (info->var.grayscale)
  921. red = green = blue = (19595 * red + 38470 * green +
  922. 7471 * blue) >> 16;
  923. switch (info->fix.visual) {
  924. case FB_VISUAL_TRUECOLOR:
  925. /*
  926. * 16-bit True Colour. We encode the RGB value
  927. * according to the RGB bitfield information.
  928. */
  929. if (regno < 16) {
  930. u32 *pal = info->pseudo_palette;
  931. u32 v;
  932. red = CNVT_TOHW(red, info->var.red.length);
  933. green = CNVT_TOHW(green, info->var.green.length);
  934. blue = CNVT_TOHW(blue, info->var.blue.length);
  935. transp = CNVT_TOHW(transp, info->var.transp.length);
  936. v = (red << info->var.red.offset) |
  937. (green << info->var.green.offset) |
  938. (blue << info->var.blue.offset) |
  939. (transp << info->var.transp.offset);
  940. pal[regno] = v;
  941. ret = 0;
  942. }
  943. break;
  944. }
  945. return ret;
  946. }
  947. /*
  948. * Pan (or wrap, depending on the `vmode' field) the display using the
  949. * 'xoffset' and 'yoffset' fields of the 'var' structure. If the values
  950. * don't fit, return -EINVAL.
  951. */
  952. static int fsl_diu_pan_display(struct fb_var_screeninfo *var,
  953. struct fb_info *info)
  954. {
  955. if ((info->var.xoffset == var->xoffset) &&
  956. (info->var.yoffset == var->yoffset))
  957. return 0; /* No change, do nothing */
  958. if (var->xoffset < 0 || var->yoffset < 0
  959. || var->xoffset + info->var.xres > info->var.xres_virtual
  960. || var->yoffset + info->var.yres > info->var.yres_virtual)
  961. return -EINVAL;
  962. info->var.xoffset = var->xoffset;
  963. info->var.yoffset = var->yoffset;
  964. if (var->vmode & FB_VMODE_YWRAP)
  965. info->var.vmode |= FB_VMODE_YWRAP;
  966. else
  967. info->var.vmode &= ~FB_VMODE_YWRAP;
  968. fsl_diu_set_aoi(info);
  969. return 0;
  970. }
  971. static int fsl_diu_ioctl(struct fb_info *info, unsigned int cmd,
  972. unsigned long arg)
  973. {
  974. struct mfb_info *mfbi = info->par;
  975. struct diu_ad *ad = mfbi->ad;
  976. struct mfb_chroma_key ck;
  977. unsigned char global_alpha;
  978. struct aoi_display_offset aoi_d;
  979. __u32 pix_fmt;
  980. void __user *buf = (void __user *)arg;
  981. if (!arg)
  982. return -EINVAL;
  983. switch (cmd) {
  984. case MFB_SET_PIXFMT_OLD:
  985. dev_warn(info->dev,
  986. "MFB_SET_PIXFMT value of 0x%08x is deprecated.\n",
  987. MFB_SET_PIXFMT_OLD);
  988. case MFB_SET_PIXFMT:
  989. if (copy_from_user(&pix_fmt, buf, sizeof(pix_fmt)))
  990. return -EFAULT;
  991. ad->pix_fmt = pix_fmt;
  992. break;
  993. case MFB_GET_PIXFMT_OLD:
  994. dev_warn(info->dev,
  995. "MFB_GET_PIXFMT value of 0x%08x is deprecated.\n",
  996. MFB_GET_PIXFMT_OLD);
  997. case MFB_GET_PIXFMT:
  998. pix_fmt = ad->pix_fmt;
  999. if (copy_to_user(buf, &pix_fmt, sizeof(pix_fmt)))
  1000. return -EFAULT;
  1001. break;
  1002. case MFB_SET_AOID:
  1003. if (copy_from_user(&aoi_d, buf, sizeof(aoi_d)))
  1004. return -EFAULT;
  1005. mfbi->x_aoi_d = aoi_d.x_aoi_d;
  1006. mfbi->y_aoi_d = aoi_d.y_aoi_d;
  1007. fsl_diu_check_var(&info->var, info);
  1008. fsl_diu_set_aoi(info);
  1009. break;
  1010. case MFB_GET_AOID:
  1011. aoi_d.x_aoi_d = mfbi->x_aoi_d;
  1012. aoi_d.y_aoi_d = mfbi->y_aoi_d;
  1013. if (copy_to_user(buf, &aoi_d, sizeof(aoi_d)))
  1014. return -EFAULT;
  1015. break;
  1016. case MFB_GET_ALPHA:
  1017. global_alpha = mfbi->g_alpha;
  1018. if (copy_to_user(buf, &global_alpha, sizeof(global_alpha)))
  1019. return -EFAULT;
  1020. break;
  1021. case MFB_SET_ALPHA:
  1022. /* set panel information */
  1023. if (copy_from_user(&global_alpha, buf, sizeof(global_alpha)))
  1024. return -EFAULT;
  1025. ad->src_size_g_alpha = (ad->src_size_g_alpha & (~0xff)) |
  1026. (global_alpha & 0xff);
  1027. mfbi->g_alpha = global_alpha;
  1028. break;
  1029. case MFB_SET_CHROMA_KEY:
  1030. /* set panel winformation */
  1031. if (copy_from_user(&ck, buf, sizeof(ck)))
  1032. return -EFAULT;
  1033. if (ck.enable &&
  1034. (ck.red_max < ck.red_min ||
  1035. ck.green_max < ck.green_min ||
  1036. ck.blue_max < ck.blue_min))
  1037. return -EINVAL;
  1038. if (!ck.enable) {
  1039. ad->ckmax_r = 0;
  1040. ad->ckmax_g = 0;
  1041. ad->ckmax_b = 0;
  1042. ad->ckmin_r = 255;
  1043. ad->ckmin_g = 255;
  1044. ad->ckmin_b = 255;
  1045. } else {
  1046. ad->ckmax_r = ck.red_max;
  1047. ad->ckmax_g = ck.green_max;
  1048. ad->ckmax_b = ck.blue_max;
  1049. ad->ckmin_r = ck.red_min;
  1050. ad->ckmin_g = ck.green_min;
  1051. ad->ckmin_b = ck.blue_min;
  1052. }
  1053. break;
  1054. default:
  1055. dev_err(info->dev, "unknown ioctl command (0x%08X)\n", cmd);
  1056. return -ENOIOCTLCMD;
  1057. }
  1058. return 0;
  1059. }
  1060. /* turn on fb if count == 1
  1061. */
  1062. static int fsl_diu_open(struct fb_info *info, int user)
  1063. {
  1064. struct mfb_info *mfbi = info->par;
  1065. int res = 0;
  1066. /* free boot splash memory on first /dev/fb0 open */
  1067. if ((mfbi->index == PLANE0) && diu_ops.release_bootmem)
  1068. diu_ops.release_bootmem();
  1069. spin_lock(&diu_lock);
  1070. mfbi->count++;
  1071. if (mfbi->count == 1) {
  1072. fsl_diu_check_var(&info->var, info);
  1073. res = fsl_diu_set_par(info);
  1074. if (res < 0)
  1075. mfbi->count--;
  1076. else
  1077. fsl_diu_enable_panel(info);
  1078. }
  1079. spin_unlock(&diu_lock);
  1080. return res;
  1081. }
  1082. /* turn off fb if count == 0
  1083. */
  1084. static int fsl_diu_release(struct fb_info *info, int user)
  1085. {
  1086. struct mfb_info *mfbi = info->par;
  1087. int res = 0;
  1088. spin_lock(&diu_lock);
  1089. mfbi->count--;
  1090. if (mfbi->count == 0)
  1091. fsl_diu_disable_panel(info);
  1092. spin_unlock(&diu_lock);
  1093. return res;
  1094. }
  1095. static struct fb_ops fsl_diu_ops = {
  1096. .owner = THIS_MODULE,
  1097. .fb_check_var = fsl_diu_check_var,
  1098. .fb_set_par = fsl_diu_set_par,
  1099. .fb_setcolreg = fsl_diu_setcolreg,
  1100. .fb_pan_display = fsl_diu_pan_display,
  1101. .fb_fillrect = cfb_fillrect,
  1102. .fb_copyarea = cfb_copyarea,
  1103. .fb_imageblit = cfb_imageblit,
  1104. .fb_ioctl = fsl_diu_ioctl,
  1105. .fb_open = fsl_diu_open,
  1106. .fb_release = fsl_diu_release,
  1107. };
  1108. static int init_fbinfo(struct fb_info *info)
  1109. {
  1110. struct mfb_info *mfbi = info->par;
  1111. info->device = NULL;
  1112. info->var.activate = FB_ACTIVATE_NOW;
  1113. info->fbops = &fsl_diu_ops;
  1114. info->flags = FBINFO_FLAG_DEFAULT;
  1115. info->pseudo_palette = &mfbi->pseudo_palette;
  1116. /* Allocate colormap */
  1117. fb_alloc_cmap(&info->cmap, 16, 0);
  1118. return 0;
  1119. }
  1120. static int __devinit install_fb(struct fb_info *info)
  1121. {
  1122. int rc;
  1123. struct mfb_info *mfbi = info->par;
  1124. const char *aoi_mode, *init_aoi_mode = "320x240";
  1125. struct fb_videomode *db = fsl_diu_mode_db;
  1126. unsigned int dbsize = ARRAY_SIZE(fsl_diu_mode_db);
  1127. int has_default_mode = 1;
  1128. if (init_fbinfo(info))
  1129. return -EINVAL;
  1130. if (mfbi->index == PLANE0) {
  1131. if (mfbi->edid_data) {
  1132. /* Now build modedb from EDID */
  1133. fb_edid_to_monspecs(mfbi->edid_data, &info->monspecs);
  1134. fb_videomode_to_modelist(info->monspecs.modedb,
  1135. info->monspecs.modedb_len,
  1136. &info->modelist);
  1137. db = info->monspecs.modedb;
  1138. dbsize = info->monspecs.modedb_len;
  1139. }
  1140. aoi_mode = fb_mode;
  1141. } else {
  1142. aoi_mode = init_aoi_mode;
  1143. }
  1144. rc = fb_find_mode(&info->var, info, aoi_mode, db, dbsize, NULL,
  1145. default_bpp);
  1146. if (!rc) {
  1147. /*
  1148. * For plane 0 we continue and look into
  1149. * driver's internal modedb.
  1150. */
  1151. if ((mfbi->index == PLANE0) && mfbi->edid_data)
  1152. has_default_mode = 0;
  1153. else
  1154. return -EINVAL;
  1155. }
  1156. if (!has_default_mode) {
  1157. rc = fb_find_mode(&info->var, info, aoi_mode, fsl_diu_mode_db,
  1158. ARRAY_SIZE(fsl_diu_mode_db), NULL, default_bpp);
  1159. if (rc)
  1160. has_default_mode = 1;
  1161. }
  1162. /* Still not found, use preferred mode from database if any */
  1163. if (!has_default_mode && info->monspecs.modedb) {
  1164. struct fb_monspecs *specs = &info->monspecs;
  1165. struct fb_videomode *modedb = &specs->modedb[0];
  1166. /*
  1167. * Get preferred timing. If not found,
  1168. * first mode in database will be used.
  1169. */
  1170. if (specs->misc & FB_MISC_1ST_DETAIL) {
  1171. int i;
  1172. for (i = 0; i < specs->modedb_len; i++) {
  1173. if (specs->modedb[i].flag & FB_MODE_IS_FIRST) {
  1174. modedb = &specs->modedb[i];
  1175. break;
  1176. }
  1177. }
  1178. }
  1179. info->var.bits_per_pixel = default_bpp;
  1180. fb_videomode_to_var(&info->var, modedb);
  1181. }
  1182. if (fsl_diu_check_var(&info->var, info)) {
  1183. dev_err(info->dev, "fsl_diu_check_var failed\n");
  1184. unmap_video_memory(info);
  1185. fb_dealloc_cmap(&info->cmap);
  1186. return -EINVAL;
  1187. }
  1188. if (register_framebuffer(info) < 0) {
  1189. dev_err(info->dev, "register_framebuffer failed\n");
  1190. unmap_video_memory(info);
  1191. fb_dealloc_cmap(&info->cmap);
  1192. return -EINVAL;
  1193. }
  1194. mfbi->registered = 1;
  1195. dev_info(info->dev, "%s registered successfully\n", mfbi->id);
  1196. return 0;
  1197. }
  1198. static void uninstall_fb(struct fb_info *info)
  1199. {
  1200. struct mfb_info *mfbi = info->par;
  1201. if (!mfbi->registered)
  1202. return;
  1203. if (mfbi->index == PLANE0)
  1204. kfree(mfbi->edid_data);
  1205. unregister_framebuffer(info);
  1206. unmap_video_memory(info);
  1207. if (&info->cmap)
  1208. fb_dealloc_cmap(&info->cmap);
  1209. mfbi->registered = 0;
  1210. }
  1211. static irqreturn_t fsl_diu_isr(int irq, void *dev_id)
  1212. {
  1213. struct diu __iomem *hw = dev_id;
  1214. unsigned int status = in_be32(&hw->int_status);
  1215. if (status) {
  1216. /* This is the workaround for underrun */
  1217. if (status & INT_UNDRUN) {
  1218. out_be32(&hw->diu_mode, 0);
  1219. udelay(1);
  1220. out_be32(&hw->diu_mode, 1);
  1221. }
  1222. #if defined(CONFIG_NOT_COHERENT_CACHE)
  1223. else if (status & INT_VSYNC) {
  1224. unsigned int i;
  1225. for (i = 0; i < coherence_data_size;
  1226. i += d_cache_line_size)
  1227. __asm__ __volatile__ (
  1228. "dcbz 0, %[input]"
  1229. ::[input]"r"(&coherence_data[i]));
  1230. }
  1231. #endif
  1232. return IRQ_HANDLED;
  1233. }
  1234. return IRQ_NONE;
  1235. }
  1236. static int request_irq_local(struct fsl_diu_data *data)
  1237. {
  1238. struct diu __iomem *hw = data->diu_reg;
  1239. u32 ints;
  1240. int ret;
  1241. /* Read to clear the status */
  1242. in_be32(&hw->int_status);
  1243. ret = request_irq(data->irq, fsl_diu_isr, 0, "fsl-diu-fb", hw);
  1244. if (!ret) {
  1245. ints = INT_PARERR | INT_LS_BF_VS;
  1246. #if !defined(CONFIG_NOT_COHERENT_CACHE)
  1247. ints |= INT_VSYNC;
  1248. #endif
  1249. /* Read to clear the status */
  1250. in_be32(&hw->int_status);
  1251. out_be32(&hw->int_mask, ints);
  1252. }
  1253. return ret;
  1254. }
  1255. static void free_irq_local(struct fsl_diu_data *data)
  1256. {
  1257. struct diu __iomem *hw = data->diu_reg;
  1258. /* Disable all LCDC interrupt */
  1259. out_be32(&hw->int_mask, 0x1f);
  1260. free_irq(data->irq, NULL);
  1261. }
  1262. #ifdef CONFIG_PM
  1263. /*
  1264. * Power management hooks. Note that we won't be called from IRQ context,
  1265. * unlike the blank functions above, so we may sleep.
  1266. */
  1267. static int fsl_diu_suspend(struct platform_device *ofdev, pm_message_t state)
  1268. {
  1269. struct fsl_diu_data *data;
  1270. data = dev_get_drvdata(&ofdev->dev);
  1271. disable_lcdc(data->fsl_diu_info[0]);
  1272. return 0;
  1273. }
  1274. static int fsl_diu_resume(struct platform_device *ofdev)
  1275. {
  1276. struct fsl_diu_data *data;
  1277. data = dev_get_drvdata(&ofdev->dev);
  1278. enable_lcdc(data->fsl_diu_info[0]);
  1279. return 0;
  1280. }
  1281. #else
  1282. #define fsl_diu_suspend NULL
  1283. #define fsl_diu_resume NULL
  1284. #endif /* CONFIG_PM */
  1285. static ssize_t store_monitor(struct device *device,
  1286. struct device_attribute *attr, const char *buf, size_t count)
  1287. {
  1288. enum fsl_diu_monitor_port old_monitor_port;
  1289. struct fsl_diu_data *data =
  1290. container_of(attr, struct fsl_diu_data, dev_attr);
  1291. old_monitor_port = data->monitor_port;
  1292. data->monitor_port = fsl_diu_name_to_port(buf);
  1293. if (old_monitor_port != data->monitor_port) {
  1294. /* All AOIs need adjust pixel format
  1295. * fsl_diu_set_par only change the pixsel format here
  1296. * unlikely to fail. */
  1297. unsigned int i;
  1298. for (i=0; i < NUM_AOIS; i++)
  1299. fsl_diu_set_par(&data->fsl_diu_info[i]);
  1300. }
  1301. return count;
  1302. }
  1303. static ssize_t show_monitor(struct device *device,
  1304. struct device_attribute *attr, char *buf)
  1305. {
  1306. struct fsl_diu_data *data =
  1307. container_of(attr, struct fsl_diu_data, dev_attr);
  1308. switch (data->monitor_port) {
  1309. case FSL_DIU_PORT_DVI:
  1310. return sprintf(buf, "DVI\n");
  1311. case FSL_DIU_PORT_LVDS:
  1312. return sprintf(buf, "Single-link LVDS\n");
  1313. case FSL_DIU_PORT_DLVDS:
  1314. return sprintf(buf, "Dual-link LVDS\n");
  1315. }
  1316. return 0;
  1317. }
  1318. static int __devinit fsl_diu_probe(struct platform_device *pdev)
  1319. {
  1320. struct device_node *np = pdev->dev.of_node;
  1321. struct mfb_info *mfbi;
  1322. struct fsl_diu_data *data;
  1323. int diu_mode;
  1324. dma_addr_t dma_addr; /* DMA addr of fsl_diu_data struct */
  1325. unsigned int i;
  1326. int ret;
  1327. data = dma_alloc_coherent(&pdev->dev, sizeof(struct fsl_diu_data),
  1328. &dma_addr, GFP_DMA | __GFP_ZERO);
  1329. if (!data)
  1330. return -ENOMEM;
  1331. data->dma_addr = dma_addr;
  1332. /*
  1333. * dma_alloc_coherent() uses a page allocator, so the address is
  1334. * always page-aligned. We need the memory to be 32-byte aligned,
  1335. * so that's good. However, if one day the allocator changes, we
  1336. * need to catch that. It's not worth the effort to handle unaligned
  1337. * alloctions now because it's highly unlikely to ever be a problem.
  1338. */
  1339. if ((unsigned long)data & 31) {
  1340. dev_err(&pdev->dev, "misaligned allocation");
  1341. ret = -ENOMEM;
  1342. goto error;
  1343. }
  1344. spin_lock_init(&data->reg_lock);
  1345. for (i = 0; i < NUM_AOIS; i++) {
  1346. struct fb_info *info = &data->fsl_diu_info[i];
  1347. info->device = &pdev->dev;
  1348. info->par = &data->mfb[i];
  1349. /*
  1350. * We store the physical address of the AD in the reserved
  1351. * 'paddr' field of the AD itself.
  1352. */
  1353. data->ad[i].paddr = DMA_ADDR(data, ad[i]);
  1354. info->fix.smem_start = 0;
  1355. /* Initialize the AOI data structure */
  1356. mfbi = info->par;
  1357. memcpy(mfbi, &mfb_template[i], sizeof(struct mfb_info));
  1358. mfbi->parent = data;
  1359. mfbi->ad = &data->ad[i];
  1360. if (mfbi->index == PLANE0) {
  1361. const u8 *prop;
  1362. int len;
  1363. /* Get EDID */
  1364. prop = of_get_property(np, "edid", &len);
  1365. if (prop && len == EDID_LENGTH)
  1366. mfbi->edid_data = kmemdup(prop, EDID_LENGTH,
  1367. GFP_KERNEL);
  1368. }
  1369. }
  1370. data->diu_reg = of_iomap(np, 0);
  1371. if (!data->diu_reg) {
  1372. dev_err(&pdev->dev, "cannot map DIU registers\n");
  1373. ret = -EFAULT;
  1374. goto error;
  1375. }
  1376. diu_mode = in_be32(&data->diu_reg->diu_mode);
  1377. if (diu_mode == MFB_MODE0)
  1378. out_be32(&data->diu_reg->diu_mode, 0); /* disable DIU */
  1379. /* Get the IRQ of the DIU */
  1380. data->irq = irq_of_parse_and_map(np, 0);
  1381. if (!data->irq) {
  1382. dev_err(&pdev->dev, "could not get DIU IRQ\n");
  1383. ret = -EINVAL;
  1384. goto error;
  1385. }
  1386. data->monitor_port = monitor_port;
  1387. /* Initialize the dummy Area Descriptor */
  1388. data->dummy_ad.addr = cpu_to_le32(DMA_ADDR(data, dummy_aoi));
  1389. data->dummy_ad.pix_fmt = 0x88882317;
  1390. data->dummy_ad.src_size_g_alpha = cpu_to_le32((4 << 12) | 4);
  1391. data->dummy_ad.aoi_size = cpu_to_le32((4 << 16) | 2);
  1392. data->dummy_ad.offset_xyi = 0;
  1393. data->dummy_ad.offset_xyd = 0;
  1394. data->dummy_ad.next_ad = 0;
  1395. data->dummy_ad.paddr = DMA_ADDR(data, dummy_ad);
  1396. /*
  1397. * Let DIU display splash screen if it was pre-initialized
  1398. * by the bootloader, set dummy area descriptor otherwise.
  1399. */
  1400. if (diu_mode == MFB_MODE0)
  1401. out_be32(&data->diu_reg->desc[0], data->dummy_ad.paddr);
  1402. out_be32(&data->diu_reg->desc[1], data->dummy_ad.paddr);
  1403. out_be32(&data->diu_reg->desc[2], data->dummy_ad.paddr);
  1404. for (i = 0; i < NUM_AOIS; i++) {
  1405. ret = install_fb(&data->fsl_diu_info[i]);
  1406. if (ret) {
  1407. dev_err(&pdev->dev, "could not register fb %d\n", i);
  1408. goto error;
  1409. }
  1410. }
  1411. if (request_irq_local(data)) {
  1412. dev_err(&pdev->dev, "could not claim irq\n");
  1413. goto error;
  1414. }
  1415. sysfs_attr_init(&data->dev_attr.attr);
  1416. data->dev_attr.attr.name = "monitor";
  1417. data->dev_attr.attr.mode = S_IRUGO|S_IWUSR;
  1418. data->dev_attr.show = show_monitor;
  1419. data->dev_attr.store = store_monitor;
  1420. ret = device_create_file(&pdev->dev, &data->dev_attr);
  1421. if (ret) {
  1422. dev_err(&pdev->dev, "could not create sysfs file %s\n",
  1423. data->dev_attr.attr.name);
  1424. }
  1425. dev_set_drvdata(&pdev->dev, data);
  1426. return 0;
  1427. error:
  1428. for (i = 0; i < NUM_AOIS; i++)
  1429. uninstall_fb(&data->fsl_diu_info[i]);
  1430. iounmap(data->diu_reg);
  1431. dma_free_coherent(&pdev->dev, sizeof(struct fsl_diu_data), data,
  1432. data->dma_addr);
  1433. return ret;
  1434. }
  1435. static int fsl_diu_remove(struct platform_device *pdev)
  1436. {
  1437. struct fsl_diu_data *data;
  1438. int i;
  1439. data = dev_get_drvdata(&pdev->dev);
  1440. disable_lcdc(&data->fsl_diu_info[0]);
  1441. free_irq_local(data);
  1442. for (i = 0; i < NUM_AOIS; i++)
  1443. uninstall_fb(&data->fsl_diu_info[i]);
  1444. iounmap(data->diu_reg);
  1445. dma_free_coherent(&pdev->dev, sizeof(struct fsl_diu_data), data,
  1446. data->dma_addr);
  1447. return 0;
  1448. }
  1449. #ifndef MODULE
  1450. static int __init fsl_diu_setup(char *options)
  1451. {
  1452. char *opt;
  1453. unsigned long val;
  1454. if (!options || !*options)
  1455. return 0;
  1456. while ((opt = strsep(&options, ",")) != NULL) {
  1457. if (!*opt)
  1458. continue;
  1459. if (!strncmp(opt, "monitor=", 8)) {
  1460. monitor_port = fsl_diu_name_to_port(opt + 8);
  1461. } else if (!strncmp(opt, "bpp=", 4)) {
  1462. if (!strict_strtoul(opt + 4, 10, &val))
  1463. default_bpp = val;
  1464. } else
  1465. fb_mode = opt;
  1466. }
  1467. return 0;
  1468. }
  1469. #endif
  1470. static struct of_device_id fsl_diu_match[] = {
  1471. #ifdef CONFIG_PPC_MPC512x
  1472. {
  1473. .compatible = "fsl,mpc5121-diu",
  1474. },
  1475. #endif
  1476. {
  1477. .compatible = "fsl,diu",
  1478. },
  1479. {}
  1480. };
  1481. MODULE_DEVICE_TABLE(of, fsl_diu_match);
  1482. static struct platform_driver fsl_diu_driver = {
  1483. .driver = {
  1484. .name = "fsl-diu-fb",
  1485. .owner = THIS_MODULE,
  1486. .of_match_table = fsl_diu_match,
  1487. },
  1488. .probe = fsl_diu_probe,
  1489. .remove = fsl_diu_remove,
  1490. .suspend = fsl_diu_suspend,
  1491. .resume = fsl_diu_resume,
  1492. };
  1493. static int __init fsl_diu_init(void)
  1494. {
  1495. #ifdef CONFIG_NOT_COHERENT_CACHE
  1496. struct device_node *np;
  1497. const u32 *prop;
  1498. #endif
  1499. int ret;
  1500. #ifndef MODULE
  1501. char *option;
  1502. /*
  1503. * For kernel boot options (in 'video=xxxfb:<options>' format)
  1504. */
  1505. if (fb_get_options("fslfb", &option))
  1506. return -ENODEV;
  1507. fsl_diu_setup(option);
  1508. #else
  1509. monitor_port = fsl_diu_name_to_port(monitor_string);
  1510. #endif
  1511. pr_info("Freescale Display Interface Unit (DIU) framebuffer driver\n");
  1512. #ifdef CONFIG_NOT_COHERENT_CACHE
  1513. np = of_find_node_by_type(NULL, "cpu");
  1514. if (!np) {
  1515. pr_err("fsl-diu-fb: can't find 'cpu' device node\n");
  1516. return -ENODEV;
  1517. }
  1518. prop = of_get_property(np, "d-cache-size", NULL);
  1519. if (prop == NULL) {
  1520. pr_err("fsl-diu-fb: missing 'd-cache-size' property' "
  1521. "in 'cpu' node\n");
  1522. of_node_put(np);
  1523. return -ENODEV;
  1524. }
  1525. /*
  1526. * Freescale PLRU requires 13/8 times the cache size to do a proper
  1527. * displacement flush
  1528. */
  1529. coherence_data_size = be32_to_cpup(prop) * 13;
  1530. coherence_data_size /= 8;
  1531. prop = of_get_property(np, "d-cache-line-size", NULL);
  1532. if (prop == NULL) {
  1533. pr_err("fsl-diu-fb: missing 'd-cache-line-size' property' "
  1534. "in 'cpu' node\n");
  1535. of_node_put(np);
  1536. return -ENODEV;
  1537. }
  1538. d_cache_line_size = be32_to_cpup(prop);
  1539. of_node_put(np);
  1540. coherence_data = vmalloc(coherence_data_size);
  1541. if (!coherence_data)
  1542. return -ENOMEM;
  1543. #endif
  1544. ret = platform_driver_register(&fsl_diu_driver);
  1545. if (ret) {
  1546. pr_err("fsl-diu-fb: failed to register platform driver\n");
  1547. #if defined(CONFIG_NOT_COHERENT_CACHE)
  1548. vfree(coherence_data);
  1549. #endif
  1550. }
  1551. return ret;
  1552. }
  1553. static void __exit fsl_diu_exit(void)
  1554. {
  1555. platform_driver_unregister(&fsl_diu_driver);
  1556. #if defined(CONFIG_NOT_COHERENT_CACHE)
  1557. vfree(coherence_data);
  1558. #endif
  1559. }
  1560. module_init(fsl_diu_init);
  1561. module_exit(fsl_diu_exit);
  1562. MODULE_AUTHOR("York Sun <yorksun@freescale.com>");
  1563. MODULE_DESCRIPTION("Freescale DIU framebuffer driver");
  1564. MODULE_LICENSE("GPL");
  1565. module_param_named(mode, fb_mode, charp, 0);
  1566. MODULE_PARM_DESC(mode,
  1567. "Specify resolution as \"<xres>x<yres>[-<bpp>][@<refresh>]\" ");
  1568. module_param_named(bpp, default_bpp, ulong, 0);
  1569. MODULE_PARM_DESC(bpp, "Specify bit-per-pixel if not specified in 'mode'");
  1570. module_param_named(monitor, monitor_string, charp, 0);
  1571. MODULE_PARM_DESC(monitor, "Specify the monitor port "
  1572. "(\"dvi\", \"lvds\", or \"dlvds\") if supported by the platform");