panel-tpo-td043mtea1.c 14 KB

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  1. /*
  2. * TPO TD043MTEA1 Panel driver
  3. *
  4. * Author: Gražvydas Ignotas <notasas@gmail.com>
  5. * Converted to new DSS device model: Tomi Valkeinen <tomi.valkeinen@ti.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/delay.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/regulator/consumer.h>
  16. #include <linux/gpio.h>
  17. #include <linux/err.h>
  18. #include <linux/slab.h>
  19. #include <video/omapdss.h>
  20. #include <video/omap-panel-data.h>
  21. #define TPO_R02_MODE(x) ((x) & 7)
  22. #define TPO_R02_MODE_800x480 7
  23. #define TPO_R02_NCLK_RISING BIT(3)
  24. #define TPO_R02_HSYNC_HIGH BIT(4)
  25. #define TPO_R02_VSYNC_HIGH BIT(5)
  26. #define TPO_R03_NSTANDBY BIT(0)
  27. #define TPO_R03_EN_CP_CLK BIT(1)
  28. #define TPO_R03_EN_VGL_PUMP BIT(2)
  29. #define TPO_R03_EN_PWM BIT(3)
  30. #define TPO_R03_DRIVING_CAP_100 BIT(4)
  31. #define TPO_R03_EN_PRE_CHARGE BIT(6)
  32. #define TPO_R03_SOFTWARE_CTL BIT(7)
  33. #define TPO_R04_NFLIP_H BIT(0)
  34. #define TPO_R04_NFLIP_V BIT(1)
  35. #define TPO_R04_CP_CLK_FREQ_1H BIT(2)
  36. #define TPO_R04_VGL_FREQ_1H BIT(4)
  37. #define TPO_R03_VAL_NORMAL (TPO_R03_NSTANDBY | TPO_R03_EN_CP_CLK | \
  38. TPO_R03_EN_VGL_PUMP | TPO_R03_EN_PWM | \
  39. TPO_R03_DRIVING_CAP_100 | TPO_R03_EN_PRE_CHARGE | \
  40. TPO_R03_SOFTWARE_CTL)
  41. #define TPO_R03_VAL_STANDBY (TPO_R03_DRIVING_CAP_100 | \
  42. TPO_R03_EN_PRE_CHARGE | TPO_R03_SOFTWARE_CTL)
  43. static const u16 tpo_td043_def_gamma[12] = {
  44. 105, 315, 381, 431, 490, 537, 579, 686, 780, 837, 880, 1023
  45. };
  46. struct panel_drv_data {
  47. struct omap_dss_device dssdev;
  48. struct omap_dss_device *in;
  49. struct omap_video_timings videomode;
  50. int data_lines;
  51. struct spi_device *spi;
  52. struct regulator *vcc_reg;
  53. int nreset_gpio;
  54. u16 gamma[12];
  55. u32 mode;
  56. u32 hmirror:1;
  57. u32 vmirror:1;
  58. u32 powered_on:1;
  59. u32 spi_suspended:1;
  60. u32 power_on_resume:1;
  61. };
  62. static const struct omap_video_timings tpo_td043_timings = {
  63. .x_res = 800,
  64. .y_res = 480,
  65. .pixel_clock = 36000,
  66. .hsw = 1,
  67. .hfp = 68,
  68. .hbp = 214,
  69. .vsw = 1,
  70. .vfp = 39,
  71. .vbp = 34,
  72. .vsync_level = OMAPDSS_SIG_ACTIVE_LOW,
  73. .hsync_level = OMAPDSS_SIG_ACTIVE_LOW,
  74. .data_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,
  75. .de_level = OMAPDSS_SIG_ACTIVE_HIGH,
  76. .sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
  77. };
  78. #define to_panel_data(p) container_of(p, struct panel_drv_data, dssdev)
  79. static int tpo_td043_write(struct spi_device *spi, u8 addr, u8 data)
  80. {
  81. struct spi_message m;
  82. struct spi_transfer xfer;
  83. u16 w;
  84. int r;
  85. spi_message_init(&m);
  86. memset(&xfer, 0, sizeof(xfer));
  87. w = ((u16)addr << 10) | (1 << 8) | data;
  88. xfer.tx_buf = &w;
  89. xfer.bits_per_word = 16;
  90. xfer.len = 2;
  91. spi_message_add_tail(&xfer, &m);
  92. r = spi_sync(spi, &m);
  93. if (r < 0)
  94. dev_warn(&spi->dev, "failed to write to LCD reg (%d)\n", r);
  95. return r;
  96. }
  97. static void tpo_td043_write_gamma(struct spi_device *spi, u16 gamma[12])
  98. {
  99. u8 i, val;
  100. /* gamma bits [9:8] */
  101. for (val = i = 0; i < 4; i++)
  102. val |= (gamma[i] & 0x300) >> ((i + 1) * 2);
  103. tpo_td043_write(spi, 0x11, val);
  104. for (val = i = 0; i < 4; i++)
  105. val |= (gamma[i+4] & 0x300) >> ((i + 1) * 2);
  106. tpo_td043_write(spi, 0x12, val);
  107. for (val = i = 0; i < 4; i++)
  108. val |= (gamma[i+8] & 0x300) >> ((i + 1) * 2);
  109. tpo_td043_write(spi, 0x13, val);
  110. /* gamma bits [7:0] */
  111. for (val = i = 0; i < 12; i++)
  112. tpo_td043_write(spi, 0x14 + i, gamma[i] & 0xff);
  113. }
  114. static int tpo_td043_write_mirror(struct spi_device *spi, bool h, bool v)
  115. {
  116. u8 reg4 = TPO_R04_NFLIP_H | TPO_R04_NFLIP_V |
  117. TPO_R04_CP_CLK_FREQ_1H | TPO_R04_VGL_FREQ_1H;
  118. if (h)
  119. reg4 &= ~TPO_R04_NFLIP_H;
  120. if (v)
  121. reg4 &= ~TPO_R04_NFLIP_V;
  122. return tpo_td043_write(spi, 4, reg4);
  123. }
  124. static int tpo_td043_set_hmirror(struct omap_dss_device *dssdev, bool enable)
  125. {
  126. struct panel_drv_data *ddata = dev_get_drvdata(dssdev->dev);
  127. ddata->hmirror = enable;
  128. return tpo_td043_write_mirror(ddata->spi, ddata->hmirror,
  129. ddata->vmirror);
  130. }
  131. static bool tpo_td043_get_hmirror(struct omap_dss_device *dssdev)
  132. {
  133. struct panel_drv_data *ddata = dev_get_drvdata(dssdev->dev);
  134. return ddata->hmirror;
  135. }
  136. static ssize_t tpo_td043_vmirror_show(struct device *dev,
  137. struct device_attribute *attr, char *buf)
  138. {
  139. struct panel_drv_data *ddata = dev_get_drvdata(dev);
  140. return snprintf(buf, PAGE_SIZE, "%d\n", ddata->vmirror);
  141. }
  142. static ssize_t tpo_td043_vmirror_store(struct device *dev,
  143. struct device_attribute *attr, const char *buf, size_t count)
  144. {
  145. struct panel_drv_data *ddata = dev_get_drvdata(dev);
  146. int val;
  147. int ret;
  148. ret = kstrtoint(buf, 0, &val);
  149. if (ret < 0)
  150. return ret;
  151. val = !!val;
  152. ret = tpo_td043_write_mirror(ddata->spi, ddata->hmirror, val);
  153. if (ret < 0)
  154. return ret;
  155. ddata->vmirror = val;
  156. return count;
  157. }
  158. static ssize_t tpo_td043_mode_show(struct device *dev,
  159. struct device_attribute *attr, char *buf)
  160. {
  161. struct panel_drv_data *ddata = dev_get_drvdata(dev);
  162. return snprintf(buf, PAGE_SIZE, "%d\n", ddata->mode);
  163. }
  164. static ssize_t tpo_td043_mode_store(struct device *dev,
  165. struct device_attribute *attr, const char *buf, size_t count)
  166. {
  167. struct panel_drv_data *ddata = dev_get_drvdata(dev);
  168. long val;
  169. int ret;
  170. ret = kstrtol(buf, 0, &val);
  171. if (ret != 0 || val & ~7)
  172. return -EINVAL;
  173. ddata->mode = val;
  174. val |= TPO_R02_NCLK_RISING;
  175. tpo_td043_write(ddata->spi, 2, val);
  176. return count;
  177. }
  178. static ssize_t tpo_td043_gamma_show(struct device *dev,
  179. struct device_attribute *attr, char *buf)
  180. {
  181. struct panel_drv_data *ddata = dev_get_drvdata(dev);
  182. ssize_t len = 0;
  183. int ret;
  184. int i;
  185. for (i = 0; i < ARRAY_SIZE(ddata->gamma); i++) {
  186. ret = snprintf(buf + len, PAGE_SIZE - len, "%u ",
  187. ddata->gamma[i]);
  188. if (ret < 0)
  189. return ret;
  190. len += ret;
  191. }
  192. buf[len - 1] = '\n';
  193. return len;
  194. }
  195. static ssize_t tpo_td043_gamma_store(struct device *dev,
  196. struct device_attribute *attr, const char *buf, size_t count)
  197. {
  198. struct panel_drv_data *ddata = dev_get_drvdata(dev);
  199. unsigned int g[12];
  200. int ret;
  201. int i;
  202. ret = sscanf(buf, "%u %u %u %u %u %u %u %u %u %u %u %u",
  203. &g[0], &g[1], &g[2], &g[3], &g[4], &g[5],
  204. &g[6], &g[7], &g[8], &g[9], &g[10], &g[11]);
  205. if (ret != 12)
  206. return -EINVAL;
  207. for (i = 0; i < 12; i++)
  208. ddata->gamma[i] = g[i];
  209. tpo_td043_write_gamma(ddata->spi, ddata->gamma);
  210. return count;
  211. }
  212. static DEVICE_ATTR(vmirror, S_IRUGO | S_IWUSR,
  213. tpo_td043_vmirror_show, tpo_td043_vmirror_store);
  214. static DEVICE_ATTR(mode, S_IRUGO | S_IWUSR,
  215. tpo_td043_mode_show, tpo_td043_mode_store);
  216. static DEVICE_ATTR(gamma, S_IRUGO | S_IWUSR,
  217. tpo_td043_gamma_show, tpo_td043_gamma_store);
  218. static struct attribute *tpo_td043_attrs[] = {
  219. &dev_attr_vmirror.attr,
  220. &dev_attr_mode.attr,
  221. &dev_attr_gamma.attr,
  222. NULL,
  223. };
  224. static struct attribute_group tpo_td043_attr_group = {
  225. .attrs = tpo_td043_attrs,
  226. };
  227. static int tpo_td043_power_on(struct panel_drv_data *ddata)
  228. {
  229. int r;
  230. if (ddata->powered_on)
  231. return 0;
  232. r = regulator_enable(ddata->vcc_reg);
  233. if (r != 0)
  234. return r;
  235. /* wait for panel to stabilize */
  236. msleep(160);
  237. if (gpio_is_valid(ddata->nreset_gpio))
  238. gpio_set_value(ddata->nreset_gpio, 1);
  239. tpo_td043_write(ddata->spi, 2,
  240. TPO_R02_MODE(ddata->mode) | TPO_R02_NCLK_RISING);
  241. tpo_td043_write(ddata->spi, 3, TPO_R03_VAL_NORMAL);
  242. tpo_td043_write(ddata->spi, 0x20, 0xf0);
  243. tpo_td043_write(ddata->spi, 0x21, 0xf0);
  244. tpo_td043_write_mirror(ddata->spi, ddata->hmirror,
  245. ddata->vmirror);
  246. tpo_td043_write_gamma(ddata->spi, ddata->gamma);
  247. ddata->powered_on = 1;
  248. return 0;
  249. }
  250. static void tpo_td043_power_off(struct panel_drv_data *ddata)
  251. {
  252. if (!ddata->powered_on)
  253. return;
  254. tpo_td043_write(ddata->spi, 3,
  255. TPO_R03_VAL_STANDBY | TPO_R03_EN_PWM);
  256. if (gpio_is_valid(ddata->nreset_gpio))
  257. gpio_set_value(ddata->nreset_gpio, 0);
  258. /* wait for at least 2 vsyncs before cutting off power */
  259. msleep(50);
  260. tpo_td043_write(ddata->spi, 3, TPO_R03_VAL_STANDBY);
  261. regulator_disable(ddata->vcc_reg);
  262. ddata->powered_on = 0;
  263. }
  264. static int tpo_td043_connect(struct omap_dss_device *dssdev)
  265. {
  266. struct panel_drv_data *ddata = to_panel_data(dssdev);
  267. struct omap_dss_device *in = ddata->in;
  268. int r;
  269. if (omapdss_device_is_connected(dssdev))
  270. return 0;
  271. r = in->ops.dpi->connect(in, dssdev);
  272. if (r)
  273. return r;
  274. return 0;
  275. }
  276. static void tpo_td043_disconnect(struct omap_dss_device *dssdev)
  277. {
  278. struct panel_drv_data *ddata = to_panel_data(dssdev);
  279. struct omap_dss_device *in = ddata->in;
  280. if (!omapdss_device_is_connected(dssdev))
  281. return;
  282. in->ops.dpi->disconnect(in, dssdev);
  283. }
  284. static int tpo_td043_enable(struct omap_dss_device *dssdev)
  285. {
  286. struct panel_drv_data *ddata = to_panel_data(dssdev);
  287. struct omap_dss_device *in = ddata->in;
  288. int r;
  289. if (!omapdss_device_is_connected(dssdev))
  290. return -ENODEV;
  291. if (omapdss_device_is_enabled(dssdev))
  292. return 0;
  293. in->ops.dpi->set_data_lines(in, ddata->data_lines);
  294. in->ops.dpi->set_timings(in, &ddata->videomode);
  295. r = in->ops.dpi->enable(in);
  296. if (r)
  297. return r;
  298. /*
  299. * If we are resuming from system suspend, SPI clocks might not be
  300. * enabled yet, so we'll program the LCD from SPI PM resume callback.
  301. */
  302. if (!ddata->spi_suspended) {
  303. r = tpo_td043_power_on(ddata);
  304. if (r) {
  305. in->ops.dpi->disable(in);
  306. return r;
  307. }
  308. }
  309. dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
  310. return 0;
  311. }
  312. static void tpo_td043_disable(struct omap_dss_device *dssdev)
  313. {
  314. struct panel_drv_data *ddata = to_panel_data(dssdev);
  315. struct omap_dss_device *in = ddata->in;
  316. if (!omapdss_device_is_enabled(dssdev))
  317. return;
  318. in->ops.dpi->disable(in);
  319. if (!ddata->spi_suspended)
  320. tpo_td043_power_off(ddata);
  321. dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
  322. }
  323. static void tpo_td043_set_timings(struct omap_dss_device *dssdev,
  324. struct omap_video_timings *timings)
  325. {
  326. struct panel_drv_data *ddata = to_panel_data(dssdev);
  327. struct omap_dss_device *in = ddata->in;
  328. ddata->videomode = *timings;
  329. dssdev->panel.timings = *timings;
  330. in->ops.dpi->set_timings(in, timings);
  331. }
  332. static void tpo_td043_get_timings(struct omap_dss_device *dssdev,
  333. struct omap_video_timings *timings)
  334. {
  335. struct panel_drv_data *ddata = to_panel_data(dssdev);
  336. *timings = ddata->videomode;
  337. }
  338. static int tpo_td043_check_timings(struct omap_dss_device *dssdev,
  339. struct omap_video_timings *timings)
  340. {
  341. struct panel_drv_data *ddata = to_panel_data(dssdev);
  342. struct omap_dss_device *in = ddata->in;
  343. return in->ops.dpi->check_timings(in, timings);
  344. }
  345. static struct omap_dss_driver tpo_td043_ops = {
  346. .connect = tpo_td043_connect,
  347. .disconnect = tpo_td043_disconnect,
  348. .enable = tpo_td043_enable,
  349. .disable = tpo_td043_disable,
  350. .set_timings = tpo_td043_set_timings,
  351. .get_timings = tpo_td043_get_timings,
  352. .check_timings = tpo_td043_check_timings,
  353. .set_mirror = tpo_td043_set_hmirror,
  354. .get_mirror = tpo_td043_get_hmirror,
  355. .get_resolution = omapdss_default_get_resolution,
  356. };
  357. static int tpo_td043_probe_pdata(struct spi_device *spi)
  358. {
  359. const struct panel_tpo_td043mtea1_platform_data *pdata;
  360. struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev);
  361. struct omap_dss_device *dssdev, *in;
  362. pdata = dev_get_platdata(&spi->dev);
  363. ddata->nreset_gpio = pdata->nreset_gpio;
  364. in = omap_dss_find_output(pdata->source);
  365. if (in == NULL) {
  366. dev_err(&spi->dev, "failed to find video source '%s'\n",
  367. pdata->source);
  368. return -EPROBE_DEFER;
  369. }
  370. ddata->in = in;
  371. ddata->data_lines = pdata->data_lines;
  372. dssdev = &ddata->dssdev;
  373. dssdev->name = pdata->name;
  374. return 0;
  375. }
  376. static int tpo_td043_probe(struct spi_device *spi)
  377. {
  378. struct panel_drv_data *ddata;
  379. struct omap_dss_device *dssdev;
  380. int r;
  381. dev_dbg(&spi->dev, "%s\n", __func__);
  382. spi->bits_per_word = 16;
  383. spi->mode = SPI_MODE_0;
  384. r = spi_setup(spi);
  385. if (r < 0) {
  386. dev_err(&spi->dev, "spi_setup failed: %d\n", r);
  387. return r;
  388. }
  389. ddata = devm_kzalloc(&spi->dev, sizeof(*ddata), GFP_KERNEL);
  390. if (ddata == NULL)
  391. return -ENOMEM;
  392. dev_set_drvdata(&spi->dev, ddata);
  393. ddata->spi = spi;
  394. if (dev_get_platdata(&spi->dev)) {
  395. r = tpo_td043_probe_pdata(spi);
  396. if (r)
  397. return r;
  398. } else {
  399. return -ENODEV;
  400. }
  401. ddata->mode = TPO_R02_MODE_800x480;
  402. memcpy(ddata->gamma, tpo_td043_def_gamma, sizeof(ddata->gamma));
  403. ddata->vcc_reg = devm_regulator_get(&spi->dev, "vcc");
  404. if (IS_ERR(ddata->vcc_reg)) {
  405. dev_err(&spi->dev, "failed to get LCD VCC regulator\n");
  406. r = PTR_ERR(ddata->vcc_reg);
  407. goto err_regulator;
  408. }
  409. if (gpio_is_valid(ddata->nreset_gpio)) {
  410. r = devm_gpio_request_one(&spi->dev,
  411. ddata->nreset_gpio, GPIOF_OUT_INIT_LOW,
  412. "lcd reset");
  413. if (r < 0) {
  414. dev_err(&spi->dev, "couldn't request reset GPIO\n");
  415. goto err_gpio_req;
  416. }
  417. }
  418. r = sysfs_create_group(&spi->dev.kobj, &tpo_td043_attr_group);
  419. if (r) {
  420. dev_err(&spi->dev, "failed to create sysfs files\n");
  421. goto err_sysfs;
  422. }
  423. ddata->videomode = tpo_td043_timings;
  424. dssdev = &ddata->dssdev;
  425. dssdev->dev = &spi->dev;
  426. dssdev->driver = &tpo_td043_ops;
  427. dssdev->type = OMAP_DISPLAY_TYPE_DPI;
  428. dssdev->owner = THIS_MODULE;
  429. dssdev->panel.timings = ddata->videomode;
  430. r = omapdss_register_display(dssdev);
  431. if (r) {
  432. dev_err(&spi->dev, "Failed to register panel\n");
  433. goto err_reg;
  434. }
  435. return 0;
  436. err_reg:
  437. sysfs_remove_group(&spi->dev.kobj, &tpo_td043_attr_group);
  438. err_sysfs:
  439. err_gpio_req:
  440. err_regulator:
  441. omap_dss_put_device(ddata->in);
  442. return r;
  443. }
  444. static int tpo_td043_remove(struct spi_device *spi)
  445. {
  446. struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev);
  447. struct omap_dss_device *dssdev = &ddata->dssdev;
  448. struct omap_dss_device *in = ddata->in;
  449. dev_dbg(&ddata->spi->dev, "%s\n", __func__);
  450. omapdss_unregister_display(dssdev);
  451. tpo_td043_disable(dssdev);
  452. tpo_td043_disconnect(dssdev);
  453. omap_dss_put_device(in);
  454. sysfs_remove_group(&spi->dev.kobj, &tpo_td043_attr_group);
  455. return 0;
  456. }
  457. #ifdef CONFIG_PM_SLEEP
  458. static int tpo_td043_spi_suspend(struct device *dev)
  459. {
  460. struct panel_drv_data *ddata = dev_get_drvdata(dev);
  461. dev_dbg(dev, "tpo_td043_spi_suspend, tpo %p\n", ddata);
  462. ddata->power_on_resume = ddata->powered_on;
  463. tpo_td043_power_off(ddata);
  464. ddata->spi_suspended = 1;
  465. return 0;
  466. }
  467. static int tpo_td043_spi_resume(struct device *dev)
  468. {
  469. struct panel_drv_data *ddata = dev_get_drvdata(dev);
  470. int ret;
  471. dev_dbg(dev, "tpo_td043_spi_resume\n");
  472. if (ddata->power_on_resume) {
  473. ret = tpo_td043_power_on(ddata);
  474. if (ret)
  475. return ret;
  476. }
  477. ddata->spi_suspended = 0;
  478. return 0;
  479. }
  480. #endif
  481. static SIMPLE_DEV_PM_OPS(tpo_td043_spi_pm,
  482. tpo_td043_spi_suspend, tpo_td043_spi_resume);
  483. static struct spi_driver tpo_td043_spi_driver = {
  484. .driver = {
  485. .name = "panel-tpo-td043mtea1",
  486. .owner = THIS_MODULE,
  487. .pm = &tpo_td043_spi_pm,
  488. },
  489. .probe = tpo_td043_probe,
  490. .remove = tpo_td043_remove,
  491. };
  492. module_spi_driver(tpo_td043_spi_driver);
  493. MODULE_AUTHOR("Gražvydas Ignotas <notasas@gmail.com>");
  494. MODULE_DESCRIPTION("TPO TD043MTEA1 LCD Driver");
  495. MODULE_LICENSE("GPL");