board-cm-t35.c 19 KB

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  1. /*
  2. * CompuLab CM-T35/CM-T3730 modules support
  3. *
  4. * Copyright (C) 2009-2011 CompuLab, Ltd.
  5. * Authors: Mike Rapoport <mike@compulab.co.il>
  6. * Igor Grinberg <grinberg@compulab.co.il>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * version 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. */
  18. #include <linux/kernel.h>
  19. #include <linux/init.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/input.h>
  22. #include <linux/input/matrix_keypad.h>
  23. #include <linux/delay.h>
  24. #include <linux/gpio.h>
  25. #include <linux/i2c/at24.h>
  26. #include <linux/i2c/twl.h>
  27. #include <linux/regulator/machine.h>
  28. #include <linux/mmc/host.h>
  29. #include <linux/spi/spi.h>
  30. #include <linux/spi/tdo24m.h>
  31. #include <asm/mach-types.h>
  32. #include <asm/mach/arch.h>
  33. #include <asm/mach/map.h>
  34. #include <plat/board.h>
  35. #include "common.h"
  36. #include <plat/nand.h>
  37. #include <plat/gpmc.h>
  38. #include <plat/usb.h>
  39. #include <video/omapdss.h>
  40. #include <video/omap-panel-generic-dpi.h>
  41. #include <video/omap-panel-dvi.h>
  42. #include <plat/mcspi.h>
  43. #include <mach/hardware.h>
  44. #include "mux.h"
  45. #include "sdram-micron-mt46h32m32lf-6.h"
  46. #include "hsmmc.h"
  47. #include "common-board-devices.h"
  48. #define CM_T35_GPIO_PENDOWN 57
  49. #define CM_T35_SMSC911X_CS 5
  50. #define CM_T35_SMSC911X_GPIO 163
  51. #define SB_T35_SMSC911X_CS 4
  52. #define SB_T35_SMSC911X_GPIO 65
  53. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  54. #include <linux/smsc911x.h>
  55. #include <plat/gpmc-smsc911x.h>
  56. static struct omap_smsc911x_platform_data cm_t35_smsc911x_cfg = {
  57. .id = 0,
  58. .cs = CM_T35_SMSC911X_CS,
  59. .gpio_irq = CM_T35_SMSC911X_GPIO,
  60. .gpio_reset = -EINVAL,
  61. .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
  62. };
  63. static struct omap_smsc911x_platform_data sb_t35_smsc911x_cfg = {
  64. .id = 1,
  65. .cs = SB_T35_SMSC911X_CS,
  66. .gpio_irq = SB_T35_SMSC911X_GPIO,
  67. .gpio_reset = -EINVAL,
  68. .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
  69. };
  70. static void __init cm_t35_init_ethernet(void)
  71. {
  72. gpmc_smsc911x_init(&cm_t35_smsc911x_cfg);
  73. gpmc_smsc911x_init(&sb_t35_smsc911x_cfg);
  74. }
  75. #else
  76. static inline void __init cm_t35_init_ethernet(void) { return; }
  77. #endif
  78. #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
  79. #include <linux/leds.h>
  80. static struct gpio_led cm_t35_leds[] = {
  81. [0] = {
  82. .gpio = 186,
  83. .name = "cm-t35:green",
  84. .default_trigger = "heartbeat",
  85. .active_low = 0,
  86. },
  87. };
  88. static struct gpio_led_platform_data cm_t35_led_pdata = {
  89. .num_leds = ARRAY_SIZE(cm_t35_leds),
  90. .leds = cm_t35_leds,
  91. };
  92. static struct platform_device cm_t35_led_device = {
  93. .name = "leds-gpio",
  94. .id = -1,
  95. .dev = {
  96. .platform_data = &cm_t35_led_pdata,
  97. },
  98. };
  99. static void __init cm_t35_init_led(void)
  100. {
  101. platform_device_register(&cm_t35_led_device);
  102. }
  103. #else
  104. static inline void cm_t35_init_led(void) {}
  105. #endif
  106. #if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
  107. #include <linux/mtd/mtd.h>
  108. #include <linux/mtd/nand.h>
  109. #include <linux/mtd/partitions.h>
  110. static struct mtd_partition cm_t35_nand_partitions[] = {
  111. {
  112. .name = "xloader",
  113. .offset = 0, /* Offset = 0x00000 */
  114. .size = 4 * NAND_BLOCK_SIZE,
  115. .mask_flags = MTD_WRITEABLE
  116. },
  117. {
  118. .name = "uboot",
  119. .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
  120. .size = 15 * NAND_BLOCK_SIZE,
  121. },
  122. {
  123. .name = "uboot environment",
  124. .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
  125. .size = 2 * NAND_BLOCK_SIZE,
  126. },
  127. {
  128. .name = "linux",
  129. .offset = MTDPART_OFS_APPEND, /* Offset = 0x2A0000 */
  130. .size = 32 * NAND_BLOCK_SIZE,
  131. },
  132. {
  133. .name = "rootfs",
  134. .offset = MTDPART_OFS_APPEND, /* Offset = 0x6A0000 */
  135. .size = MTDPART_SIZ_FULL,
  136. },
  137. };
  138. static struct omap_nand_platform_data cm_t35_nand_data = {
  139. .parts = cm_t35_nand_partitions,
  140. .nr_parts = ARRAY_SIZE(cm_t35_nand_partitions),
  141. .cs = 0,
  142. };
  143. static void __init cm_t35_init_nand(void)
  144. {
  145. if (gpmc_nand_init(&cm_t35_nand_data) < 0)
  146. pr_err("CM-T35: Unable to register NAND device\n");
  147. }
  148. #else
  149. static inline void cm_t35_init_nand(void) {}
  150. #endif
  151. #define CM_T35_LCD_EN_GPIO 157
  152. #define CM_T35_LCD_BL_GPIO 58
  153. #define CM_T35_DVI_EN_GPIO 54
  154. static int lcd_enabled;
  155. static int dvi_enabled;
  156. static int cm_t35_panel_enable_lcd(struct omap_dss_device *dssdev)
  157. {
  158. if (dvi_enabled) {
  159. printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
  160. return -EINVAL;
  161. }
  162. gpio_set_value(CM_T35_LCD_EN_GPIO, 1);
  163. gpio_set_value(CM_T35_LCD_BL_GPIO, 1);
  164. lcd_enabled = 1;
  165. return 0;
  166. }
  167. static void cm_t35_panel_disable_lcd(struct omap_dss_device *dssdev)
  168. {
  169. lcd_enabled = 0;
  170. gpio_set_value(CM_T35_LCD_BL_GPIO, 0);
  171. gpio_set_value(CM_T35_LCD_EN_GPIO, 0);
  172. }
  173. static int cm_t35_panel_enable_dvi(struct omap_dss_device *dssdev)
  174. {
  175. if (lcd_enabled) {
  176. printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
  177. return -EINVAL;
  178. }
  179. gpio_set_value(CM_T35_DVI_EN_GPIO, 0);
  180. dvi_enabled = 1;
  181. return 0;
  182. }
  183. static void cm_t35_panel_disable_dvi(struct omap_dss_device *dssdev)
  184. {
  185. gpio_set_value(CM_T35_DVI_EN_GPIO, 1);
  186. dvi_enabled = 0;
  187. }
  188. static int cm_t35_panel_enable_tv(struct omap_dss_device *dssdev)
  189. {
  190. return 0;
  191. }
  192. static void cm_t35_panel_disable_tv(struct omap_dss_device *dssdev)
  193. {
  194. }
  195. static struct panel_generic_dpi_data lcd_panel = {
  196. .name = "toppoly_tdo35s",
  197. .platform_enable = cm_t35_panel_enable_lcd,
  198. .platform_disable = cm_t35_panel_disable_lcd,
  199. };
  200. static struct omap_dss_device cm_t35_lcd_device = {
  201. .name = "lcd",
  202. .type = OMAP_DISPLAY_TYPE_DPI,
  203. .driver_name = "generic_dpi_panel",
  204. .data = &lcd_panel,
  205. .phy.dpi.data_lines = 18,
  206. };
  207. static struct panel_dvi_platform_data dvi_panel = {
  208. .platform_enable = cm_t35_panel_enable_dvi,
  209. .platform_disable = cm_t35_panel_disable_dvi,
  210. };
  211. static struct omap_dss_device cm_t35_dvi_device = {
  212. .name = "dvi",
  213. .type = OMAP_DISPLAY_TYPE_DPI,
  214. .driver_name = "dvi",
  215. .data = &dvi_panel,
  216. .phy.dpi.data_lines = 24,
  217. };
  218. static struct omap_dss_device cm_t35_tv_device = {
  219. .name = "tv",
  220. .driver_name = "venc",
  221. .type = OMAP_DISPLAY_TYPE_VENC,
  222. .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
  223. .platform_enable = cm_t35_panel_enable_tv,
  224. .platform_disable = cm_t35_panel_disable_tv,
  225. };
  226. static struct omap_dss_device *cm_t35_dss_devices[] = {
  227. &cm_t35_lcd_device,
  228. &cm_t35_dvi_device,
  229. &cm_t35_tv_device,
  230. };
  231. static struct omap_dss_board_info cm_t35_dss_data = {
  232. .num_devices = ARRAY_SIZE(cm_t35_dss_devices),
  233. .devices = cm_t35_dss_devices,
  234. .default_device = &cm_t35_dvi_device,
  235. };
  236. static struct omap2_mcspi_device_config tdo24m_mcspi_config = {
  237. .turbo_mode = 0,
  238. .single_channel = 1, /* 0: slave, 1: master */
  239. };
  240. static struct tdo24m_platform_data tdo24m_config = {
  241. .model = TDO35S,
  242. };
  243. static struct spi_board_info cm_t35_lcd_spi_board_info[] __initdata = {
  244. {
  245. .modalias = "tdo24m",
  246. .bus_num = 4,
  247. .chip_select = 0,
  248. .max_speed_hz = 1000000,
  249. .controller_data = &tdo24m_mcspi_config,
  250. .platform_data = &tdo24m_config,
  251. },
  252. };
  253. static struct gpio cm_t35_dss_gpios[] __initdata = {
  254. { CM_T35_LCD_EN_GPIO, GPIOF_OUT_INIT_LOW, "lcd enable" },
  255. { CM_T35_LCD_BL_GPIO, GPIOF_OUT_INIT_LOW, "lcd bl enable" },
  256. { CM_T35_DVI_EN_GPIO, GPIOF_OUT_INIT_HIGH, "dvi enable" },
  257. };
  258. static void __init cm_t35_init_display(void)
  259. {
  260. int err;
  261. spi_register_board_info(cm_t35_lcd_spi_board_info,
  262. ARRAY_SIZE(cm_t35_lcd_spi_board_info));
  263. err = gpio_request_array(cm_t35_dss_gpios,
  264. ARRAY_SIZE(cm_t35_dss_gpios));
  265. if (err) {
  266. pr_err("CM-T35: failed to request DSS control GPIOs\n");
  267. return;
  268. }
  269. gpio_export(CM_T35_LCD_EN_GPIO, 0);
  270. gpio_export(CM_T35_LCD_BL_GPIO, 0);
  271. gpio_export(CM_T35_DVI_EN_GPIO, 0);
  272. msleep(50);
  273. gpio_set_value(CM_T35_LCD_EN_GPIO, 1);
  274. err = omap_display_init(&cm_t35_dss_data);
  275. if (err) {
  276. pr_err("CM-T35: failed to register DSS device\n");
  277. gpio_free_array(cm_t35_dss_gpios, ARRAY_SIZE(cm_t35_dss_gpios));
  278. }
  279. }
  280. static struct regulator_consumer_supply cm_t35_vmmc1_supply[] = {
  281. REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
  282. };
  283. static struct regulator_consumer_supply cm_t35_vsim_supply[] = {
  284. REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
  285. };
  286. static struct regulator_consumer_supply cm_t35_vdvi_supply[] = {
  287. REGULATOR_SUPPLY("vdvi", "omapdss"),
  288. };
  289. static struct regulator_consumer_supply cm_t35_vio_supplies[] = {
  290. REGULATOR_SUPPLY("vcc", "spi1.0"),
  291. };
  292. /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
  293. static struct regulator_init_data cm_t35_vmmc1 = {
  294. .constraints = {
  295. .min_uV = 1850000,
  296. .max_uV = 3150000,
  297. .valid_modes_mask = REGULATOR_MODE_NORMAL
  298. | REGULATOR_MODE_STANDBY,
  299. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  300. | REGULATOR_CHANGE_MODE
  301. | REGULATOR_CHANGE_STATUS,
  302. },
  303. .num_consumer_supplies = ARRAY_SIZE(cm_t35_vmmc1_supply),
  304. .consumer_supplies = cm_t35_vmmc1_supply,
  305. };
  306. /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
  307. static struct regulator_init_data cm_t35_vsim = {
  308. .constraints = {
  309. .min_uV = 1800000,
  310. .max_uV = 3000000,
  311. .valid_modes_mask = REGULATOR_MODE_NORMAL
  312. | REGULATOR_MODE_STANDBY,
  313. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  314. | REGULATOR_CHANGE_MODE
  315. | REGULATOR_CHANGE_STATUS,
  316. },
  317. .num_consumer_supplies = ARRAY_SIZE(cm_t35_vsim_supply),
  318. .consumer_supplies = cm_t35_vsim_supply,
  319. };
  320. static struct regulator_init_data cm_t35_vio = {
  321. .constraints = {
  322. .min_uV = 1800000,
  323. .max_uV = 1800000,
  324. .apply_uV = true,
  325. .valid_modes_mask = REGULATOR_MODE_NORMAL
  326. | REGULATOR_MODE_STANDBY,
  327. .valid_ops_mask = REGULATOR_CHANGE_MODE,
  328. },
  329. .num_consumer_supplies = ARRAY_SIZE(cm_t35_vio_supplies),
  330. .consumer_supplies = cm_t35_vio_supplies,
  331. };
  332. static uint32_t cm_t35_keymap[] = {
  333. KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT),
  334. KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN),
  335. KEY(2, 0, KEY_RIGHT), KEY(2, 1, KEY_C), KEY(2, 2, KEY_D),
  336. };
  337. static struct matrix_keymap_data cm_t35_keymap_data = {
  338. .keymap = cm_t35_keymap,
  339. .keymap_size = ARRAY_SIZE(cm_t35_keymap),
  340. };
  341. static struct twl4030_keypad_data cm_t35_kp_data = {
  342. .keymap_data = &cm_t35_keymap_data,
  343. .rows = 3,
  344. .cols = 3,
  345. .rep = 1,
  346. };
  347. static struct omap2_hsmmc_info mmc[] = {
  348. {
  349. .mmc = 1,
  350. .caps = MMC_CAP_4_BIT_DATA,
  351. .gpio_cd = -EINVAL,
  352. .gpio_wp = -EINVAL,
  353. },
  354. {
  355. .mmc = 2,
  356. .caps = MMC_CAP_4_BIT_DATA,
  357. .transceiver = 1,
  358. .gpio_cd = -EINVAL,
  359. .gpio_wp = -EINVAL,
  360. .ocr_mask = 0x00100000, /* 3.3V */
  361. },
  362. {} /* Terminator */
  363. };
  364. static struct usbhs_omap_board_data usbhs_bdata __initdata = {
  365. .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
  366. .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
  367. .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
  368. .phy_reset = true,
  369. .reset_gpio_port[0] = OMAP_MAX_GPIO_LINES + 6,
  370. .reset_gpio_port[1] = OMAP_MAX_GPIO_LINES + 7,
  371. .reset_gpio_port[2] = -EINVAL
  372. };
  373. static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
  374. unsigned ngpio)
  375. {
  376. int wlan_rst = gpio + 2;
  377. if (gpio_request_one(wlan_rst, GPIOF_OUT_INIT_HIGH, "WLAN RST") == 0) {
  378. gpio_export(wlan_rst, 0);
  379. udelay(10);
  380. gpio_set_value_cansleep(wlan_rst, 0);
  381. udelay(10);
  382. gpio_set_value_cansleep(wlan_rst, 1);
  383. } else {
  384. pr_err("CM-T35: could not obtain gpio for WiFi reset\n");
  385. }
  386. /* gpio + 0 is "mmc0_cd" (input/IRQ) */
  387. mmc[0].gpio_cd = gpio + 0;
  388. omap2_hsmmc_init(mmc);
  389. return 0;
  390. }
  391. static struct twl4030_gpio_platform_data cm_t35_gpio_data = {
  392. .gpio_base = OMAP_MAX_GPIO_LINES,
  393. .irq_base = TWL4030_GPIO_IRQ_BASE,
  394. .irq_end = TWL4030_GPIO_IRQ_END,
  395. .setup = cm_t35_twl_gpio_setup,
  396. };
  397. static struct twl4030_platform_data cm_t35_twldata = {
  398. /* platform_data for children goes here */
  399. .keypad = &cm_t35_kp_data,
  400. .gpio = &cm_t35_gpio_data,
  401. .vmmc1 = &cm_t35_vmmc1,
  402. .vsim = &cm_t35_vsim,
  403. .vio = &cm_t35_vio,
  404. };
  405. static void __init cm_t35_init_i2c(void)
  406. {
  407. omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB,
  408. TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
  409. cm_t35_twldata.vpll2->constraints.name = "VDVI";
  410. cm_t35_twldata.vpll2->num_consumer_supplies =
  411. ARRAY_SIZE(cm_t35_vdvi_supply);
  412. cm_t35_twldata.vpll2->consumer_supplies = cm_t35_vdvi_supply;
  413. omap3_pmic_init("tps65930", &cm_t35_twldata);
  414. }
  415. #ifdef CONFIG_OMAP_MUX
  416. static struct omap_board_mux board_mux[] __initdata = {
  417. /* nCS and IRQ for CM-T35 ethernet */
  418. OMAP3_MUX(GPMC_NCS5, OMAP_MUX_MODE0),
  419. OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
  420. /* nCS and IRQ for SB-T35 ethernet */
  421. OMAP3_MUX(GPMC_NCS4, OMAP_MUX_MODE0),
  422. OMAP3_MUX(GPMC_WAIT3, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
  423. /* PENDOWN GPIO */
  424. OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
  425. /* mUSB */
  426. OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  427. OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  428. OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  429. OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  430. OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  431. OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  432. OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  433. OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  434. OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  435. OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  436. OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  437. OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  438. /* MMC 2 */
  439. OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
  440. OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
  441. OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
  442. OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  443. /* McSPI 1 */
  444. OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  445. OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  446. OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  447. OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
  448. /* McSPI 4 */
  449. OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  450. OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  451. OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  452. OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
  453. /* McBSP 2 */
  454. OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  455. OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  456. OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  457. OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  458. /* serial ports */
  459. OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
  460. OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  461. OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  462. OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  463. /* common DSS */
  464. OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  465. OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  466. OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  467. OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  468. OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  469. OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  470. OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  471. OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  472. OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  473. OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  474. OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  475. OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  476. OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  477. OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  478. OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  479. OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  480. /* display controls */
  481. OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
  482. OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
  483. OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
  484. /* TPS IRQ */
  485. OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
  486. OMAP_PIN_INPUT_PULLUP),
  487. { .reg_offset = OMAP_MUX_TERMINATOR },
  488. };
  489. static void __init cm_t3x_common_dss_mux_init(int mux_mode)
  490. {
  491. omap_mux_init_signal("dss_data18", mux_mode);
  492. omap_mux_init_signal("dss_data19", mux_mode);
  493. omap_mux_init_signal("dss_data20", mux_mode);
  494. omap_mux_init_signal("dss_data21", mux_mode);
  495. omap_mux_init_signal("dss_data22", mux_mode);
  496. omap_mux_init_signal("dss_data23", mux_mode);
  497. }
  498. static void __init cm_t35_init_mux(void)
  499. {
  500. omap_mux_init_signal("gpio_70", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT);
  501. omap_mux_init_signal("gpio_71", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT);
  502. omap_mux_init_signal("gpio_72", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT);
  503. omap_mux_init_signal("gpio_73", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT);
  504. omap_mux_init_signal("gpio_74", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT);
  505. omap_mux_init_signal("gpio_75", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT);
  506. cm_t3x_common_dss_mux_init(OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT);
  507. }
  508. static void __init cm_t3730_init_mux(void)
  509. {
  510. omap_mux_init_signal("sys_boot0", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT);
  511. omap_mux_init_signal("sys_boot1", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT);
  512. omap_mux_init_signal("sys_boot3", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT);
  513. omap_mux_init_signal("sys_boot4", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT);
  514. omap_mux_init_signal("sys_boot5", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT);
  515. omap_mux_init_signal("sys_boot6", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT);
  516. cm_t3x_common_dss_mux_init(OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT);
  517. }
  518. #else
  519. static inline void cm_t35_init_mux(void) {}
  520. static inline void cm_t3730_init_mux(void) {}
  521. #endif
  522. static struct omap_board_config_kernel cm_t35_config[] __initdata = {
  523. };
  524. static void __init cm_t3x_common_init(void)
  525. {
  526. omap_board_config = cm_t35_config;
  527. omap_board_config_size = ARRAY_SIZE(cm_t35_config);
  528. omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
  529. omap_serial_init();
  530. omap_sdrc_init(mt46h32m32lf6_sdrc_params,
  531. mt46h32m32lf6_sdrc_params);
  532. cm_t35_init_i2c();
  533. omap_ads7846_init(1, CM_T35_GPIO_PENDOWN, 0, NULL);
  534. cm_t35_init_ethernet();
  535. cm_t35_init_led();
  536. cm_t35_init_display();
  537. usb_musb_init(NULL);
  538. usbhs_init(&usbhs_bdata);
  539. }
  540. static void __init cm_t35_init(void)
  541. {
  542. cm_t3x_common_init();
  543. cm_t35_init_mux();
  544. cm_t35_init_nand();
  545. }
  546. static void __init cm_t3730_init(void)
  547. {
  548. cm_t3x_common_init();
  549. cm_t3730_init_mux();
  550. }
  551. MACHINE_START(CM_T35, "Compulab CM-T35")
  552. .atag_offset = 0x100,
  553. .reserve = omap_reserve,
  554. .map_io = omap3_map_io,
  555. .init_early = omap35xx_init_early,
  556. .init_irq = omap3_init_irq,
  557. .handle_irq = omap3_intc_handle_irq,
  558. .init_machine = cm_t35_init,
  559. .timer = &omap3_timer,
  560. MACHINE_END
  561. MACHINE_START(CM_T3730, "Compulab CM-T3730")
  562. .atag_offset = 0x100,
  563. .reserve = omap_reserve,
  564. .map_io = omap3_map_io,
  565. .init_early = omap3630_init_early,
  566. .init_irq = omap3_init_irq,
  567. .handle_irq = omap3_intc_handle_irq,
  568. .init_machine = cm_t3730_init,
  569. .timer = &omap3_timer,
  570. MACHINE_END