pgtable.h 4.2 KB

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  1. /*
  2. * This file contains the functions and defines necessary to modify and
  3. * use the SuperH page table tree.
  4. *
  5. * Copyright (C) 1999 Niibe Yutaka
  6. * Copyright (C) 2002 - 2007 Paul Mundt
  7. *
  8. * This file is subject to the terms and conditions of the GNU General
  9. * Public License. See the file "COPYING" in the main directory of this
  10. * archive for more details.
  11. */
  12. #ifndef __ASM_SH_PGTABLE_H
  13. #define __ASM_SH_PGTABLE_H
  14. #include <asm/pgtable_nopmd.h>
  15. #include <asm/page.h>
  16. #ifndef __ASSEMBLY__
  17. #include <asm/addrspace.h>
  18. #include <asm/fixmap.h>
  19. /*
  20. * ZERO_PAGE is a global shared page that is always zero: used
  21. * for zero-mapped memory areas etc..
  22. */
  23. extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
  24. #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
  25. #endif /* !__ASSEMBLY__ */
  26. /*
  27. * Effective and physical address definitions, to aid with sign
  28. * extension.
  29. */
  30. #define NEFF 32
  31. #define NEFF_SIGN (1LL << (NEFF - 1))
  32. #define NEFF_MASK (-1LL << NEFF)
  33. static inline unsigned long long neff_sign_extend(unsigned long val)
  34. {
  35. unsigned long long extended = val;
  36. return (extended & NEFF_SIGN) ? (extended | NEFF_MASK) : extended;
  37. }
  38. #ifdef CONFIG_29BIT
  39. #define NPHYS 29
  40. #else
  41. #define NPHYS 32
  42. #endif
  43. #define NPHYS_SIGN (1LL << (NPHYS - 1))
  44. #define NPHYS_MASK (-1LL << NPHYS)
  45. #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
  46. #define PGDIR_MASK (~(PGDIR_SIZE-1))
  47. /* Entries per level */
  48. #define PTRS_PER_PTE (PAGE_SIZE / (1 << PTE_MAGNITUDE))
  49. #define FIRST_USER_ADDRESS 0
  50. #define PHYS_ADDR_MASK29 0x1fffffff
  51. #define PHYS_ADDR_MASK32 0xffffffff
  52. #ifdef CONFIG_PMB
  53. static inline unsigned long phys_addr_mask(void)
  54. {
  55. /* Is the MMU in 29bit mode? */
  56. if (__in_29bit_mode())
  57. return PHYS_ADDR_MASK29;
  58. return PHYS_ADDR_MASK32;
  59. }
  60. #elif defined(CONFIG_32BIT)
  61. static inline unsigned long phys_addr_mask(void)
  62. {
  63. return PHYS_ADDR_MASK32;
  64. }
  65. #else
  66. static inline unsigned long phys_addr_mask(void)
  67. {
  68. return PHYS_ADDR_MASK29;
  69. }
  70. #endif
  71. #define PTE_PHYS_MASK (phys_addr_mask() & PAGE_MASK)
  72. #define PTE_FLAGS_MASK (~(PTE_PHYS_MASK) << PAGE_SHIFT)
  73. #ifdef CONFIG_SUPERH32
  74. #define VMALLOC_START (P3SEG)
  75. #else
  76. #define VMALLOC_START (0xf0000000)
  77. #endif
  78. #define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)
  79. #if defined(CONFIG_SUPERH32)
  80. #include <asm/pgtable_32.h>
  81. #else
  82. #include <asm/pgtable_64.h>
  83. #endif
  84. /*
  85. * SH-X and lower (legacy) SuperH parts (SH-3, SH-4, some SH-4A) can't do page
  86. * protection for execute, and considers it the same as a read. Also, write
  87. * permission implies read permission. This is the closest we can get..
  88. *
  89. * SH-X2 (SH7785) and later parts take this to the opposite end of the extreme,
  90. * not only supporting separate execute, read, and write bits, but having
  91. * completely separate permission bits for user and kernel space.
  92. */
  93. /*xwr*/
  94. #define __P000 PAGE_NONE
  95. #define __P001 PAGE_READONLY
  96. #define __P010 PAGE_COPY
  97. #define __P011 PAGE_COPY
  98. #define __P100 PAGE_EXECREAD
  99. #define __P101 PAGE_EXECREAD
  100. #define __P110 PAGE_COPY
  101. #define __P111 PAGE_COPY
  102. #define __S000 PAGE_NONE
  103. #define __S001 PAGE_READONLY
  104. #define __S010 PAGE_WRITEONLY
  105. #define __S011 PAGE_SHARED
  106. #define __S100 PAGE_EXECREAD
  107. #define __S101 PAGE_EXECREAD
  108. #define __S110 PAGE_RWX
  109. #define __S111 PAGE_RWX
  110. typedef pte_t *pte_addr_t;
  111. #define kern_addr_valid(addr) (1)
  112. #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
  113. remap_pfn_range(vma, vaddr, pfn, size, prot)
  114. #define pte_pfn(x) ((unsigned long)(((x).pte_low >> PAGE_SHIFT)))
  115. /*
  116. * No page table caches to initialise
  117. */
  118. #define pgtable_cache_init() do { } while (0)
  119. struct vm_area_struct;
  120. extern void __update_cache(struct vm_area_struct *vma,
  121. unsigned long address, pte_t pte);
  122. extern void __update_tlb(struct vm_area_struct *vma,
  123. unsigned long address, pte_t pte);
  124. static inline void
  125. update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte)
  126. {
  127. __update_cache(vma, address, pte);
  128. __update_tlb(vma, address, pte);
  129. }
  130. extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
  131. extern void paging_init(void);
  132. extern void page_table_range_init(unsigned long start, unsigned long end,
  133. pgd_t *pgd);
  134. /* arch/sh/mm/mmap.c */
  135. #define HAVE_ARCH_UNMAPPED_AREA
  136. #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
  137. #include <asm-generic/pgtable.h>
  138. #endif /* __ASM_SH_PGTABLE_H */