iwl3945-base.c 108 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961396239633964396539663967396839693970397139723973397439753976397739783979398039813982398339843985398639873988398939903991399239933994399539963997399839994000400140024003400440054006400740084009
  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/pci-aspm.h>
  35. #include <linux/slab.h>
  36. #include <linux/dma-mapping.h>
  37. #include <linux/delay.h>
  38. #include <linux/sched.h>
  39. #include <linux/skbuff.h>
  40. #include <linux/netdevice.h>
  41. #include <linux/firmware.h>
  42. #include <linux/etherdevice.h>
  43. #include <linux/if_arp.h>
  44. #include <net/ieee80211_radiotap.h>
  45. #include <net/mac80211.h>
  46. #include <asm/div64.h>
  47. #define DRV_NAME "iwl3945"
  48. #include "iwl-fh.h"
  49. #include "iwl-3945-fh.h"
  50. #include "iwl-commands.h"
  51. #include "iwl-sta.h"
  52. #include "iwl-3945.h"
  53. #include "iwl-core.h"
  54. #include "iwl-helpers.h"
  55. #include "iwl-dev.h"
  56. #include "iwl-spectrum.h"
  57. /*
  58. * module name, copyright, version, etc.
  59. */
  60. #define DRV_DESCRIPTION \
  61. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  62. #ifdef CONFIG_IWLEGACY_DEBUG
  63. #define VD "d"
  64. #else
  65. #define VD
  66. #endif
  67. /*
  68. * add "s" to indicate spectrum measurement included.
  69. * we add it here to be consistent with previous releases in which
  70. * this was configurable.
  71. */
  72. #define DRV_VERSION IWLWIFI_VERSION VD "s"
  73. #define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation"
  74. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  75. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  76. MODULE_VERSION(DRV_VERSION);
  77. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  78. MODULE_LICENSE("GPL");
  79. /* module parameters */
  80. struct il_mod_params il3945_mod_params = {
  81. .sw_crypto = 1,
  82. .restart_fw = 1,
  83. .disable_hw_scan = 1,
  84. /* the rest are 0 by default */
  85. };
  86. /**
  87. * il3945_get_antenna_flags - Get antenna flags for RXON command
  88. * @il: eeprom and antenna fields are used to determine antenna flags
  89. *
  90. * il->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  91. * il3945_mod_params.antenna specifies the antenna diversity mode:
  92. *
  93. * IL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  94. * IL_ANTENNA_MAIN - Force MAIN antenna
  95. * IL_ANTENNA_AUX - Force AUX antenna
  96. */
  97. __le32 il3945_get_antenna_flags(const struct il_priv *il)
  98. {
  99. struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
  100. switch (il3945_mod_params.antenna) {
  101. case IL_ANTENNA_DIVERSITY:
  102. return 0;
  103. case IL_ANTENNA_MAIN:
  104. if (eeprom->antenna_switch_type)
  105. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  106. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  107. case IL_ANTENNA_AUX:
  108. if (eeprom->antenna_switch_type)
  109. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  110. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  111. }
  112. /* bad antenna selector value */
  113. IL_ERR("Bad antenna selector value (0x%x)\n",
  114. il3945_mod_params.antenna);
  115. return 0; /* "diversity" is default if error */
  116. }
  117. static int il3945_set_ccmp_dynamic_key_info(struct il_priv *il,
  118. struct ieee80211_key_conf *keyconf,
  119. u8 sta_id)
  120. {
  121. unsigned long flags;
  122. __le16 key_flags = 0;
  123. int ret;
  124. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  125. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  126. if (sta_id == il->ctx.bcast_sta_id)
  127. key_flags |= STA_KEY_MULTICAST_MSK;
  128. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  129. keyconf->hw_key_idx = keyconf->keyidx;
  130. key_flags &= ~STA_KEY_FLG_INVALID;
  131. spin_lock_irqsave(&il->sta_lock, flags);
  132. il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
  133. il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  134. memcpy(il->stations[sta_id].keyinfo.key, keyconf->key,
  135. keyconf->keylen);
  136. memcpy(il->stations[sta_id].sta.key.key, keyconf->key,
  137. keyconf->keylen);
  138. if ((il->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
  139. == STA_KEY_FLG_NO_ENC)
  140. il->stations[sta_id].sta.key.key_offset =
  141. il_get_free_ucode_key_index(il);
  142. /* else, we are overriding an existing key => no need to allocated room
  143. * in uCode. */
  144. WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  145. "no space for a new key");
  146. il->stations[sta_id].sta.key.key_flags = key_flags;
  147. il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  148. il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  149. D_INFO("hwcrypto: modify ucode station key info\n");
  150. ret = il_send_add_sta(il,
  151. &il->stations[sta_id].sta, CMD_ASYNC);
  152. spin_unlock_irqrestore(&il->sta_lock, flags);
  153. return ret;
  154. }
  155. static int il3945_set_tkip_dynamic_key_info(struct il_priv *il,
  156. struct ieee80211_key_conf *keyconf,
  157. u8 sta_id)
  158. {
  159. return -EOPNOTSUPP;
  160. }
  161. static int il3945_set_wep_dynamic_key_info(struct il_priv *il,
  162. struct ieee80211_key_conf *keyconf,
  163. u8 sta_id)
  164. {
  165. return -EOPNOTSUPP;
  166. }
  167. static int il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id)
  168. {
  169. unsigned long flags;
  170. struct il_addsta_cmd sta_cmd;
  171. spin_lock_irqsave(&il->sta_lock, flags);
  172. memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key));
  173. memset(&il->stations[sta_id].sta.key, 0,
  174. sizeof(struct il4965_keyinfo));
  175. il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  176. il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  177. il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  178. memcpy(&sta_cmd, &il->stations[sta_id].sta, sizeof(struct il_addsta_cmd));
  179. spin_unlock_irqrestore(&il->sta_lock, flags);
  180. D_INFO("hwcrypto: clear ucode station key info\n");
  181. return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
  182. }
  183. static int il3945_set_dynamic_key(struct il_priv *il,
  184. struct ieee80211_key_conf *keyconf, u8 sta_id)
  185. {
  186. int ret = 0;
  187. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  188. switch (keyconf->cipher) {
  189. case WLAN_CIPHER_SUITE_CCMP:
  190. ret = il3945_set_ccmp_dynamic_key_info(il, keyconf, sta_id);
  191. break;
  192. case WLAN_CIPHER_SUITE_TKIP:
  193. ret = il3945_set_tkip_dynamic_key_info(il, keyconf, sta_id);
  194. break;
  195. case WLAN_CIPHER_SUITE_WEP40:
  196. case WLAN_CIPHER_SUITE_WEP104:
  197. ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id);
  198. break;
  199. default:
  200. IL_ERR("Unknown alg: %s alg=%x\n", __func__,
  201. keyconf->cipher);
  202. ret = -EINVAL;
  203. }
  204. D_WEP("Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n",
  205. keyconf->cipher, keyconf->keylen, keyconf->keyidx,
  206. sta_id, ret);
  207. return ret;
  208. }
  209. static int il3945_remove_static_key(struct il_priv *il)
  210. {
  211. int ret = -EOPNOTSUPP;
  212. return ret;
  213. }
  214. static int il3945_set_static_key(struct il_priv *il,
  215. struct ieee80211_key_conf *key)
  216. {
  217. if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
  218. key->cipher == WLAN_CIPHER_SUITE_WEP104)
  219. return -EOPNOTSUPP;
  220. IL_ERR("Static key invalid: cipher %x\n", key->cipher);
  221. return -EINVAL;
  222. }
  223. static void il3945_clear_free_frames(struct il_priv *il)
  224. {
  225. struct list_head *element;
  226. D_INFO("%d frames on pre-allocated heap on clear.\n",
  227. il->frames_count);
  228. while (!list_empty(&il->free_frames)) {
  229. element = il->free_frames.next;
  230. list_del(element);
  231. kfree(list_entry(element, struct il3945_frame, list));
  232. il->frames_count--;
  233. }
  234. if (il->frames_count) {
  235. IL_WARN("%d frames still in use. Did we lose one?\n",
  236. il->frames_count);
  237. il->frames_count = 0;
  238. }
  239. }
  240. static struct il3945_frame *il3945_get_free_frame(struct il_priv *il)
  241. {
  242. struct il3945_frame *frame;
  243. struct list_head *element;
  244. if (list_empty(&il->free_frames)) {
  245. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  246. if (!frame) {
  247. IL_ERR("Could not allocate frame!\n");
  248. return NULL;
  249. }
  250. il->frames_count++;
  251. return frame;
  252. }
  253. element = il->free_frames.next;
  254. list_del(element);
  255. return list_entry(element, struct il3945_frame, list);
  256. }
  257. static void il3945_free_frame(struct il_priv *il, struct il3945_frame *frame)
  258. {
  259. memset(frame, 0, sizeof(*frame));
  260. list_add(&frame->list, &il->free_frames);
  261. }
  262. unsigned int il3945_fill_beacon_frame(struct il_priv *il,
  263. struct ieee80211_hdr *hdr,
  264. int left)
  265. {
  266. if (!il_is_associated(il) || !il->beacon_skb)
  267. return 0;
  268. if (il->beacon_skb->len > left)
  269. return 0;
  270. memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len);
  271. return il->beacon_skb->len;
  272. }
  273. static int il3945_send_beacon_cmd(struct il_priv *il)
  274. {
  275. struct il3945_frame *frame;
  276. unsigned int frame_size;
  277. int rc;
  278. u8 rate;
  279. frame = il3945_get_free_frame(il);
  280. if (!frame) {
  281. IL_ERR("Could not obtain free frame buffer for beacon "
  282. "command.\n");
  283. return -ENOMEM;
  284. }
  285. rate = il_get_lowest_plcp(il,
  286. &il->ctx);
  287. frame_size = il3945_hw_get_beacon_cmd(il, frame, rate);
  288. rc = il_send_cmd_pdu(il, REPLY_TX_BEACON, frame_size,
  289. &frame->u.cmd[0]);
  290. il3945_free_frame(il, frame);
  291. return rc;
  292. }
  293. static void il3945_unset_hw_params(struct il_priv *il)
  294. {
  295. if (il->_3945.shared_virt)
  296. dma_free_coherent(&il->pci_dev->dev,
  297. sizeof(struct il3945_shared),
  298. il->_3945.shared_virt,
  299. il->_3945.shared_phys);
  300. }
  301. static void il3945_build_tx_cmd_hwcrypto(struct il_priv *il,
  302. struct ieee80211_tx_info *info,
  303. struct il_device_cmd *cmd,
  304. struct sk_buff *skb_frag,
  305. int sta_id)
  306. {
  307. struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
  308. struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo;
  309. tx_cmd->sec_ctl = 0;
  310. switch (keyinfo->cipher) {
  311. case WLAN_CIPHER_SUITE_CCMP:
  312. tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
  313. memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
  314. D_TX("tx_cmd with AES hwcrypto\n");
  315. break;
  316. case WLAN_CIPHER_SUITE_TKIP:
  317. break;
  318. case WLAN_CIPHER_SUITE_WEP104:
  319. tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
  320. /* fall through */
  321. case WLAN_CIPHER_SUITE_WEP40:
  322. tx_cmd->sec_ctl |= TX_CMD_SEC_WEP |
  323. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  324. memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
  325. D_TX("Configuring packet for WEP encryption "
  326. "with key %d\n", info->control.hw_key->hw_key_idx);
  327. break;
  328. default:
  329. IL_ERR("Unknown encode cipher %x\n", keyinfo->cipher);
  330. break;
  331. }
  332. }
  333. /*
  334. * handle build REPLY_TX command notification.
  335. */
  336. static void il3945_build_tx_cmd_basic(struct il_priv *il,
  337. struct il_device_cmd *cmd,
  338. struct ieee80211_tx_info *info,
  339. struct ieee80211_hdr *hdr, u8 std_id)
  340. {
  341. struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
  342. __le32 tx_flags = tx_cmd->tx_flags;
  343. __le16 fc = hdr->frame_control;
  344. tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  345. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  346. tx_flags |= TX_CMD_FLG_ACK_MSK;
  347. if (ieee80211_is_mgmt(fc))
  348. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  349. if (ieee80211_is_probe_resp(fc) &&
  350. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  351. tx_flags |= TX_CMD_FLG_TSF_MSK;
  352. } else {
  353. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  354. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  355. }
  356. tx_cmd->sta_id = std_id;
  357. if (ieee80211_has_morefrags(fc))
  358. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  359. if (ieee80211_is_data_qos(fc)) {
  360. u8 *qc = ieee80211_get_qos_ctl(hdr);
  361. tx_cmd->tid_tspec = qc[0] & 0xf;
  362. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  363. } else {
  364. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  365. }
  366. il_tx_cmd_protection(il, info, fc, &tx_flags);
  367. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  368. if (ieee80211_is_mgmt(fc)) {
  369. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  370. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
  371. else
  372. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
  373. } else {
  374. tx_cmd->timeout.pm_frame_timeout = 0;
  375. }
  376. tx_cmd->driver_txop = 0;
  377. tx_cmd->tx_flags = tx_flags;
  378. tx_cmd->next_frame_len = 0;
  379. }
  380. /*
  381. * start REPLY_TX command process
  382. */
  383. static int il3945_tx_skb(struct il_priv *il, struct sk_buff *skb)
  384. {
  385. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  386. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  387. struct il3945_tx_cmd *tx_cmd;
  388. struct il_tx_queue *txq = NULL;
  389. struct il_queue *q = NULL;
  390. struct il_device_cmd *out_cmd;
  391. struct il_cmd_meta *out_meta;
  392. dma_addr_t phys_addr;
  393. dma_addr_t txcmd_phys;
  394. int txq_id = skb_get_queue_mapping(skb);
  395. u16 len, idx, hdr_len;
  396. u8 id;
  397. u8 unicast;
  398. u8 sta_id;
  399. u8 tid = 0;
  400. __le16 fc;
  401. u8 wait_write_ptr = 0;
  402. unsigned long flags;
  403. spin_lock_irqsave(&il->lock, flags);
  404. if (il_is_rfkill(il)) {
  405. D_DROP("Dropping - RF KILL\n");
  406. goto drop_unlock;
  407. }
  408. if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) == IL_INVALID_RATE) {
  409. IL_ERR("ERROR: No TX rate available.\n");
  410. goto drop_unlock;
  411. }
  412. unicast = !is_multicast_ether_addr(hdr->addr1);
  413. id = 0;
  414. fc = hdr->frame_control;
  415. #ifdef CONFIG_IWLEGACY_DEBUG
  416. if (ieee80211_is_auth(fc))
  417. D_TX("Sending AUTH frame\n");
  418. else if (ieee80211_is_assoc_req(fc))
  419. D_TX("Sending ASSOC frame\n");
  420. else if (ieee80211_is_reassoc_req(fc))
  421. D_TX("Sending REASSOC frame\n");
  422. #endif
  423. spin_unlock_irqrestore(&il->lock, flags);
  424. hdr_len = ieee80211_hdrlen(fc);
  425. /* Find index into station table for destination station */
  426. sta_id = il_sta_id_or_broadcast(
  427. il, &il->ctx,
  428. info->control.sta);
  429. if (sta_id == IL_INVALID_STATION) {
  430. D_DROP("Dropping - INVALID STATION: %pM\n",
  431. hdr->addr1);
  432. goto drop;
  433. }
  434. D_RATE("station Id %d\n", sta_id);
  435. if (ieee80211_is_data_qos(fc)) {
  436. u8 *qc = ieee80211_get_qos_ctl(hdr);
  437. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  438. if (unlikely(tid >= MAX_TID_COUNT))
  439. goto drop;
  440. }
  441. /* Descriptor for chosen Tx queue */
  442. txq = &il->txq[txq_id];
  443. q = &txq->q;
  444. if ((il_queue_space(q) < q->high_mark))
  445. goto drop;
  446. spin_lock_irqsave(&il->lock, flags);
  447. idx = il_get_cmd_index(q, q->write_ptr, 0);
  448. /* Set up driver data for this TFD */
  449. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct il_tx_info));
  450. txq->txb[q->write_ptr].skb = skb;
  451. txq->txb[q->write_ptr].ctx = &il->ctx;
  452. /* Init first empty entry in queue's array of Tx/cmd buffers */
  453. out_cmd = txq->cmd[idx];
  454. out_meta = &txq->meta[idx];
  455. tx_cmd = (struct il3945_tx_cmd *)out_cmd->cmd.payload;
  456. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  457. memset(tx_cmd, 0, sizeof(*tx_cmd));
  458. /*
  459. * Set up the Tx-command (not MAC!) header.
  460. * Store the chosen Tx queue and TFD index within the sequence field;
  461. * after Tx, uCode's Tx response will return this value so driver can
  462. * locate the frame within the tx queue and do post-tx processing.
  463. */
  464. out_cmd->hdr.cmd = REPLY_TX;
  465. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  466. INDEX_TO_SEQ(q->write_ptr)));
  467. /* Copy MAC header from skb into command buffer */
  468. memcpy(tx_cmd->hdr, hdr, hdr_len);
  469. if (info->control.hw_key)
  470. il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id);
  471. /* TODO need this for burst mode later on */
  472. il3945_build_tx_cmd_basic(il, out_cmd, info, hdr, sta_id);
  473. /* set is_hcca to 0; it probably will never be implemented */
  474. il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id, 0);
  475. /* Total # bytes to be transmitted */
  476. len = (u16)skb->len;
  477. tx_cmd->len = cpu_to_le16(len);
  478. il_dbg_log_tx_data_frame(il, len, hdr);
  479. il_update_stats(il, true, fc, len);
  480. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  481. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  482. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  483. txq->need_update = 1;
  484. } else {
  485. wait_write_ptr = 1;
  486. txq->need_update = 0;
  487. }
  488. D_TX("sequence nr = 0X%x\n",
  489. le16_to_cpu(out_cmd->hdr.sequence));
  490. D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
  491. il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd));
  492. il_print_hex_dump(il, IL_DL_TX, (u8 *)tx_cmd->hdr,
  493. ieee80211_hdrlen(fc));
  494. /*
  495. * Use the first empty entry in this queue's command buffer array
  496. * to contain the Tx command and MAC header concatenated together
  497. * (payload data will be in another buffer).
  498. * Size of this varies, due to varying MAC header length.
  499. * If end is not dword aligned, we'll have 2 extra bytes at the end
  500. * of the MAC header (device reads on dword boundaries).
  501. * We'll tell device about this padding later.
  502. */
  503. len = sizeof(struct il3945_tx_cmd) +
  504. sizeof(struct il_cmd_header) + hdr_len;
  505. len = (len + 3) & ~3;
  506. /* Physical address of this Tx command's header (not MAC header!),
  507. * within command buffer array. */
  508. txcmd_phys = pci_map_single(il->pci_dev, &out_cmd->hdr,
  509. len, PCI_DMA_TODEVICE);
  510. /* we do not map meta data ... so we can safely access address to
  511. * provide to unmap command*/
  512. dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
  513. dma_unmap_len_set(out_meta, len, len);
  514. /* Add buffer containing Tx command and MAC(!) header to TFD's
  515. * first entry */
  516. il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq,
  517. txcmd_phys, len, 1, 0);
  518. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  519. * if any (802.11 null frames have no payload). */
  520. len = skb->len - hdr_len;
  521. if (len) {
  522. phys_addr = pci_map_single(il->pci_dev, skb->data + hdr_len,
  523. len, PCI_DMA_TODEVICE);
  524. il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq,
  525. phys_addr, len,
  526. 0, U32_PAD(len));
  527. }
  528. /* Tell device the write index *just past* this latest filled TFD */
  529. q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
  530. il_txq_update_write_ptr(il, txq);
  531. spin_unlock_irqrestore(&il->lock, flags);
  532. if (il_queue_space(q) < q->high_mark
  533. && il->mac80211_registered) {
  534. if (wait_write_ptr) {
  535. spin_lock_irqsave(&il->lock, flags);
  536. txq->need_update = 1;
  537. il_txq_update_write_ptr(il, txq);
  538. spin_unlock_irqrestore(&il->lock, flags);
  539. }
  540. il_stop_queue(il, txq);
  541. }
  542. return 0;
  543. drop_unlock:
  544. spin_unlock_irqrestore(&il->lock, flags);
  545. drop:
  546. return -1;
  547. }
  548. static int il3945_get_measurement(struct il_priv *il,
  549. struct ieee80211_measurement_params *params,
  550. u8 type)
  551. {
  552. struct il_spectrum_cmd spectrum;
  553. struct il_rx_pkt *pkt;
  554. struct il_host_cmd cmd = {
  555. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  556. .data = (void *)&spectrum,
  557. .flags = CMD_WANT_SKB,
  558. };
  559. u32 add_time = le64_to_cpu(params->start_time);
  560. int rc;
  561. int spectrum_resp_status;
  562. int duration = le16_to_cpu(params->duration);
  563. struct il_rxon_context *ctx = &il->ctx;
  564. if (il_is_associated(il))
  565. add_time = il_usecs_to_beacons(il,
  566. le64_to_cpu(params->start_time) - il->_3945.last_tsf,
  567. le16_to_cpu(ctx->timing.beacon_interval));
  568. memset(&spectrum, 0, sizeof(spectrum));
  569. spectrum.channel_count = cpu_to_le16(1);
  570. spectrum.flags =
  571. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  572. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  573. cmd.len = sizeof(spectrum);
  574. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  575. if (il_is_associated(il))
  576. spectrum.start_time =
  577. il_add_beacon_time(il,
  578. il->_3945.last_beacon_time, add_time,
  579. le16_to_cpu(ctx->timing.beacon_interval));
  580. else
  581. spectrum.start_time = 0;
  582. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  583. spectrum.channels[0].channel = params->channel;
  584. spectrum.channels[0].type = type;
  585. if (ctx->active.flags & RXON_FLG_BAND_24G_MSK)
  586. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  587. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  588. rc = il_send_cmd_sync(il, &cmd);
  589. if (rc)
  590. return rc;
  591. pkt = (struct il_rx_pkt *)cmd.reply_page;
  592. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  593. IL_ERR("Bad return from REPLY_RX_ON_ASSOC command\n");
  594. rc = -EIO;
  595. }
  596. spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
  597. switch (spectrum_resp_status) {
  598. case 0: /* Command will be handled */
  599. if (pkt->u.spectrum.id != 0xff) {
  600. D_INFO("Replaced existing measurement: %d\n",
  601. pkt->u.spectrum.id);
  602. il->measurement_status &= ~MEASUREMENT_READY;
  603. }
  604. il->measurement_status |= MEASUREMENT_ACTIVE;
  605. rc = 0;
  606. break;
  607. case 1: /* Command will not be handled */
  608. rc = -EAGAIN;
  609. break;
  610. }
  611. il_free_pages(il, cmd.reply_page);
  612. return rc;
  613. }
  614. static void il3945_rx_reply_alive(struct il_priv *il,
  615. struct il_rx_buf *rxb)
  616. {
  617. struct il_rx_pkt *pkt = rxb_addr(rxb);
  618. struct il_alive_resp *palive;
  619. struct delayed_work *pwork;
  620. palive = &pkt->u.alive_frame;
  621. D_INFO("Alive ucode status 0x%08X revision "
  622. "0x%01X 0x%01X\n",
  623. palive->is_valid, palive->ver_type,
  624. palive->ver_subtype);
  625. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  626. D_INFO("Initialization Alive received.\n");
  627. memcpy(&il->card_alive_init, &pkt->u.alive_frame,
  628. sizeof(struct il_alive_resp));
  629. pwork = &il->init_alive_start;
  630. } else {
  631. D_INFO("Runtime Alive received.\n");
  632. memcpy(&il->card_alive, &pkt->u.alive_frame,
  633. sizeof(struct il_alive_resp));
  634. pwork = &il->alive_start;
  635. il3945_disable_events(il);
  636. }
  637. /* We delay the ALIVE response by 5ms to
  638. * give the HW RF Kill time to activate... */
  639. if (palive->is_valid == UCODE_VALID_OK)
  640. queue_delayed_work(il->workqueue, pwork,
  641. msecs_to_jiffies(5));
  642. else
  643. IL_WARN("uCode did not respond OK.\n");
  644. }
  645. static void il3945_rx_reply_add_sta(struct il_priv *il,
  646. struct il_rx_buf *rxb)
  647. {
  648. #ifdef CONFIG_IWLEGACY_DEBUG
  649. struct il_rx_pkt *pkt = rxb_addr(rxb);
  650. #endif
  651. D_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  652. }
  653. static void il3945_rx_beacon_notif(struct il_priv *il,
  654. struct il_rx_buf *rxb)
  655. {
  656. struct il_rx_pkt *pkt = rxb_addr(rxb);
  657. struct il3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  658. #ifdef CONFIG_IWLEGACY_DEBUG
  659. u8 rate = beacon->beacon_notify_hdr.rate;
  660. D_RX("beacon status %x retries %d iss %d "
  661. "tsf %d %d rate %d\n",
  662. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  663. beacon->beacon_notify_hdr.failure_frame,
  664. le32_to_cpu(beacon->ibss_mgr_status),
  665. le32_to_cpu(beacon->high_tsf),
  666. le32_to_cpu(beacon->low_tsf), rate);
  667. #endif
  668. il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
  669. }
  670. /* Handle notification from uCode that card's power state is changing
  671. * due to software, hardware, or critical temperature RFKILL */
  672. static void il3945_rx_card_state_notif(struct il_priv *il,
  673. struct il_rx_buf *rxb)
  674. {
  675. struct il_rx_pkt *pkt = rxb_addr(rxb);
  676. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  677. unsigned long status = il->status;
  678. IL_WARN("Card state received: HW:%s SW:%s\n",
  679. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  680. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  681. _il_wr(il, CSR_UCODE_DRV_GP1_SET,
  682. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  683. if (flags & HW_CARD_DISABLED)
  684. set_bit(STATUS_RF_KILL_HW, &il->status);
  685. else
  686. clear_bit(STATUS_RF_KILL_HW, &il->status);
  687. il_scan_cancel(il);
  688. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  689. test_bit(STATUS_RF_KILL_HW, &il->status)))
  690. wiphy_rfkill_set_hw_state(il->hw->wiphy,
  691. test_bit(STATUS_RF_KILL_HW, &il->status));
  692. else
  693. wake_up(&il->wait_command_queue);
  694. }
  695. /**
  696. * il3945_setup_rx_handlers - Initialize Rx handler callbacks
  697. *
  698. * Setup the RX handlers for each of the reply types sent from the uCode
  699. * to the host.
  700. *
  701. * This function chains into the hardware specific files for them to setup
  702. * any hardware specific handlers as well.
  703. */
  704. static void il3945_setup_rx_handlers(struct il_priv *il)
  705. {
  706. il->rx_handlers[REPLY_ALIVE] = il3945_rx_reply_alive;
  707. il->rx_handlers[REPLY_ADD_STA] = il3945_rx_reply_add_sta;
  708. il->rx_handlers[REPLY_ERROR] = il_rx_reply_error;
  709. il->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = il_rx_csa;
  710. il->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  711. il_rx_spectrum_measure_notif;
  712. il->rx_handlers[PM_SLEEP_NOTIFICATION] = il_rx_pm_sleep_notif;
  713. il->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  714. il_rx_pm_debug_statistics_notif;
  715. il->rx_handlers[BEACON_NOTIFICATION] = il3945_rx_beacon_notif;
  716. /*
  717. * The same handler is used for both the REPLY to a discrete
  718. * statistics request from the host as well as for the periodic
  719. * statistics notifications (after received beacons) from the uCode.
  720. */
  721. il->rx_handlers[REPLY_STATISTICS_CMD] = il3945_reply_statistics;
  722. il->rx_handlers[STATISTICS_NOTIFICATION] = il3945_hw_rx_statistics;
  723. il_setup_rx_scan_handlers(il);
  724. il->rx_handlers[CARD_STATE_NOTIFICATION] = il3945_rx_card_state_notif;
  725. /* Set up hardware specific Rx handlers */
  726. il3945_hw_rx_handler_setup(il);
  727. }
  728. /************************** RX-FUNCTIONS ****************************/
  729. /*
  730. * Rx theory of operation
  731. *
  732. * The host allocates 32 DMA target addresses and passes the host address
  733. * to the firmware at register IL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  734. * 0 to 31
  735. *
  736. * Rx Queue Indexes
  737. * The host/firmware share two index registers for managing the Rx buffers.
  738. *
  739. * The READ index maps to the first position that the firmware may be writing
  740. * to -- the driver can read up to (but not including) this position and get
  741. * good data.
  742. * The READ index is managed by the firmware once the card is enabled.
  743. *
  744. * The WRITE index maps to the last position the driver has read from -- the
  745. * position preceding WRITE is the last slot the firmware can place a packet.
  746. *
  747. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  748. * WRITE = READ.
  749. *
  750. * During initialization, the host sets up the READ queue position to the first
  751. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  752. *
  753. * When the firmware places a packet in a buffer, it will advance the READ index
  754. * and fire the RX interrupt. The driver can then query the READ index and
  755. * process as many packets as possible, moving the WRITE index forward as it
  756. * resets the Rx queue buffers with new memory.
  757. *
  758. * The management in the driver is as follows:
  759. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  760. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  761. * to replenish the iwl->rxq->rx_free.
  762. * + In il3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  763. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  764. * 'processed' and 'read' driver indexes as well)
  765. * + A received packet is processed and handed to the kernel network stack,
  766. * detached from the iwl->rxq. The driver 'processed' index is updated.
  767. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  768. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  769. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  770. * were enough free buffers and RX_STALLED is set it is cleared.
  771. *
  772. *
  773. * Driver sequence:
  774. *
  775. * il3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  776. * il3945_rx_queue_restock
  777. * il3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  778. * queue, updates firmware pointers, and updates
  779. * the WRITE index. If insufficient rx_free buffers
  780. * are available, schedules il3945_rx_replenish
  781. *
  782. * -- enable interrupts --
  783. * ISR - il3945_rx() Detach il_rx_bufs from pool up to the
  784. * READ INDEX, detaching the SKB from the pool.
  785. * Moves the packet buffer from queue to rx_used.
  786. * Calls il3945_rx_queue_restock to refill any empty
  787. * slots.
  788. * ...
  789. *
  790. */
  791. /**
  792. * il3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  793. */
  794. static inline __le32 il3945_dma_addr2rbd_ptr(struct il_priv *il,
  795. dma_addr_t dma_addr)
  796. {
  797. return cpu_to_le32((u32)dma_addr);
  798. }
  799. /**
  800. * il3945_rx_queue_restock - refill RX queue from pre-allocated pool
  801. *
  802. * If there are slots in the RX queue that need to be restocked,
  803. * and we have free pre-allocated buffers, fill the ranks as much
  804. * as we can, pulling from rx_free.
  805. *
  806. * This moves the 'write' index forward to catch up with 'processed', and
  807. * also updates the memory address in the firmware to reference the new
  808. * target buffer.
  809. */
  810. static void il3945_rx_queue_restock(struct il_priv *il)
  811. {
  812. struct il_rx_queue *rxq = &il->rxq;
  813. struct list_head *element;
  814. struct il_rx_buf *rxb;
  815. unsigned long flags;
  816. int write;
  817. spin_lock_irqsave(&rxq->lock, flags);
  818. write = rxq->write & ~0x7;
  819. while (il_rx_queue_space(rxq) > 0 && rxq->free_count) {
  820. /* Get next free Rx buffer, remove from free list */
  821. element = rxq->rx_free.next;
  822. rxb = list_entry(element, struct il_rx_buf, list);
  823. list_del(element);
  824. /* Point to Rx buffer via next RBD in circular buffer */
  825. rxq->bd[rxq->write] = il3945_dma_addr2rbd_ptr(il, rxb->page_dma);
  826. rxq->queue[rxq->write] = rxb;
  827. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  828. rxq->free_count--;
  829. }
  830. spin_unlock_irqrestore(&rxq->lock, flags);
  831. /* If the pre-allocated buffer pool is dropping low, schedule to
  832. * refill it */
  833. if (rxq->free_count <= RX_LOW_WATERMARK)
  834. queue_work(il->workqueue, &il->rx_replenish);
  835. /* If we've added more space for the firmware to place data, tell it.
  836. * Increment device's write pointer in multiples of 8. */
  837. if (rxq->write_actual != (rxq->write & ~0x7) ||
  838. abs(rxq->write - rxq->read) > 7) {
  839. spin_lock_irqsave(&rxq->lock, flags);
  840. rxq->need_update = 1;
  841. spin_unlock_irqrestore(&rxq->lock, flags);
  842. il_rx_queue_update_write_ptr(il, rxq);
  843. }
  844. }
  845. /**
  846. * il3945_rx_replenish - Move all used packet from rx_used to rx_free
  847. *
  848. * When moving to rx_free an SKB is allocated for the slot.
  849. *
  850. * Also restock the Rx queue via il3945_rx_queue_restock.
  851. * This is called as a scheduled work item (except for during initialization)
  852. */
  853. static void il3945_rx_allocate(struct il_priv *il, gfp_t priority)
  854. {
  855. struct il_rx_queue *rxq = &il->rxq;
  856. struct list_head *element;
  857. struct il_rx_buf *rxb;
  858. struct page *page;
  859. unsigned long flags;
  860. gfp_t gfp_mask = priority;
  861. while (1) {
  862. spin_lock_irqsave(&rxq->lock, flags);
  863. if (list_empty(&rxq->rx_used)) {
  864. spin_unlock_irqrestore(&rxq->lock, flags);
  865. return;
  866. }
  867. spin_unlock_irqrestore(&rxq->lock, flags);
  868. if (rxq->free_count > RX_LOW_WATERMARK)
  869. gfp_mask |= __GFP_NOWARN;
  870. if (il->hw_params.rx_page_order > 0)
  871. gfp_mask |= __GFP_COMP;
  872. /* Alloc a new receive buffer */
  873. page = alloc_pages(gfp_mask, il->hw_params.rx_page_order);
  874. if (!page) {
  875. if (net_ratelimit())
  876. D_INFO("Failed to allocate SKB buffer.\n");
  877. if (rxq->free_count <= RX_LOW_WATERMARK &&
  878. net_ratelimit())
  879. IL_ERR("Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
  880. priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
  881. rxq->free_count);
  882. /* We don't reschedule replenish work here -- we will
  883. * call the restock method and if it still needs
  884. * more buffers it will schedule replenish */
  885. break;
  886. }
  887. spin_lock_irqsave(&rxq->lock, flags);
  888. if (list_empty(&rxq->rx_used)) {
  889. spin_unlock_irqrestore(&rxq->lock, flags);
  890. __free_pages(page, il->hw_params.rx_page_order);
  891. return;
  892. }
  893. element = rxq->rx_used.next;
  894. rxb = list_entry(element, struct il_rx_buf, list);
  895. list_del(element);
  896. spin_unlock_irqrestore(&rxq->lock, flags);
  897. rxb->page = page;
  898. /* Get physical address of RB/SKB */
  899. rxb->page_dma = pci_map_page(il->pci_dev, page, 0,
  900. PAGE_SIZE << il->hw_params.rx_page_order,
  901. PCI_DMA_FROMDEVICE);
  902. spin_lock_irqsave(&rxq->lock, flags);
  903. list_add_tail(&rxb->list, &rxq->rx_free);
  904. rxq->free_count++;
  905. il->alloc_rxb_page++;
  906. spin_unlock_irqrestore(&rxq->lock, flags);
  907. }
  908. }
  909. void il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
  910. {
  911. unsigned long flags;
  912. int i;
  913. spin_lock_irqsave(&rxq->lock, flags);
  914. INIT_LIST_HEAD(&rxq->rx_free);
  915. INIT_LIST_HEAD(&rxq->rx_used);
  916. /* Fill the rx_used queue with _all_ of the Rx buffers */
  917. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  918. /* In the reset function, these buffers may have been allocated
  919. * to an SKB, so we need to unmap and free potential storage */
  920. if (rxq->pool[i].page != NULL) {
  921. pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
  922. PAGE_SIZE << il->hw_params.rx_page_order,
  923. PCI_DMA_FROMDEVICE);
  924. __il_free_pages(il, rxq->pool[i].page);
  925. rxq->pool[i].page = NULL;
  926. }
  927. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  928. }
  929. /* Set us so that we have processed and used all buffers, but have
  930. * not restocked the Rx queue with fresh buffers */
  931. rxq->read = rxq->write = 0;
  932. rxq->write_actual = 0;
  933. rxq->free_count = 0;
  934. spin_unlock_irqrestore(&rxq->lock, flags);
  935. }
  936. void il3945_rx_replenish(void *data)
  937. {
  938. struct il_priv *il = data;
  939. unsigned long flags;
  940. il3945_rx_allocate(il, GFP_KERNEL);
  941. spin_lock_irqsave(&il->lock, flags);
  942. il3945_rx_queue_restock(il);
  943. spin_unlock_irqrestore(&il->lock, flags);
  944. }
  945. static void il3945_rx_replenish_now(struct il_priv *il)
  946. {
  947. il3945_rx_allocate(il, GFP_ATOMIC);
  948. il3945_rx_queue_restock(il);
  949. }
  950. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  951. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  952. * This free routine walks the list of POOL entries and if SKB is set to
  953. * non NULL it is unmapped and freed
  954. */
  955. static void il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
  956. {
  957. int i;
  958. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  959. if (rxq->pool[i].page != NULL) {
  960. pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
  961. PAGE_SIZE << il->hw_params.rx_page_order,
  962. PCI_DMA_FROMDEVICE);
  963. __il_free_pages(il, rxq->pool[i].page);
  964. rxq->pool[i].page = NULL;
  965. }
  966. }
  967. dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  968. rxq->bd_dma);
  969. dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status),
  970. rxq->rb_stts, rxq->rb_stts_dma);
  971. rxq->bd = NULL;
  972. rxq->rb_stts = NULL;
  973. }
  974. /* Convert linear signal-to-noise ratio into dB */
  975. static u8 ratio2dB[100] = {
  976. /* 0 1 2 3 4 5 6 7 8 9 */
  977. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  978. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  979. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  980. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  981. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  982. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  983. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  984. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  985. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  986. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  987. };
  988. /* Calculates a relative dB value from a ratio of linear
  989. * (i.e. not dB) signal levels.
  990. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  991. int il3945_calc_db_from_ratio(int sig_ratio)
  992. {
  993. /* 1000:1 or higher just report as 60 dB */
  994. if (sig_ratio >= 1000)
  995. return 60;
  996. /* 100:1 or higher, divide by 10 and use table,
  997. * add 20 dB to make up for divide by 10 */
  998. if (sig_ratio >= 100)
  999. return 20 + (int)ratio2dB[sig_ratio/10];
  1000. /* We shouldn't see this */
  1001. if (sig_ratio < 1)
  1002. return 0;
  1003. /* Use table for ratios 1:1 - 99:1 */
  1004. return (int)ratio2dB[sig_ratio];
  1005. }
  1006. /**
  1007. * il3945_rx_handle - Main entry function for receiving responses from uCode
  1008. *
  1009. * Uses the il->rx_handlers callback function array to invoke
  1010. * the appropriate handlers, including command responses,
  1011. * frame-received notifications, and other notifications.
  1012. */
  1013. static void il3945_rx_handle(struct il_priv *il)
  1014. {
  1015. struct il_rx_buf *rxb;
  1016. struct il_rx_pkt *pkt;
  1017. struct il_rx_queue *rxq = &il->rxq;
  1018. u32 r, i;
  1019. int reclaim;
  1020. unsigned long flags;
  1021. u8 fill_rx = 0;
  1022. u32 count = 8;
  1023. int total_empty = 0;
  1024. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  1025. * buffer that the driver may process (last buffer filled by ucode). */
  1026. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1027. i = rxq->read;
  1028. /* calculate total frames need to be restock after handling RX */
  1029. total_empty = r - rxq->write_actual;
  1030. if (total_empty < 0)
  1031. total_empty += RX_QUEUE_SIZE;
  1032. if (total_empty > (RX_QUEUE_SIZE / 2))
  1033. fill_rx = 1;
  1034. /* Rx interrupt, but nothing sent from uCode */
  1035. if (i == r)
  1036. D_RX("r = %d, i = %d\n", r, i);
  1037. while (i != r) {
  1038. int len;
  1039. rxb = rxq->queue[i];
  1040. /* If an RXB doesn't have a Rx queue slot associated with it,
  1041. * then a bug has been introduced in the queue refilling
  1042. * routines -- catch it here */
  1043. BUG_ON(rxb == NULL);
  1044. rxq->queue[i] = NULL;
  1045. pci_unmap_page(il->pci_dev, rxb->page_dma,
  1046. PAGE_SIZE << il->hw_params.rx_page_order,
  1047. PCI_DMA_FROMDEVICE);
  1048. pkt = rxb_addr(rxb);
  1049. len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
  1050. len += sizeof(u32); /* account for status word */
  1051. /* Reclaim a command buffer only if this packet is a response
  1052. * to a (driver-originated) command.
  1053. * If the packet (e.g. Rx frame) originated from uCode,
  1054. * there is no command buffer to reclaim.
  1055. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1056. * but apparently a few don't get set; catch them here. */
  1057. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1058. pkt->hdr.cmd != STATISTICS_NOTIFICATION &&
  1059. pkt->hdr.cmd != REPLY_TX;
  1060. /* Based on type of command response or notification,
  1061. * handle those that need handling via function in
  1062. * rx_handlers table. See il3945_setup_rx_handlers() */
  1063. if (il->rx_handlers[pkt->hdr.cmd]) {
  1064. D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i,
  1065. il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1066. il->isr_stats.rx_handlers[pkt->hdr.cmd]++;
  1067. il->rx_handlers[pkt->hdr.cmd] (il, rxb);
  1068. } else {
  1069. /* No handling needed */
  1070. D_RX(
  1071. "r %d i %d No handler needed for %s, 0x%02x\n",
  1072. r, i, il_get_cmd_string(pkt->hdr.cmd),
  1073. pkt->hdr.cmd);
  1074. }
  1075. /*
  1076. * XXX: After here, we should always check rxb->page
  1077. * against NULL before touching it or its virtual
  1078. * memory (pkt). Because some rx_handler might have
  1079. * already taken or freed the pages.
  1080. */
  1081. if (reclaim) {
  1082. /* Invoke any callbacks, transfer the buffer to caller,
  1083. * and fire off the (possibly) blocking il_send_cmd()
  1084. * as we reclaim the driver command queue */
  1085. if (rxb->page)
  1086. il_tx_cmd_complete(il, rxb);
  1087. else
  1088. IL_WARN("Claim null rxb?\n");
  1089. }
  1090. /* Reuse the page if possible. For notification packets and
  1091. * SKBs that fail to Rx correctly, add them back into the
  1092. * rx_free list for reuse later. */
  1093. spin_lock_irqsave(&rxq->lock, flags);
  1094. if (rxb->page != NULL) {
  1095. rxb->page_dma = pci_map_page(il->pci_dev, rxb->page,
  1096. 0, PAGE_SIZE << il->hw_params.rx_page_order,
  1097. PCI_DMA_FROMDEVICE);
  1098. list_add_tail(&rxb->list, &rxq->rx_free);
  1099. rxq->free_count++;
  1100. } else
  1101. list_add_tail(&rxb->list, &rxq->rx_used);
  1102. spin_unlock_irqrestore(&rxq->lock, flags);
  1103. i = (i + 1) & RX_QUEUE_MASK;
  1104. /* If there are a lot of unused frames,
  1105. * restock the Rx queue so ucode won't assert. */
  1106. if (fill_rx) {
  1107. count++;
  1108. if (count >= 8) {
  1109. rxq->read = i;
  1110. il3945_rx_replenish_now(il);
  1111. count = 0;
  1112. }
  1113. }
  1114. }
  1115. /* Backtrack one entry */
  1116. rxq->read = i;
  1117. if (fill_rx)
  1118. il3945_rx_replenish_now(il);
  1119. else
  1120. il3945_rx_queue_restock(il);
  1121. }
  1122. /* call this function to flush any scheduled tasklet */
  1123. static inline void il3945_synchronize_irq(struct il_priv *il)
  1124. {
  1125. /* wait to make sure we flush pending tasklet*/
  1126. synchronize_irq(il->pci_dev->irq);
  1127. tasklet_kill(&il->irq_tasklet);
  1128. }
  1129. static const char *il3945_desc_lookup(int i)
  1130. {
  1131. switch (i) {
  1132. case 1:
  1133. return "FAIL";
  1134. case 2:
  1135. return "BAD_PARAM";
  1136. case 3:
  1137. return "BAD_CHECKSUM";
  1138. case 4:
  1139. return "NMI_INTERRUPT";
  1140. case 5:
  1141. return "SYSASSERT";
  1142. case 6:
  1143. return "FATAL_ERROR";
  1144. }
  1145. return "UNKNOWN";
  1146. }
  1147. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1148. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1149. void il3945_dump_nic_error_log(struct il_priv *il)
  1150. {
  1151. u32 i;
  1152. u32 desc, time, count, base, data1;
  1153. u32 blink1, blink2, ilink1, ilink2;
  1154. base = le32_to_cpu(il->card_alive.error_event_table_ptr);
  1155. if (!il3945_hw_valid_rtc_data_addr(base)) {
  1156. IL_ERR("Not valid error log pointer 0x%08X\n", base);
  1157. return;
  1158. }
  1159. count = il_read_targ_mem(il, base);
  1160. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1161. IL_ERR("Start IWL Error Log Dump:\n");
  1162. IL_ERR("Status: 0x%08lX, count: %d\n",
  1163. il->status, count);
  1164. }
  1165. IL_ERR("Desc Time asrtPC blink2 "
  1166. "ilink1 nmiPC Line\n");
  1167. for (i = ERROR_START_OFFSET;
  1168. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1169. i += ERROR_ELEM_SIZE) {
  1170. desc = il_read_targ_mem(il, base + i);
  1171. time =
  1172. il_read_targ_mem(il, base + i + 1 * sizeof(u32));
  1173. blink1 =
  1174. il_read_targ_mem(il, base + i + 2 * sizeof(u32));
  1175. blink2 =
  1176. il_read_targ_mem(il, base + i + 3 * sizeof(u32));
  1177. ilink1 =
  1178. il_read_targ_mem(il, base + i + 4 * sizeof(u32));
  1179. ilink2 =
  1180. il_read_targ_mem(il, base + i + 5 * sizeof(u32));
  1181. data1 =
  1182. il_read_targ_mem(il, base + i + 6 * sizeof(u32));
  1183. IL_ERR(
  1184. "%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1185. il3945_desc_lookup(desc), desc, time, blink1, blink2,
  1186. ilink1, ilink2, data1);
  1187. }
  1188. }
  1189. static void il3945_irq_tasklet(struct il_priv *il)
  1190. {
  1191. u32 inta, handled = 0;
  1192. u32 inta_fh;
  1193. unsigned long flags;
  1194. #ifdef CONFIG_IWLEGACY_DEBUG
  1195. u32 inta_mask;
  1196. #endif
  1197. spin_lock_irqsave(&il->lock, flags);
  1198. /* Ack/clear/reset pending uCode interrupts.
  1199. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1200. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1201. inta = _il_rd(il, CSR_INT);
  1202. _il_wr(il, CSR_INT, inta);
  1203. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1204. * Any new interrupts that happen after this, either while we're
  1205. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1206. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  1207. _il_wr(il, CSR_FH_INT_STATUS, inta_fh);
  1208. #ifdef CONFIG_IWLEGACY_DEBUG
  1209. if (il_get_debug_level(il) & IL_DL_ISR) {
  1210. /* just for debug */
  1211. inta_mask = _il_rd(il, CSR_INT_MASK);
  1212. D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1213. inta, inta_mask, inta_fh);
  1214. }
  1215. #endif
  1216. spin_unlock_irqrestore(&il->lock, flags);
  1217. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1218. * atomic, make sure that inta covers all the interrupts that
  1219. * we've discovered, even if FH interrupt came in just after
  1220. * reading CSR_INT. */
  1221. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1222. inta |= CSR_INT_BIT_FH_RX;
  1223. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1224. inta |= CSR_INT_BIT_FH_TX;
  1225. /* Now service all interrupt bits discovered above. */
  1226. if (inta & CSR_INT_BIT_HW_ERR) {
  1227. IL_ERR("Hardware error detected. Restarting.\n");
  1228. /* Tell the device to stop sending interrupts */
  1229. il_disable_interrupts(il);
  1230. il->isr_stats.hw++;
  1231. il_irq_handle_error(il);
  1232. handled |= CSR_INT_BIT_HW_ERR;
  1233. return;
  1234. }
  1235. #ifdef CONFIG_IWLEGACY_DEBUG
  1236. if (il_get_debug_level(il) & (IL_DL_ISR)) {
  1237. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1238. if (inta & CSR_INT_BIT_SCD) {
  1239. D_ISR("Scheduler finished to transmit "
  1240. "the frame/frames.\n");
  1241. il->isr_stats.sch++;
  1242. }
  1243. /* Alive notification via Rx interrupt will do the real work */
  1244. if (inta & CSR_INT_BIT_ALIVE) {
  1245. D_ISR("Alive interrupt\n");
  1246. il->isr_stats.alive++;
  1247. }
  1248. }
  1249. #endif
  1250. /* Safely ignore these bits for debug checks below */
  1251. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1252. /* Error detected by uCode */
  1253. if (inta & CSR_INT_BIT_SW_ERR) {
  1254. IL_ERR("Microcode SW error detected. "
  1255. "Restarting 0x%X.\n", inta);
  1256. il->isr_stats.sw++;
  1257. il_irq_handle_error(il);
  1258. handled |= CSR_INT_BIT_SW_ERR;
  1259. }
  1260. /* uCode wakes up after power-down sleep */
  1261. if (inta & CSR_INT_BIT_WAKEUP) {
  1262. D_ISR("Wakeup interrupt\n");
  1263. il_rx_queue_update_write_ptr(il, &il->rxq);
  1264. il_txq_update_write_ptr(il, &il->txq[0]);
  1265. il_txq_update_write_ptr(il, &il->txq[1]);
  1266. il_txq_update_write_ptr(il, &il->txq[2]);
  1267. il_txq_update_write_ptr(il, &il->txq[3]);
  1268. il_txq_update_write_ptr(il, &il->txq[4]);
  1269. il_txq_update_write_ptr(il, &il->txq[5]);
  1270. il->isr_stats.wakeup++;
  1271. handled |= CSR_INT_BIT_WAKEUP;
  1272. }
  1273. /* All uCode command responses, including Tx command responses,
  1274. * Rx "responses" (frame-received notification), and other
  1275. * notifications from uCode come through here*/
  1276. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1277. il3945_rx_handle(il);
  1278. il->isr_stats.rx++;
  1279. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1280. }
  1281. if (inta & CSR_INT_BIT_FH_TX) {
  1282. D_ISR("Tx interrupt\n");
  1283. il->isr_stats.tx++;
  1284. _il_wr(il, CSR_FH_INT_STATUS, (1 << 6));
  1285. il_wr(il, FH39_TCSR_CREDIT
  1286. (FH39_SRVC_CHNL), 0x0);
  1287. handled |= CSR_INT_BIT_FH_TX;
  1288. }
  1289. if (inta & ~handled) {
  1290. IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1291. il->isr_stats.unhandled++;
  1292. }
  1293. if (inta & ~il->inta_mask) {
  1294. IL_WARN("Disabled INTA bits 0x%08x were pending\n",
  1295. inta & ~il->inta_mask);
  1296. IL_WARN(" with FH_INT = 0x%08x\n", inta_fh);
  1297. }
  1298. /* Re-enable all interrupts */
  1299. /* only Re-enable if disabled by irq */
  1300. if (test_bit(STATUS_INT_ENABLED, &il->status))
  1301. il_enable_interrupts(il);
  1302. #ifdef CONFIG_IWLEGACY_DEBUG
  1303. if (il_get_debug_level(il) & (IL_DL_ISR)) {
  1304. inta = _il_rd(il, CSR_INT);
  1305. inta_mask = _il_rd(il, CSR_INT_MASK);
  1306. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  1307. D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1308. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1309. }
  1310. #endif
  1311. }
  1312. static int il3945_get_channels_for_scan(struct il_priv *il,
  1313. enum ieee80211_band band,
  1314. u8 is_active, u8 n_probes,
  1315. struct il3945_scan_channel *scan_ch,
  1316. struct ieee80211_vif *vif)
  1317. {
  1318. struct ieee80211_channel *chan;
  1319. const struct ieee80211_supported_band *sband;
  1320. const struct il_channel_info *ch_info;
  1321. u16 passive_dwell = 0;
  1322. u16 active_dwell = 0;
  1323. int added, i;
  1324. sband = il_get_hw_mode(il, band);
  1325. if (!sband)
  1326. return 0;
  1327. active_dwell = il_get_active_dwell_time(il, band, n_probes);
  1328. passive_dwell = il_get_passive_dwell_time(il, band, vif);
  1329. if (passive_dwell <= active_dwell)
  1330. passive_dwell = active_dwell + 1;
  1331. for (i = 0, added = 0; i < il->scan_request->n_channels; i++) {
  1332. chan = il->scan_request->channels[i];
  1333. if (chan->band != band)
  1334. continue;
  1335. scan_ch->channel = chan->hw_value;
  1336. ch_info = il_get_channel_info(il, band,
  1337. scan_ch->channel);
  1338. if (!il_is_channel_valid(ch_info)) {
  1339. D_SCAN(
  1340. "Channel %d is INVALID for this band.\n",
  1341. scan_ch->channel);
  1342. continue;
  1343. }
  1344. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1345. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1346. /* If passive , set up for auto-switch
  1347. * and use long active_dwell time.
  1348. */
  1349. if (!is_active || il_is_channel_passive(ch_info) ||
  1350. (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1351. scan_ch->type = 0; /* passive */
  1352. if (IL_UCODE_API(il->ucode_ver) == 1)
  1353. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  1354. } else {
  1355. scan_ch->type = 1; /* active */
  1356. }
  1357. /* Set direct probe bits. These may be used both for active
  1358. * scan channels (probes gets sent right away),
  1359. * or for passive channels (probes get se sent only after
  1360. * hearing clear Rx packet).*/
  1361. if (IL_UCODE_API(il->ucode_ver) >= 2) {
  1362. if (n_probes)
  1363. scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
  1364. } else {
  1365. /* uCode v1 does not allow setting direct probe bits on
  1366. * passive channel. */
  1367. if ((scan_ch->type & 1) && n_probes)
  1368. scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
  1369. }
  1370. /* Set txpower levels to defaults */
  1371. scan_ch->tpc.dsp_atten = 110;
  1372. /* scan_pwr_info->tpc.dsp_atten; */
  1373. /*scan_pwr_info->tpc.tx_gain; */
  1374. if (band == IEEE80211_BAND_5GHZ)
  1375. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1376. else {
  1377. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1378. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1379. * power level:
  1380. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1381. */
  1382. }
  1383. D_SCAN("Scanning %d [%s %d]\n",
  1384. scan_ch->channel,
  1385. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1386. (scan_ch->type & 1) ?
  1387. active_dwell : passive_dwell);
  1388. scan_ch++;
  1389. added++;
  1390. }
  1391. D_SCAN("total channels to scan %d\n", added);
  1392. return added;
  1393. }
  1394. static void il3945_init_hw_rates(struct il_priv *il,
  1395. struct ieee80211_rate *rates)
  1396. {
  1397. int i;
  1398. for (i = 0; i < IL_RATE_COUNT_LEGACY; i++) {
  1399. rates[i].bitrate = il3945_rates[i].ieee * 5;
  1400. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  1401. rates[i].hw_value_short = i;
  1402. rates[i].flags = 0;
  1403. if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) {
  1404. /*
  1405. * If CCK != 1M then set short preamble rate flag.
  1406. */
  1407. rates[i].flags |= (il3945_rates[i].plcp == 10) ?
  1408. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1409. }
  1410. }
  1411. }
  1412. /******************************************************************************
  1413. *
  1414. * uCode download functions
  1415. *
  1416. ******************************************************************************/
  1417. static void il3945_dealloc_ucode_pci(struct il_priv *il)
  1418. {
  1419. il_free_fw_desc(il->pci_dev, &il->ucode_code);
  1420. il_free_fw_desc(il->pci_dev, &il->ucode_data);
  1421. il_free_fw_desc(il->pci_dev, &il->ucode_data_backup);
  1422. il_free_fw_desc(il->pci_dev, &il->ucode_init);
  1423. il_free_fw_desc(il->pci_dev, &il->ucode_init_data);
  1424. il_free_fw_desc(il->pci_dev, &il->ucode_boot);
  1425. }
  1426. /**
  1427. * il3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1428. * looking at all data.
  1429. */
  1430. static int il3945_verify_inst_full(struct il_priv *il, __le32 *image, u32 len)
  1431. {
  1432. u32 val;
  1433. u32 save_len = len;
  1434. int rc = 0;
  1435. u32 errcnt;
  1436. D_INFO("ucode inst image size is %u\n", len);
  1437. il_wr(il, HBUS_TARG_MEM_RADDR,
  1438. IL39_RTC_INST_LOWER_BOUND);
  1439. errcnt = 0;
  1440. for (; len > 0; len -= sizeof(u32), image++) {
  1441. /* read data comes through single port, auto-incr addr */
  1442. /* NOTE: Use the debugless read so we don't flood kernel log
  1443. * if IL_DL_IO is set */
  1444. val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  1445. if (val != le32_to_cpu(*image)) {
  1446. IL_ERR("uCode INST section is invalid at "
  1447. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1448. save_len - len, val, le32_to_cpu(*image));
  1449. rc = -EIO;
  1450. errcnt++;
  1451. if (errcnt >= 20)
  1452. break;
  1453. }
  1454. }
  1455. if (!errcnt)
  1456. D_INFO(
  1457. "ucode image in INSTRUCTION memory is good\n");
  1458. return rc;
  1459. }
  1460. /**
  1461. * il3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1462. * using sample data 100 bytes apart. If these sample points are good,
  1463. * it's a pretty good bet that everything between them is good, too.
  1464. */
  1465. static int il3945_verify_inst_sparse(struct il_priv *il, __le32 *image, u32 len)
  1466. {
  1467. u32 val;
  1468. int rc = 0;
  1469. u32 errcnt = 0;
  1470. u32 i;
  1471. D_INFO("ucode inst image size is %u\n", len);
  1472. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1473. /* read data comes through single port, auto-incr addr */
  1474. /* NOTE: Use the debugless read so we don't flood kernel log
  1475. * if IL_DL_IO is set */
  1476. il_wr(il, HBUS_TARG_MEM_RADDR,
  1477. i + IL39_RTC_INST_LOWER_BOUND);
  1478. val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  1479. if (val != le32_to_cpu(*image)) {
  1480. #if 0 /* Enable this if you want to see details */
  1481. IL_ERR("uCode INST section is invalid at "
  1482. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1483. i, val, *image);
  1484. #endif
  1485. rc = -EIO;
  1486. errcnt++;
  1487. if (errcnt >= 3)
  1488. break;
  1489. }
  1490. }
  1491. return rc;
  1492. }
  1493. /**
  1494. * il3945_verify_ucode - determine which instruction image is in SRAM,
  1495. * and verify its contents
  1496. */
  1497. static int il3945_verify_ucode(struct il_priv *il)
  1498. {
  1499. __le32 *image;
  1500. u32 len;
  1501. int rc = 0;
  1502. /* Try bootstrap */
  1503. image = (__le32 *)il->ucode_boot.v_addr;
  1504. len = il->ucode_boot.len;
  1505. rc = il3945_verify_inst_sparse(il, image, len);
  1506. if (rc == 0) {
  1507. D_INFO("Bootstrap uCode is good in inst SRAM\n");
  1508. return 0;
  1509. }
  1510. /* Try initialize */
  1511. image = (__le32 *)il->ucode_init.v_addr;
  1512. len = il->ucode_init.len;
  1513. rc = il3945_verify_inst_sparse(il, image, len);
  1514. if (rc == 0) {
  1515. D_INFO("Initialize uCode is good in inst SRAM\n");
  1516. return 0;
  1517. }
  1518. /* Try runtime/protocol */
  1519. image = (__le32 *)il->ucode_code.v_addr;
  1520. len = il->ucode_code.len;
  1521. rc = il3945_verify_inst_sparse(il, image, len);
  1522. if (rc == 0) {
  1523. D_INFO("Runtime uCode is good in inst SRAM\n");
  1524. return 0;
  1525. }
  1526. IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1527. /* Since nothing seems to match, show first several data entries in
  1528. * instruction SRAM, so maybe visual inspection will give a clue.
  1529. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1530. image = (__le32 *)il->ucode_boot.v_addr;
  1531. len = il->ucode_boot.len;
  1532. rc = il3945_verify_inst_full(il, image, len);
  1533. return rc;
  1534. }
  1535. static void il3945_nic_start(struct il_priv *il)
  1536. {
  1537. /* Remove all resets to allow NIC to operate */
  1538. _il_wr(il, CSR_RESET, 0);
  1539. }
  1540. #define IL3945_UCODE_GET(item) \
  1541. static u32 il3945_ucode_get_##item(const struct il_ucode_header *ucode)\
  1542. { \
  1543. return le32_to_cpu(ucode->v1.item); \
  1544. }
  1545. static u32 il3945_ucode_get_header_size(u32 api_ver)
  1546. {
  1547. return 24;
  1548. }
  1549. static u8 *il3945_ucode_get_data(const struct il_ucode_header *ucode)
  1550. {
  1551. return (u8 *) ucode->v1.data;
  1552. }
  1553. IL3945_UCODE_GET(inst_size);
  1554. IL3945_UCODE_GET(data_size);
  1555. IL3945_UCODE_GET(init_size);
  1556. IL3945_UCODE_GET(init_data_size);
  1557. IL3945_UCODE_GET(boot_size);
  1558. /**
  1559. * il3945_read_ucode - Read uCode images from disk file.
  1560. *
  1561. * Copy into buffers for card to fetch via bus-mastering
  1562. */
  1563. static int il3945_read_ucode(struct il_priv *il)
  1564. {
  1565. const struct il_ucode_header *ucode;
  1566. int ret = -EINVAL, index;
  1567. const struct firmware *ucode_raw;
  1568. /* firmware file name contains uCode/driver compatibility version */
  1569. const char *name_pre = il->cfg->fw_name_pre;
  1570. const unsigned int api_max = il->cfg->ucode_api_max;
  1571. const unsigned int api_min = il->cfg->ucode_api_min;
  1572. char buf[25];
  1573. u8 *src;
  1574. size_t len;
  1575. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1576. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1577. * request_firmware() is synchronous, file is in memory on return. */
  1578. for (index = api_max; index >= api_min; index--) {
  1579. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  1580. ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev);
  1581. if (ret < 0) {
  1582. IL_ERR("%s firmware file req failed: %d\n",
  1583. buf, ret);
  1584. if (ret == -ENOENT)
  1585. continue;
  1586. else
  1587. goto error;
  1588. } else {
  1589. if (index < api_max)
  1590. IL_ERR("Loaded firmware %s, "
  1591. "which is deprecated. "
  1592. " Please use API v%u instead.\n",
  1593. buf, api_max);
  1594. D_INFO("Got firmware '%s' file "
  1595. "(%zd bytes) from disk\n",
  1596. buf, ucode_raw->size);
  1597. break;
  1598. }
  1599. }
  1600. if (ret < 0)
  1601. goto error;
  1602. /* Make sure that we got at least our header! */
  1603. if (ucode_raw->size < il3945_ucode_get_header_size(1)) {
  1604. IL_ERR("File size way too small!\n");
  1605. ret = -EINVAL;
  1606. goto err_release;
  1607. }
  1608. /* Data from ucode file: header followed by uCode images */
  1609. ucode = (struct il_ucode_header *)ucode_raw->data;
  1610. il->ucode_ver = le32_to_cpu(ucode->ver);
  1611. api_ver = IL_UCODE_API(il->ucode_ver);
  1612. inst_size = il3945_ucode_get_inst_size(ucode);
  1613. data_size = il3945_ucode_get_data_size(ucode);
  1614. init_size = il3945_ucode_get_init_size(ucode);
  1615. init_data_size = il3945_ucode_get_init_data_size(ucode);
  1616. boot_size = il3945_ucode_get_boot_size(ucode);
  1617. src = il3945_ucode_get_data(ucode);
  1618. /* api_ver should match the api version forming part of the
  1619. * firmware filename ... but we don't check for that and only rely
  1620. * on the API version read from firmware header from here on forward */
  1621. if (api_ver < api_min || api_ver > api_max) {
  1622. IL_ERR("Driver unable to support your firmware API. "
  1623. "Driver supports v%u, firmware is v%u.\n",
  1624. api_max, api_ver);
  1625. il->ucode_ver = 0;
  1626. ret = -EINVAL;
  1627. goto err_release;
  1628. }
  1629. if (api_ver != api_max)
  1630. IL_ERR("Firmware has old API version. Expected %u, "
  1631. "got %u. New firmware can be obtained "
  1632. "from http://www.intellinuxwireless.org.\n",
  1633. api_max, api_ver);
  1634. IL_INFO("loaded firmware version %u.%u.%u.%u\n",
  1635. IL_UCODE_MAJOR(il->ucode_ver),
  1636. IL_UCODE_MINOR(il->ucode_ver),
  1637. IL_UCODE_API(il->ucode_ver),
  1638. IL_UCODE_SERIAL(il->ucode_ver));
  1639. snprintf(il->hw->wiphy->fw_version,
  1640. sizeof(il->hw->wiphy->fw_version),
  1641. "%u.%u.%u.%u",
  1642. IL_UCODE_MAJOR(il->ucode_ver),
  1643. IL_UCODE_MINOR(il->ucode_ver),
  1644. IL_UCODE_API(il->ucode_ver),
  1645. IL_UCODE_SERIAL(il->ucode_ver));
  1646. D_INFO("f/w package hdr ucode version raw = 0x%x\n",
  1647. il->ucode_ver);
  1648. D_INFO("f/w package hdr runtime inst size = %u\n",
  1649. inst_size);
  1650. D_INFO("f/w package hdr runtime data size = %u\n",
  1651. data_size);
  1652. D_INFO("f/w package hdr init inst size = %u\n",
  1653. init_size);
  1654. D_INFO("f/w package hdr init data size = %u\n",
  1655. init_data_size);
  1656. D_INFO("f/w package hdr boot inst size = %u\n",
  1657. boot_size);
  1658. /* Verify size of file vs. image size info in file's header */
  1659. if (ucode_raw->size != il3945_ucode_get_header_size(api_ver) +
  1660. inst_size + data_size + init_size +
  1661. init_data_size + boot_size) {
  1662. D_INFO(
  1663. "uCode file size %zd does not match expected size\n",
  1664. ucode_raw->size);
  1665. ret = -EINVAL;
  1666. goto err_release;
  1667. }
  1668. /* Verify that uCode images will fit in card's SRAM */
  1669. if (inst_size > IL39_MAX_INST_SIZE) {
  1670. D_INFO("uCode instr len %d too large to fit in\n",
  1671. inst_size);
  1672. ret = -EINVAL;
  1673. goto err_release;
  1674. }
  1675. if (data_size > IL39_MAX_DATA_SIZE) {
  1676. D_INFO("uCode data len %d too large to fit in\n",
  1677. data_size);
  1678. ret = -EINVAL;
  1679. goto err_release;
  1680. }
  1681. if (init_size > IL39_MAX_INST_SIZE) {
  1682. D_INFO(
  1683. "uCode init instr len %d too large to fit in\n",
  1684. init_size);
  1685. ret = -EINVAL;
  1686. goto err_release;
  1687. }
  1688. if (init_data_size > IL39_MAX_DATA_SIZE) {
  1689. D_INFO(
  1690. "uCode init data len %d too large to fit in\n",
  1691. init_data_size);
  1692. ret = -EINVAL;
  1693. goto err_release;
  1694. }
  1695. if (boot_size > IL39_MAX_BSM_SIZE) {
  1696. D_INFO(
  1697. "uCode boot instr len %d too large to fit in\n",
  1698. boot_size);
  1699. ret = -EINVAL;
  1700. goto err_release;
  1701. }
  1702. /* Allocate ucode buffers for card's bus-master loading ... */
  1703. /* Runtime instructions and 2 copies of data:
  1704. * 1) unmodified from disk
  1705. * 2) backup cache for save/restore during power-downs */
  1706. il->ucode_code.len = inst_size;
  1707. il_alloc_fw_desc(il->pci_dev, &il->ucode_code);
  1708. il->ucode_data.len = data_size;
  1709. il_alloc_fw_desc(il->pci_dev, &il->ucode_data);
  1710. il->ucode_data_backup.len = data_size;
  1711. il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup);
  1712. if (!il->ucode_code.v_addr || !il->ucode_data.v_addr ||
  1713. !il->ucode_data_backup.v_addr)
  1714. goto err_pci_alloc;
  1715. /* Initialization instructions and data */
  1716. if (init_size && init_data_size) {
  1717. il->ucode_init.len = init_size;
  1718. il_alloc_fw_desc(il->pci_dev, &il->ucode_init);
  1719. il->ucode_init_data.len = init_data_size;
  1720. il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data);
  1721. if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr)
  1722. goto err_pci_alloc;
  1723. }
  1724. /* Bootstrap (instructions only, no data) */
  1725. if (boot_size) {
  1726. il->ucode_boot.len = boot_size;
  1727. il_alloc_fw_desc(il->pci_dev, &il->ucode_boot);
  1728. if (!il->ucode_boot.v_addr)
  1729. goto err_pci_alloc;
  1730. }
  1731. /* Copy images into buffers for card's bus-master reads ... */
  1732. /* Runtime instructions (first block of data in file) */
  1733. len = inst_size;
  1734. D_INFO(
  1735. "Copying (but not loading) uCode instr len %zd\n", len);
  1736. memcpy(il->ucode_code.v_addr, src, len);
  1737. src += len;
  1738. D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1739. il->ucode_code.v_addr, (u32)il->ucode_code.p_addr);
  1740. /* Runtime data (2nd block)
  1741. * NOTE: Copy into backup buffer will be done in il3945_up() */
  1742. len = data_size;
  1743. D_INFO(
  1744. "Copying (but not loading) uCode data len %zd\n", len);
  1745. memcpy(il->ucode_data.v_addr, src, len);
  1746. memcpy(il->ucode_data_backup.v_addr, src, len);
  1747. src += len;
  1748. /* Initialization instructions (3rd block) */
  1749. if (init_size) {
  1750. len = init_size;
  1751. D_INFO(
  1752. "Copying (but not loading) init instr len %zd\n", len);
  1753. memcpy(il->ucode_init.v_addr, src, len);
  1754. src += len;
  1755. }
  1756. /* Initialization data (4th block) */
  1757. if (init_data_size) {
  1758. len = init_data_size;
  1759. D_INFO(
  1760. "Copying (but not loading) init data len %zd\n", len);
  1761. memcpy(il->ucode_init_data.v_addr, src, len);
  1762. src += len;
  1763. }
  1764. /* Bootstrap instructions (5th block) */
  1765. len = boot_size;
  1766. D_INFO(
  1767. "Copying (but not loading) boot instr len %zd\n", len);
  1768. memcpy(il->ucode_boot.v_addr, src, len);
  1769. /* We have our copies now, allow OS release its copies */
  1770. release_firmware(ucode_raw);
  1771. return 0;
  1772. err_pci_alloc:
  1773. IL_ERR("failed to allocate pci memory\n");
  1774. ret = -ENOMEM;
  1775. il3945_dealloc_ucode_pci(il);
  1776. err_release:
  1777. release_firmware(ucode_raw);
  1778. error:
  1779. return ret;
  1780. }
  1781. /**
  1782. * il3945_set_ucode_ptrs - Set uCode address location
  1783. *
  1784. * Tell initialization uCode where to find runtime uCode.
  1785. *
  1786. * BSM registers initially contain pointers to initialization uCode.
  1787. * We need to replace them to load runtime uCode inst and data,
  1788. * and to save runtime data when powering down.
  1789. */
  1790. static int il3945_set_ucode_ptrs(struct il_priv *il)
  1791. {
  1792. dma_addr_t pinst;
  1793. dma_addr_t pdata;
  1794. /* bits 31:0 for 3945 */
  1795. pinst = il->ucode_code.p_addr;
  1796. pdata = il->ucode_data_backup.p_addr;
  1797. /* Tell bootstrap uCode where to find image to load */
  1798. il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
  1799. il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
  1800. il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG,
  1801. il->ucode_data.len);
  1802. /* Inst byte count must be last to set up, bit 31 signals uCode
  1803. * that all new ptr/size info is in place */
  1804. il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
  1805. il->ucode_code.len | BSM_DRAM_INST_LOAD);
  1806. D_INFO("Runtime uCode pointers are set.\n");
  1807. return 0;
  1808. }
  1809. /**
  1810. * il3945_init_alive_start - Called after REPLY_ALIVE notification received
  1811. *
  1812. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  1813. *
  1814. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  1815. */
  1816. static void il3945_init_alive_start(struct il_priv *il)
  1817. {
  1818. /* Check alive response for "valid" sign from uCode */
  1819. if (il->card_alive_init.is_valid != UCODE_VALID_OK) {
  1820. /* We had an error bringing up the hardware, so take it
  1821. * all the way back down so we can try again */
  1822. D_INFO("Initialize Alive failed.\n");
  1823. goto restart;
  1824. }
  1825. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  1826. * This is a paranoid check, because we would not have gotten the
  1827. * "initialize" alive if code weren't properly loaded. */
  1828. if (il3945_verify_ucode(il)) {
  1829. /* Runtime instruction load was bad;
  1830. * take it all the way back down so we can try again */
  1831. D_INFO("Bad \"initialize\" uCode load.\n");
  1832. goto restart;
  1833. }
  1834. /* Send pointers to protocol/runtime uCode image ... init code will
  1835. * load and launch runtime uCode, which will send us another "Alive"
  1836. * notification. */
  1837. D_INFO("Initialization Alive received.\n");
  1838. if (il3945_set_ucode_ptrs(il)) {
  1839. /* Runtime instruction load won't happen;
  1840. * take it all the way back down so we can try again */
  1841. D_INFO("Couldn't set up uCode pointers.\n");
  1842. goto restart;
  1843. }
  1844. return;
  1845. restart:
  1846. queue_work(il->workqueue, &il->restart);
  1847. }
  1848. /**
  1849. * il3945_alive_start - called after REPLY_ALIVE notification received
  1850. * from protocol/runtime uCode (initialization uCode's
  1851. * Alive gets handled by il3945_init_alive_start()).
  1852. */
  1853. static void il3945_alive_start(struct il_priv *il)
  1854. {
  1855. int thermal_spin = 0;
  1856. u32 rfkill;
  1857. struct il_rxon_context *ctx = &il->ctx;
  1858. D_INFO("Runtime Alive received.\n");
  1859. if (il->card_alive.is_valid != UCODE_VALID_OK) {
  1860. /* We had an error bringing up the hardware, so take it
  1861. * all the way back down so we can try again */
  1862. D_INFO("Alive failed.\n");
  1863. goto restart;
  1864. }
  1865. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  1866. * This is a paranoid check, because we would not have gotten the
  1867. * "runtime" alive if code weren't properly loaded. */
  1868. if (il3945_verify_ucode(il)) {
  1869. /* Runtime instruction load was bad;
  1870. * take it all the way back down so we can try again */
  1871. D_INFO("Bad runtime uCode load.\n");
  1872. goto restart;
  1873. }
  1874. rfkill = il_rd_prph(il, APMG_RFKILL_REG);
  1875. D_INFO("RFKILL status: 0x%x\n", rfkill);
  1876. if (rfkill & 0x1) {
  1877. clear_bit(STATUS_RF_KILL_HW, &il->status);
  1878. /* if RFKILL is not on, then wait for thermal
  1879. * sensor in adapter to kick in */
  1880. while (il3945_hw_get_temperature(il) == 0) {
  1881. thermal_spin++;
  1882. udelay(10);
  1883. }
  1884. if (thermal_spin)
  1885. D_INFO("Thermal calibration took %dus\n",
  1886. thermal_spin * 10);
  1887. } else
  1888. set_bit(STATUS_RF_KILL_HW, &il->status);
  1889. /* After the ALIVE response, we can send commands to 3945 uCode */
  1890. set_bit(STATUS_ALIVE, &il->status);
  1891. /* Enable watchdog to monitor the driver tx queues */
  1892. il_setup_watchdog(il);
  1893. if (il_is_rfkill(il))
  1894. return;
  1895. ieee80211_wake_queues(il->hw);
  1896. il->active_rate = IL_RATES_MASK_3945;
  1897. il_power_update_mode(il, true);
  1898. if (il_is_associated(il)) {
  1899. struct il3945_rxon_cmd *active_rxon =
  1900. (struct il3945_rxon_cmd *)(&ctx->active);
  1901. ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  1902. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1903. } else {
  1904. /* Initialize our rx_config data */
  1905. il_connection_init_rx_config(il, ctx);
  1906. }
  1907. /* Configure Bluetooth device coexistence support */
  1908. il_send_bt_config(il);
  1909. set_bit(STATUS_READY, &il->status);
  1910. /* Configure the adapter for unassociated operation */
  1911. il3945_commit_rxon(il, ctx);
  1912. il3945_reg_txpower_periodic(il);
  1913. D_INFO("ALIVE processing complete.\n");
  1914. wake_up(&il->wait_command_queue);
  1915. return;
  1916. restart:
  1917. queue_work(il->workqueue, &il->restart);
  1918. }
  1919. static void il3945_cancel_deferred_work(struct il_priv *il);
  1920. static void __il3945_down(struct il_priv *il)
  1921. {
  1922. unsigned long flags;
  1923. int exit_pending;
  1924. D_INFO(DRV_NAME " is going down\n");
  1925. il_scan_cancel_timeout(il, 200);
  1926. exit_pending = test_and_set_bit(STATUS_EXIT_PENDING, &il->status);
  1927. /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
  1928. * to prevent rearm timer */
  1929. del_timer_sync(&il->watchdog);
  1930. /* Station information will now be cleared in device */
  1931. il_clear_ucode_stations(il, NULL);
  1932. il_dealloc_bcast_stations(il);
  1933. il_clear_driver_stations(il);
  1934. /* Unblock any waiting calls */
  1935. wake_up_all(&il->wait_command_queue);
  1936. /* Wipe out the EXIT_PENDING status bit if we are not actually
  1937. * exiting the module */
  1938. if (!exit_pending)
  1939. clear_bit(STATUS_EXIT_PENDING, &il->status);
  1940. /* stop and reset the on-board processor */
  1941. _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  1942. /* tell the device to stop sending interrupts */
  1943. spin_lock_irqsave(&il->lock, flags);
  1944. il_disable_interrupts(il);
  1945. spin_unlock_irqrestore(&il->lock, flags);
  1946. il3945_synchronize_irq(il);
  1947. if (il->mac80211_registered)
  1948. ieee80211_stop_queues(il->hw);
  1949. /* If we have not previously called il3945_init() then
  1950. * clear all bits but the RF Kill bits and return */
  1951. if (!il_is_init(il)) {
  1952. il->status = test_bit(STATUS_RF_KILL_HW, &il->status) <<
  1953. STATUS_RF_KILL_HW |
  1954. test_bit(STATUS_GEO_CONFIGURED, &il->status) <<
  1955. STATUS_GEO_CONFIGURED |
  1956. test_bit(STATUS_EXIT_PENDING, &il->status) <<
  1957. STATUS_EXIT_PENDING;
  1958. goto exit;
  1959. }
  1960. /* ...otherwise clear out all the status bits but the RF Kill
  1961. * bit and continue taking the NIC down. */
  1962. il->status &= test_bit(STATUS_RF_KILL_HW, &il->status) <<
  1963. STATUS_RF_KILL_HW |
  1964. test_bit(STATUS_GEO_CONFIGURED, &il->status) <<
  1965. STATUS_GEO_CONFIGURED |
  1966. test_bit(STATUS_FW_ERROR, &il->status) <<
  1967. STATUS_FW_ERROR |
  1968. test_bit(STATUS_EXIT_PENDING, &il->status) <<
  1969. STATUS_EXIT_PENDING;
  1970. il3945_hw_txq_ctx_stop(il);
  1971. il3945_hw_rxq_stop(il);
  1972. /* Power-down device's busmaster DMA clocks */
  1973. il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
  1974. udelay(5);
  1975. /* Stop the device, and put it in low power state */
  1976. il_apm_stop(il);
  1977. exit:
  1978. memset(&il->card_alive, 0, sizeof(struct il_alive_resp));
  1979. if (il->beacon_skb)
  1980. dev_kfree_skb(il->beacon_skb);
  1981. il->beacon_skb = NULL;
  1982. /* clear out any free frames */
  1983. il3945_clear_free_frames(il);
  1984. }
  1985. static void il3945_down(struct il_priv *il)
  1986. {
  1987. mutex_lock(&il->mutex);
  1988. __il3945_down(il);
  1989. mutex_unlock(&il->mutex);
  1990. il3945_cancel_deferred_work(il);
  1991. }
  1992. #define MAX_HW_RESTARTS 5
  1993. static int il3945_alloc_bcast_station(struct il_priv *il)
  1994. {
  1995. struct il_rxon_context *ctx = &il->ctx;
  1996. unsigned long flags;
  1997. u8 sta_id;
  1998. spin_lock_irqsave(&il->sta_lock, flags);
  1999. sta_id = il_prep_station(il, ctx,
  2000. il_bcast_addr, false, NULL);
  2001. if (sta_id == IL_INVALID_STATION) {
  2002. IL_ERR("Unable to prepare broadcast station\n");
  2003. spin_unlock_irqrestore(&il->sta_lock, flags);
  2004. return -EINVAL;
  2005. }
  2006. il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE;
  2007. il->stations[sta_id].used |= IL_STA_BCAST;
  2008. spin_unlock_irqrestore(&il->sta_lock, flags);
  2009. return 0;
  2010. }
  2011. static int __il3945_up(struct il_priv *il)
  2012. {
  2013. int rc, i;
  2014. rc = il3945_alloc_bcast_station(il);
  2015. if (rc)
  2016. return rc;
  2017. if (test_bit(STATUS_EXIT_PENDING, &il->status)) {
  2018. IL_WARN("Exit pending; will not bring the NIC up\n");
  2019. return -EIO;
  2020. }
  2021. if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) {
  2022. IL_ERR("ucode not available for device bring up\n");
  2023. return -EIO;
  2024. }
  2025. /* If platform's RF_KILL switch is NOT set to KILL */
  2026. if (_il_rd(il, CSR_GP_CNTRL) &
  2027. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2028. clear_bit(STATUS_RF_KILL_HW, &il->status);
  2029. else {
  2030. set_bit(STATUS_RF_KILL_HW, &il->status);
  2031. IL_WARN("Radio disabled by HW RF Kill switch\n");
  2032. return -ENODEV;
  2033. }
  2034. _il_wr(il, CSR_INT, 0xFFFFFFFF);
  2035. rc = il3945_hw_nic_init(il);
  2036. if (rc) {
  2037. IL_ERR("Unable to int nic\n");
  2038. return rc;
  2039. }
  2040. /* make sure rfkill handshake bits are cleared */
  2041. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2042. _il_wr(il, CSR_UCODE_DRV_GP1_CLR,
  2043. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2044. /* clear (again), then enable host interrupts */
  2045. _il_wr(il, CSR_INT, 0xFFFFFFFF);
  2046. il_enable_interrupts(il);
  2047. /* really make sure rfkill handshake bits are cleared */
  2048. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2049. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2050. /* Copy original ucode data image from disk into backup cache.
  2051. * This will be used to initialize the on-board processor's
  2052. * data SRAM for a clean start when the runtime program first loads. */
  2053. memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr,
  2054. il->ucode_data.len);
  2055. /* We return success when we resume from suspend and rf_kill is on. */
  2056. if (test_bit(STATUS_RF_KILL_HW, &il->status))
  2057. return 0;
  2058. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2059. /* load bootstrap state machine,
  2060. * load bootstrap program into processor's memory,
  2061. * prepare to load the "initialize" uCode */
  2062. rc = il->cfg->ops->lib->load_ucode(il);
  2063. if (rc) {
  2064. IL_ERR(
  2065. "Unable to set up bootstrap uCode: %d\n", rc);
  2066. continue;
  2067. }
  2068. /* start card; "initialize" will load runtime ucode */
  2069. il3945_nic_start(il);
  2070. D_INFO(DRV_NAME " is coming up\n");
  2071. return 0;
  2072. }
  2073. set_bit(STATUS_EXIT_PENDING, &il->status);
  2074. __il3945_down(il);
  2075. clear_bit(STATUS_EXIT_PENDING, &il->status);
  2076. /* tried to restart and config the device for as long as our
  2077. * patience could withstand */
  2078. IL_ERR("Unable to initialize device after %d attempts.\n", i);
  2079. return -EIO;
  2080. }
  2081. /*****************************************************************************
  2082. *
  2083. * Workqueue callbacks
  2084. *
  2085. *****************************************************************************/
  2086. static void il3945_bg_init_alive_start(struct work_struct *data)
  2087. {
  2088. struct il_priv *il =
  2089. container_of(data, struct il_priv, init_alive_start.work);
  2090. mutex_lock(&il->mutex);
  2091. if (test_bit(STATUS_EXIT_PENDING, &il->status))
  2092. goto out;
  2093. il3945_init_alive_start(il);
  2094. out:
  2095. mutex_unlock(&il->mutex);
  2096. }
  2097. static void il3945_bg_alive_start(struct work_struct *data)
  2098. {
  2099. struct il_priv *il =
  2100. container_of(data, struct il_priv, alive_start.work);
  2101. mutex_lock(&il->mutex);
  2102. if (test_bit(STATUS_EXIT_PENDING, &il->status))
  2103. goto out;
  2104. il3945_alive_start(il);
  2105. out:
  2106. mutex_unlock(&il->mutex);
  2107. }
  2108. /*
  2109. * 3945 cannot interrupt driver when hardware rf kill switch toggles;
  2110. * driver must poll CSR_GP_CNTRL_REG register for change. This register
  2111. * *is* readable even when device has been SW_RESET into low power mode
  2112. * (e.g. during RF KILL).
  2113. */
  2114. static void il3945_rfkill_poll(struct work_struct *data)
  2115. {
  2116. struct il_priv *il =
  2117. container_of(data, struct il_priv, _3945.rfkill_poll.work);
  2118. bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &il->status);
  2119. bool new_rfkill = !(_il_rd(il, CSR_GP_CNTRL)
  2120. & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
  2121. if (new_rfkill != old_rfkill) {
  2122. if (new_rfkill)
  2123. set_bit(STATUS_RF_KILL_HW, &il->status);
  2124. else
  2125. clear_bit(STATUS_RF_KILL_HW, &il->status);
  2126. wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill);
  2127. D_RF_KILL("RF_KILL bit toggled to %s.\n",
  2128. new_rfkill ? "disable radio" : "enable radio");
  2129. }
  2130. /* Keep this running, even if radio now enabled. This will be
  2131. * cancelled in mac_start() if system decides to start again */
  2132. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
  2133. round_jiffies_relative(2 * HZ));
  2134. }
  2135. int il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
  2136. {
  2137. struct il_host_cmd cmd = {
  2138. .id = REPLY_SCAN_CMD,
  2139. .len = sizeof(struct il3945_scan_cmd),
  2140. .flags = CMD_SIZE_HUGE,
  2141. };
  2142. struct il3945_scan_cmd *scan;
  2143. u8 n_probes = 0;
  2144. enum ieee80211_band band;
  2145. bool is_active = false;
  2146. int ret;
  2147. u16 len;
  2148. lockdep_assert_held(&il->mutex);
  2149. if (!il->scan_cmd) {
  2150. il->scan_cmd = kmalloc(sizeof(struct il3945_scan_cmd) +
  2151. IL_MAX_SCAN_SIZE, GFP_KERNEL);
  2152. if (!il->scan_cmd) {
  2153. D_SCAN("Fail to allocate scan memory\n");
  2154. return -ENOMEM;
  2155. }
  2156. }
  2157. scan = il->scan_cmd;
  2158. memset(scan, 0, sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE);
  2159. scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH;
  2160. scan->quiet_time = IL_ACTIVE_QUIET_TIME;
  2161. if (il_is_associated(il)) {
  2162. u16 interval;
  2163. u32 extra;
  2164. u32 suspend_time = 100;
  2165. u32 scan_suspend_time = 100;
  2166. D_INFO("Scanning while associated...\n");
  2167. interval = vif->bss_conf.beacon_int;
  2168. scan->suspend_time = 0;
  2169. scan->max_out_time = cpu_to_le32(200 * 1024);
  2170. if (!interval)
  2171. interval = suspend_time;
  2172. /*
  2173. * suspend time format:
  2174. * 0-19: beacon interval in usec (time before exec.)
  2175. * 20-23: 0
  2176. * 24-31: number of beacons (suspend between channels)
  2177. */
  2178. extra = (suspend_time / interval) << 24;
  2179. scan_suspend_time = 0xFF0FFFFF &
  2180. (extra | ((suspend_time % interval) * 1024));
  2181. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2182. D_SCAN("suspend_time 0x%X beacon interval %d\n",
  2183. scan_suspend_time, interval);
  2184. }
  2185. if (il->scan_request->n_ssids) {
  2186. int i, p = 0;
  2187. D_SCAN("Kicking off active scan\n");
  2188. for (i = 0; i < il->scan_request->n_ssids; i++) {
  2189. /* always does wildcard anyway */
  2190. if (!il->scan_request->ssids[i].ssid_len)
  2191. continue;
  2192. scan->direct_scan[p].id = WLAN_EID_SSID;
  2193. scan->direct_scan[p].len =
  2194. il->scan_request->ssids[i].ssid_len;
  2195. memcpy(scan->direct_scan[p].ssid,
  2196. il->scan_request->ssids[i].ssid,
  2197. il->scan_request->ssids[i].ssid_len);
  2198. n_probes++;
  2199. p++;
  2200. }
  2201. is_active = true;
  2202. } else
  2203. D_SCAN("Kicking off passive scan.\n");
  2204. /* We don't build a direct scan probe request; the uCode will do
  2205. * that based on the direct_mask added to each channel entry */
  2206. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2207. scan->tx_cmd.sta_id = il->ctx.bcast_sta_id;
  2208. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2209. /* flags + rate selection */
  2210. switch (il->scan_band) {
  2211. case IEEE80211_BAND_2GHZ:
  2212. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2213. scan->tx_cmd.rate = IL_RATE_1M_PLCP;
  2214. band = IEEE80211_BAND_2GHZ;
  2215. break;
  2216. case IEEE80211_BAND_5GHZ:
  2217. scan->tx_cmd.rate = IL_RATE_6M_PLCP;
  2218. band = IEEE80211_BAND_5GHZ;
  2219. break;
  2220. default:
  2221. IL_WARN("Invalid scan band\n");
  2222. return -EIO;
  2223. }
  2224. /*
  2225. * If active scaning is requested but a certain channel
  2226. * is marked passive, we can do active scanning if we
  2227. * detect transmissions.
  2228. */
  2229. scan->good_CRC_th = is_active ? IL_GOOD_CRC_TH_DEFAULT :
  2230. IL_GOOD_CRC_TH_DISABLED;
  2231. len = il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data,
  2232. vif->addr, il->scan_request->ie,
  2233. il->scan_request->ie_len,
  2234. IL_MAX_SCAN_SIZE - sizeof(*scan));
  2235. scan->tx_cmd.len = cpu_to_le16(len);
  2236. /* select Rx antennas */
  2237. scan->flags |= il3945_get_antenna_flags(il);
  2238. scan->channel_count = il3945_get_channels_for_scan(il, band, is_active, n_probes,
  2239. (void *)&scan->data[len], vif);
  2240. if (scan->channel_count == 0) {
  2241. D_SCAN("channel count %d\n", scan->channel_count);
  2242. return -EIO;
  2243. }
  2244. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  2245. scan->channel_count * sizeof(struct il3945_scan_channel);
  2246. cmd.data = scan;
  2247. scan->len = cpu_to_le16(cmd.len);
  2248. set_bit(STATUS_SCAN_HW, &il->status);
  2249. ret = il_send_cmd_sync(il, &cmd);
  2250. if (ret)
  2251. clear_bit(STATUS_SCAN_HW, &il->status);
  2252. return ret;
  2253. }
  2254. void il3945_post_scan(struct il_priv *il)
  2255. {
  2256. struct il_rxon_context *ctx = &il->ctx;
  2257. /*
  2258. * Since setting the RXON may have been deferred while
  2259. * performing the scan, fire one off if needed
  2260. */
  2261. if (memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging)))
  2262. il3945_commit_rxon(il, ctx);
  2263. }
  2264. static void il3945_bg_restart(struct work_struct *data)
  2265. {
  2266. struct il_priv *il = container_of(data, struct il_priv, restart);
  2267. if (test_bit(STATUS_EXIT_PENDING, &il->status))
  2268. return;
  2269. if (test_and_clear_bit(STATUS_FW_ERROR, &il->status)) {
  2270. struct il_rxon_context *ctx;
  2271. mutex_lock(&il->mutex);
  2272. for_each_context(il, ctx)
  2273. ctx->vif = NULL;
  2274. il->is_open = 0;
  2275. mutex_unlock(&il->mutex);
  2276. il3945_down(il);
  2277. ieee80211_restart_hw(il->hw);
  2278. } else {
  2279. il3945_down(il);
  2280. mutex_lock(&il->mutex);
  2281. if (test_bit(STATUS_EXIT_PENDING, &il->status)) {
  2282. mutex_unlock(&il->mutex);
  2283. return;
  2284. }
  2285. __il3945_up(il);
  2286. mutex_unlock(&il->mutex);
  2287. }
  2288. }
  2289. static void il3945_bg_rx_replenish(struct work_struct *data)
  2290. {
  2291. struct il_priv *il =
  2292. container_of(data, struct il_priv, rx_replenish);
  2293. mutex_lock(&il->mutex);
  2294. if (test_bit(STATUS_EXIT_PENDING, &il->status))
  2295. goto out;
  2296. il3945_rx_replenish(il);
  2297. out:
  2298. mutex_unlock(&il->mutex);
  2299. }
  2300. void il3945_post_associate(struct il_priv *il)
  2301. {
  2302. int rc = 0;
  2303. struct ieee80211_conf *conf = NULL;
  2304. struct il_rxon_context *ctx = &il->ctx;
  2305. if (!ctx->vif || !il->is_open)
  2306. return;
  2307. D_ASSOC("Associated as %d to: %pM\n",
  2308. ctx->vif->bss_conf.aid, ctx->active.bssid_addr);
  2309. if (test_bit(STATUS_EXIT_PENDING, &il->status))
  2310. return;
  2311. il_scan_cancel_timeout(il, 200);
  2312. conf = il_ieee80211_get_hw_conf(il->hw);
  2313. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2314. il3945_commit_rxon(il, ctx);
  2315. rc = il_send_rxon_timing(il, ctx);
  2316. if (rc)
  2317. IL_WARN("REPLY_RXON_TIMING failed - "
  2318. "Attempting to continue.\n");
  2319. ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2320. ctx->staging.assoc_id = cpu_to_le16(ctx->vif->bss_conf.aid);
  2321. D_ASSOC("assoc id %d beacon interval %d\n",
  2322. ctx->vif->bss_conf.aid, ctx->vif->bss_conf.beacon_int);
  2323. if (ctx->vif->bss_conf.use_short_preamble)
  2324. ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2325. else
  2326. ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2327. if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
  2328. if (ctx->vif->bss_conf.use_short_slot)
  2329. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2330. else
  2331. ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2332. }
  2333. il3945_commit_rxon(il, ctx);
  2334. switch (ctx->vif->type) {
  2335. case NL80211_IFTYPE_STATION:
  2336. il3945_rate_scale_init(il->hw, IL_AP_ID);
  2337. break;
  2338. case NL80211_IFTYPE_ADHOC:
  2339. il3945_send_beacon_cmd(il);
  2340. break;
  2341. default:
  2342. IL_ERR("%s Should not be called in %d mode\n",
  2343. __func__, ctx->vif->type);
  2344. break;
  2345. }
  2346. }
  2347. /*****************************************************************************
  2348. *
  2349. * mac80211 entry point functions
  2350. *
  2351. *****************************************************************************/
  2352. #define UCODE_READY_TIMEOUT (2 * HZ)
  2353. static int il3945_mac_start(struct ieee80211_hw *hw)
  2354. {
  2355. struct il_priv *il = hw->priv;
  2356. int ret;
  2357. D_MAC80211("enter\n");
  2358. /* we should be verifying the device is ready to be opened */
  2359. mutex_lock(&il->mutex);
  2360. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2361. * ucode filename and max sizes are card-specific. */
  2362. if (!il->ucode_code.len) {
  2363. ret = il3945_read_ucode(il);
  2364. if (ret) {
  2365. IL_ERR("Could not read microcode: %d\n", ret);
  2366. mutex_unlock(&il->mutex);
  2367. goto out_release_irq;
  2368. }
  2369. }
  2370. ret = __il3945_up(il);
  2371. mutex_unlock(&il->mutex);
  2372. if (ret)
  2373. goto out_release_irq;
  2374. D_INFO("Start UP work.\n");
  2375. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2376. * mac80211 will not be run successfully. */
  2377. ret = wait_event_timeout(il->wait_command_queue,
  2378. test_bit(STATUS_READY, &il->status),
  2379. UCODE_READY_TIMEOUT);
  2380. if (!ret) {
  2381. if (!test_bit(STATUS_READY, &il->status)) {
  2382. IL_ERR(
  2383. "Wait for START_ALIVE timeout after %dms.\n",
  2384. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2385. ret = -ETIMEDOUT;
  2386. goto out_release_irq;
  2387. }
  2388. }
  2389. /* ucode is running and will send rfkill notifications,
  2390. * no need to poll the killswitch state anymore */
  2391. cancel_delayed_work(&il->_3945.rfkill_poll);
  2392. il->is_open = 1;
  2393. D_MAC80211("leave\n");
  2394. return 0;
  2395. out_release_irq:
  2396. il->is_open = 0;
  2397. D_MAC80211("leave - failed\n");
  2398. return ret;
  2399. }
  2400. static void il3945_mac_stop(struct ieee80211_hw *hw)
  2401. {
  2402. struct il_priv *il = hw->priv;
  2403. D_MAC80211("enter\n");
  2404. if (!il->is_open) {
  2405. D_MAC80211("leave - skip\n");
  2406. return;
  2407. }
  2408. il->is_open = 0;
  2409. il3945_down(il);
  2410. flush_workqueue(il->workqueue);
  2411. /* start polling the killswitch state again */
  2412. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
  2413. round_jiffies_relative(2 * HZ));
  2414. D_MAC80211("leave\n");
  2415. }
  2416. static void il3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2417. {
  2418. struct il_priv *il = hw->priv;
  2419. D_MAC80211("enter\n");
  2420. D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2421. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2422. if (il3945_tx_skb(il, skb))
  2423. dev_kfree_skb_any(skb);
  2424. D_MAC80211("leave\n");
  2425. }
  2426. void il3945_config_ap(struct il_priv *il)
  2427. {
  2428. struct il_rxon_context *ctx = &il->ctx;
  2429. struct ieee80211_vif *vif = ctx->vif;
  2430. int rc = 0;
  2431. if (test_bit(STATUS_EXIT_PENDING, &il->status))
  2432. return;
  2433. /* The following should be done only at AP bring up */
  2434. if (!(il_is_associated(il))) {
  2435. /* RXON - unassoc (to set timing command) */
  2436. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2437. il3945_commit_rxon(il, ctx);
  2438. /* RXON Timing */
  2439. rc = il_send_rxon_timing(il, ctx);
  2440. if (rc)
  2441. IL_WARN("REPLY_RXON_TIMING failed - "
  2442. "Attempting to continue.\n");
  2443. ctx->staging.assoc_id = 0;
  2444. if (vif->bss_conf.use_short_preamble)
  2445. ctx->staging.flags |=
  2446. RXON_FLG_SHORT_PREAMBLE_MSK;
  2447. else
  2448. ctx->staging.flags &=
  2449. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2450. if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
  2451. if (vif->bss_conf.use_short_slot)
  2452. ctx->staging.flags |=
  2453. RXON_FLG_SHORT_SLOT_MSK;
  2454. else
  2455. ctx->staging.flags &=
  2456. ~RXON_FLG_SHORT_SLOT_MSK;
  2457. }
  2458. /* restore RXON assoc */
  2459. ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2460. il3945_commit_rxon(il, ctx);
  2461. }
  2462. il3945_send_beacon_cmd(il);
  2463. }
  2464. static int il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2465. struct ieee80211_vif *vif,
  2466. struct ieee80211_sta *sta,
  2467. struct ieee80211_key_conf *key)
  2468. {
  2469. struct il_priv *il = hw->priv;
  2470. int ret = 0;
  2471. u8 sta_id = IL_INVALID_STATION;
  2472. u8 static_key;
  2473. D_MAC80211("enter\n");
  2474. if (il3945_mod_params.sw_crypto) {
  2475. D_MAC80211("leave - hwcrypto disabled\n");
  2476. return -EOPNOTSUPP;
  2477. }
  2478. /*
  2479. * To support IBSS RSN, don't program group keys in IBSS, the
  2480. * hardware will then not attempt to decrypt the frames.
  2481. */
  2482. if (vif->type == NL80211_IFTYPE_ADHOC &&
  2483. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
  2484. return -EOPNOTSUPP;
  2485. static_key = !il_is_associated(il);
  2486. if (!static_key) {
  2487. sta_id = il_sta_id_or_broadcast(
  2488. il, &il->ctx, sta);
  2489. if (sta_id == IL_INVALID_STATION)
  2490. return -EINVAL;
  2491. }
  2492. mutex_lock(&il->mutex);
  2493. il_scan_cancel_timeout(il, 100);
  2494. switch (cmd) {
  2495. case SET_KEY:
  2496. if (static_key)
  2497. ret = il3945_set_static_key(il, key);
  2498. else
  2499. ret = il3945_set_dynamic_key(il, key, sta_id);
  2500. D_MAC80211("enable hwcrypto key\n");
  2501. break;
  2502. case DISABLE_KEY:
  2503. if (static_key)
  2504. ret = il3945_remove_static_key(il);
  2505. else
  2506. ret = il3945_clear_sta_key_info(il, sta_id);
  2507. D_MAC80211("disable hwcrypto key\n");
  2508. break;
  2509. default:
  2510. ret = -EINVAL;
  2511. }
  2512. mutex_unlock(&il->mutex);
  2513. D_MAC80211("leave\n");
  2514. return ret;
  2515. }
  2516. static int il3945_mac_sta_add(struct ieee80211_hw *hw,
  2517. struct ieee80211_vif *vif,
  2518. struct ieee80211_sta *sta)
  2519. {
  2520. struct il_priv *il = hw->priv;
  2521. struct il3945_sta_priv *sta_priv = (void *)sta->drv_priv;
  2522. int ret;
  2523. bool is_ap = vif->type == NL80211_IFTYPE_STATION;
  2524. u8 sta_id;
  2525. D_INFO("received request to add station %pM\n",
  2526. sta->addr);
  2527. mutex_lock(&il->mutex);
  2528. D_INFO("proceeding to add station %pM\n",
  2529. sta->addr);
  2530. sta_priv->common.sta_id = IL_INVALID_STATION;
  2531. ret = il_add_station_common(il,
  2532. &il->ctx,
  2533. sta->addr, is_ap, sta, &sta_id);
  2534. if (ret) {
  2535. IL_ERR("Unable to add station %pM (%d)\n",
  2536. sta->addr, ret);
  2537. /* Should we return success if return code is EEXIST ? */
  2538. mutex_unlock(&il->mutex);
  2539. return ret;
  2540. }
  2541. sta_priv->common.sta_id = sta_id;
  2542. /* Initialize rate scaling */
  2543. D_INFO("Initializing rate scaling for station %pM\n",
  2544. sta->addr);
  2545. il3945_rs_rate_init(il, sta, sta_id);
  2546. mutex_unlock(&il->mutex);
  2547. return 0;
  2548. }
  2549. static void il3945_configure_filter(struct ieee80211_hw *hw,
  2550. unsigned int changed_flags,
  2551. unsigned int *total_flags,
  2552. u64 multicast)
  2553. {
  2554. struct il_priv *il = hw->priv;
  2555. __le32 filter_or = 0, filter_nand = 0;
  2556. struct il_rxon_context *ctx = &il->ctx;
  2557. #define CHK(test, flag) do { \
  2558. if (*total_flags & (test)) \
  2559. filter_or |= (flag); \
  2560. else \
  2561. filter_nand |= (flag); \
  2562. } while (0)
  2563. D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n",
  2564. changed_flags, *total_flags);
  2565. CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
  2566. CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
  2567. CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
  2568. #undef CHK
  2569. mutex_lock(&il->mutex);
  2570. ctx->staging.filter_flags &= ~filter_nand;
  2571. ctx->staging.filter_flags |= filter_or;
  2572. /*
  2573. * Not committing directly because hardware can perform a scan,
  2574. * but even if hw is ready, committing here breaks for some reason,
  2575. * we'll eventually commit the filter flags change anyway.
  2576. */
  2577. mutex_unlock(&il->mutex);
  2578. /*
  2579. * Receiving all multicast frames is always enabled by the
  2580. * default flags setup in il_connection_init_rx_config()
  2581. * since we currently do not support programming multicast
  2582. * filters into the device.
  2583. */
  2584. *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  2585. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  2586. }
  2587. /*****************************************************************************
  2588. *
  2589. * sysfs attributes
  2590. *
  2591. *****************************************************************************/
  2592. #ifdef CONFIG_IWLEGACY_DEBUG
  2593. /*
  2594. * The following adds a new attribute to the sysfs representation
  2595. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2596. * used for controlling the debug level.
  2597. *
  2598. * See the level definitions in iwl for details.
  2599. *
  2600. * The debug_level being managed using sysfs below is a per device debug
  2601. * level that is used instead of the global debug level if it (the per
  2602. * device debug level) is set.
  2603. */
  2604. static ssize_t il3945_show_debug_level(struct device *d,
  2605. struct device_attribute *attr, char *buf)
  2606. {
  2607. struct il_priv *il = dev_get_drvdata(d);
  2608. return sprintf(buf, "0x%08X\n", il_get_debug_level(il));
  2609. }
  2610. static ssize_t il3945_store_debug_level(struct device *d,
  2611. struct device_attribute *attr,
  2612. const char *buf, size_t count)
  2613. {
  2614. struct il_priv *il = dev_get_drvdata(d);
  2615. unsigned long val;
  2616. int ret;
  2617. ret = strict_strtoul(buf, 0, &val);
  2618. if (ret)
  2619. IL_INFO("%s is not in hex or decimal form.\n", buf);
  2620. else {
  2621. il->debug_level = val;
  2622. if (il_alloc_traffic_mem(il))
  2623. IL_ERR(
  2624. "Not enough memory to generate traffic log\n");
  2625. }
  2626. return strnlen(buf, count);
  2627. }
  2628. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  2629. il3945_show_debug_level, il3945_store_debug_level);
  2630. #endif /* CONFIG_IWLEGACY_DEBUG */
  2631. static ssize_t il3945_show_temperature(struct device *d,
  2632. struct device_attribute *attr, char *buf)
  2633. {
  2634. struct il_priv *il = dev_get_drvdata(d);
  2635. if (!il_is_alive(il))
  2636. return -EAGAIN;
  2637. return sprintf(buf, "%d\n", il3945_hw_get_temperature(il));
  2638. }
  2639. static DEVICE_ATTR(temperature, S_IRUGO, il3945_show_temperature, NULL);
  2640. static ssize_t il3945_show_tx_power(struct device *d,
  2641. struct device_attribute *attr, char *buf)
  2642. {
  2643. struct il_priv *il = dev_get_drvdata(d);
  2644. return sprintf(buf, "%d\n", il->tx_power_user_lmt);
  2645. }
  2646. static ssize_t il3945_store_tx_power(struct device *d,
  2647. struct device_attribute *attr,
  2648. const char *buf, size_t count)
  2649. {
  2650. struct il_priv *il = dev_get_drvdata(d);
  2651. char *p = (char *)buf;
  2652. u32 val;
  2653. val = simple_strtoul(p, &p, 10);
  2654. if (p == buf)
  2655. IL_INFO(": %s is not in decimal form.\n", buf);
  2656. else
  2657. il3945_hw_reg_set_txpower(il, val);
  2658. return count;
  2659. }
  2660. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, il3945_show_tx_power, il3945_store_tx_power);
  2661. static ssize_t il3945_show_flags(struct device *d,
  2662. struct device_attribute *attr, char *buf)
  2663. {
  2664. struct il_priv *il = dev_get_drvdata(d);
  2665. struct il_rxon_context *ctx = &il->ctx;
  2666. return sprintf(buf, "0x%04X\n", ctx->active.flags);
  2667. }
  2668. static ssize_t il3945_store_flags(struct device *d,
  2669. struct device_attribute *attr,
  2670. const char *buf, size_t count)
  2671. {
  2672. struct il_priv *il = dev_get_drvdata(d);
  2673. u32 flags = simple_strtoul(buf, NULL, 0);
  2674. struct il_rxon_context *ctx = &il->ctx;
  2675. mutex_lock(&il->mutex);
  2676. if (le32_to_cpu(ctx->staging.flags) != flags) {
  2677. /* Cancel any currently running scans... */
  2678. if (il_scan_cancel_timeout(il, 100))
  2679. IL_WARN("Could not cancel scan.\n");
  2680. else {
  2681. D_INFO("Committing rxon.flags = 0x%04X\n",
  2682. flags);
  2683. ctx->staging.flags = cpu_to_le32(flags);
  2684. il3945_commit_rxon(il, ctx);
  2685. }
  2686. }
  2687. mutex_unlock(&il->mutex);
  2688. return count;
  2689. }
  2690. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, il3945_show_flags, il3945_store_flags);
  2691. static ssize_t il3945_show_filter_flags(struct device *d,
  2692. struct device_attribute *attr, char *buf)
  2693. {
  2694. struct il_priv *il = dev_get_drvdata(d);
  2695. struct il_rxon_context *ctx = &il->ctx;
  2696. return sprintf(buf, "0x%04X\n",
  2697. le32_to_cpu(ctx->active.filter_flags));
  2698. }
  2699. static ssize_t il3945_store_filter_flags(struct device *d,
  2700. struct device_attribute *attr,
  2701. const char *buf, size_t count)
  2702. {
  2703. struct il_priv *il = dev_get_drvdata(d);
  2704. struct il_rxon_context *ctx = &il->ctx;
  2705. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2706. mutex_lock(&il->mutex);
  2707. if (le32_to_cpu(ctx->staging.filter_flags) != filter_flags) {
  2708. /* Cancel any currently running scans... */
  2709. if (il_scan_cancel_timeout(il, 100))
  2710. IL_WARN("Could not cancel scan.\n");
  2711. else {
  2712. D_INFO("Committing rxon.filter_flags = "
  2713. "0x%04X\n", filter_flags);
  2714. ctx->staging.filter_flags =
  2715. cpu_to_le32(filter_flags);
  2716. il3945_commit_rxon(il, ctx);
  2717. }
  2718. }
  2719. mutex_unlock(&il->mutex);
  2720. return count;
  2721. }
  2722. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, il3945_show_filter_flags,
  2723. il3945_store_filter_flags);
  2724. static ssize_t il3945_show_measurement(struct device *d,
  2725. struct device_attribute *attr, char *buf)
  2726. {
  2727. struct il_priv *il = dev_get_drvdata(d);
  2728. struct il_spectrum_notification measure_report;
  2729. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2730. u8 *data = (u8 *)&measure_report;
  2731. unsigned long flags;
  2732. spin_lock_irqsave(&il->lock, flags);
  2733. if (!(il->measurement_status & MEASUREMENT_READY)) {
  2734. spin_unlock_irqrestore(&il->lock, flags);
  2735. return 0;
  2736. }
  2737. memcpy(&measure_report, &il->measure_report, size);
  2738. il->measurement_status = 0;
  2739. spin_unlock_irqrestore(&il->lock, flags);
  2740. while (size && PAGE_SIZE - len) {
  2741. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2742. PAGE_SIZE - len, 1);
  2743. len = strlen(buf);
  2744. if (PAGE_SIZE - len)
  2745. buf[len++] = '\n';
  2746. ofs += 16;
  2747. size -= min(size, 16U);
  2748. }
  2749. return len;
  2750. }
  2751. static ssize_t il3945_store_measurement(struct device *d,
  2752. struct device_attribute *attr,
  2753. const char *buf, size_t count)
  2754. {
  2755. struct il_priv *il = dev_get_drvdata(d);
  2756. struct il_rxon_context *ctx = &il->ctx;
  2757. struct ieee80211_measurement_params params = {
  2758. .channel = le16_to_cpu(ctx->active.channel),
  2759. .start_time = cpu_to_le64(il->_3945.last_tsf),
  2760. .duration = cpu_to_le16(1),
  2761. };
  2762. u8 type = IL_MEASURE_BASIC;
  2763. u8 buffer[32];
  2764. u8 channel;
  2765. if (count) {
  2766. char *p = buffer;
  2767. strncpy(buffer, buf, min(sizeof(buffer), count));
  2768. channel = simple_strtoul(p, NULL, 0);
  2769. if (channel)
  2770. params.channel = channel;
  2771. p = buffer;
  2772. while (*p && *p != ' ')
  2773. p++;
  2774. if (*p)
  2775. type = simple_strtoul(p + 1, NULL, 0);
  2776. }
  2777. D_INFO("Invoking measurement of type %d on "
  2778. "channel %d (for '%s')\n", type, params.channel, buf);
  2779. il3945_get_measurement(il, &params, type);
  2780. return count;
  2781. }
  2782. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  2783. il3945_show_measurement, il3945_store_measurement);
  2784. static ssize_t il3945_store_retry_rate(struct device *d,
  2785. struct device_attribute *attr,
  2786. const char *buf, size_t count)
  2787. {
  2788. struct il_priv *il = dev_get_drvdata(d);
  2789. il->retry_rate = simple_strtoul(buf, NULL, 0);
  2790. if (il->retry_rate <= 0)
  2791. il->retry_rate = 1;
  2792. return count;
  2793. }
  2794. static ssize_t il3945_show_retry_rate(struct device *d,
  2795. struct device_attribute *attr, char *buf)
  2796. {
  2797. struct il_priv *il = dev_get_drvdata(d);
  2798. return sprintf(buf, "%d", il->retry_rate);
  2799. }
  2800. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, il3945_show_retry_rate,
  2801. il3945_store_retry_rate);
  2802. static ssize_t il3945_show_channels(struct device *d,
  2803. struct device_attribute *attr, char *buf)
  2804. {
  2805. /* all this shit doesn't belong into sysfs anyway */
  2806. return 0;
  2807. }
  2808. static DEVICE_ATTR(channels, S_IRUSR, il3945_show_channels, NULL);
  2809. static ssize_t il3945_show_antenna(struct device *d,
  2810. struct device_attribute *attr, char *buf)
  2811. {
  2812. struct il_priv *il = dev_get_drvdata(d);
  2813. if (!il_is_alive(il))
  2814. return -EAGAIN;
  2815. return sprintf(buf, "%d\n", il3945_mod_params.antenna);
  2816. }
  2817. static ssize_t il3945_store_antenna(struct device *d,
  2818. struct device_attribute *attr,
  2819. const char *buf, size_t count)
  2820. {
  2821. struct il_priv *il __maybe_unused = dev_get_drvdata(d);
  2822. int ant;
  2823. if (count == 0)
  2824. return 0;
  2825. if (sscanf(buf, "%1i", &ant) != 1) {
  2826. D_INFO("not in hex or decimal form.\n");
  2827. return count;
  2828. }
  2829. if (ant >= 0 && ant <= 2) {
  2830. D_INFO("Setting antenna select to %d.\n", ant);
  2831. il3945_mod_params.antenna = (enum il3945_antenna)ant;
  2832. } else
  2833. D_INFO("Bad antenna select value %d.\n", ant);
  2834. return count;
  2835. }
  2836. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, il3945_show_antenna, il3945_store_antenna);
  2837. static ssize_t il3945_show_status(struct device *d,
  2838. struct device_attribute *attr, char *buf)
  2839. {
  2840. struct il_priv *il = dev_get_drvdata(d);
  2841. if (!il_is_alive(il))
  2842. return -EAGAIN;
  2843. return sprintf(buf, "0x%08x\n", (int)il->status);
  2844. }
  2845. static DEVICE_ATTR(status, S_IRUGO, il3945_show_status, NULL);
  2846. static ssize_t il3945_dump_error_log(struct device *d,
  2847. struct device_attribute *attr,
  2848. const char *buf, size_t count)
  2849. {
  2850. struct il_priv *il = dev_get_drvdata(d);
  2851. char *p = (char *)buf;
  2852. if (p[0] == '1')
  2853. il3945_dump_nic_error_log(il);
  2854. return strnlen(buf, count);
  2855. }
  2856. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, il3945_dump_error_log);
  2857. /*****************************************************************************
  2858. *
  2859. * driver setup and tear down
  2860. *
  2861. *****************************************************************************/
  2862. static void il3945_setup_deferred_work(struct il_priv *il)
  2863. {
  2864. il->workqueue = create_singlethread_workqueue(DRV_NAME);
  2865. init_waitqueue_head(&il->wait_command_queue);
  2866. INIT_WORK(&il->restart, il3945_bg_restart);
  2867. INIT_WORK(&il->rx_replenish, il3945_bg_rx_replenish);
  2868. INIT_DELAYED_WORK(&il->init_alive_start, il3945_bg_init_alive_start);
  2869. INIT_DELAYED_WORK(&il->alive_start, il3945_bg_alive_start);
  2870. INIT_DELAYED_WORK(&il->_3945.rfkill_poll, il3945_rfkill_poll);
  2871. il_setup_scan_deferred_work(il);
  2872. il3945_hw_setup_deferred_work(il);
  2873. init_timer(&il->watchdog);
  2874. il->watchdog.data = (unsigned long)il;
  2875. il->watchdog.function = il_bg_watchdog;
  2876. tasklet_init(&il->irq_tasklet, (void (*)(unsigned long))
  2877. il3945_irq_tasklet, (unsigned long)il);
  2878. }
  2879. static void il3945_cancel_deferred_work(struct il_priv *il)
  2880. {
  2881. il3945_hw_cancel_deferred_work(il);
  2882. cancel_delayed_work_sync(&il->init_alive_start);
  2883. cancel_delayed_work(&il->alive_start);
  2884. il_cancel_scan_deferred_work(il);
  2885. }
  2886. static struct attribute *il3945_sysfs_entries[] = {
  2887. &dev_attr_antenna.attr,
  2888. &dev_attr_channels.attr,
  2889. &dev_attr_dump_errors.attr,
  2890. &dev_attr_flags.attr,
  2891. &dev_attr_filter_flags.attr,
  2892. &dev_attr_measurement.attr,
  2893. &dev_attr_retry_rate.attr,
  2894. &dev_attr_status.attr,
  2895. &dev_attr_temperature.attr,
  2896. &dev_attr_tx_power.attr,
  2897. #ifdef CONFIG_IWLEGACY_DEBUG
  2898. &dev_attr_debug_level.attr,
  2899. #endif
  2900. NULL
  2901. };
  2902. static struct attribute_group il3945_attribute_group = {
  2903. .name = NULL, /* put in device directory */
  2904. .attrs = il3945_sysfs_entries,
  2905. };
  2906. struct ieee80211_ops il3945_hw_ops = {
  2907. .tx = il3945_mac_tx,
  2908. .start = il3945_mac_start,
  2909. .stop = il3945_mac_stop,
  2910. .add_interface = il_mac_add_interface,
  2911. .remove_interface = il_mac_remove_interface,
  2912. .change_interface = il_mac_change_interface,
  2913. .config = il_mac_config,
  2914. .configure_filter = il3945_configure_filter,
  2915. .set_key = il3945_mac_set_key,
  2916. .conf_tx = il_mac_conf_tx,
  2917. .reset_tsf = il_mac_reset_tsf,
  2918. .bss_info_changed = il_mac_bss_info_changed,
  2919. .hw_scan = il_mac_hw_scan,
  2920. .sta_add = il3945_mac_sta_add,
  2921. .sta_remove = il_mac_sta_remove,
  2922. .tx_last_beacon = il_mac_tx_last_beacon,
  2923. };
  2924. static int il3945_init_drv(struct il_priv *il)
  2925. {
  2926. int ret;
  2927. struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
  2928. il->retry_rate = 1;
  2929. il->beacon_skb = NULL;
  2930. spin_lock_init(&il->sta_lock);
  2931. spin_lock_init(&il->hcmd_lock);
  2932. INIT_LIST_HEAD(&il->free_frames);
  2933. mutex_init(&il->mutex);
  2934. il->ieee_channels = NULL;
  2935. il->ieee_rates = NULL;
  2936. il->band = IEEE80211_BAND_2GHZ;
  2937. il->iw_mode = NL80211_IFTYPE_STATION;
  2938. il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF;
  2939. /* initialize force reset */
  2940. il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD;
  2941. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  2942. IL_WARN("Unsupported EEPROM version: 0x%04X\n",
  2943. eeprom->version);
  2944. ret = -EINVAL;
  2945. goto err;
  2946. }
  2947. ret = il_init_channel_map(il);
  2948. if (ret) {
  2949. IL_ERR("initializing regulatory failed: %d\n", ret);
  2950. goto err;
  2951. }
  2952. /* Set up txpower settings in driver for all channels */
  2953. if (il3945_txpower_set_from_eeprom(il)) {
  2954. ret = -EIO;
  2955. goto err_free_channel_map;
  2956. }
  2957. ret = il_init_geos(il);
  2958. if (ret) {
  2959. IL_ERR("initializing geos failed: %d\n", ret);
  2960. goto err_free_channel_map;
  2961. }
  2962. il3945_init_hw_rates(il, il->ieee_rates);
  2963. return 0;
  2964. err_free_channel_map:
  2965. il_free_channel_map(il);
  2966. err:
  2967. return ret;
  2968. }
  2969. #define IL3945_MAX_PROBE_REQUEST 200
  2970. static int il3945_setup_mac(struct il_priv *il)
  2971. {
  2972. int ret;
  2973. struct ieee80211_hw *hw = il->hw;
  2974. hw->rate_control_algorithm = "iwl-3945-rs";
  2975. hw->sta_data_size = sizeof(struct il3945_sta_priv);
  2976. hw->vif_data_size = sizeof(struct il_vif_priv);
  2977. /* Tell mac80211 our characteristics */
  2978. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  2979. IEEE80211_HW_SPECTRUM_MGMT;
  2980. hw->wiphy->interface_modes =
  2981. il->ctx.interface_modes;
  2982. hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
  2983. WIPHY_FLAG_DISABLE_BEACON_HINTS |
  2984. WIPHY_FLAG_IBSS_RSN;
  2985. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  2986. /* we create the 802.11 header and a zero-length SSID element */
  2987. hw->wiphy->max_scan_ie_len = IL3945_MAX_PROBE_REQUEST - 24 - 2;
  2988. /* Default value; 4 EDCA QOS priorities */
  2989. hw->queues = 4;
  2990. if (il->bands[IEEE80211_BAND_2GHZ].n_channels)
  2991. il->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  2992. &il->bands[IEEE80211_BAND_2GHZ];
  2993. if (il->bands[IEEE80211_BAND_5GHZ].n_channels)
  2994. il->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  2995. &il->bands[IEEE80211_BAND_5GHZ];
  2996. il_leds_init(il);
  2997. ret = ieee80211_register_hw(il->hw);
  2998. if (ret) {
  2999. IL_ERR("Failed to register hw (error %d)\n", ret);
  3000. return ret;
  3001. }
  3002. il->mac80211_registered = 1;
  3003. return 0;
  3004. }
  3005. static int il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3006. {
  3007. int err = 0;
  3008. struct il_priv *il;
  3009. struct ieee80211_hw *hw;
  3010. struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data);
  3011. struct il3945_eeprom *eeprom;
  3012. unsigned long flags;
  3013. /***********************
  3014. * 1. Allocating HW data
  3015. * ********************/
  3016. /* mac80211 allocates memory for this device instance, including
  3017. * space for this driver's ilate structure */
  3018. hw = il_alloc_all(cfg);
  3019. if (hw == NULL) {
  3020. pr_err("Can not allocate network device\n");
  3021. err = -ENOMEM;
  3022. goto out;
  3023. }
  3024. il = hw->priv;
  3025. SET_IEEE80211_DEV(hw, &pdev->dev);
  3026. il->cmd_queue = IL39_CMD_QUEUE_NUM;
  3027. il->ctx.ctxid = 0;
  3028. il->ctx.rxon_cmd = REPLY_RXON;
  3029. il->ctx.rxon_timing_cmd = REPLY_RXON_TIMING;
  3030. il->ctx.rxon_assoc_cmd = REPLY_RXON_ASSOC;
  3031. il->ctx.qos_cmd = REPLY_QOS_PARAM;
  3032. il->ctx.ap_sta_id = IL_AP_ID;
  3033. il->ctx.wep_key_cmd = REPLY_WEPKEY;
  3034. il->ctx.interface_modes =
  3035. BIT(NL80211_IFTYPE_STATION) |
  3036. BIT(NL80211_IFTYPE_ADHOC);
  3037. il->ctx.ibss_devtype = RXON_DEV_TYPE_IBSS;
  3038. il->ctx.station_devtype = RXON_DEV_TYPE_ESS;
  3039. il->ctx.unused_devtype = RXON_DEV_TYPE_ESS;
  3040. /*
  3041. * Disabling hardware scan means that mac80211 will perform scans
  3042. * "the hard way", rather than using device's scan.
  3043. */
  3044. if (il3945_mod_params.disable_hw_scan) {
  3045. D_INFO("Disabling hw_scan\n");
  3046. il3945_hw_ops.hw_scan = NULL;
  3047. }
  3048. D_INFO("*** LOAD DRIVER ***\n");
  3049. il->cfg = cfg;
  3050. il->pci_dev = pdev;
  3051. il->inta_mask = CSR_INI_SET_MASK;
  3052. if (il_alloc_traffic_mem(il))
  3053. IL_ERR("Not enough memory to generate traffic log\n");
  3054. /***************************
  3055. * 2. Initializing PCI bus
  3056. * *************************/
  3057. pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
  3058. PCIE_LINK_STATE_CLKPM);
  3059. if (pci_enable_device(pdev)) {
  3060. err = -ENODEV;
  3061. goto out_ieee80211_free_hw;
  3062. }
  3063. pci_set_master(pdev);
  3064. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3065. if (!err)
  3066. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3067. if (err) {
  3068. IL_WARN("No suitable DMA available.\n");
  3069. goto out_pci_disable_device;
  3070. }
  3071. pci_set_drvdata(pdev, il);
  3072. err = pci_request_regions(pdev, DRV_NAME);
  3073. if (err)
  3074. goto out_pci_disable_device;
  3075. /***********************
  3076. * 3. Read REV Register
  3077. * ********************/
  3078. il->hw_base = pci_iomap(pdev, 0, 0);
  3079. if (!il->hw_base) {
  3080. err = -ENODEV;
  3081. goto out_pci_release_regions;
  3082. }
  3083. D_INFO("pci_resource_len = 0x%08llx\n",
  3084. (unsigned long long) pci_resource_len(pdev, 0));
  3085. D_INFO("pci_resource_base = %p\n", il->hw_base);
  3086. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3087. * PCI Tx retries from interfering with C3 CPU state */
  3088. pci_write_config_byte(pdev, 0x41, 0x00);
  3089. /* these spin locks will be used in apm_ops.init and EEPROM access
  3090. * we should init now
  3091. */
  3092. spin_lock_init(&il->reg_lock);
  3093. spin_lock_init(&il->lock);
  3094. /*
  3095. * stop and reset the on-board processor just in case it is in a
  3096. * strange state ... like being left stranded by a primary kernel
  3097. * and this is now the kdump kernel trying to start up
  3098. */
  3099. _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  3100. /***********************
  3101. * 4. Read EEPROM
  3102. * ********************/
  3103. /* Read the EEPROM */
  3104. err = il_eeprom_init(il);
  3105. if (err) {
  3106. IL_ERR("Unable to init EEPROM\n");
  3107. goto out_iounmap;
  3108. }
  3109. /* MAC Address location in EEPROM same for 3945/4965 */
  3110. eeprom = (struct il3945_eeprom *)il->eeprom;
  3111. D_INFO("MAC address: %pM\n", eeprom->mac_address);
  3112. SET_IEEE80211_PERM_ADDR(il->hw, eeprom->mac_address);
  3113. /***********************
  3114. * 5. Setup HW Constants
  3115. * ********************/
  3116. /* Device-specific setup */
  3117. if (il3945_hw_set_hw_params(il)) {
  3118. IL_ERR("failed to set hw settings\n");
  3119. goto out_eeprom_free;
  3120. }
  3121. /***********************
  3122. * 6. Setup il
  3123. * ********************/
  3124. err = il3945_init_drv(il);
  3125. if (err) {
  3126. IL_ERR("initializing driver failed\n");
  3127. goto out_unset_hw_params;
  3128. }
  3129. IL_INFO("Detected Intel Wireless WiFi Link %s\n",
  3130. il->cfg->name);
  3131. /***********************
  3132. * 7. Setup Services
  3133. * ********************/
  3134. spin_lock_irqsave(&il->lock, flags);
  3135. il_disable_interrupts(il);
  3136. spin_unlock_irqrestore(&il->lock, flags);
  3137. pci_enable_msi(il->pci_dev);
  3138. err = request_irq(il->pci_dev->irq, il_isr,
  3139. IRQF_SHARED, DRV_NAME, il);
  3140. if (err) {
  3141. IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq);
  3142. goto out_disable_msi;
  3143. }
  3144. err = sysfs_create_group(&pdev->dev.kobj, &il3945_attribute_group);
  3145. if (err) {
  3146. IL_ERR("failed to create sysfs device attributes\n");
  3147. goto out_release_irq;
  3148. }
  3149. il_set_rxon_channel(il,
  3150. &il->bands[IEEE80211_BAND_2GHZ].channels[5],
  3151. &il->ctx);
  3152. il3945_setup_deferred_work(il);
  3153. il3945_setup_rx_handlers(il);
  3154. il_power_initialize(il);
  3155. /*********************************
  3156. * 8. Setup and Register mac80211
  3157. * *******************************/
  3158. il_enable_interrupts(il);
  3159. err = il3945_setup_mac(il);
  3160. if (err)
  3161. goto out_remove_sysfs;
  3162. err = il_dbgfs_register(il, DRV_NAME);
  3163. if (err)
  3164. IL_ERR("failed to create debugfs files. Ignoring error: %d\n", err);
  3165. /* Start monitoring the killswitch */
  3166. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
  3167. 2 * HZ);
  3168. return 0;
  3169. out_remove_sysfs:
  3170. destroy_workqueue(il->workqueue);
  3171. il->workqueue = NULL;
  3172. sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
  3173. out_release_irq:
  3174. free_irq(il->pci_dev->irq, il);
  3175. out_disable_msi:
  3176. pci_disable_msi(il->pci_dev);
  3177. il_free_geos(il);
  3178. il_free_channel_map(il);
  3179. out_unset_hw_params:
  3180. il3945_unset_hw_params(il);
  3181. out_eeprom_free:
  3182. il_eeprom_free(il);
  3183. out_iounmap:
  3184. pci_iounmap(pdev, il->hw_base);
  3185. out_pci_release_regions:
  3186. pci_release_regions(pdev);
  3187. out_pci_disable_device:
  3188. pci_set_drvdata(pdev, NULL);
  3189. pci_disable_device(pdev);
  3190. out_ieee80211_free_hw:
  3191. il_free_traffic_mem(il);
  3192. ieee80211_free_hw(il->hw);
  3193. out:
  3194. return err;
  3195. }
  3196. static void __devexit il3945_pci_remove(struct pci_dev *pdev)
  3197. {
  3198. struct il_priv *il = pci_get_drvdata(pdev);
  3199. unsigned long flags;
  3200. if (!il)
  3201. return;
  3202. D_INFO("*** UNLOAD DRIVER ***\n");
  3203. il_dbgfs_unregister(il);
  3204. set_bit(STATUS_EXIT_PENDING, &il->status);
  3205. il_leds_exit(il);
  3206. if (il->mac80211_registered) {
  3207. ieee80211_unregister_hw(il->hw);
  3208. il->mac80211_registered = 0;
  3209. } else {
  3210. il3945_down(il);
  3211. }
  3212. /*
  3213. * Make sure device is reset to low power before unloading driver.
  3214. * This may be redundant with il_down(), but there are paths to
  3215. * run il_down() without calling apm_ops.stop(), and there are
  3216. * paths to avoid running il_down() at all before leaving driver.
  3217. * This (inexpensive) call *makes sure* device is reset.
  3218. */
  3219. il_apm_stop(il);
  3220. /* make sure we flush any pending irq or
  3221. * tasklet for the driver
  3222. */
  3223. spin_lock_irqsave(&il->lock, flags);
  3224. il_disable_interrupts(il);
  3225. spin_unlock_irqrestore(&il->lock, flags);
  3226. il3945_synchronize_irq(il);
  3227. sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
  3228. cancel_delayed_work_sync(&il->_3945.rfkill_poll);
  3229. il3945_dealloc_ucode_pci(il);
  3230. if (il->rxq.bd)
  3231. il3945_rx_queue_free(il, &il->rxq);
  3232. il3945_hw_txq_ctx_free(il);
  3233. il3945_unset_hw_params(il);
  3234. /*netif_stop_queue(dev); */
  3235. flush_workqueue(il->workqueue);
  3236. /* ieee80211_unregister_hw calls il3945_mac_stop, which flushes
  3237. * il->workqueue... so we can't take down the workqueue
  3238. * until now... */
  3239. destroy_workqueue(il->workqueue);
  3240. il->workqueue = NULL;
  3241. il_free_traffic_mem(il);
  3242. free_irq(pdev->irq, il);
  3243. pci_disable_msi(pdev);
  3244. pci_iounmap(pdev, il->hw_base);
  3245. pci_release_regions(pdev);
  3246. pci_disable_device(pdev);
  3247. pci_set_drvdata(pdev, NULL);
  3248. il_free_channel_map(il);
  3249. il_free_geos(il);
  3250. kfree(il->scan_cmd);
  3251. if (il->beacon_skb)
  3252. dev_kfree_skb(il->beacon_skb);
  3253. ieee80211_free_hw(il->hw);
  3254. }
  3255. /*****************************************************************************
  3256. *
  3257. * driver and module entry point
  3258. *
  3259. *****************************************************************************/
  3260. static struct pci_driver il3945_driver = {
  3261. .name = DRV_NAME,
  3262. .id_table = il3945_hw_card_ids,
  3263. .probe = il3945_pci_probe,
  3264. .remove = __devexit_p(il3945_pci_remove),
  3265. .driver.pm = IL_LEGACY_PM_OPS,
  3266. };
  3267. static int __init il3945_init(void)
  3268. {
  3269. int ret;
  3270. pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3271. pr_info(DRV_COPYRIGHT "\n");
  3272. ret = il3945_rate_control_register();
  3273. if (ret) {
  3274. pr_err("Unable to register rate control algorithm: %d\n", ret);
  3275. return ret;
  3276. }
  3277. ret = pci_register_driver(&il3945_driver);
  3278. if (ret) {
  3279. pr_err("Unable to initialize PCI module\n");
  3280. goto error_register;
  3281. }
  3282. return ret;
  3283. error_register:
  3284. il3945_rate_control_unregister();
  3285. return ret;
  3286. }
  3287. static void __exit il3945_exit(void)
  3288. {
  3289. pci_unregister_driver(&il3945_driver);
  3290. il3945_rate_control_unregister();
  3291. }
  3292. MODULE_FIRMWARE(IL3945_MODULE_FIRMWARE(IL3945_UCODE_API_MAX));
  3293. module_param_named(antenna, il3945_mod_params.antenna, int, S_IRUGO);
  3294. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3295. module_param_named(swcrypto, il3945_mod_params.sw_crypto, int, S_IRUGO);
  3296. MODULE_PARM_DESC(swcrypto,
  3297. "using software crypto (default 1 [software])");
  3298. module_param_named(disable_hw_scan, il3945_mod_params.disable_hw_scan,
  3299. int, S_IRUGO);
  3300. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)");
  3301. #ifdef CONFIG_IWLEGACY_DEBUG
  3302. module_param_named(debug, il_debug_level, uint, S_IRUGO | S_IWUSR);
  3303. MODULE_PARM_DESC(debug, "debug output mask");
  3304. #endif
  3305. module_param_named(fw_restart, il3945_mod_params.restart_fw, int, S_IRUGO);
  3306. MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
  3307. module_exit(il3945_exit);
  3308. module_init(il3945_init);