platform.c 8.8 KB

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  1. /*
  2. * Platform device support for Au1x00 SoCs.
  3. *
  4. * Copyright 2004, Matt Porter <mporter@kernel.crashing.org>
  5. *
  6. * (C) Copyright Embedded Alley Solutions, Inc 2005
  7. * Author: Pantelis Antoniou <pantelis@embeddedalley.com>
  8. *
  9. * This file is licensed under the terms of the GNU General Public
  10. * License version 2. This program is licensed "as is" without any
  11. * warranty of any kind, whether express or implied.
  12. */
  13. #include <linux/dma-mapping.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/serial_8250.h>
  16. #include <linux/init.h>
  17. #include <asm/mach-au1x00/au1xxx.h>
  18. #include <asm/mach-au1x00/au1xxx_dbdma.h>
  19. #include <asm/mach-au1x00/au1100_mmc.h>
  20. #define PORT(_base, _irq) \
  21. { \
  22. .mapbase = _base, \
  23. .irq = _irq, \
  24. .regshift = 2, \
  25. .iotype = UPIO_AU, \
  26. .flags = UPF_SKIP_TEST | UPF_IOREMAP \
  27. }
  28. static struct plat_serial8250_port au1x00_uart_data[] = {
  29. #if defined(CONFIG_SERIAL_8250_AU1X00)
  30. #if defined(CONFIG_SOC_AU1000)
  31. PORT(UART0_PHYS_ADDR, AU1000_UART0_INT),
  32. PORT(UART1_PHYS_ADDR, AU1000_UART1_INT),
  33. PORT(UART2_PHYS_ADDR, AU1000_UART2_INT),
  34. PORT(UART3_PHYS_ADDR, AU1000_UART3_INT),
  35. #elif defined(CONFIG_SOC_AU1500)
  36. PORT(UART0_PHYS_ADDR, AU1500_UART0_INT),
  37. PORT(UART3_PHYS_ADDR, AU1500_UART3_INT),
  38. #elif defined(CONFIG_SOC_AU1100)
  39. PORT(UART0_PHYS_ADDR, AU1100_UART0_INT),
  40. PORT(UART1_PHYS_ADDR, AU1100_UART1_INT),
  41. PORT(UART3_PHYS_ADDR, AU1100_UART3_INT),
  42. #elif defined(CONFIG_SOC_AU1550)
  43. PORT(UART0_PHYS_ADDR, AU1550_UART0_INT),
  44. PORT(UART1_PHYS_ADDR, AU1550_UART1_INT),
  45. PORT(UART3_PHYS_ADDR, AU1550_UART3_INT),
  46. #elif defined(CONFIG_SOC_AU1200)
  47. PORT(UART0_PHYS_ADDR, AU1200_UART0_INT),
  48. PORT(UART1_PHYS_ADDR, AU1200_UART1_INT),
  49. #endif
  50. #endif /* CONFIG_SERIAL_8250_AU1X00 */
  51. { },
  52. };
  53. static struct platform_device au1xx0_uart_device = {
  54. .name = "serial8250",
  55. .id = PLAT8250_DEV_AU1X00,
  56. .dev = {
  57. .platform_data = au1x00_uart_data,
  58. },
  59. };
  60. /* OHCI (USB full speed host controller) */
  61. static struct resource au1xxx_usb_ohci_resources[] = {
  62. [0] = {
  63. .start = USB_OHCI_BASE,
  64. .end = USB_OHCI_BASE + USB_OHCI_LEN - 1,
  65. .flags = IORESOURCE_MEM,
  66. },
  67. [1] = {
  68. .start = FOR_PLATFORM_C_USB_HOST_INT,
  69. .end = FOR_PLATFORM_C_USB_HOST_INT,
  70. .flags = IORESOURCE_IRQ,
  71. },
  72. };
  73. /* The dmamask must be set for OHCI to work */
  74. static u64 ohci_dmamask = DMA_BIT_MASK(32);
  75. static struct platform_device au1xxx_usb_ohci_device = {
  76. .name = "au1xxx-ohci",
  77. .id = 0,
  78. .dev = {
  79. .dma_mask = &ohci_dmamask,
  80. .coherent_dma_mask = DMA_BIT_MASK(32),
  81. },
  82. .num_resources = ARRAY_SIZE(au1xxx_usb_ohci_resources),
  83. .resource = au1xxx_usb_ohci_resources,
  84. };
  85. /*** AU1100 LCD controller ***/
  86. #ifdef CONFIG_FB_AU1100
  87. static struct resource au1100_lcd_resources[] = {
  88. [0] = {
  89. .start = LCD_PHYS_ADDR,
  90. .end = LCD_PHYS_ADDR + 0x800 - 1,
  91. .flags = IORESOURCE_MEM,
  92. },
  93. [1] = {
  94. .start = AU1100_LCD_INT,
  95. .end = AU1100_LCD_INT,
  96. .flags = IORESOURCE_IRQ,
  97. }
  98. };
  99. static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32);
  100. static struct platform_device au1100_lcd_device = {
  101. .name = "au1100-lcd",
  102. .id = 0,
  103. .dev = {
  104. .dma_mask = &au1100_lcd_dmamask,
  105. .coherent_dma_mask = DMA_BIT_MASK(32),
  106. },
  107. .num_resources = ARRAY_SIZE(au1100_lcd_resources),
  108. .resource = au1100_lcd_resources,
  109. };
  110. #endif
  111. #ifdef CONFIG_SOC_AU1200
  112. /* EHCI (USB high speed host controller) */
  113. static struct resource au1xxx_usb_ehci_resources[] = {
  114. [0] = {
  115. .start = USB_EHCI_BASE,
  116. .end = USB_EHCI_BASE + USB_EHCI_LEN - 1,
  117. .flags = IORESOURCE_MEM,
  118. },
  119. [1] = {
  120. .start = AU1200_USB_INT,
  121. .end = AU1200_USB_INT,
  122. .flags = IORESOURCE_IRQ,
  123. },
  124. };
  125. static u64 ehci_dmamask = DMA_BIT_MASK(32);
  126. static struct platform_device au1xxx_usb_ehci_device = {
  127. .name = "au1xxx-ehci",
  128. .id = 0,
  129. .dev = {
  130. .dma_mask = &ehci_dmamask,
  131. .coherent_dma_mask = DMA_BIT_MASK(32),
  132. },
  133. .num_resources = ARRAY_SIZE(au1xxx_usb_ehci_resources),
  134. .resource = au1xxx_usb_ehci_resources,
  135. };
  136. /* Au1200 UDC (USB gadget controller) */
  137. static struct resource au1xxx_usb_gdt_resources[] = {
  138. [0] = {
  139. .start = USB_UDC_BASE,
  140. .end = USB_UDC_BASE + USB_UDC_LEN - 1,
  141. .flags = IORESOURCE_MEM,
  142. },
  143. [1] = {
  144. .start = AU1200_USB_INT,
  145. .end = AU1200_USB_INT,
  146. .flags = IORESOURCE_IRQ,
  147. },
  148. };
  149. static u64 udc_dmamask = DMA_BIT_MASK(32);
  150. static struct platform_device au1xxx_usb_gdt_device = {
  151. .name = "au1xxx-udc",
  152. .id = 0,
  153. .dev = {
  154. .dma_mask = &udc_dmamask,
  155. .coherent_dma_mask = DMA_BIT_MASK(32),
  156. },
  157. .num_resources = ARRAY_SIZE(au1xxx_usb_gdt_resources),
  158. .resource = au1xxx_usb_gdt_resources,
  159. };
  160. /* Au1200 UOC (USB OTG controller) */
  161. static struct resource au1xxx_usb_otg_resources[] = {
  162. [0] = {
  163. .start = USB_UOC_BASE,
  164. .end = USB_UOC_BASE + USB_UOC_LEN - 1,
  165. .flags = IORESOURCE_MEM,
  166. },
  167. [1] = {
  168. .start = AU1200_USB_INT,
  169. .end = AU1200_USB_INT,
  170. .flags = IORESOURCE_IRQ,
  171. },
  172. };
  173. static u64 uoc_dmamask = DMA_BIT_MASK(32);
  174. static struct platform_device au1xxx_usb_otg_device = {
  175. .name = "au1xxx-uoc",
  176. .id = 0,
  177. .dev = {
  178. .dma_mask = &uoc_dmamask,
  179. .coherent_dma_mask = DMA_BIT_MASK(32),
  180. },
  181. .num_resources = ARRAY_SIZE(au1xxx_usb_otg_resources),
  182. .resource = au1xxx_usb_otg_resources,
  183. };
  184. static struct resource au1200_lcd_resources[] = {
  185. [0] = {
  186. .start = LCD_PHYS_ADDR,
  187. .end = LCD_PHYS_ADDR + 0x800 - 1,
  188. .flags = IORESOURCE_MEM,
  189. },
  190. [1] = {
  191. .start = AU1200_LCD_INT,
  192. .end = AU1200_LCD_INT,
  193. .flags = IORESOURCE_IRQ,
  194. }
  195. };
  196. static u64 au1200_lcd_dmamask = DMA_BIT_MASK(32);
  197. static struct platform_device au1200_lcd_device = {
  198. .name = "au1200-lcd",
  199. .id = 0,
  200. .dev = {
  201. .dma_mask = &au1200_lcd_dmamask,
  202. .coherent_dma_mask = DMA_BIT_MASK(32),
  203. },
  204. .num_resources = ARRAY_SIZE(au1200_lcd_resources),
  205. .resource = au1200_lcd_resources,
  206. };
  207. static u64 au1xxx_mmc_dmamask = DMA_BIT_MASK(32);
  208. extern struct au1xmmc_platform_data au1xmmc_platdata[2];
  209. static struct resource au1200_mmc0_resources[] = {
  210. [0] = {
  211. .start = SD0_PHYS_ADDR,
  212. .end = SD0_PHYS_ADDR + 0x7ffff,
  213. .flags = IORESOURCE_MEM,
  214. },
  215. [1] = {
  216. .start = AU1200_SD_INT,
  217. .end = AU1200_SD_INT,
  218. .flags = IORESOURCE_IRQ,
  219. },
  220. [2] = {
  221. .start = DSCR_CMD0_SDMS_TX0,
  222. .end = DSCR_CMD0_SDMS_TX0,
  223. .flags = IORESOURCE_DMA,
  224. },
  225. [3] = {
  226. .start = DSCR_CMD0_SDMS_RX0,
  227. .end = DSCR_CMD0_SDMS_RX0,
  228. .flags = IORESOURCE_DMA,
  229. }
  230. };
  231. static struct platform_device au1200_mmc0_device = {
  232. .name = "au1xxx-mmc",
  233. .id = 0,
  234. .dev = {
  235. .dma_mask = &au1xxx_mmc_dmamask,
  236. .coherent_dma_mask = DMA_BIT_MASK(32),
  237. .platform_data = &au1xmmc_platdata[0],
  238. },
  239. .num_resources = ARRAY_SIZE(au1200_mmc0_resources),
  240. .resource = au1200_mmc0_resources,
  241. };
  242. #ifndef CONFIG_MIPS_DB1200
  243. static struct resource au1200_mmc1_resources[] = {
  244. [0] = {
  245. .start = SD1_PHYS_ADDR,
  246. .end = SD1_PHYS_ADDR + 0x7ffff,
  247. .flags = IORESOURCE_MEM,
  248. },
  249. [1] = {
  250. .start = AU1200_SD_INT,
  251. .end = AU1200_SD_INT,
  252. .flags = IORESOURCE_IRQ,
  253. },
  254. [2] = {
  255. .start = DSCR_CMD0_SDMS_TX1,
  256. .end = DSCR_CMD0_SDMS_TX1,
  257. .flags = IORESOURCE_DMA,
  258. },
  259. [3] = {
  260. .start = DSCR_CMD0_SDMS_RX1,
  261. .end = DSCR_CMD0_SDMS_RX1,
  262. .flags = IORESOURCE_DMA,
  263. }
  264. };
  265. static struct platform_device au1200_mmc1_device = {
  266. .name = "au1xxx-mmc",
  267. .id = 1,
  268. .dev = {
  269. .dma_mask = &au1xxx_mmc_dmamask,
  270. .coherent_dma_mask = DMA_BIT_MASK(32),
  271. .platform_data = &au1xmmc_platdata[1],
  272. },
  273. .num_resources = ARRAY_SIZE(au1200_mmc1_resources),
  274. .resource = au1200_mmc1_resources,
  275. };
  276. #endif /* #ifndef CONFIG_MIPS_DB1200 */
  277. #endif /* #ifdef CONFIG_SOC_AU1200 */
  278. /* All Alchemy demoboards with I2C have this #define in their headers */
  279. #ifdef SMBUS_PSC_BASE
  280. static struct resource pbdb_smbus_resources[] = {
  281. {
  282. .start = CPHYSADDR(SMBUS_PSC_BASE),
  283. .end = CPHYSADDR(SMBUS_PSC_BASE + 0xfffff),
  284. .flags = IORESOURCE_MEM,
  285. },
  286. };
  287. static struct platform_device pbdb_smbus_device = {
  288. .name = "au1xpsc_smbus",
  289. .id = 0, /* bus number */
  290. .num_resources = ARRAY_SIZE(pbdb_smbus_resources),
  291. .resource = pbdb_smbus_resources,
  292. };
  293. #endif
  294. static struct platform_device *au1xxx_platform_devices[] __initdata = {
  295. &au1xx0_uart_device,
  296. &au1xxx_usb_ohci_device,
  297. #ifdef CONFIG_FB_AU1100
  298. &au1100_lcd_device,
  299. #endif
  300. #ifdef CONFIG_SOC_AU1200
  301. &au1xxx_usb_ehci_device,
  302. &au1xxx_usb_gdt_device,
  303. &au1xxx_usb_otg_device,
  304. &au1200_lcd_device,
  305. &au1200_mmc0_device,
  306. #ifndef CONFIG_MIPS_DB1200
  307. &au1200_mmc1_device,
  308. #endif
  309. #endif
  310. #ifdef SMBUS_PSC_BASE
  311. &pbdb_smbus_device,
  312. #endif
  313. };
  314. static int __init au1xxx_platform_init(void)
  315. {
  316. unsigned int uartclk = get_au1x00_uart_baud_base() * 16;
  317. int i;
  318. /* Fill up uartclk. */
  319. for (i = 0; au1x00_uart_data[i].flags; i++)
  320. au1x00_uart_data[i].uartclk = uartclk;
  321. return platform_add_devices(au1xxx_platform_devices,
  322. ARRAY_SIZE(au1xxx_platform_devices));
  323. }
  324. arch_initcall(au1xxx_platform_init);