microcode_amd.c 12 KB

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  1. /*
  2. * AMD CPU Microcode Update Driver for Linux
  3. * Copyright (C) 2008 Advanced Micro Devices Inc.
  4. *
  5. * Author: Peter Oruba <peter.oruba@amd.com>
  6. *
  7. * Based on work by:
  8. * Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
  9. *
  10. * This driver allows to upgrade microcode on AMD
  11. * family 0x10 and 0x11 processors.
  12. *
  13. * Licensed unter the terms of the GNU General Public
  14. * License version 2. See file COPYING for details.
  15. */
  16. #include <linux/capability.h>
  17. #include <linux/kernel.h>
  18. #include <linux/init.h>
  19. #include <linux/sched.h>
  20. #include <linux/cpumask.h>
  21. #include <linux/module.h>
  22. #include <linux/slab.h>
  23. #include <linux/vmalloc.h>
  24. #include <linux/miscdevice.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/mm.h>
  27. #include <linux/fs.h>
  28. #include <linux/mutex.h>
  29. #include <linux/cpu.h>
  30. #include <linux/firmware.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/pci.h>
  33. #include <linux/pci_ids.h>
  34. #include <asm/msr.h>
  35. #include <asm/uaccess.h>
  36. #include <asm/processor.h>
  37. #include <asm/microcode.h>
  38. MODULE_DESCRIPTION("AMD Microcode Update Driver");
  39. MODULE_AUTHOR("Peter Oruba <peter.oruba@amd.com>");
  40. MODULE_LICENSE("GPL v2");
  41. #define UCODE_MAGIC 0x00414d44
  42. #define UCODE_EQUIV_CPU_TABLE_TYPE 0x00000000
  43. #define UCODE_UCODE_TYPE 0x00000001
  44. struct equiv_cpu_entry {
  45. unsigned int installed_cpu;
  46. unsigned int fixed_errata_mask;
  47. unsigned int fixed_errata_compare;
  48. unsigned int equiv_cpu;
  49. };
  50. struct microcode_header_amd {
  51. unsigned int data_code;
  52. unsigned int patch_id;
  53. unsigned char mc_patch_data_id[2];
  54. unsigned char mc_patch_data_len;
  55. unsigned char init_flag;
  56. unsigned int mc_patch_data_checksum;
  57. unsigned int nb_dev_id;
  58. unsigned int sb_dev_id;
  59. unsigned char processor_rev_id[2];
  60. unsigned char nb_rev_id;
  61. unsigned char sb_rev_id;
  62. unsigned char bios_api_rev;
  63. unsigned char reserved1[3];
  64. unsigned int match_reg[8];
  65. };
  66. struct microcode_amd {
  67. struct microcode_header_amd hdr;
  68. unsigned int mpb[0];
  69. };
  70. #define UCODE_MAX_SIZE (2048)
  71. #define DEFAULT_UCODE_DATASIZE (896)
  72. #define MC_HEADER_SIZE (sizeof(struct microcode_header_amd))
  73. #define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE)
  74. #define DWSIZE (sizeof(u32))
  75. /* For now we support a fixed ucode total size only */
  76. #define get_totalsize(mc) \
  77. ((((struct microcode_amd *)mc)->hdr.mc_patch_data_len * 28) \
  78. + MC_HEADER_SIZE)
  79. /* serialize access to the physical write */
  80. static DEFINE_SPINLOCK(microcode_update_lock);
  81. static struct equiv_cpu_entry *equiv_cpu_table;
  82. static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
  83. {
  84. struct cpuinfo_x86 *c = &cpu_data(cpu);
  85. memset(csig, 0, sizeof(*csig));
  86. if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
  87. printk(KERN_ERR "microcode: CPU%d not a capable AMD processor\n",
  88. cpu);
  89. return -1;
  90. }
  91. asm volatile("movl %1, %%ecx; rdmsr"
  92. : "=a" (csig->rev)
  93. : "i" (0x0000008B) : "ecx");
  94. printk(KERN_INFO "microcode: collect_cpu_info_amd : patch_id=0x%x\n",
  95. csig->rev);
  96. return 0;
  97. }
  98. static int get_matching_microcode(int cpu, void *mc, int rev)
  99. {
  100. struct microcode_header_amd *mc_header = mc;
  101. struct pci_dev *nb_pci_dev, *sb_pci_dev;
  102. unsigned int current_cpu_id;
  103. unsigned int equiv_cpu_id = 0x00;
  104. unsigned int i = 0;
  105. /*
  106. * FIXME! dimm: do we need this? Why an update via /dev/... is different
  107. * from the one via firmware?
  108. *
  109. * This is a tricky part. We might be called from a write operation
  110. * to the device file instead of the usual process of firmware
  111. * loading. This routine needs to be able to distinguish both
  112. * cases. This is done by checking if there alread is a equivalent
  113. * CPU table installed. If not, we're written through
  114. * /dev/cpu/microcode.
  115. * Since we ignore all checks. The error case in which going through
  116. * firmware loading and that table is not loaded has already been
  117. * checked earlier.
  118. */
  119. BUG_ON(equiv_cpu_table == NULL);
  120. #if 0
  121. if (equiv_cpu_table == NULL) {
  122. printk(KERN_INFO "microcode: CPU%d microcode update with "
  123. "version 0x%x (current=0x%x)\n",
  124. cpu, mc_header->patch_id, uci->cpu_sig.rev);
  125. goto out;
  126. }
  127. #endif
  128. current_cpu_id = cpuid_eax(0x00000001);
  129. while (equiv_cpu_table[i].installed_cpu != 0) {
  130. if (current_cpu_id == equiv_cpu_table[i].installed_cpu) {
  131. equiv_cpu_id = equiv_cpu_table[i].equiv_cpu;
  132. break;
  133. }
  134. i++;
  135. }
  136. if (!equiv_cpu_id) {
  137. printk(KERN_ERR "microcode: CPU%d cpu_id "
  138. "not found in equivalent cpu table \n", cpu);
  139. return 0;
  140. }
  141. if ((mc_header->processor_rev_id[0]) != (equiv_cpu_id & 0xff)) {
  142. printk(KERN_ERR
  143. "microcode: CPU%d patch does not match "
  144. "(patch is %x, cpu extended is %x) \n",
  145. cpu, mc_header->processor_rev_id[0],
  146. (equiv_cpu_id & 0xff));
  147. return 0;
  148. }
  149. if ((mc_header->processor_rev_id[1]) != ((equiv_cpu_id >> 16) & 0xff)) {
  150. printk(KERN_ERR "microcode: CPU%d patch does not match "
  151. "(patch is %x, cpu base id is %x) \n",
  152. cpu, mc_header->processor_rev_id[1],
  153. ((equiv_cpu_id >> 16) & 0xff));
  154. return 0;
  155. }
  156. /* ucode may be northbridge specific */
  157. if (mc_header->nb_dev_id) {
  158. nb_pci_dev = pci_get_device(PCI_VENDOR_ID_AMD,
  159. (mc_header->nb_dev_id & 0xff),
  160. NULL);
  161. if ((!nb_pci_dev) ||
  162. (mc_header->nb_rev_id != nb_pci_dev->revision)) {
  163. printk(KERN_ERR "microcode: CPU%d NB mismatch \n", cpu);
  164. pci_dev_put(nb_pci_dev);
  165. return 0;
  166. }
  167. pci_dev_put(nb_pci_dev);
  168. }
  169. /* ucode may be southbridge specific */
  170. if (mc_header->sb_dev_id) {
  171. sb_pci_dev = pci_get_device(PCI_VENDOR_ID_AMD,
  172. (mc_header->sb_dev_id & 0xff),
  173. NULL);
  174. if ((!sb_pci_dev) ||
  175. (mc_header->sb_rev_id != sb_pci_dev->revision)) {
  176. printk(KERN_ERR "microcode: CPU%d SB mismatch \n", cpu);
  177. pci_dev_put(sb_pci_dev);
  178. return 0;
  179. }
  180. pci_dev_put(sb_pci_dev);
  181. }
  182. if (mc_header->patch_id <= rev)
  183. return 0;
  184. return 1;
  185. }
  186. static void apply_microcode_amd(int cpu)
  187. {
  188. unsigned long flags;
  189. unsigned int eax, edx;
  190. unsigned int rev;
  191. int cpu_num = raw_smp_processor_id();
  192. struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
  193. struct microcode_amd *mc_amd = uci->mc;
  194. unsigned long addr;
  195. /* We should bind the task to the CPU */
  196. BUG_ON(cpu_num != cpu);
  197. if (mc_amd == NULL)
  198. return;
  199. spin_lock_irqsave(&microcode_update_lock, flags);
  200. addr = (unsigned long)&mc_amd->hdr.data_code;
  201. edx = (unsigned int)(((unsigned long)upper_32_bits(addr)));
  202. eax = (unsigned int)(((unsigned long)lower_32_bits(addr)));
  203. asm volatile("movl %0, %%ecx; wrmsr" :
  204. : "i" (0xc0010020), "a" (eax), "d" (edx) : "ecx");
  205. /* get patch id after patching */
  206. asm volatile("movl %1, %%ecx; rdmsr"
  207. : "=a" (rev)
  208. : "i" (0x0000008B) : "ecx");
  209. spin_unlock_irqrestore(&microcode_update_lock, flags);
  210. /* check current patch id and patch's id for match */
  211. if (rev != mc_amd->hdr.patch_id) {
  212. printk(KERN_ERR "microcode: CPU%d update from revision "
  213. "0x%x to 0x%x failed\n", cpu_num,
  214. mc_amd->hdr.patch_id, rev);
  215. return;
  216. }
  217. printk(KERN_INFO "microcode: CPU%d updated from revision "
  218. "0x%x to 0x%x \n",
  219. cpu_num, uci->cpu_sig.rev, mc_amd->hdr.patch_id);
  220. uci->cpu_sig.rev = rev;
  221. }
  222. static void * get_next_ucode(u8 *buf, unsigned int size,
  223. int (*get_ucode_data)(void *, const void *, size_t),
  224. unsigned int *mc_size)
  225. {
  226. unsigned int total_size;
  227. #define UCODE_UNKNOWN_HDR 8
  228. u8 hdr[UCODE_UNKNOWN_HDR];
  229. void *mc;
  230. if (get_ucode_data(hdr, buf, UCODE_UNKNOWN_HDR))
  231. return NULL;
  232. if (hdr[0] != UCODE_UCODE_TYPE) {
  233. printk(KERN_ERR "microcode: error! "
  234. "Wrong microcode payload type field\n");
  235. return NULL;
  236. }
  237. /* FIXME! dimm: Why not by means of get_totalsize(hdr)? */
  238. total_size = (unsigned long) (hdr[4] + (hdr[5] << 8));
  239. printk(KERN_INFO "microcode: size %u, total_size %u\n",
  240. size, total_size);
  241. if (total_size > size || total_size > UCODE_MAX_SIZE) {
  242. printk(KERN_ERR "microcode: error! Bad data in microcode data file\n");
  243. return NULL;
  244. }
  245. mc = vmalloc(UCODE_MAX_SIZE);
  246. if (mc) {
  247. memset(mc, 0, UCODE_MAX_SIZE);
  248. if (get_ucode_data(mc, buf + UCODE_UNKNOWN_HDR, total_size)) {
  249. vfree(mc);
  250. mc = NULL;
  251. } else
  252. *mc_size = total_size + UCODE_UNKNOWN_HDR;
  253. }
  254. #undef UCODE_UNKNOWN_HDR
  255. return mc;
  256. }
  257. static int install_equiv_cpu_table(u8 *buf,
  258. int (*get_ucode_data)(void *, const void *, size_t))
  259. {
  260. #define UCODE_CONTAINER_HEADER_SIZE 12
  261. u8 *container_hdr[UCODE_CONTAINER_HEADER_SIZE];
  262. unsigned int *buf_pos = (unsigned int *)container_hdr;
  263. unsigned long size;
  264. if (get_ucode_data(&container_hdr, buf, UCODE_CONTAINER_HEADER_SIZE))
  265. return 0;
  266. size = buf_pos[2];
  267. if (buf_pos[1] != UCODE_EQUIV_CPU_TABLE_TYPE || !size) {
  268. printk(KERN_ERR "microcode: error! "
  269. "Wrong microcode equivalnet cpu table\n");
  270. return 0;
  271. }
  272. equiv_cpu_table = (struct equiv_cpu_entry *) vmalloc(size);
  273. if (!equiv_cpu_table) {
  274. printk(KERN_ERR "microcode: error, can't allocate memory for equiv CPU table\n");
  275. return 0;
  276. }
  277. buf += UCODE_CONTAINER_HEADER_SIZE;
  278. if (get_ucode_data(equiv_cpu_table, buf, size)) {
  279. vfree(equiv_cpu_table);
  280. return 0;
  281. }
  282. return size + UCODE_CONTAINER_HEADER_SIZE; /* add header length */
  283. #undef UCODE_CONTAINER_HEADER_SIZE
  284. }
  285. static void free_equiv_cpu_table(void)
  286. {
  287. if (equiv_cpu_table) {
  288. vfree(equiv_cpu_table);
  289. equiv_cpu_table = NULL;
  290. }
  291. }
  292. static int generic_load_microcode(int cpu, void *data, size_t size,
  293. int (*get_ucode_data)(void *, const void *, size_t))
  294. {
  295. struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
  296. u8 *ucode_ptr = data, *new_mc = NULL, *mc;
  297. int new_rev = uci->cpu_sig.rev;
  298. unsigned int leftover;
  299. unsigned long offset;
  300. offset = install_equiv_cpu_table(ucode_ptr, get_ucode_data);
  301. if (!offset) {
  302. printk(KERN_ERR "microcode: installing equivalent cpu table failed\n");
  303. return -EINVAL;
  304. }
  305. ucode_ptr += offset;
  306. leftover = size - offset;
  307. while (leftover) {
  308. unsigned int mc_size;
  309. struct microcode_header_amd *mc_header;
  310. mc = get_next_ucode(ucode_ptr, leftover, get_ucode_data, &mc_size);
  311. if (!mc)
  312. break;
  313. mc_header = (struct microcode_header_amd *)mc;
  314. if (get_matching_microcode(cpu, mc, new_rev)) {
  315. if (new_mc)
  316. vfree(new_mc);
  317. new_rev = mc_header->patch_id;
  318. new_mc = mc;
  319. } else
  320. vfree(mc);
  321. ucode_ptr += mc_size;
  322. leftover -= mc_size;
  323. }
  324. if (new_mc) {
  325. if (!leftover) {
  326. if (uci->mc)
  327. vfree(uci->mc);
  328. uci->mc = new_mc;
  329. pr_debug("microcode: CPU%d found a matching microcode update with"
  330. " version 0x%x (current=0x%x)\n",
  331. cpu, new_rev, uci->cpu_sig.rev);
  332. } else
  333. vfree(new_mc);
  334. }
  335. free_equiv_cpu_table();
  336. return (int)leftover;
  337. }
  338. static int get_ucode_fw(void *to, const void *from, size_t n)
  339. {
  340. memcpy(to, from, n);
  341. return 0;
  342. }
  343. static int request_microcode_fw(int cpu, struct device *device)
  344. {
  345. const char *fw_name = "amd-ucode/microcode_amd.bin";
  346. const struct firmware *firmware;
  347. int ret;
  348. /* We should bind the task to the CPU */
  349. BUG_ON(cpu != raw_smp_processor_id());
  350. ret = request_firmware(&firmware, fw_name, device);
  351. if (ret) {
  352. printk(KERN_ERR "microcode: ucode data file %s load failed\n", fw_name);
  353. return ret;
  354. }
  355. ret = generic_load_microcode(cpu, (void*)firmware->data, firmware->size,
  356. &get_ucode_fw);
  357. release_firmware(firmware);
  358. return ret;
  359. }
  360. static int get_ucode_user(void *to, const void *from, size_t n)
  361. {
  362. return copy_from_user(to, from, n);
  363. }
  364. static int request_microcode_user(int cpu, const void __user *buf, size_t size)
  365. {
  366. /* We should bind the task to the CPU */
  367. BUG_ON(cpu != raw_smp_processor_id());
  368. return generic_load_microcode(cpu, (void*)buf, size, &get_ucode_user);
  369. }
  370. static void microcode_fini_cpu_amd(int cpu)
  371. {
  372. struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
  373. vfree(uci->mc);
  374. uci->mc = NULL;
  375. }
  376. static struct microcode_ops microcode_amd_ops = {
  377. .request_microcode_user = request_microcode_user,
  378. .request_microcode_fw = request_microcode_fw,
  379. .collect_cpu_info = collect_cpu_info_amd,
  380. .apply_microcode = apply_microcode_amd,
  381. .microcode_fini_cpu = microcode_fini_cpu_amd,
  382. };
  383. struct microcode_ops * __init init_amd_microcode(void)
  384. {
  385. return &microcode_amd_ops;
  386. }