lh7a40x_udc.c 50 KB

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  1. /*
  2. * linux/drivers/usb/gadget/lh7a40x_udc.c
  3. * Sharp LH7A40x on-chip full speed USB device controllers
  4. *
  5. * Copyright (C) 2004 Mikko Lahteenmaki, Nordic ID
  6. * Copyright (C) 2004 Bo Henriksen, Nordic ID
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. #include <linux/platform_device.h>
  24. #include "lh7a40x_udc.h"
  25. //#define DEBUG printk
  26. //#define DEBUG_EP0 printk
  27. //#define DEBUG_SETUP printk
  28. #ifndef DEBUG_EP0
  29. # define DEBUG_EP0(fmt,args...)
  30. #endif
  31. #ifndef DEBUG_SETUP
  32. # define DEBUG_SETUP(fmt,args...)
  33. #endif
  34. #ifndef DEBUG
  35. # define NO_STATES
  36. # define DEBUG(fmt,args...)
  37. #endif
  38. #define DRIVER_DESC "LH7A40x USB Device Controller"
  39. #define DRIVER_VERSION __DATE__
  40. #ifndef _BIT /* FIXME - what happended to _BIT in 2.6.7bk18? */
  41. #define _BIT(x) (1<<(x))
  42. #endif
  43. struct lh7a40x_udc *the_controller;
  44. static const char driver_name[] = "lh7a40x_udc";
  45. static const char driver_desc[] = DRIVER_DESC;
  46. static const char ep0name[] = "ep0-control";
  47. /*
  48. Local definintions.
  49. */
  50. #ifndef NO_STATES
  51. static char *state_names[] = {
  52. "WAIT_FOR_SETUP",
  53. "DATA_STATE_XMIT",
  54. "DATA_STATE_NEED_ZLP",
  55. "WAIT_FOR_OUT_STATUS",
  56. "DATA_STATE_RECV"
  57. };
  58. #endif
  59. /*
  60. Local declarations.
  61. */
  62. static int lh7a40x_ep_enable(struct usb_ep *ep,
  63. const struct usb_endpoint_descriptor *);
  64. static int lh7a40x_ep_disable(struct usb_ep *ep);
  65. static struct usb_request *lh7a40x_alloc_request(struct usb_ep *ep, gfp_t);
  66. static void lh7a40x_free_request(struct usb_ep *ep, struct usb_request *);
  67. static int lh7a40x_queue(struct usb_ep *ep, struct usb_request *, gfp_t);
  68. static int lh7a40x_dequeue(struct usb_ep *ep, struct usb_request *);
  69. static int lh7a40x_set_halt(struct usb_ep *ep, int);
  70. static int lh7a40x_fifo_status(struct usb_ep *ep);
  71. static void lh7a40x_fifo_flush(struct usb_ep *ep);
  72. static void lh7a40x_ep0_kick(struct lh7a40x_udc *dev, struct lh7a40x_ep *ep);
  73. static void lh7a40x_handle_ep0(struct lh7a40x_udc *dev, u32 intr);
  74. static void done(struct lh7a40x_ep *ep, struct lh7a40x_request *req,
  75. int status);
  76. static void pio_irq_enable(int bEndpointAddress);
  77. static void pio_irq_disable(int bEndpointAddress);
  78. static void stop_activity(struct lh7a40x_udc *dev,
  79. struct usb_gadget_driver *driver);
  80. static void flush(struct lh7a40x_ep *ep);
  81. static void udc_enable(struct lh7a40x_udc *dev);
  82. static void udc_set_address(struct lh7a40x_udc *dev, unsigned char address);
  83. static struct usb_ep_ops lh7a40x_ep_ops = {
  84. .enable = lh7a40x_ep_enable,
  85. .disable = lh7a40x_ep_disable,
  86. .alloc_request = lh7a40x_alloc_request,
  87. .free_request = lh7a40x_free_request,
  88. .queue = lh7a40x_queue,
  89. .dequeue = lh7a40x_dequeue,
  90. .set_halt = lh7a40x_set_halt,
  91. .fifo_status = lh7a40x_fifo_status,
  92. .fifo_flush = lh7a40x_fifo_flush,
  93. };
  94. /* Inline code */
  95. static __inline__ int write_packet(struct lh7a40x_ep *ep,
  96. struct lh7a40x_request *req, int max)
  97. {
  98. u8 *buf;
  99. int length, count;
  100. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  101. buf = req->req.buf + req->req.actual;
  102. prefetch(buf);
  103. length = req->req.length - req->req.actual;
  104. length = min(length, max);
  105. req->req.actual += length;
  106. DEBUG("Write %d (max %d), fifo %p\n", length, max, fifo);
  107. count = length;
  108. while (count--) {
  109. *fifo = *buf++;
  110. }
  111. return length;
  112. }
  113. static __inline__ void usb_set_index(u32 ep)
  114. {
  115. *(volatile u32 *)io_p2v(USB_INDEX) = ep;
  116. }
  117. static __inline__ u32 usb_read(u32 port)
  118. {
  119. return *(volatile u32 *)io_p2v(port);
  120. }
  121. static __inline__ void usb_write(u32 val, u32 port)
  122. {
  123. *(volatile u32 *)io_p2v(port) = val;
  124. }
  125. static __inline__ void usb_set(u32 val, u32 port)
  126. {
  127. volatile u32 *ioport = (volatile u32 *)io_p2v(port);
  128. u32 after = (*ioport) | val;
  129. *ioport = after;
  130. }
  131. static __inline__ void usb_clear(u32 val, u32 port)
  132. {
  133. volatile u32 *ioport = (volatile u32 *)io_p2v(port);
  134. u32 after = (*ioport) & ~val;
  135. *ioport = after;
  136. }
  137. /*-------------------------------------------------------------------------*/
  138. #define GPIO_PORTC_DR (0x80000E08)
  139. #define GPIO_PORTC_DDR (0x80000E18)
  140. #define GPIO_PORTC_PDR (0x80000E70)
  141. /* get port C pin data register */
  142. #define get_portc_pdr(bit) ((usb_read(GPIO_PORTC_PDR) & _BIT(bit)) != 0)
  143. /* get port C data direction register */
  144. #define get_portc_ddr(bit) ((usb_read(GPIO_PORTC_DDR) & _BIT(bit)) != 0)
  145. /* set port C data register */
  146. #define set_portc_dr(bit, val) (val ? usb_set(_BIT(bit), GPIO_PORTC_DR) : usb_clear(_BIT(bit), GPIO_PORTC_DR))
  147. /* set port C data direction register */
  148. #define set_portc_ddr(bit, val) (val ? usb_set(_BIT(bit), GPIO_PORTC_DDR) : usb_clear(_BIT(bit), GPIO_PORTC_DDR))
  149. /*
  150. * LPD7A404 GPIO's:
  151. * Port C bit 1 = USB Port 1 Power Enable
  152. * Port C bit 2 = USB Port 1 Data Carrier Detect
  153. */
  154. #define is_usb_connected() get_portc_pdr(2)
  155. #ifdef CONFIG_USB_GADGET_DEBUG_FILES
  156. static const char proc_node_name[] = "driver/udc";
  157. static int
  158. udc_proc_read(char *page, char **start, off_t off, int count,
  159. int *eof, void *_dev)
  160. {
  161. char *buf = page;
  162. struct lh7a40x_udc *dev = _dev;
  163. char *next = buf;
  164. unsigned size = count;
  165. unsigned long flags;
  166. int t;
  167. if (off != 0)
  168. return 0;
  169. local_irq_save(flags);
  170. /* basic device status */
  171. t = scnprintf(next, size,
  172. DRIVER_DESC "\n"
  173. "%s version: %s\n"
  174. "Gadget driver: %s\n"
  175. "Host: %s\n\n",
  176. driver_name, DRIVER_VERSION,
  177. dev->driver ? dev->driver->driver.name : "(none)",
  178. is_usb_connected()? "full speed" : "disconnected");
  179. size -= t;
  180. next += t;
  181. t = scnprintf(next, size,
  182. "GPIO:\n"
  183. " Port C bit 1: %d, dir %d\n"
  184. " Port C bit 2: %d, dir %d\n\n",
  185. get_portc_pdr(1), get_portc_ddr(1),
  186. get_portc_pdr(2), get_portc_ddr(2)
  187. );
  188. size -= t;
  189. next += t;
  190. t = scnprintf(next, size,
  191. "DCP pullup: %d\n\n",
  192. (usb_read(USB_PM) & PM_USB_DCP) != 0);
  193. size -= t;
  194. next += t;
  195. local_irq_restore(flags);
  196. *eof = 1;
  197. return count - size;
  198. }
  199. #define create_proc_files() create_proc_read_entry(proc_node_name, 0, NULL, udc_proc_read, dev)
  200. #define remove_proc_files() remove_proc_entry(proc_node_name, NULL)
  201. #else /* !CONFIG_USB_GADGET_DEBUG_FILES */
  202. #define create_proc_files() do {} while (0)
  203. #define remove_proc_files() do {} while (0)
  204. #endif /* CONFIG_USB_GADGET_DEBUG_FILES */
  205. /*
  206. * udc_disable - disable USB device controller
  207. */
  208. static void udc_disable(struct lh7a40x_udc *dev)
  209. {
  210. DEBUG("%s, %p\n", __FUNCTION__, dev);
  211. udc_set_address(dev, 0);
  212. /* Disable interrupts */
  213. usb_write(0, USB_IN_INT_EN);
  214. usb_write(0, USB_OUT_INT_EN);
  215. usb_write(0, USB_INT_EN);
  216. /* Disable the USB */
  217. usb_write(0, USB_PM);
  218. #ifdef CONFIG_ARCH_LH7A404
  219. /* Disable USB power */
  220. set_portc_dr(1, 0);
  221. #endif
  222. /* if hardware supports it, disconnect from usb */
  223. /* make_usb_disappear(); */
  224. dev->ep0state = WAIT_FOR_SETUP;
  225. dev->gadget.speed = USB_SPEED_UNKNOWN;
  226. dev->usb_address = 0;
  227. }
  228. /*
  229. * udc_reinit - initialize software state
  230. */
  231. static void udc_reinit(struct lh7a40x_udc *dev)
  232. {
  233. u32 i;
  234. DEBUG("%s, %p\n", __FUNCTION__, dev);
  235. /* device/ep0 records init */
  236. INIT_LIST_HEAD(&dev->gadget.ep_list);
  237. INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
  238. dev->ep0state = WAIT_FOR_SETUP;
  239. /* basic endpoint records init */
  240. for (i = 0; i < UDC_MAX_ENDPOINTS; i++) {
  241. struct lh7a40x_ep *ep = &dev->ep[i];
  242. if (i != 0)
  243. list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
  244. ep->desc = 0;
  245. ep->stopped = 0;
  246. INIT_LIST_HEAD(&ep->queue);
  247. ep->pio_irqs = 0;
  248. }
  249. /* the rest was statically initialized, and is read-only */
  250. }
  251. #define BYTES2MAXP(x) (x / 8)
  252. #define MAXP2BYTES(x) (x * 8)
  253. /* until it's enabled, this UDC should be completely invisible
  254. * to any USB host.
  255. */
  256. static void udc_enable(struct lh7a40x_udc *dev)
  257. {
  258. int ep;
  259. DEBUG("%s, %p\n", __FUNCTION__, dev);
  260. dev->gadget.speed = USB_SPEED_UNKNOWN;
  261. #ifdef CONFIG_ARCH_LH7A404
  262. /* Set Port C bit 1 & 2 as output */
  263. set_portc_ddr(1, 1);
  264. set_portc_ddr(2, 1);
  265. /* Enable USB power */
  266. set_portc_dr(1, 0);
  267. #endif
  268. /*
  269. * C.f Chapter 18.1.3.1 Initializing the USB
  270. */
  271. /* Disable the USB */
  272. usb_clear(PM_USB_ENABLE, USB_PM);
  273. /* Reset APB & I/O sides of the USB */
  274. usb_set(USB_RESET_APB | USB_RESET_IO, USB_RESET);
  275. mdelay(5);
  276. usb_clear(USB_RESET_APB | USB_RESET_IO, USB_RESET);
  277. /* Set MAXP values for each */
  278. for (ep = 0; ep < UDC_MAX_ENDPOINTS; ep++) {
  279. struct lh7a40x_ep *ep_reg = &dev->ep[ep];
  280. u32 csr;
  281. usb_set_index(ep);
  282. switch (ep_reg->ep_type) {
  283. case ep_bulk_in:
  284. case ep_interrupt:
  285. usb_clear(USB_IN_CSR2_USB_DMA_EN | USB_IN_CSR2_AUTO_SET,
  286. ep_reg->csr2);
  287. /* Fall through */
  288. case ep_control:
  289. usb_write(BYTES2MAXP(ep_maxpacket(ep_reg)),
  290. USB_IN_MAXP);
  291. break;
  292. case ep_bulk_out:
  293. usb_clear(USB_OUT_CSR2_USB_DMA_EN |
  294. USB_OUT_CSR2_AUTO_CLR, ep_reg->csr2);
  295. usb_write(BYTES2MAXP(ep_maxpacket(ep_reg)),
  296. USB_OUT_MAXP);
  297. break;
  298. }
  299. /* Read & Write CSR1, just in case */
  300. csr = usb_read(ep_reg->csr1);
  301. usb_write(csr, ep_reg->csr1);
  302. flush(ep_reg);
  303. }
  304. /* Disable interrupts */
  305. usb_write(0, USB_IN_INT_EN);
  306. usb_write(0, USB_OUT_INT_EN);
  307. usb_write(0, USB_INT_EN);
  308. /* Enable interrupts */
  309. usb_set(USB_IN_INT_EP0, USB_IN_INT_EN);
  310. usb_set(USB_INT_RESET_INT | USB_INT_RESUME_INT, USB_INT_EN);
  311. /* Dont enable rest of the interrupts */
  312. /* usb_set(USB_IN_INT_EP3 | USB_IN_INT_EP1 | USB_IN_INT_EP0, USB_IN_INT_EN);
  313. usb_set(USB_OUT_INT_EP2, USB_OUT_INT_EN); */
  314. /* Enable SUSPEND */
  315. usb_set(PM_ENABLE_SUSPEND, USB_PM);
  316. /* Enable the USB */
  317. usb_set(PM_USB_ENABLE, USB_PM);
  318. #ifdef CONFIG_ARCH_LH7A404
  319. /* NOTE: DOES NOT WORK! */
  320. /* Let host detect UDC:
  321. * Software must write a 0 to the PMR:DCP_CTRL bit to turn this
  322. * transistor on and pull the USBDP pin HIGH.
  323. */
  324. /* usb_clear(PM_USB_DCP, USB_PM);
  325. usb_set(PM_USB_DCP, USB_PM); */
  326. #endif
  327. }
  328. /*
  329. Register entry point for the peripheral controller driver.
  330. */
  331. int usb_gadget_register_driver(struct usb_gadget_driver *driver)
  332. {
  333. struct lh7a40x_udc *dev = the_controller;
  334. int retval;
  335. DEBUG("%s: %s\n", __FUNCTION__, driver->driver.name);
  336. if (!driver
  337. || driver->speed != USB_SPEED_FULL
  338. || !driver->bind
  339. || !driver->disconnect
  340. || !driver->setup)
  341. return -EINVAL;
  342. if (!dev)
  343. return -ENODEV;
  344. if (dev->driver)
  345. return -EBUSY;
  346. /* first hook up the driver ... */
  347. dev->driver = driver;
  348. dev->gadget.dev.driver = &driver->driver;
  349. device_add(&dev->gadget.dev);
  350. retval = driver->bind(&dev->gadget);
  351. if (retval) {
  352. printk("%s: bind to driver %s --> error %d\n", dev->gadget.name,
  353. driver->driver.name, retval);
  354. device_del(&dev->gadget.dev);
  355. dev->driver = 0;
  356. dev->gadget.dev.driver = 0;
  357. return retval;
  358. }
  359. /* ... then enable host detection and ep0; and we're ready
  360. * for set_configuration as well as eventual disconnect.
  361. * NOTE: this shouldn't power up until later.
  362. */
  363. printk("%s: registered gadget driver '%s'\n", dev->gadget.name,
  364. driver->driver.name);
  365. udc_enable(dev);
  366. return 0;
  367. }
  368. EXPORT_SYMBOL(usb_gadget_register_driver);
  369. /*
  370. Unregister entry point for the peripheral controller driver.
  371. */
  372. int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
  373. {
  374. struct lh7a40x_udc *dev = the_controller;
  375. unsigned long flags;
  376. if (!dev)
  377. return -ENODEV;
  378. if (!driver || driver != dev->driver || !driver->unbind)
  379. return -EINVAL;
  380. spin_lock_irqsave(&dev->lock, flags);
  381. dev->driver = 0;
  382. stop_activity(dev, driver);
  383. spin_unlock_irqrestore(&dev->lock, flags);
  384. driver->unbind(&dev->gadget);
  385. dev->gadget.dev.driver = NULL;
  386. device_del(&dev->gadget.dev);
  387. udc_disable(dev);
  388. DEBUG("unregistered gadget driver '%s'\n", driver->driver.name);
  389. return 0;
  390. }
  391. EXPORT_SYMBOL(usb_gadget_unregister_driver);
  392. /*-------------------------------------------------------------------------*/
  393. /** Write request to FIFO (max write == maxp size)
  394. * Return: 0 = still running, 1 = completed, negative = errno
  395. * NOTE: INDEX register must be set for EP
  396. */
  397. static int write_fifo(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
  398. {
  399. u32 max;
  400. u32 csr;
  401. max = le16_to_cpu(ep->desc->wMaxPacketSize);
  402. csr = usb_read(ep->csr1);
  403. DEBUG("CSR: %x %d\n", csr, csr & USB_IN_CSR1_FIFO_NOT_EMPTY);
  404. if (!(csr & USB_IN_CSR1_FIFO_NOT_EMPTY)) {
  405. unsigned count;
  406. int is_last, is_short;
  407. count = write_packet(ep, req, max);
  408. usb_set(USB_IN_CSR1_IN_PKT_RDY, ep->csr1);
  409. /* last packet is usually short (or a zlp) */
  410. if (unlikely(count != max))
  411. is_last = is_short = 1;
  412. else {
  413. if (likely(req->req.length != req->req.actual)
  414. || req->req.zero)
  415. is_last = 0;
  416. else
  417. is_last = 1;
  418. /* interrupt/iso maxpacket may not fill the fifo */
  419. is_short = unlikely(max < ep_maxpacket(ep));
  420. }
  421. DEBUG("%s: wrote %s %d bytes%s%s %d left %p\n", __FUNCTION__,
  422. ep->ep.name, count,
  423. is_last ? "/L" : "", is_short ? "/S" : "",
  424. req->req.length - req->req.actual, req);
  425. /* requests complete when all IN data is in the FIFO */
  426. if (is_last) {
  427. done(ep, req, 0);
  428. if (list_empty(&ep->queue)) {
  429. pio_irq_disable(ep_index(ep));
  430. }
  431. return 1;
  432. }
  433. } else {
  434. DEBUG("Hmm.. %d ep FIFO is not empty!\n", ep_index(ep));
  435. }
  436. return 0;
  437. }
  438. /** Read to request from FIFO (max read == bytes in fifo)
  439. * Return: 0 = still running, 1 = completed, negative = errno
  440. * NOTE: INDEX register must be set for EP
  441. */
  442. static int read_fifo(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
  443. {
  444. u32 csr;
  445. u8 *buf;
  446. unsigned bufferspace, count, is_short;
  447. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  448. /* make sure there's a packet in the FIFO. */
  449. csr = usb_read(ep->csr1);
  450. if (!(csr & USB_OUT_CSR1_OUT_PKT_RDY)) {
  451. DEBUG("%s: Packet NOT ready!\n", __FUNCTION__);
  452. return -EINVAL;
  453. }
  454. buf = req->req.buf + req->req.actual;
  455. prefetchw(buf);
  456. bufferspace = req->req.length - req->req.actual;
  457. /* read all bytes from this packet */
  458. count = usb_read(USB_OUT_FIFO_WC1);
  459. req->req.actual += min(count, bufferspace);
  460. is_short = (count < ep->ep.maxpacket);
  461. DEBUG("read %s %02x, %d bytes%s req %p %d/%d\n",
  462. ep->ep.name, csr, count,
  463. is_short ? "/S" : "", req, req->req.actual, req->req.length);
  464. while (likely(count-- != 0)) {
  465. u8 byte = (u8) (*fifo & 0xff);
  466. if (unlikely(bufferspace == 0)) {
  467. /* this happens when the driver's buffer
  468. * is smaller than what the host sent.
  469. * discard the extra data.
  470. */
  471. if (req->req.status != -EOVERFLOW)
  472. printk("%s overflow %d\n", ep->ep.name, count);
  473. req->req.status = -EOVERFLOW;
  474. } else {
  475. *buf++ = byte;
  476. bufferspace--;
  477. }
  478. }
  479. usb_clear(USB_OUT_CSR1_OUT_PKT_RDY, ep->csr1);
  480. /* completion */
  481. if (is_short || req->req.actual == req->req.length) {
  482. done(ep, req, 0);
  483. usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1);
  484. if (list_empty(&ep->queue))
  485. pio_irq_disable(ep_index(ep));
  486. return 1;
  487. }
  488. /* finished that packet. the next one may be waiting... */
  489. return 0;
  490. }
  491. /*
  492. * done - retire a request; caller blocked irqs
  493. * INDEX register is preserved to keep same
  494. */
  495. static void done(struct lh7a40x_ep *ep, struct lh7a40x_request *req, int status)
  496. {
  497. unsigned int stopped = ep->stopped;
  498. u32 index;
  499. DEBUG("%s, %p\n", __FUNCTION__, ep);
  500. list_del_init(&req->queue);
  501. if (likely(req->req.status == -EINPROGRESS))
  502. req->req.status = status;
  503. else
  504. status = req->req.status;
  505. if (status && status != -ESHUTDOWN)
  506. DEBUG("complete %s req %p stat %d len %u/%u\n",
  507. ep->ep.name, &req->req, status,
  508. req->req.actual, req->req.length);
  509. /* don't modify queue heads during completion callback */
  510. ep->stopped = 1;
  511. /* Read current index (completion may modify it) */
  512. index = usb_read(USB_INDEX);
  513. spin_unlock(&ep->dev->lock);
  514. req->req.complete(&ep->ep, &req->req);
  515. spin_lock(&ep->dev->lock);
  516. /* Restore index */
  517. usb_set_index(index);
  518. ep->stopped = stopped;
  519. }
  520. /** Enable EP interrupt */
  521. static void pio_irq_enable(int ep)
  522. {
  523. DEBUG("%s: %d\n", __FUNCTION__, ep);
  524. switch (ep) {
  525. case 1:
  526. usb_set(USB_IN_INT_EP1, USB_IN_INT_EN);
  527. break;
  528. case 2:
  529. usb_set(USB_OUT_INT_EP2, USB_OUT_INT_EN);
  530. break;
  531. case 3:
  532. usb_set(USB_IN_INT_EP3, USB_IN_INT_EN);
  533. break;
  534. default:
  535. DEBUG("Unknown endpoint: %d\n", ep);
  536. break;
  537. }
  538. }
  539. /** Disable EP interrupt */
  540. static void pio_irq_disable(int ep)
  541. {
  542. DEBUG("%s: %d\n", __FUNCTION__, ep);
  543. switch (ep) {
  544. case 1:
  545. usb_clear(USB_IN_INT_EP1, USB_IN_INT_EN);
  546. break;
  547. case 2:
  548. usb_clear(USB_OUT_INT_EP2, USB_OUT_INT_EN);
  549. break;
  550. case 3:
  551. usb_clear(USB_IN_INT_EP3, USB_IN_INT_EN);
  552. break;
  553. default:
  554. DEBUG("Unknown endpoint: %d\n", ep);
  555. break;
  556. }
  557. }
  558. /*
  559. * nuke - dequeue ALL requests
  560. */
  561. void nuke(struct lh7a40x_ep *ep, int status)
  562. {
  563. struct lh7a40x_request *req;
  564. DEBUG("%s, %p\n", __FUNCTION__, ep);
  565. /* Flush FIFO */
  566. flush(ep);
  567. /* called with irqs blocked */
  568. while (!list_empty(&ep->queue)) {
  569. req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
  570. done(ep, req, status);
  571. }
  572. /* Disable IRQ if EP is enabled (has descriptor) */
  573. if (ep->desc)
  574. pio_irq_disable(ep_index(ep));
  575. }
  576. /*
  577. void nuke_all(struct lh7a40x_udc *dev)
  578. {
  579. int n;
  580. for(n=0; n<UDC_MAX_ENDPOINTS; n++) {
  581. struct lh7a40x_ep *ep = &dev->ep[n];
  582. usb_set_index(n);
  583. nuke(ep, 0);
  584. }
  585. }*/
  586. /*
  587. static void flush_all(struct lh7a40x_udc *dev)
  588. {
  589. int n;
  590. for (n = 0; n < UDC_MAX_ENDPOINTS; n++)
  591. {
  592. struct lh7a40x_ep *ep = &dev->ep[n];
  593. flush(ep);
  594. }
  595. }
  596. */
  597. /** Flush EP
  598. * NOTE: INDEX register must be set before this call
  599. */
  600. static void flush(struct lh7a40x_ep *ep)
  601. {
  602. DEBUG("%s, %p\n", __FUNCTION__, ep);
  603. switch (ep->ep_type) {
  604. case ep_control:
  605. /* check, by implication c.f. 15.1.2.11 */
  606. break;
  607. case ep_bulk_in:
  608. case ep_interrupt:
  609. /* if(csr & USB_IN_CSR1_IN_PKT_RDY) */
  610. usb_set(USB_IN_CSR1_FIFO_FLUSH, ep->csr1);
  611. break;
  612. case ep_bulk_out:
  613. /* if(csr & USB_OUT_CSR1_OUT_PKT_RDY) */
  614. usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1);
  615. break;
  616. }
  617. }
  618. /**
  619. * lh7a40x_in_epn - handle IN interrupt
  620. */
  621. static void lh7a40x_in_epn(struct lh7a40x_udc *dev, u32 ep_idx, u32 intr)
  622. {
  623. u32 csr;
  624. struct lh7a40x_ep *ep = &dev->ep[ep_idx];
  625. struct lh7a40x_request *req;
  626. usb_set_index(ep_idx);
  627. csr = usb_read(ep->csr1);
  628. DEBUG("%s: %d, csr %x\n", __FUNCTION__, ep_idx, csr);
  629. if (csr & USB_IN_CSR1_SENT_STALL) {
  630. DEBUG("USB_IN_CSR1_SENT_STALL\n");
  631. usb_set(USB_IN_CSR1_SENT_STALL /*|USB_IN_CSR1_SEND_STALL */ ,
  632. ep->csr1);
  633. return;
  634. }
  635. if (!ep->desc) {
  636. DEBUG("%s: NO EP DESC\n", __FUNCTION__);
  637. return;
  638. }
  639. if (list_empty(&ep->queue))
  640. req = 0;
  641. else
  642. req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
  643. DEBUG("req: %p\n", req);
  644. if (!req)
  645. return;
  646. write_fifo(ep, req);
  647. }
  648. /* ********************************************************************************************* */
  649. /* Bulk OUT (recv)
  650. */
  651. static void lh7a40x_out_epn(struct lh7a40x_udc *dev, u32 ep_idx, u32 intr)
  652. {
  653. struct lh7a40x_ep *ep = &dev->ep[ep_idx];
  654. struct lh7a40x_request *req;
  655. DEBUG("%s: %d\n", __FUNCTION__, ep_idx);
  656. usb_set_index(ep_idx);
  657. if (ep->desc) {
  658. u32 csr;
  659. csr = usb_read(ep->csr1);
  660. while ((csr =
  661. usb_read(ep->
  662. csr1)) & (USB_OUT_CSR1_OUT_PKT_RDY |
  663. USB_OUT_CSR1_SENT_STALL)) {
  664. DEBUG("%s: %x\n", __FUNCTION__, csr);
  665. if (csr & USB_OUT_CSR1_SENT_STALL) {
  666. DEBUG("%s: stall sent, flush fifo\n",
  667. __FUNCTION__);
  668. /* usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1); */
  669. flush(ep);
  670. } else if (csr & USB_OUT_CSR1_OUT_PKT_RDY) {
  671. if (list_empty(&ep->queue))
  672. req = 0;
  673. else
  674. req =
  675. list_entry(ep->queue.next,
  676. struct lh7a40x_request,
  677. queue);
  678. if (!req) {
  679. printk("%s: NULL REQ %d\n",
  680. __FUNCTION__, ep_idx);
  681. flush(ep);
  682. break;
  683. } else {
  684. read_fifo(ep, req);
  685. }
  686. }
  687. }
  688. } else {
  689. /* Throw packet away.. */
  690. printk("%s: No descriptor?!?\n", __FUNCTION__);
  691. flush(ep);
  692. }
  693. }
  694. static void stop_activity(struct lh7a40x_udc *dev,
  695. struct usb_gadget_driver *driver)
  696. {
  697. int i;
  698. /* don't disconnect drivers more than once */
  699. if (dev->gadget.speed == USB_SPEED_UNKNOWN)
  700. driver = 0;
  701. dev->gadget.speed = USB_SPEED_UNKNOWN;
  702. /* prevent new request submissions, kill any outstanding requests */
  703. for (i = 0; i < UDC_MAX_ENDPOINTS; i++) {
  704. struct lh7a40x_ep *ep = &dev->ep[i];
  705. ep->stopped = 1;
  706. usb_set_index(i);
  707. nuke(ep, -ESHUTDOWN);
  708. }
  709. /* report disconnect; the driver is already quiesced */
  710. if (driver) {
  711. spin_unlock(&dev->lock);
  712. driver->disconnect(&dev->gadget);
  713. spin_lock(&dev->lock);
  714. }
  715. /* re-init driver-visible data structures */
  716. udc_reinit(dev);
  717. }
  718. /** Handle USB RESET interrupt
  719. */
  720. static void lh7a40x_reset_intr(struct lh7a40x_udc *dev)
  721. {
  722. #if 0 /* def CONFIG_ARCH_LH7A404 */
  723. /* Does not work always... */
  724. DEBUG("%s: %d\n", __FUNCTION__, dev->usb_address);
  725. if (!dev->usb_address) {
  726. /*usb_set(USB_RESET_IO, USB_RESET);
  727. mdelay(5);
  728. usb_clear(USB_RESET_IO, USB_RESET); */
  729. return;
  730. }
  731. /* Put the USB controller into reset. */
  732. usb_set(USB_RESET_IO, USB_RESET);
  733. /* Set Device ID to 0 */
  734. udc_set_address(dev, 0);
  735. /* Let PLL2 settle down */
  736. mdelay(5);
  737. /* Release the USB controller from reset */
  738. usb_clear(USB_RESET_IO, USB_RESET);
  739. /* Re-enable UDC */
  740. udc_enable(dev);
  741. #endif
  742. dev->gadget.speed = USB_SPEED_FULL;
  743. }
  744. /*
  745. * lh7a40x usb client interrupt handler.
  746. */
  747. static irqreturn_t lh7a40x_udc_irq(int irq, void *_dev)
  748. {
  749. struct lh7a40x_udc *dev = _dev;
  750. DEBUG("\n\n");
  751. spin_lock(&dev->lock);
  752. for (;;) {
  753. u32 intr_in = usb_read(USB_IN_INT);
  754. u32 intr_out = usb_read(USB_OUT_INT);
  755. u32 intr_int = usb_read(USB_INT);
  756. /* Test also against enable bits.. (lh7a40x errata).. Sigh.. */
  757. u32 in_en = usb_read(USB_IN_INT_EN);
  758. u32 out_en = usb_read(USB_OUT_INT_EN);
  759. if (!intr_out && !intr_in && !intr_int)
  760. break;
  761. DEBUG("%s (on state %s)\n", __FUNCTION__,
  762. state_names[dev->ep0state]);
  763. DEBUG("intr_out = %x\n", intr_out);
  764. DEBUG("intr_in = %x\n", intr_in);
  765. DEBUG("intr_int = %x\n", intr_int);
  766. if (intr_in) {
  767. usb_write(intr_in, USB_IN_INT);
  768. if ((intr_in & USB_IN_INT_EP1)
  769. && (in_en & USB_IN_INT_EP1)) {
  770. DEBUG("USB_IN_INT_EP1\n");
  771. lh7a40x_in_epn(dev, 1, intr_in);
  772. }
  773. if ((intr_in & USB_IN_INT_EP3)
  774. && (in_en & USB_IN_INT_EP3)) {
  775. DEBUG("USB_IN_INT_EP3\n");
  776. lh7a40x_in_epn(dev, 3, intr_in);
  777. }
  778. if (intr_in & USB_IN_INT_EP0) {
  779. DEBUG("USB_IN_INT_EP0 (control)\n");
  780. lh7a40x_handle_ep0(dev, intr_in);
  781. }
  782. }
  783. if (intr_out) {
  784. usb_write(intr_out, USB_OUT_INT);
  785. if ((intr_out & USB_OUT_INT_EP2)
  786. && (out_en & USB_OUT_INT_EP2)) {
  787. DEBUG("USB_OUT_INT_EP2\n");
  788. lh7a40x_out_epn(dev, 2, intr_out);
  789. }
  790. }
  791. if (intr_int) {
  792. usb_write(intr_int, USB_INT);
  793. if (intr_int & USB_INT_RESET_INT) {
  794. lh7a40x_reset_intr(dev);
  795. }
  796. if (intr_int & USB_INT_RESUME_INT) {
  797. DEBUG("USB resume\n");
  798. if (dev->gadget.speed != USB_SPEED_UNKNOWN
  799. && dev->driver
  800. && dev->driver->resume
  801. && is_usb_connected()) {
  802. dev->driver->resume(&dev->gadget);
  803. }
  804. }
  805. if (intr_int & USB_INT_SUSPEND_INT) {
  806. DEBUG("USB suspend%s\n",
  807. is_usb_connected()? "" : "+disconnect");
  808. if (!is_usb_connected()) {
  809. stop_activity(dev, dev->driver);
  810. } else if (dev->gadget.speed !=
  811. USB_SPEED_UNKNOWN && dev->driver
  812. && dev->driver->suspend) {
  813. dev->driver->suspend(&dev->gadget);
  814. }
  815. }
  816. }
  817. }
  818. spin_unlock(&dev->lock);
  819. return IRQ_HANDLED;
  820. }
  821. static int lh7a40x_ep_enable(struct usb_ep *_ep,
  822. const struct usb_endpoint_descriptor *desc)
  823. {
  824. struct lh7a40x_ep *ep;
  825. struct lh7a40x_udc *dev;
  826. unsigned long flags;
  827. DEBUG("%s, %p\n", __FUNCTION__, _ep);
  828. ep = container_of(_ep, struct lh7a40x_ep, ep);
  829. if (!_ep || !desc || ep->desc || _ep->name == ep0name
  830. || desc->bDescriptorType != USB_DT_ENDPOINT
  831. || ep->bEndpointAddress != desc->bEndpointAddress
  832. || ep_maxpacket(ep) < le16_to_cpu(desc->wMaxPacketSize)) {
  833. DEBUG("%s, bad ep or descriptor\n", __FUNCTION__);
  834. return -EINVAL;
  835. }
  836. /* xfer types must match, except that interrupt ~= bulk */
  837. if (ep->bmAttributes != desc->bmAttributes
  838. && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
  839. && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
  840. DEBUG("%s, %s type mismatch\n", __FUNCTION__, _ep->name);
  841. return -EINVAL;
  842. }
  843. /* hardware _could_ do smaller, but driver doesn't */
  844. if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
  845. && le16_to_cpu(desc->wMaxPacketSize) != ep_maxpacket(ep))
  846. || !desc->wMaxPacketSize) {
  847. DEBUG("%s, bad %s maxpacket\n", __FUNCTION__, _ep->name);
  848. return -ERANGE;
  849. }
  850. dev = ep->dev;
  851. if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
  852. DEBUG("%s, bogus device state\n", __FUNCTION__);
  853. return -ESHUTDOWN;
  854. }
  855. spin_lock_irqsave(&ep->dev->lock, flags);
  856. ep->stopped = 0;
  857. ep->desc = desc;
  858. ep->pio_irqs = 0;
  859. ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
  860. spin_unlock_irqrestore(&ep->dev->lock, flags);
  861. /* Reset halt state (does flush) */
  862. lh7a40x_set_halt(_ep, 0);
  863. DEBUG("%s: enabled %s\n", __FUNCTION__, _ep->name);
  864. return 0;
  865. }
  866. /** Disable EP
  867. * NOTE: Sets INDEX register
  868. */
  869. static int lh7a40x_ep_disable(struct usb_ep *_ep)
  870. {
  871. struct lh7a40x_ep *ep;
  872. unsigned long flags;
  873. DEBUG("%s, %p\n", __FUNCTION__, _ep);
  874. ep = container_of(_ep, struct lh7a40x_ep, ep);
  875. if (!_ep || !ep->desc) {
  876. DEBUG("%s, %s not enabled\n", __FUNCTION__,
  877. _ep ? ep->ep.name : NULL);
  878. return -EINVAL;
  879. }
  880. spin_lock_irqsave(&ep->dev->lock, flags);
  881. usb_set_index(ep_index(ep));
  882. /* Nuke all pending requests (does flush) */
  883. nuke(ep, -ESHUTDOWN);
  884. /* Disable ep IRQ */
  885. pio_irq_disable(ep_index(ep));
  886. ep->desc = 0;
  887. ep->stopped = 1;
  888. spin_unlock_irqrestore(&ep->dev->lock, flags);
  889. DEBUG("%s: disabled %s\n", __FUNCTION__, _ep->name);
  890. return 0;
  891. }
  892. static struct usb_request *lh7a40x_alloc_request(struct usb_ep *ep,
  893. gfp_t gfp_flags)
  894. {
  895. struct lh7a40x_request *req;
  896. DEBUG("%s, %p\n", __FUNCTION__, ep);
  897. req = kzalloc(sizeof(*req), gfp_flags);
  898. if (!req)
  899. return 0;
  900. INIT_LIST_HEAD(&req->queue);
  901. return &req->req;
  902. }
  903. static void lh7a40x_free_request(struct usb_ep *ep, struct usb_request *_req)
  904. {
  905. struct lh7a40x_request *req;
  906. DEBUG("%s, %p\n", __FUNCTION__, ep);
  907. req = container_of(_req, struct lh7a40x_request, req);
  908. WARN_ON(!list_empty(&req->queue));
  909. kfree(req);
  910. }
  911. /** Queue one request
  912. * Kickstart transfer if needed
  913. * NOTE: Sets INDEX register
  914. */
  915. static int lh7a40x_queue(struct usb_ep *_ep, struct usb_request *_req,
  916. gfp_t gfp_flags)
  917. {
  918. struct lh7a40x_request *req;
  919. struct lh7a40x_ep *ep;
  920. struct lh7a40x_udc *dev;
  921. unsigned long flags;
  922. DEBUG("\n\n\n%s, %p\n", __FUNCTION__, _ep);
  923. req = container_of(_req, struct lh7a40x_request, req);
  924. if (unlikely
  925. (!_req || !_req->complete || !_req->buf
  926. || !list_empty(&req->queue))) {
  927. DEBUG("%s, bad params\n", __FUNCTION__);
  928. return -EINVAL;
  929. }
  930. ep = container_of(_ep, struct lh7a40x_ep, ep);
  931. if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
  932. DEBUG("%s, bad ep\n", __FUNCTION__);
  933. return -EINVAL;
  934. }
  935. dev = ep->dev;
  936. if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
  937. DEBUG("%s, bogus device state %p\n", __FUNCTION__, dev->driver);
  938. return -ESHUTDOWN;
  939. }
  940. DEBUG("%s queue req %p, len %d buf %p\n", _ep->name, _req, _req->length,
  941. _req->buf);
  942. spin_lock_irqsave(&dev->lock, flags);
  943. _req->status = -EINPROGRESS;
  944. _req->actual = 0;
  945. /* kickstart this i/o queue? */
  946. DEBUG("Add to %d Q %d %d\n", ep_index(ep), list_empty(&ep->queue),
  947. ep->stopped);
  948. if (list_empty(&ep->queue) && likely(!ep->stopped)) {
  949. u32 csr;
  950. if (unlikely(ep_index(ep) == 0)) {
  951. /* EP0 */
  952. list_add_tail(&req->queue, &ep->queue);
  953. lh7a40x_ep0_kick(dev, ep);
  954. req = 0;
  955. } else if (ep_is_in(ep)) {
  956. /* EP1 & EP3 */
  957. usb_set_index(ep_index(ep));
  958. csr = usb_read(ep->csr1);
  959. pio_irq_enable(ep_index(ep));
  960. if ((csr & USB_IN_CSR1_FIFO_NOT_EMPTY) == 0) {
  961. if (write_fifo(ep, req) == 1)
  962. req = 0;
  963. }
  964. } else {
  965. /* EP2 */
  966. usb_set_index(ep_index(ep));
  967. csr = usb_read(ep->csr1);
  968. pio_irq_enable(ep_index(ep));
  969. if (!(csr & USB_OUT_CSR1_FIFO_FULL)) {
  970. if (read_fifo(ep, req) == 1)
  971. req = 0;
  972. }
  973. }
  974. }
  975. /* pio or dma irq handler advances the queue. */
  976. if (likely(req != 0))
  977. list_add_tail(&req->queue, &ep->queue);
  978. spin_unlock_irqrestore(&dev->lock, flags);
  979. return 0;
  980. }
  981. /* dequeue JUST ONE request */
  982. static int lh7a40x_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  983. {
  984. struct lh7a40x_ep *ep;
  985. struct lh7a40x_request *req;
  986. unsigned long flags;
  987. DEBUG("%s, %p\n", __FUNCTION__, _ep);
  988. ep = container_of(_ep, struct lh7a40x_ep, ep);
  989. if (!_ep || ep->ep.name == ep0name)
  990. return -EINVAL;
  991. spin_lock_irqsave(&ep->dev->lock, flags);
  992. /* make sure it's actually queued on this endpoint */
  993. list_for_each_entry(req, &ep->queue, queue) {
  994. if (&req->req == _req)
  995. break;
  996. }
  997. if (&req->req != _req) {
  998. spin_unlock_irqrestore(&ep->dev->lock, flags);
  999. return -EINVAL;
  1000. }
  1001. done(ep, req, -ECONNRESET);
  1002. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1003. return 0;
  1004. }
  1005. /** Halt specific EP
  1006. * Return 0 if success
  1007. * NOTE: Sets INDEX register to EP !
  1008. */
  1009. static int lh7a40x_set_halt(struct usb_ep *_ep, int value)
  1010. {
  1011. struct lh7a40x_ep *ep;
  1012. unsigned long flags;
  1013. ep = container_of(_ep, struct lh7a40x_ep, ep);
  1014. if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
  1015. DEBUG("%s, bad ep\n", __FUNCTION__);
  1016. return -EINVAL;
  1017. }
  1018. usb_set_index(ep_index(ep));
  1019. DEBUG("%s, ep %d, val %d\n", __FUNCTION__, ep_index(ep), value);
  1020. spin_lock_irqsave(&ep->dev->lock, flags);
  1021. if (ep_index(ep) == 0) {
  1022. /* EP0 */
  1023. usb_set(EP0_SEND_STALL, ep->csr1);
  1024. } else if (ep_is_in(ep)) {
  1025. u32 csr = usb_read(ep->csr1);
  1026. if (value && ((csr & USB_IN_CSR1_FIFO_NOT_EMPTY)
  1027. || !list_empty(&ep->queue))) {
  1028. /*
  1029. * Attempts to halt IN endpoints will fail (returning -EAGAIN)
  1030. * if any transfer requests are still queued, or if the controller
  1031. * FIFO still holds bytes that the host hasn't collected.
  1032. */
  1033. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1034. DEBUG
  1035. ("Attempt to halt IN endpoint failed (returning -EAGAIN) %d %d\n",
  1036. (csr & USB_IN_CSR1_FIFO_NOT_EMPTY),
  1037. !list_empty(&ep->queue));
  1038. return -EAGAIN;
  1039. }
  1040. flush(ep);
  1041. if (value)
  1042. usb_set(USB_IN_CSR1_SEND_STALL, ep->csr1);
  1043. else {
  1044. usb_clear(USB_IN_CSR1_SEND_STALL, ep->csr1);
  1045. usb_set(USB_IN_CSR1_CLR_DATA_TOGGLE, ep->csr1);
  1046. }
  1047. } else {
  1048. flush(ep);
  1049. if (value)
  1050. usb_set(USB_OUT_CSR1_SEND_STALL, ep->csr1);
  1051. else {
  1052. usb_clear(USB_OUT_CSR1_SEND_STALL, ep->csr1);
  1053. usb_set(USB_OUT_CSR1_CLR_DATA_REG, ep->csr1);
  1054. }
  1055. }
  1056. if (value) {
  1057. ep->stopped = 1;
  1058. } else {
  1059. ep->stopped = 0;
  1060. }
  1061. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1062. DEBUG("%s %s halted\n", _ep->name, value == 0 ? "NOT" : "IS");
  1063. return 0;
  1064. }
  1065. /** Return bytes in EP FIFO
  1066. * NOTE: Sets INDEX register to EP
  1067. */
  1068. static int lh7a40x_fifo_status(struct usb_ep *_ep)
  1069. {
  1070. u32 csr;
  1071. int count = 0;
  1072. struct lh7a40x_ep *ep;
  1073. ep = container_of(_ep, struct lh7a40x_ep, ep);
  1074. if (!_ep) {
  1075. DEBUG("%s, bad ep\n", __FUNCTION__);
  1076. return -ENODEV;
  1077. }
  1078. DEBUG("%s, %d\n", __FUNCTION__, ep_index(ep));
  1079. /* LPD can't report unclaimed bytes from IN fifos */
  1080. if (ep_is_in(ep))
  1081. return -EOPNOTSUPP;
  1082. usb_set_index(ep_index(ep));
  1083. csr = usb_read(ep->csr1);
  1084. if (ep->dev->gadget.speed != USB_SPEED_UNKNOWN ||
  1085. csr & USB_OUT_CSR1_OUT_PKT_RDY) {
  1086. count = usb_read(USB_OUT_FIFO_WC1);
  1087. }
  1088. return count;
  1089. }
  1090. /** Flush EP FIFO
  1091. * NOTE: Sets INDEX register to EP
  1092. */
  1093. static void lh7a40x_fifo_flush(struct usb_ep *_ep)
  1094. {
  1095. struct lh7a40x_ep *ep;
  1096. ep = container_of(_ep, struct lh7a40x_ep, ep);
  1097. if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
  1098. DEBUG("%s, bad ep\n", __FUNCTION__);
  1099. return;
  1100. }
  1101. usb_set_index(ep_index(ep));
  1102. flush(ep);
  1103. }
  1104. /****************************************************************/
  1105. /* End Point 0 related functions */
  1106. /****************************************************************/
  1107. /* return: 0 = still running, 1 = completed, negative = errno */
  1108. static int write_fifo_ep0(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
  1109. {
  1110. u32 max;
  1111. unsigned count;
  1112. int is_last;
  1113. max = ep_maxpacket(ep);
  1114. DEBUG_EP0("%s\n", __FUNCTION__);
  1115. count = write_packet(ep, req, max);
  1116. /* last packet is usually short (or a zlp) */
  1117. if (unlikely(count != max))
  1118. is_last = 1;
  1119. else {
  1120. if (likely(req->req.length != req->req.actual) || req->req.zero)
  1121. is_last = 0;
  1122. else
  1123. is_last = 1;
  1124. }
  1125. DEBUG_EP0("%s: wrote %s %d bytes%s %d left %p\n", __FUNCTION__,
  1126. ep->ep.name, count,
  1127. is_last ? "/L" : "", req->req.length - req->req.actual, req);
  1128. /* requests complete when all IN data is in the FIFO */
  1129. if (is_last) {
  1130. done(ep, req, 0);
  1131. return 1;
  1132. }
  1133. return 0;
  1134. }
  1135. static __inline__ int lh7a40x_fifo_read(struct lh7a40x_ep *ep,
  1136. unsigned char *cp, int max)
  1137. {
  1138. int bytes;
  1139. int count = usb_read(USB_OUT_FIFO_WC1);
  1140. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  1141. if (count > max)
  1142. count = max;
  1143. bytes = count;
  1144. while (count--)
  1145. *cp++ = *fifo & 0xFF;
  1146. return bytes;
  1147. }
  1148. static __inline__ void lh7a40x_fifo_write(struct lh7a40x_ep *ep,
  1149. unsigned char *cp, int count)
  1150. {
  1151. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  1152. DEBUG_EP0("fifo_write: %d %d\n", ep_index(ep), count);
  1153. while (count--)
  1154. *fifo = *cp++;
  1155. }
  1156. static int read_fifo_ep0(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
  1157. {
  1158. u32 csr;
  1159. u8 *buf;
  1160. unsigned bufferspace, count, is_short;
  1161. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  1162. DEBUG_EP0("%s\n", __FUNCTION__);
  1163. csr = usb_read(USB_EP0_CSR);
  1164. if (!(csr & USB_OUT_CSR1_OUT_PKT_RDY))
  1165. return 0;
  1166. buf = req->req.buf + req->req.actual;
  1167. prefetchw(buf);
  1168. bufferspace = req->req.length - req->req.actual;
  1169. /* read all bytes from this packet */
  1170. if (likely(csr & EP0_OUT_PKT_RDY)) {
  1171. count = usb_read(USB_OUT_FIFO_WC1);
  1172. req->req.actual += min(count, bufferspace);
  1173. } else /* zlp */
  1174. count = 0;
  1175. is_short = (count < ep->ep.maxpacket);
  1176. DEBUG_EP0("read %s %02x, %d bytes%s req %p %d/%d\n",
  1177. ep->ep.name, csr, count,
  1178. is_short ? "/S" : "", req, req->req.actual, req->req.length);
  1179. while (likely(count-- != 0)) {
  1180. u8 byte = (u8) (*fifo & 0xff);
  1181. if (unlikely(bufferspace == 0)) {
  1182. /* this happens when the driver's buffer
  1183. * is smaller than what the host sent.
  1184. * discard the extra data.
  1185. */
  1186. if (req->req.status != -EOVERFLOW)
  1187. DEBUG_EP0("%s overflow %d\n", ep->ep.name,
  1188. count);
  1189. req->req.status = -EOVERFLOW;
  1190. } else {
  1191. *buf++ = byte;
  1192. bufferspace--;
  1193. }
  1194. }
  1195. /* completion */
  1196. if (is_short || req->req.actual == req->req.length) {
  1197. done(ep, req, 0);
  1198. return 1;
  1199. }
  1200. /* finished that packet. the next one may be waiting... */
  1201. return 0;
  1202. }
  1203. /**
  1204. * udc_set_address - set the USB address for this device
  1205. * @address:
  1206. *
  1207. * Called from control endpoint function after it decodes a set address setup packet.
  1208. */
  1209. static void udc_set_address(struct lh7a40x_udc *dev, unsigned char address)
  1210. {
  1211. DEBUG_EP0("%s: %d\n", __FUNCTION__, address);
  1212. /* c.f. 15.1.2.2 Table 15-4 address will be used after DATA_END is set */
  1213. dev->usb_address = address;
  1214. usb_set((address & USB_FA_FUNCTION_ADDR), USB_FA);
  1215. usb_set(USB_FA_ADDR_UPDATE | (address & USB_FA_FUNCTION_ADDR), USB_FA);
  1216. /* usb_read(USB_FA); */
  1217. }
  1218. /*
  1219. * DATA_STATE_RECV (OUT_PKT_RDY)
  1220. * - if error
  1221. * set EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL bits
  1222. * - else
  1223. * set EP0_CLR_OUT bit
  1224. if last set EP0_DATA_END bit
  1225. */
  1226. static void lh7a40x_ep0_out(struct lh7a40x_udc *dev, u32 csr)
  1227. {
  1228. struct lh7a40x_request *req;
  1229. struct lh7a40x_ep *ep = &dev->ep[0];
  1230. int ret;
  1231. DEBUG_EP0("%s: %x\n", __FUNCTION__, csr);
  1232. if (list_empty(&ep->queue))
  1233. req = 0;
  1234. else
  1235. req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
  1236. if (req) {
  1237. if (req->req.length == 0) {
  1238. DEBUG_EP0("ZERO LENGTH OUT!\n");
  1239. usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
  1240. dev->ep0state = WAIT_FOR_SETUP;
  1241. return;
  1242. }
  1243. ret = read_fifo_ep0(ep, req);
  1244. if (ret) {
  1245. /* Done! */
  1246. DEBUG_EP0("%s: finished, waiting for status\n",
  1247. __FUNCTION__);
  1248. usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
  1249. dev->ep0state = WAIT_FOR_SETUP;
  1250. } else {
  1251. /* Not done yet.. */
  1252. DEBUG_EP0("%s: not finished\n", __FUNCTION__);
  1253. usb_set(EP0_CLR_OUT, USB_EP0_CSR);
  1254. }
  1255. } else {
  1256. DEBUG_EP0("NO REQ??!\n");
  1257. }
  1258. }
  1259. /*
  1260. * DATA_STATE_XMIT
  1261. */
  1262. static int lh7a40x_ep0_in(struct lh7a40x_udc *dev, u32 csr)
  1263. {
  1264. struct lh7a40x_request *req;
  1265. struct lh7a40x_ep *ep = &dev->ep[0];
  1266. int ret, need_zlp = 0;
  1267. DEBUG_EP0("%s: %x\n", __FUNCTION__, csr);
  1268. if (list_empty(&ep->queue))
  1269. req = 0;
  1270. else
  1271. req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
  1272. if (!req) {
  1273. DEBUG_EP0("%s: NULL REQ\n", __FUNCTION__);
  1274. return 0;
  1275. }
  1276. if (req->req.length == 0) {
  1277. usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
  1278. dev->ep0state = WAIT_FOR_SETUP;
  1279. return 1;
  1280. }
  1281. if (req->req.length - req->req.actual == EP0_PACKETSIZE) {
  1282. /* Next write will end with the packet size, */
  1283. /* so we need Zero-length-packet */
  1284. need_zlp = 1;
  1285. }
  1286. ret = write_fifo_ep0(ep, req);
  1287. if (ret == 1 && !need_zlp) {
  1288. /* Last packet */
  1289. DEBUG_EP0("%s: finished, waiting for status\n", __FUNCTION__);
  1290. usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
  1291. dev->ep0state = WAIT_FOR_SETUP;
  1292. } else {
  1293. DEBUG_EP0("%s: not finished\n", __FUNCTION__);
  1294. usb_set(EP0_IN_PKT_RDY, USB_EP0_CSR);
  1295. }
  1296. if (need_zlp) {
  1297. DEBUG_EP0("%s: Need ZLP!\n", __FUNCTION__);
  1298. usb_set(EP0_IN_PKT_RDY, USB_EP0_CSR);
  1299. dev->ep0state = DATA_STATE_NEED_ZLP;
  1300. }
  1301. return 1;
  1302. }
  1303. static int lh7a40x_handle_get_status(struct lh7a40x_udc *dev,
  1304. struct usb_ctrlrequest *ctrl)
  1305. {
  1306. struct lh7a40x_ep *ep0 = &dev->ep[0];
  1307. struct lh7a40x_ep *qep;
  1308. int reqtype = (ctrl->bRequestType & USB_RECIP_MASK);
  1309. u16 val = 0;
  1310. if (reqtype == USB_RECIP_INTERFACE) {
  1311. /* This is not supported.
  1312. * And according to the USB spec, this one does nothing..
  1313. * Just return 0
  1314. */
  1315. DEBUG_SETUP("GET_STATUS: USB_RECIP_INTERFACE\n");
  1316. } else if (reqtype == USB_RECIP_DEVICE) {
  1317. DEBUG_SETUP("GET_STATUS: USB_RECIP_DEVICE\n");
  1318. val |= (1 << 0); /* Self powered */
  1319. /*val |= (1<<1); *//* Remote wakeup */
  1320. } else if (reqtype == USB_RECIP_ENDPOINT) {
  1321. int ep_num = (ctrl->wIndex & ~USB_DIR_IN);
  1322. DEBUG_SETUP
  1323. ("GET_STATUS: USB_RECIP_ENDPOINT (%d), ctrl->wLength = %d\n",
  1324. ep_num, ctrl->wLength);
  1325. if (ctrl->wLength > 2 || ep_num > 3)
  1326. return -EOPNOTSUPP;
  1327. qep = &dev->ep[ep_num];
  1328. if (ep_is_in(qep) != ((ctrl->wIndex & USB_DIR_IN) ? 1 : 0)
  1329. && ep_index(qep) != 0) {
  1330. return -EOPNOTSUPP;
  1331. }
  1332. usb_set_index(ep_index(qep));
  1333. /* Return status on next IN token */
  1334. switch (qep->ep_type) {
  1335. case ep_control:
  1336. val =
  1337. (usb_read(qep->csr1) & EP0_SEND_STALL) ==
  1338. EP0_SEND_STALL;
  1339. break;
  1340. case ep_bulk_in:
  1341. case ep_interrupt:
  1342. val =
  1343. (usb_read(qep->csr1) & USB_IN_CSR1_SEND_STALL) ==
  1344. USB_IN_CSR1_SEND_STALL;
  1345. break;
  1346. case ep_bulk_out:
  1347. val =
  1348. (usb_read(qep->csr1) & USB_OUT_CSR1_SEND_STALL) ==
  1349. USB_OUT_CSR1_SEND_STALL;
  1350. break;
  1351. }
  1352. /* Back to EP0 index */
  1353. usb_set_index(0);
  1354. DEBUG_SETUP("GET_STATUS, ep: %d (%x), val = %d\n", ep_num,
  1355. ctrl->wIndex, val);
  1356. } else {
  1357. DEBUG_SETUP("Unknown REQ TYPE: %d\n", reqtype);
  1358. return -EOPNOTSUPP;
  1359. }
  1360. /* Clear "out packet ready" */
  1361. usb_set((EP0_CLR_OUT), USB_EP0_CSR);
  1362. /* Put status to FIFO */
  1363. lh7a40x_fifo_write(ep0, (u8 *) & val, sizeof(val));
  1364. /* Issue "In packet ready" */
  1365. usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
  1366. return 0;
  1367. }
  1368. /*
  1369. * WAIT_FOR_SETUP (OUT_PKT_RDY)
  1370. * - read data packet from EP0 FIFO
  1371. * - decode command
  1372. * - if error
  1373. * set EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL bits
  1374. * - else
  1375. * set EP0_CLR_OUT | EP0_DATA_END bits
  1376. */
  1377. static void lh7a40x_ep0_setup(struct lh7a40x_udc *dev, u32 csr)
  1378. {
  1379. struct lh7a40x_ep *ep = &dev->ep[0];
  1380. struct usb_ctrlrequest ctrl;
  1381. int i, bytes, is_in;
  1382. DEBUG_SETUP("%s: %x\n", __FUNCTION__, csr);
  1383. /* Nuke all previous transfers */
  1384. nuke(ep, -EPROTO);
  1385. /* read control req from fifo (8 bytes) */
  1386. bytes = lh7a40x_fifo_read(ep, (unsigned char *)&ctrl, 8);
  1387. DEBUG_SETUP("Read CTRL REQ %d bytes\n", bytes);
  1388. DEBUG_SETUP("CTRL.bRequestType = %d (is_in %d)\n", ctrl.bRequestType,
  1389. ctrl.bRequestType == USB_DIR_IN);
  1390. DEBUG_SETUP("CTRL.bRequest = %d\n", ctrl.bRequest);
  1391. DEBUG_SETUP("CTRL.wLength = %d\n", ctrl.wLength);
  1392. DEBUG_SETUP("CTRL.wValue = %d (%d)\n", ctrl.wValue, ctrl.wValue >> 8);
  1393. DEBUG_SETUP("CTRL.wIndex = %d\n", ctrl.wIndex);
  1394. /* Set direction of EP0 */
  1395. if (likely(ctrl.bRequestType & USB_DIR_IN)) {
  1396. ep->bEndpointAddress |= USB_DIR_IN;
  1397. is_in = 1;
  1398. } else {
  1399. ep->bEndpointAddress &= ~USB_DIR_IN;
  1400. is_in = 0;
  1401. }
  1402. dev->req_pending = 1;
  1403. /* Handle some SETUP packets ourselves */
  1404. switch (ctrl.bRequest) {
  1405. case USB_REQ_SET_ADDRESS:
  1406. if (ctrl.bRequestType != (USB_TYPE_STANDARD | USB_RECIP_DEVICE))
  1407. break;
  1408. DEBUG_SETUP("USB_REQ_SET_ADDRESS (%d)\n", ctrl.wValue);
  1409. udc_set_address(dev, ctrl.wValue);
  1410. usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
  1411. return;
  1412. case USB_REQ_GET_STATUS:{
  1413. if (lh7a40x_handle_get_status(dev, &ctrl) == 0)
  1414. return;
  1415. case USB_REQ_CLEAR_FEATURE:
  1416. case USB_REQ_SET_FEATURE:
  1417. if (ctrl.bRequestType == USB_RECIP_ENDPOINT) {
  1418. struct lh7a40x_ep *qep;
  1419. int ep_num = (ctrl.wIndex & 0x0f);
  1420. /* Support only HALT feature */
  1421. if (ctrl.wValue != 0 || ctrl.wLength != 0
  1422. || ep_num > 3 || ep_num < 1)
  1423. break;
  1424. qep = &dev->ep[ep_num];
  1425. spin_unlock(&dev->lock);
  1426. if (ctrl.bRequest == USB_REQ_SET_FEATURE) {
  1427. DEBUG_SETUP("SET_FEATURE (%d)\n",
  1428. ep_num);
  1429. lh7a40x_set_halt(&qep->ep, 1);
  1430. } else {
  1431. DEBUG_SETUP("CLR_FEATURE (%d)\n",
  1432. ep_num);
  1433. lh7a40x_set_halt(&qep->ep, 0);
  1434. }
  1435. spin_lock(&dev->lock);
  1436. usb_set_index(0);
  1437. /* Reply with a ZLP on next IN token */
  1438. usb_set((EP0_CLR_OUT | EP0_DATA_END),
  1439. USB_EP0_CSR);
  1440. return;
  1441. }
  1442. break;
  1443. }
  1444. default:
  1445. break;
  1446. }
  1447. if (likely(dev->driver)) {
  1448. /* device-2-host (IN) or no data setup command, process immediately */
  1449. spin_unlock(&dev->lock);
  1450. i = dev->driver->setup(&dev->gadget, &ctrl);
  1451. spin_lock(&dev->lock);
  1452. if (i < 0) {
  1453. /* setup processing failed, force stall */
  1454. DEBUG_SETUP
  1455. (" --> ERROR: gadget setup FAILED (stalling), setup returned %d\n",
  1456. i);
  1457. usb_set_index(0);
  1458. usb_set((EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL),
  1459. USB_EP0_CSR);
  1460. /* ep->stopped = 1; */
  1461. dev->ep0state = WAIT_FOR_SETUP;
  1462. }
  1463. }
  1464. }
  1465. /*
  1466. * DATA_STATE_NEED_ZLP
  1467. */
  1468. static void lh7a40x_ep0_in_zlp(struct lh7a40x_udc *dev, u32 csr)
  1469. {
  1470. DEBUG_EP0("%s: %x\n", __FUNCTION__, csr);
  1471. /* c.f. Table 15-14 */
  1472. usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
  1473. dev->ep0state = WAIT_FOR_SETUP;
  1474. }
  1475. /*
  1476. * handle ep0 interrupt
  1477. */
  1478. static void lh7a40x_handle_ep0(struct lh7a40x_udc *dev, u32 intr)
  1479. {
  1480. struct lh7a40x_ep *ep = &dev->ep[0];
  1481. u32 csr;
  1482. /* Set index 0 */
  1483. usb_set_index(0);
  1484. csr = usb_read(USB_EP0_CSR);
  1485. DEBUG_EP0("%s: csr = %x\n", __FUNCTION__, csr);
  1486. /*
  1487. * For overview of what we should be doing see c.f. Chapter 18.1.2.4
  1488. * We will follow that outline here modified by our own global state
  1489. * indication which provides hints as to what we think should be
  1490. * happening..
  1491. */
  1492. /*
  1493. * if SENT_STALL is set
  1494. * - clear the SENT_STALL bit
  1495. */
  1496. if (csr & EP0_SENT_STALL) {
  1497. DEBUG_EP0("%s: EP0_SENT_STALL is set: %x\n", __FUNCTION__, csr);
  1498. usb_clear((EP0_SENT_STALL | EP0_SEND_STALL), USB_EP0_CSR);
  1499. nuke(ep, -ECONNABORTED);
  1500. dev->ep0state = WAIT_FOR_SETUP;
  1501. return;
  1502. }
  1503. /*
  1504. * if a transfer is in progress && IN_PKT_RDY and OUT_PKT_RDY are clear
  1505. * - fill EP0 FIFO
  1506. * - if last packet
  1507. * - set IN_PKT_RDY | DATA_END
  1508. * - else
  1509. * set IN_PKT_RDY
  1510. */
  1511. if (!(csr & (EP0_IN_PKT_RDY | EP0_OUT_PKT_RDY))) {
  1512. DEBUG_EP0("%s: IN_PKT_RDY and OUT_PKT_RDY are clear\n",
  1513. __FUNCTION__);
  1514. switch (dev->ep0state) {
  1515. case DATA_STATE_XMIT:
  1516. DEBUG_EP0("continue with DATA_STATE_XMIT\n");
  1517. lh7a40x_ep0_in(dev, csr);
  1518. return;
  1519. case DATA_STATE_NEED_ZLP:
  1520. DEBUG_EP0("continue with DATA_STATE_NEED_ZLP\n");
  1521. lh7a40x_ep0_in_zlp(dev, csr);
  1522. return;
  1523. default:
  1524. /* Stall? */
  1525. DEBUG_EP0("Odd state!! state = %s\n",
  1526. state_names[dev->ep0state]);
  1527. dev->ep0state = WAIT_FOR_SETUP;
  1528. /* nuke(ep, 0); */
  1529. /* usb_set(EP0_SEND_STALL, ep->csr1); */
  1530. break;
  1531. }
  1532. }
  1533. /*
  1534. * if SETUP_END is set
  1535. * - abort the last transfer
  1536. * - set SERVICED_SETUP_END_BIT
  1537. */
  1538. if (csr & EP0_SETUP_END) {
  1539. DEBUG_EP0("%s: EP0_SETUP_END is set: %x\n", __FUNCTION__, csr);
  1540. usb_set(EP0_CLR_SETUP_END, USB_EP0_CSR);
  1541. nuke(ep, 0);
  1542. dev->ep0state = WAIT_FOR_SETUP;
  1543. }
  1544. /*
  1545. * if EP0_OUT_PKT_RDY is set
  1546. * - read data packet from EP0 FIFO
  1547. * - decode command
  1548. * - if error
  1549. * set SERVICED_OUT_PKT_RDY | DATA_END bits | SEND_STALL
  1550. * - else
  1551. * set SERVICED_OUT_PKT_RDY | DATA_END bits
  1552. */
  1553. if (csr & EP0_OUT_PKT_RDY) {
  1554. DEBUG_EP0("%s: EP0_OUT_PKT_RDY is set: %x\n", __FUNCTION__,
  1555. csr);
  1556. switch (dev->ep0state) {
  1557. case WAIT_FOR_SETUP:
  1558. DEBUG_EP0("WAIT_FOR_SETUP\n");
  1559. lh7a40x_ep0_setup(dev, csr);
  1560. break;
  1561. case DATA_STATE_RECV:
  1562. DEBUG_EP0("DATA_STATE_RECV\n");
  1563. lh7a40x_ep0_out(dev, csr);
  1564. break;
  1565. default:
  1566. /* send stall? */
  1567. DEBUG_EP0("strange state!! 2. send stall? state = %d\n",
  1568. dev->ep0state);
  1569. break;
  1570. }
  1571. }
  1572. }
  1573. static void lh7a40x_ep0_kick(struct lh7a40x_udc *dev, struct lh7a40x_ep *ep)
  1574. {
  1575. u32 csr;
  1576. usb_set_index(0);
  1577. csr = usb_read(USB_EP0_CSR);
  1578. DEBUG_EP0("%s: %x\n", __FUNCTION__, csr);
  1579. /* Clear "out packet ready" */
  1580. usb_set(EP0_CLR_OUT, USB_EP0_CSR);
  1581. if (ep_is_in(ep)) {
  1582. dev->ep0state = DATA_STATE_XMIT;
  1583. lh7a40x_ep0_in(dev, csr);
  1584. } else {
  1585. dev->ep0state = DATA_STATE_RECV;
  1586. lh7a40x_ep0_out(dev, csr);
  1587. }
  1588. }
  1589. /* ---------------------------------------------------------------------------
  1590. * device-scoped parts of the api to the usb controller hardware
  1591. * ---------------------------------------------------------------------------
  1592. */
  1593. static int lh7a40x_udc_get_frame(struct usb_gadget *_gadget)
  1594. {
  1595. u32 frame1 = usb_read(USB_FRM_NUM1); /* Least significant 8 bits */
  1596. u32 frame2 = usb_read(USB_FRM_NUM2); /* Most significant 3 bits */
  1597. DEBUG("%s, %p\n", __FUNCTION__, _gadget);
  1598. return ((frame2 & 0x07) << 8) | (frame1 & 0xff);
  1599. }
  1600. static int lh7a40x_udc_wakeup(struct usb_gadget *_gadget)
  1601. {
  1602. /* host may not have enabled remote wakeup */
  1603. /*if ((UDCCS0 & UDCCS0_DRWF) == 0)
  1604. return -EHOSTUNREACH;
  1605. udc_set_mask_UDCCR(UDCCR_RSM); */
  1606. return -ENOTSUPP;
  1607. }
  1608. static const struct usb_gadget_ops lh7a40x_udc_ops = {
  1609. .get_frame = lh7a40x_udc_get_frame,
  1610. .wakeup = lh7a40x_udc_wakeup,
  1611. /* current versions must always be self-powered */
  1612. };
  1613. static void nop_release(struct device *dev)
  1614. {
  1615. DEBUG("%s %s\n", __FUNCTION__, dev->bus_id);
  1616. }
  1617. static struct lh7a40x_udc memory = {
  1618. .usb_address = 0,
  1619. .gadget = {
  1620. .ops = &lh7a40x_udc_ops,
  1621. .ep0 = &memory.ep[0].ep,
  1622. .name = driver_name,
  1623. .dev = {
  1624. .bus_id = "gadget",
  1625. .release = nop_release,
  1626. },
  1627. },
  1628. /* control endpoint */
  1629. .ep[0] = {
  1630. .ep = {
  1631. .name = ep0name,
  1632. .ops = &lh7a40x_ep_ops,
  1633. .maxpacket = EP0_PACKETSIZE,
  1634. },
  1635. .dev = &memory,
  1636. .bEndpointAddress = 0,
  1637. .bmAttributes = 0,
  1638. .ep_type = ep_control,
  1639. .fifo = io_p2v(USB_EP0_FIFO),
  1640. .csr1 = USB_EP0_CSR,
  1641. .csr2 = USB_EP0_CSR,
  1642. },
  1643. /* first group of endpoints */
  1644. .ep[1] = {
  1645. .ep = {
  1646. .name = "ep1in-bulk",
  1647. .ops = &lh7a40x_ep_ops,
  1648. .maxpacket = 64,
  1649. },
  1650. .dev = &memory,
  1651. .bEndpointAddress = USB_DIR_IN | 1,
  1652. .bmAttributes = USB_ENDPOINT_XFER_BULK,
  1653. .ep_type = ep_bulk_in,
  1654. .fifo = io_p2v(USB_EP1_FIFO),
  1655. .csr1 = USB_IN_CSR1,
  1656. .csr2 = USB_IN_CSR2,
  1657. },
  1658. .ep[2] = {
  1659. .ep = {
  1660. .name = "ep2out-bulk",
  1661. .ops = &lh7a40x_ep_ops,
  1662. .maxpacket = 64,
  1663. },
  1664. .dev = &memory,
  1665. .bEndpointAddress = 2,
  1666. .bmAttributes = USB_ENDPOINT_XFER_BULK,
  1667. .ep_type = ep_bulk_out,
  1668. .fifo = io_p2v(USB_EP2_FIFO),
  1669. .csr1 = USB_OUT_CSR1,
  1670. .csr2 = USB_OUT_CSR2,
  1671. },
  1672. .ep[3] = {
  1673. .ep = {
  1674. .name = "ep3in-int",
  1675. .ops = &lh7a40x_ep_ops,
  1676. .maxpacket = 64,
  1677. },
  1678. .dev = &memory,
  1679. .bEndpointAddress = USB_DIR_IN | 3,
  1680. .bmAttributes = USB_ENDPOINT_XFER_INT,
  1681. .ep_type = ep_interrupt,
  1682. .fifo = io_p2v(USB_EP3_FIFO),
  1683. .csr1 = USB_IN_CSR1,
  1684. .csr2 = USB_IN_CSR2,
  1685. },
  1686. };
  1687. /*
  1688. * probe - binds to the platform device
  1689. */
  1690. static int lh7a40x_udc_probe(struct platform_device *pdev)
  1691. {
  1692. struct lh7a40x_udc *dev = &memory;
  1693. int retval;
  1694. DEBUG("%s: %p\n", __FUNCTION__, pdev);
  1695. spin_lock_init(&dev->lock);
  1696. dev->dev = &pdev->dev;
  1697. device_initialize(&dev->gadget.dev);
  1698. dev->gadget.dev.parent = &pdev->dev;
  1699. the_controller = dev;
  1700. platform_set_drvdata(pdev, dev);
  1701. udc_disable(dev);
  1702. udc_reinit(dev);
  1703. /* irq setup after old hardware state is cleaned up */
  1704. retval =
  1705. request_irq(IRQ_USBINTR, lh7a40x_udc_irq, IRQF_DISABLED, driver_name,
  1706. dev);
  1707. if (retval != 0) {
  1708. DEBUG(KERN_ERR "%s: can't get irq %i, err %d\n", driver_name,
  1709. IRQ_USBINTR, retval);
  1710. return -EBUSY;
  1711. }
  1712. create_proc_files();
  1713. return retval;
  1714. }
  1715. static int lh7a40x_udc_remove(struct platform_device *pdev)
  1716. {
  1717. struct lh7a40x_udc *dev = platform_get_drvdata(pdev);
  1718. DEBUG("%s: %p\n", __FUNCTION__, pdev);
  1719. if (dev->driver)
  1720. return -EBUSY;
  1721. udc_disable(dev);
  1722. remove_proc_files();
  1723. free_irq(IRQ_USBINTR, dev);
  1724. platform_set_drvdata(pdev, 0);
  1725. the_controller = 0;
  1726. return 0;
  1727. }
  1728. /*-------------------------------------------------------------------------*/
  1729. static struct platform_driver udc_driver = {
  1730. .probe = lh7a40x_udc_probe,
  1731. .remove = lh7a40x_udc_remove,
  1732. /* FIXME power management support */
  1733. /* .suspend = ... disable UDC */
  1734. /* .resume = ... re-enable UDC */
  1735. .driver = {
  1736. .name = (char *)driver_name,
  1737. .owner = THIS_MODULE,
  1738. },
  1739. };
  1740. static int __init udc_init(void)
  1741. {
  1742. DEBUG("%s: %s version %s\n", __FUNCTION__, driver_name, DRIVER_VERSION);
  1743. return platform_driver_register(&udc_driver);
  1744. }
  1745. static void __exit udc_exit(void)
  1746. {
  1747. platform_driver_unregister(&udc_driver);
  1748. }
  1749. module_init(udc_init);
  1750. module_exit(udc_exit);
  1751. MODULE_DESCRIPTION(DRIVER_DESC);
  1752. MODULE_AUTHOR("Mikko Lahteenmaki, Bo Henriksen");
  1753. MODULE_LICENSE("GPL");