sun4d_smp.c 10 KB

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  1. /* sun4d_smp.c: Sparc SS1000/SC2000 SMP support.
  2. *
  3. * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
  4. *
  5. * Based on sun4m's smp.c, which is:
  6. * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
  7. */
  8. #include <asm/head.h>
  9. #include <linux/kernel.h>
  10. #include <linux/sched.h>
  11. #include <linux/threads.h>
  12. #include <linux/smp.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/kernel_stat.h>
  15. #include <linux/init.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/mm.h>
  18. #include <linux/swap.h>
  19. #include <linux/profile.h>
  20. #include <linux/delay.h>
  21. #include <asm/ptrace.h>
  22. #include <asm/atomic.h>
  23. #include <asm/irq_regs.h>
  24. #include <asm/irq.h>
  25. #include <asm/page.h>
  26. #include <asm/pgalloc.h>
  27. #include <asm/pgtable.h>
  28. #include <asm/oplib.h>
  29. #include <asm/sbi.h>
  30. #include <asm/tlbflush.h>
  31. #include <asm/cacheflush.h>
  32. #include <asm/cpudata.h>
  33. #include "irq.h"
  34. #define IRQ_CROSS_CALL 15
  35. extern ctxd_t *srmmu_ctx_table_phys;
  36. static volatile int smp_processors_ready = 0;
  37. static int smp_highest_cpu;
  38. extern volatile unsigned long cpu_callin_map[NR_CPUS];
  39. extern cpuinfo_sparc cpu_data[NR_CPUS];
  40. extern unsigned char boot_cpu_id;
  41. extern volatile int smp_process_available;
  42. extern cpumask_t smp_commenced_mask;
  43. extern int __smp4d_processor_id(void);
  44. /* #define SMP_DEBUG */
  45. #ifdef SMP_DEBUG
  46. #define SMP_PRINTK(x) printk x
  47. #else
  48. #define SMP_PRINTK(x)
  49. #endif
  50. static inline unsigned long swap(volatile unsigned long *ptr, unsigned long val)
  51. {
  52. __asm__ __volatile__("swap [%1], %0\n\t" :
  53. "=&r" (val), "=&r" (ptr) :
  54. "0" (val), "1" (ptr));
  55. return val;
  56. }
  57. static void smp_setup_percpu_timer(void);
  58. extern void cpu_probe(void);
  59. extern void sun4d_distribute_irqs(void);
  60. void __init smp4d_callin(void)
  61. {
  62. int cpuid = hard_smp4d_processor_id();
  63. extern spinlock_t sun4d_imsk_lock;
  64. unsigned long flags;
  65. /* Show we are alive */
  66. cpu_leds[cpuid] = 0x6;
  67. show_leds(cpuid);
  68. /* Enable level15 interrupt, disable level14 interrupt for now */
  69. cc_set_imsk((cc_get_imsk() & ~0x8000) | 0x4000);
  70. local_flush_cache_all();
  71. local_flush_tlb_all();
  72. /*
  73. * Unblock the master CPU _only_ when the scheduler state
  74. * of all secondary CPUs will be up-to-date, so after
  75. * the SMP initialization the master will be just allowed
  76. * to call the scheduler code.
  77. */
  78. /* Get our local ticker going. */
  79. smp_setup_percpu_timer();
  80. calibrate_delay();
  81. smp_store_cpu_info(cpuid);
  82. local_flush_cache_all();
  83. local_flush_tlb_all();
  84. /* Allow master to continue. */
  85. swap((unsigned long *)&cpu_callin_map[cpuid], 1);
  86. local_flush_cache_all();
  87. local_flush_tlb_all();
  88. cpu_probe();
  89. while((unsigned long)current_set[cpuid] < PAGE_OFFSET)
  90. barrier();
  91. while(current_set[cpuid]->cpu != cpuid)
  92. barrier();
  93. /* Fix idle thread fields. */
  94. __asm__ __volatile__("ld [%0], %%g6\n\t"
  95. : : "r" (&current_set[cpuid])
  96. : "memory" /* paranoid */);
  97. cpu_leds[cpuid] = 0x9;
  98. show_leds(cpuid);
  99. /* Attach to the address space of init_task. */
  100. atomic_inc(&init_mm.mm_count);
  101. current->active_mm = &init_mm;
  102. local_flush_cache_all();
  103. local_flush_tlb_all();
  104. local_irq_enable(); /* We don't allow PIL 14 yet */
  105. while (!cpu_isset(cpuid, smp_commenced_mask))
  106. barrier();
  107. spin_lock_irqsave(&sun4d_imsk_lock, flags);
  108. cc_set_imsk(cc_get_imsk() & ~0x4000); /* Allow PIL 14 as well */
  109. spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
  110. cpu_set(cpuid, cpu_online_map);
  111. }
  112. extern void init_IRQ(void);
  113. extern void cpu_panic(void);
  114. /*
  115. * Cycle through the processors asking the PROM to start each one.
  116. */
  117. extern struct linux_prom_registers smp_penguin_ctable;
  118. extern unsigned long trapbase_cpu1[];
  119. extern unsigned long trapbase_cpu2[];
  120. extern unsigned long trapbase_cpu3[];
  121. void __init smp4d_boot_cpus(void)
  122. {
  123. if (boot_cpu_id)
  124. current_set[0] = NULL;
  125. smp_setup_percpu_timer();
  126. local_flush_cache_all();
  127. }
  128. int __cpuinit smp4d_boot_one_cpu(int i)
  129. {
  130. extern unsigned long sun4d_cpu_startup;
  131. unsigned long *entry = &sun4d_cpu_startup;
  132. struct task_struct *p;
  133. int timeout;
  134. int cpu_node;
  135. cpu_find_by_instance(i, &cpu_node,NULL);
  136. /* Cook up an idler for this guy. */
  137. p = fork_idle(i);
  138. current_set[i] = task_thread_info(p);
  139. /*
  140. * Initialize the contexts table
  141. * Since the call to prom_startcpu() trashes the structure,
  142. * we need to re-initialize it for each cpu
  143. */
  144. smp_penguin_ctable.which_io = 0;
  145. smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
  146. smp_penguin_ctable.reg_size = 0;
  147. /* whirrr, whirrr, whirrrrrrrrr... */
  148. SMP_PRINTK(("Starting CPU %d at %p \n", i, entry));
  149. local_flush_cache_all();
  150. prom_startcpu(cpu_node,
  151. &smp_penguin_ctable, 0, (char *)entry);
  152. SMP_PRINTK(("prom_startcpu returned :)\n"));
  153. /* wheee... it's going... */
  154. for(timeout = 0; timeout < 10000; timeout++) {
  155. if(cpu_callin_map[i])
  156. break;
  157. udelay(200);
  158. }
  159. if (!(cpu_callin_map[i])) {
  160. printk("Processor %d is stuck.\n", i);
  161. return -ENODEV;
  162. }
  163. local_flush_cache_all();
  164. return 0;
  165. }
  166. void __init smp4d_smp_done(void)
  167. {
  168. int i, first;
  169. int *prev;
  170. /* setup cpu list for irq rotation */
  171. first = 0;
  172. prev = &first;
  173. for (i = 0; i < NR_CPUS; i++)
  174. if (cpu_online(i)) {
  175. *prev = i;
  176. prev = &cpu_data(i).next;
  177. }
  178. *prev = first;
  179. local_flush_cache_all();
  180. /* Free unneeded trap tables */
  181. ClearPageReserved(virt_to_page(trapbase_cpu1));
  182. init_page_count(virt_to_page(trapbase_cpu1));
  183. free_page((unsigned long)trapbase_cpu1);
  184. totalram_pages++;
  185. num_physpages++;
  186. ClearPageReserved(virt_to_page(trapbase_cpu2));
  187. init_page_count(virt_to_page(trapbase_cpu2));
  188. free_page((unsigned long)trapbase_cpu2);
  189. totalram_pages++;
  190. num_physpages++;
  191. ClearPageReserved(virt_to_page(trapbase_cpu3));
  192. init_page_count(virt_to_page(trapbase_cpu3));
  193. free_page((unsigned long)trapbase_cpu3);
  194. totalram_pages++;
  195. num_physpages++;
  196. /* Ok, they are spinning and ready to go. */
  197. smp_processors_ready = 1;
  198. sun4d_distribute_irqs();
  199. }
  200. static struct smp_funcall {
  201. smpfunc_t func;
  202. unsigned long arg1;
  203. unsigned long arg2;
  204. unsigned long arg3;
  205. unsigned long arg4;
  206. unsigned long arg5;
  207. unsigned char processors_in[NR_CPUS]; /* Set when ipi entered. */
  208. unsigned char processors_out[NR_CPUS]; /* Set when ipi exited. */
  209. } ccall_info __attribute__((aligned(8)));
  210. static DEFINE_SPINLOCK(cross_call_lock);
  211. /* Cross calls must be serialized, at least currently. */
  212. void smp4d_cross_call(smpfunc_t func, unsigned long arg1, unsigned long arg2,
  213. unsigned long arg3, unsigned long arg4, unsigned long arg5)
  214. {
  215. if(smp_processors_ready) {
  216. register int high = smp_highest_cpu;
  217. unsigned long flags;
  218. spin_lock_irqsave(&cross_call_lock, flags);
  219. {
  220. /* If you make changes here, make sure gcc generates proper code... */
  221. register smpfunc_t f asm("i0") = func;
  222. register unsigned long a1 asm("i1") = arg1;
  223. register unsigned long a2 asm("i2") = arg2;
  224. register unsigned long a3 asm("i3") = arg3;
  225. register unsigned long a4 asm("i4") = arg4;
  226. register unsigned long a5 asm("i5") = arg5;
  227. __asm__ __volatile__(
  228. "std %0, [%6]\n\t"
  229. "std %2, [%6 + 8]\n\t"
  230. "std %4, [%6 + 16]\n\t" : :
  231. "r"(f), "r"(a1), "r"(a2), "r"(a3), "r"(a4), "r"(a5),
  232. "r" (&ccall_info.func));
  233. }
  234. /* Init receive/complete mapping, plus fire the IPI's off. */
  235. {
  236. cpumask_t mask;
  237. register int i;
  238. mask = cpumask_of_cpu(hard_smp4d_processor_id());
  239. cpus_andnot(mask, cpu_online_map, mask);
  240. for(i = 0; i <= high; i++) {
  241. if (cpu_isset(i, mask)) {
  242. ccall_info.processors_in[i] = 0;
  243. ccall_info.processors_out[i] = 0;
  244. sun4d_send_ipi(i, IRQ_CROSS_CALL);
  245. }
  246. }
  247. }
  248. {
  249. register int i;
  250. i = 0;
  251. do {
  252. while(!ccall_info.processors_in[i])
  253. barrier();
  254. } while(++i <= high);
  255. i = 0;
  256. do {
  257. while(!ccall_info.processors_out[i])
  258. barrier();
  259. } while(++i <= high);
  260. }
  261. spin_unlock_irqrestore(&cross_call_lock, flags);
  262. }
  263. }
  264. /* Running cross calls. */
  265. void smp4d_cross_call_irq(void)
  266. {
  267. int i = hard_smp4d_processor_id();
  268. ccall_info.processors_in[i] = 1;
  269. ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
  270. ccall_info.arg4, ccall_info.arg5);
  271. ccall_info.processors_out[i] = 1;
  272. }
  273. void smp4d_percpu_timer_interrupt(struct pt_regs *regs)
  274. {
  275. struct pt_regs *old_regs;
  276. int cpu = hard_smp4d_processor_id();
  277. static int cpu_tick[NR_CPUS];
  278. static char led_mask[] = { 0xe, 0xd, 0xb, 0x7, 0xb, 0xd };
  279. old_regs = set_irq_regs(regs);
  280. bw_get_prof_limit(cpu);
  281. bw_clear_intr_mask(0, 1); /* INTR_TABLE[0] & 1 is Profile IRQ */
  282. cpu_tick[cpu]++;
  283. if (!(cpu_tick[cpu] & 15)) {
  284. if (cpu_tick[cpu] == 0x60)
  285. cpu_tick[cpu] = 0;
  286. cpu_leds[cpu] = led_mask[cpu_tick[cpu] >> 4];
  287. show_leds(cpu);
  288. }
  289. profile_tick(CPU_PROFILING);
  290. if(!--prof_counter(cpu)) {
  291. int user = user_mode(regs);
  292. irq_enter();
  293. update_process_times(user);
  294. irq_exit();
  295. prof_counter(cpu) = prof_multiplier(cpu);
  296. }
  297. set_irq_regs(old_regs);
  298. }
  299. extern unsigned int lvl14_resolution;
  300. static void __init smp_setup_percpu_timer(void)
  301. {
  302. int cpu = hard_smp4d_processor_id();
  303. prof_counter(cpu) = prof_multiplier(cpu) = 1;
  304. load_profile_irq(cpu, lvl14_resolution);
  305. }
  306. void __init smp4d_blackbox_id(unsigned *addr)
  307. {
  308. int rd = *addr & 0x3e000000;
  309. addr[0] = 0xc0800800 | rd; /* lda [%g0] ASI_M_VIKING_TMP1, reg */
  310. addr[1] = 0x01000000; /* nop */
  311. addr[2] = 0x01000000; /* nop */
  312. }
  313. void __init smp4d_blackbox_current(unsigned *addr)
  314. {
  315. int rd = *addr & 0x3e000000;
  316. addr[0] = 0xc0800800 | rd; /* lda [%g0] ASI_M_VIKING_TMP1, reg */
  317. addr[2] = 0x81282002 | rd | (rd >> 11); /* sll reg, 2, reg */
  318. addr[4] = 0x01000000; /* nop */
  319. }
  320. void __init sun4d_init_smp(void)
  321. {
  322. int i;
  323. extern unsigned int t_nmi[], linux_trap_ipi15_sun4d[], linux_trap_ipi15_sun4m[];
  324. /* Patch ipi15 trap table */
  325. t_nmi[1] = t_nmi[1] + (linux_trap_ipi15_sun4d - linux_trap_ipi15_sun4m);
  326. /* And set btfixup... */
  327. BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4d_blackbox_id);
  328. BTFIXUPSET_BLACKBOX(load_current, smp4d_blackbox_current);
  329. BTFIXUPSET_CALL(smp_cross_call, smp4d_cross_call, BTFIXUPCALL_NORM);
  330. BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4d_processor_id, BTFIXUPCALL_NORM);
  331. for (i = 0; i < NR_CPUS; i++) {
  332. ccall_info.processors_in[i] = 1;
  333. ccall_info.processors_out[i] = 1;
  334. }
  335. }