mt2266.c 7.5 KB

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  1. /*
  2. * Driver for Microtune MT2266 "Direct conversion low power broadband tuner"
  3. *
  4. * Copyright (c) 2007 Olivier DANET <odanet@caramail.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. */
  16. #include <linux/module.h>
  17. #include <linux/moduleparam.h>
  18. #include <linux/delay.h>
  19. #include <linux/dvb/frontend.h>
  20. #include <linux/i2c.h>
  21. #include "dvb_frontend.h"
  22. #include "mt2266.h"
  23. #define I2C_ADDRESS 0x60
  24. #define REG_PART_REV 0
  25. #define REG_TUNE 1
  26. #define REG_BAND 6
  27. #define REG_BANDWIDTH 8
  28. #define REG_LOCK 0x12
  29. #define PART_REV 0x85
  30. struct mt2266_priv {
  31. struct mt2266_config *cfg;
  32. struct i2c_adapter *i2c;
  33. u32 frequency;
  34. u32 bandwidth;
  35. };
  36. /* Here, frequencies are expressed in kiloHertz to avoid 32 bits overflows */
  37. static int debug;
  38. module_param(debug, int, 0644);
  39. MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
  40. #define dprintk(args...) do { if (debug) {printk(KERN_DEBUG "MT2266: " args); printk("\n"); }} while (0)
  41. // Reads a single register
  42. static int mt2266_readreg(struct mt2266_priv *priv, u8 reg, u8 *val)
  43. {
  44. struct i2c_msg msg[2] = {
  45. { .addr = priv->cfg->i2c_address, .flags = 0, .buf = &reg, .len = 1 },
  46. { .addr = priv->cfg->i2c_address, .flags = I2C_M_RD, .buf = val, .len = 1 },
  47. };
  48. if (i2c_transfer(priv->i2c, msg, 2) != 2) {
  49. printk(KERN_WARNING "MT2266 I2C read failed\n");
  50. return -EREMOTEIO;
  51. }
  52. return 0;
  53. }
  54. // Writes a single register
  55. static int mt2266_writereg(struct mt2266_priv *priv, u8 reg, u8 val)
  56. {
  57. u8 buf[2] = { reg, val };
  58. struct i2c_msg msg = {
  59. .addr = priv->cfg->i2c_address, .flags = 0, .buf = buf, .len = 2
  60. };
  61. if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
  62. printk(KERN_WARNING "MT2266 I2C write failed\n");
  63. return -EREMOTEIO;
  64. }
  65. return 0;
  66. }
  67. // Writes a set of consecutive registers
  68. static int mt2266_writeregs(struct mt2266_priv *priv,u8 *buf, u8 len)
  69. {
  70. struct i2c_msg msg = {
  71. .addr = priv->cfg->i2c_address, .flags = 0, .buf = buf, .len = len
  72. };
  73. if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
  74. printk(KERN_WARNING "MT2266 I2C write failed (len=%i)\n",(int)len);
  75. return -EREMOTEIO;
  76. }
  77. return 0;
  78. }
  79. // Initialisation sequences
  80. static u8 mt2266_init1[] = {
  81. REG_TUNE,
  82. 0x00, 0x00, 0x28, 0x00, 0x52, 0x99, 0x3f };
  83. static u8 mt2266_init2[] = {
  84. 0x17, 0x6d, 0x71, 0x61, 0xc0, 0xbf, 0xff, 0xdc, 0x00, 0x0a,
  85. 0xd4, 0x03, 0x64, 0x64, 0x64, 0x64, 0x22, 0xaa, 0xf2, 0x1e, 0x80, 0x14, 0x01, 0x01, 0x01, 0x01,
  86. 0x01, 0x01, 0x7f, 0x5e, 0x3f, 0xff, 0xff, 0xff, 0x00, 0x77, 0x0f, 0x2d };
  87. static u8 mt2266_init_8mhz[] = {
  88. REG_BANDWIDTH,
  89. 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22 };
  90. static u8 mt2266_init_7mhz[] = {
  91. REG_BANDWIDTH,
  92. 0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32 };
  93. static u8 mt2266_init_6mhz[] = {
  94. REG_BANDWIDTH,
  95. 0xa7, 0xa7, 0xa7, 0xa7, 0xa7, 0xa7, 0xa7, 0xa7 };
  96. #define FREF 30000 // Quartz oscillator 30 MHz
  97. static int mt2266_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  98. {
  99. struct mt2266_priv *priv;
  100. int ret=0;
  101. u32 freq;
  102. u32 tune;
  103. u8 lnaband;
  104. u8 b[10];
  105. int i;
  106. priv = fe->tuner_priv;
  107. mt2266_writereg(priv,0x17,0x6d);
  108. mt2266_writereg(priv,0x1c,0xff);
  109. freq = params->frequency / 1000; // Hz -> kHz
  110. priv->bandwidth = (fe->ops.info.type == FE_OFDM) ? params->u.ofdm.bandwidth : 0;
  111. priv->frequency = freq * 1000;
  112. tune=2 * freq * (8192/16) / (FREF/16);
  113. if (freq <= 495000) lnaband = 0xEE; else
  114. if (freq <= 525000) lnaband = 0xDD; else
  115. if (freq <= 550000) lnaband = 0xCC; else
  116. if (freq <= 580000) lnaband = 0xBB; else
  117. if (freq <= 605000) lnaband = 0xAA; else
  118. if (freq <= 630000) lnaband = 0x99; else
  119. if (freq <= 655000) lnaband = 0x88; else
  120. if (freq <= 685000) lnaband = 0x77; else
  121. if (freq <= 710000) lnaband = 0x66; else
  122. if (freq <= 735000) lnaband = 0x55; else
  123. if (freq <= 765000) lnaband = 0x44; else
  124. if (freq <= 802000) lnaband = 0x33; else
  125. if (freq <= 840000) lnaband = 0x22; else lnaband = 0x11;
  126. msleep(100);
  127. mt2266_writeregs(priv,(params->u.ofdm.bandwidth==BANDWIDTH_6_MHZ)?mt2266_init_6mhz:
  128. (params->u.ofdm.bandwidth==BANDWIDTH_7_MHZ)?mt2266_init_7mhz:
  129. mt2266_init_8mhz,sizeof(mt2266_init_8mhz));
  130. b[0] = REG_TUNE;
  131. b[1] = (tune >> 8) & 0x1F;
  132. b[2] = tune & 0xFF;
  133. b[3] = tune >> 13;
  134. mt2266_writeregs(priv,b,4);
  135. dprintk("set_parms: tune=%d band=%d",(int)tune,(int)lnaband);
  136. dprintk("set_parms: [1..3]: %2x %2x %2x",(int)b[1],(int)b[2],(int)b[3]);
  137. b[0] = 0x05;
  138. b[1] = 0x62;
  139. b[2] = lnaband;
  140. mt2266_writeregs(priv,b,3);
  141. //Waits for pll lock or timeout
  142. i = 0;
  143. do {
  144. mt2266_readreg(priv,REG_LOCK,b);
  145. if ((b[0] & 0x40)==0x40)
  146. break;
  147. msleep(10);
  148. i++;
  149. } while (i<10);
  150. dprintk("Lock when i=%i",(int)i);
  151. return ret;
  152. }
  153. static void mt2266_calibrate(struct mt2266_priv *priv)
  154. {
  155. mt2266_writereg(priv,0x11,0x03);
  156. mt2266_writereg(priv,0x11,0x01);
  157. mt2266_writeregs(priv,mt2266_init1,sizeof(mt2266_init1));
  158. mt2266_writeregs(priv,mt2266_init2,sizeof(mt2266_init2));
  159. mt2266_writereg(priv,0x33,0x5e);
  160. mt2266_writereg(priv,0x10,0x10);
  161. mt2266_writereg(priv,0x10,0x00);
  162. mt2266_writeregs(priv,mt2266_init_8mhz,sizeof(mt2266_init_8mhz));
  163. msleep(25);
  164. mt2266_writereg(priv,0x17,0x6d);
  165. mt2266_writereg(priv,0x1c,0x00);
  166. msleep(75);
  167. mt2266_writereg(priv,0x17,0x6d);
  168. mt2266_writereg(priv,0x1c,0xff);
  169. }
  170. static int mt2266_get_frequency(struct dvb_frontend *fe, u32 *frequency)
  171. {
  172. struct mt2266_priv *priv = fe->tuner_priv;
  173. *frequency = priv->frequency;
  174. return 0;
  175. }
  176. static int mt2266_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
  177. {
  178. struct mt2266_priv *priv = fe->tuner_priv;
  179. *bandwidth = priv->bandwidth;
  180. return 0;
  181. }
  182. static int mt2266_init(struct dvb_frontend *fe)
  183. {
  184. struct mt2266_priv *priv = fe->tuner_priv;
  185. mt2266_writereg(priv,0x17,0x6d);
  186. mt2266_writereg(priv,0x1c,0xff);
  187. return 0;
  188. }
  189. static int mt2266_sleep(struct dvb_frontend *fe)
  190. {
  191. struct mt2266_priv *priv = fe->tuner_priv;
  192. mt2266_writereg(priv,0x17,0x6d);
  193. mt2266_writereg(priv,0x1c,0x00);
  194. return 0;
  195. }
  196. static int mt2266_release(struct dvb_frontend *fe)
  197. {
  198. kfree(fe->tuner_priv);
  199. fe->tuner_priv = NULL;
  200. return 0;
  201. }
  202. static const struct dvb_tuner_ops mt2266_tuner_ops = {
  203. .info = {
  204. .name = "Microtune MT2266",
  205. .frequency_min = 470000000,
  206. .frequency_max = 860000000,
  207. .frequency_step = 50000,
  208. },
  209. .release = mt2266_release,
  210. .init = mt2266_init,
  211. .sleep = mt2266_sleep,
  212. .set_params = mt2266_set_params,
  213. .get_frequency = mt2266_get_frequency,
  214. .get_bandwidth = mt2266_get_bandwidth
  215. };
  216. struct dvb_frontend * mt2266_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct mt2266_config *cfg)
  217. {
  218. struct mt2266_priv *priv = NULL;
  219. u8 id = 0;
  220. priv = kzalloc(sizeof(struct mt2266_priv), GFP_KERNEL);
  221. if (priv == NULL)
  222. return NULL;
  223. priv->cfg = cfg;
  224. priv->i2c = i2c;
  225. if (mt2266_readreg(priv,0,&id) != 0) {
  226. kfree(priv);
  227. return NULL;
  228. }
  229. if (id != PART_REV) {
  230. kfree(priv);
  231. return NULL;
  232. }
  233. printk(KERN_INFO "MT2266: successfully identified\n");
  234. memcpy(&fe->ops.tuner_ops, &mt2266_tuner_ops, sizeof(struct dvb_tuner_ops));
  235. fe->tuner_priv = priv;
  236. mt2266_calibrate(priv);
  237. return fe;
  238. }
  239. EXPORT_SYMBOL(mt2266_attach);
  240. MODULE_AUTHOR("Olivier DANET");
  241. MODULE_DESCRIPTION("Microtune MT2266 silicon tuner driver");
  242. MODULE_LICENSE("GPL");